Self-powered phase change memory and method of making the same

Abstract

The application relates to the technical field of microelectronic device preparation, and discloses a self-powered phase change memory and a preparation method thereof; the device adopts a vertical stacked integration architecture and sequentially comprises a transparent conductive substrate, a photoelectric conversion layer, a connecting electrode layer, an insulating dielectric layer, a phase change material layer and a top electrode from bottom to top; the application converts incident light energy into electric energy by using the photoelectric conversion layer, directly drives the phase change material to occur crystal / amorphous reversible phase change through a Joule heat effect, and realizes data writing and erasing without an external power supply. Gradient component photoelectric conversion layers are used to strengthen carrier directional transport, and a bias voltage assisted conformal deposition process is combined to improve the coverage uniformity of the phase change material in the through hole and reduce the contact resistance. The application effectively improves the working reliability and device performance consistency of the self-powered storage and is suitable for low-power storage scenes such as edge computing and passive sensing.

Description

Technical Field

[0001] This invention relates to the field of microelectronic device fabrication technology, specifically to a self-powered phase-change memory and its fabrication method. Background Technology

[0002] Phase-change memory (PCM) is a non-volatile semiconductor memory device based on the phase-change effect of chalcogenide compounds. Its core structure typically includes upper and lower electrode layers, a phase-change functional layer, and a dielectric isolation structure. It relies on Joule heating generated by electrical pulses to reversibly switch the phase-change material between a crystalline and amorphous states. The significant resistance difference between these two states enables the writing, erasing, and reading of binary data, exhibiting nanosecond-level read / write speeds, high storage density, and excellent data non-volatility retention. Self-powered PCM is a storage technology branch developed for low-power electronic systems. It typically integrates an ambient energy harvesting unit with the PCM unit, harvesting light, heat, or mechanical energy from the surrounding environment and converting it into electrical energy to power the read / write operations of the storage unit. It does not require a complete external power supply and can be widely used in IoT sensor nodes, passive RFID tags, wearable electronic devices, and other scenarios, adapting to the low-power storage needs of distributed edge computing architectures.

[0003] While phase-change memories (PCMs) demonstrate significant advantages in edge computing storage due to their non-volatility and nanosecond-level read / write speeds, the unstable power supply in edge scenarios has become a critical bottleneck. Edge devices are often deployed in environments with frequent power fluctuations, such as field substations and factory power grid terminals. However, the phase-change process of traditional PCMs requires milliampere-level current, making them extremely sensitive to the stability of the energy supply. Power interruptions or fluctuations can easily cause the phase-change process to stop midway, leaving the phase-change material in an intermediate resistive state, leading to data write errors or loss. Currently, photoelectric conversion-based light-driven self-powered storage solutions still have significant shortcomings. Homogeneous components in the photoelectric conversion layer have weak directional carrier transport and high bulk recombination rates, resulting in low photoelectric conversion efficiency. In low-light or fluctuating lighting environments, the output power cannot support the complete phase-change process, making it difficult to guarantee the reliability of storage operation in passive scenarios. Summary of the Invention

[0004] Technical problems to be solved To address the shortcomings of existing technologies, this invention provides a self-powered phase-change memory and its fabrication method, which solves the problems of traditional phase-change memories relying on external stable power supplies and being difficult to adapt to complex edge power supply environments. At the same time, it solves the problems of low photoelectric conversion efficiency, insufficient output current density, poor consistency in phase-change memory cell fabrication, high contact resistance, and low device yield and reliability in optoelectronic-phase-change integrated solutions.

[0005] Technical solution To achieve the above objectives, the present invention provides the following technical solution: A self-powered phase-change memory (PCM) employs a vertically stacked integrated architecture, comprising, from bottom to top, a transparent conductive substrate, a photoelectric conversion layer, a connecting electrode layer, an insulating dielectric layer, a PCM material layer, and a top electrode layer. The transparent conductive substrate serves as both substrate support and bottom electrical lead-out. The photoelectric conversion layer converts incident light energy into directional electrical energy to power the PCM unit. The connecting electrode layer constructs interlayer conductive paths to ensure ohmic contact at the interface. The insulating dielectric layer contains through-holes extending to the connecting electrode layer for unit isolation and phase-change region confinement. The PCM material layer fills the through-holes, achieving a reversible phase transition between crystalline and amorphous states through the Joule heating effect to complete data read / write operations. The top electrode layer is used for the top electrical lead-out of the PCM unit.

[0006] Preferably, the photoelectric conversion layer is made of perovskite material or organic photovoltaic material; the perovskite material includes organic-inorganic hybrid perovskite, all-inorganic perovskite, and lead-free perovskite, with the general chemical formula ABX3, wherein A is methylamino, formamidinyl, or cesium ion, B is lead, tin, or germanium ion, and X is a halide ion; the organic photovoltaic material includes polymer donor material, small molecule donor material, non-fullerene acceptor material, and fullerene acceptor material, wherein the donor material includes PM6, PBDB-T, and PTB7-Th, and the acceptor material includes Y6, QX-5F-Br, and PC. 61 BM, IT-4F.

[0007] Preferably, the phase change material layer is a chalcogenide compound phase change material, specifically any one or any combination of GeSbTe, GeTe, SbTe, BiTe, and elemental Sb, or a doping system formed by incorporating at least one element from S, N, O, Cu, Si, Cr, Y, Sc, Ti, and Ni into the above materials; the connecting electrode layer is made of metallic gold or metallic silver, the insulating dielectric layer is made of silicon oxide, and the top electrode layer is made of a Ti / Pt composite metal layer or metallic tungsten.

[0008] A self-powered phase-change memory and its fabrication method, applied to the self-powered phase-change memory according to any one of claims 1-3, further includes the following steps: S1. Select ITO conductive glass with a transparent conductive substrate as the substrate, and prepare a photoelectric conversion layer on the upper surface of the transparent conductive substrate. S2. Prepare a connecting electrode layer on the upper surface of the photoelectric conversion layer; S3. Deposit an insulating dielectric layer on the upper surface of the connecting electrode layer; S4. Photolithography and etching are performed on the insulating dielectric layer to form a through-hole structure that extends to the connecting electrode layer. S5. Deposit a phase change material layer on the surface of the insulating dielectric layer with through-hole structure, so that the phase change material fills the inside of the through-hole and covers the upper surface of the insulating dielectric layer. S6. Prepare a top electrode layer on the upper surface of the phase change material layer to complete the vertical stacking integration of the self-powered phase change memory.

[0009] Preferably, in step S1, the photoelectric conversion layer is prepared by solution spin coating or vapor deposition; when perovskite material is used, the thickness of the photoelectric conversion layer is controlled to be 300nm~800nm; when organic photovoltaic material is used, the thickness of the photoelectric conversion layer is controlled to be 100nm~300nm.

[0010] Preferably, in step S1, when a perovskite material is used to prepare the photoelectric conversion layer, a step-by-step spin-coating process is used to prepare a perovskite thin film with a halogen composition gradient distribution; from the transparent conductive substrate side to the electrode layer side, the molar proportion of halogen atoms in the perovskite material gradually increases, forming a continuously gradient band structure, which enhances the directional transport capability of photogenerated carriers and reduces the probability of carrier recombination in the bulk.

[0011] Preferably, in step S5, the phase change material layer is prepared by magnetron sputtering or atomic layer deposition, and the overall thickness is controlled to be 50nm~100nm.

[0012] Preferably, in step S5, when depositing the phase change material layer using magnetron sputtering, a negative bias voltage of -50V to -200V is simultaneously applied to the substrate. The phase change material particles sputtered are driven to move in a directional and accelerated manner by the bias electric field, thereby enhancing the deposition uniformity of the phase change material at the bottom and sidewalls of the via, forming a conformally covered phase change material layer, and reducing the contact resistance between the phase change material at the bottom of the via and the connecting electrode layer.

[0013] Preferably, in step S2, the connecting electrode layer is prepared by vacuum thermal evaporation, and the thickness is controlled to be 10nm~20nm; in step S3, the insulating dielectric layer is prepared by plasma-enhanced chemical vapor deposition, and the thickness is controlled to be 80nm~120nm; in step S4, the through-hole pattern is prepared by electron beam lithography, and the through-hole structure is processed by dry etching, the radius of the through-hole structure is controlled to be 100nm~500nm, and the etching depth is consistent with the thickness of the insulating dielectric layer; in step S6, the top electrode layer is prepared by magnetron sputtering, and the thickness is controlled to be 80nm~120nm.

[0014] Beneficial effects Compared with the prior art, the present invention provides a self-powered phase-change memory and its fabrication method, which has the following beneficial effects: 1. This self-powered phase change memory and its fabrication method, through the setting of a gradient composition photoelectric conversion layer, enables the formation of a continuously and gradually changing energy band arrangement inside the perovskite or organic photoelectric thin film, providing additional directional transport force for the charge carriers generated by photoexcitation, significantly reducing the recombination probability of charge carriers inside the thin film, increasing the output current density and photoelectric conversion efficiency per unit incident light intensity, achieving the goal of providing sufficient and stable operating power to the phase change memory unit without an external power supply, ensuring that the phase change material completes the complete crystalline and amorphous state transition, avoiding data writing errors and data loss caused by intermediate resistive states, and improving the reliability of the self-powered phase change memory in edge unstable power supply scenarios.

[0015] 2. The fabrication method of this self-powered phase change memory utilizes the combination of an insulating dielectric layer via confinement structure and a bias-assisted conformal deposition of the phase change material layer. This allows the phase change material particles to be deposited more directionally and rapidly under the drive of an electric bias voltage, effectively reducing the shadowing effect during sputtering. A conformal capping layer of uniform thickness is formed at the bottom and sidewalls of the high aspect ratio vias, reducing the contact resistance between the phase change material and the bottom connecting electrode. This achieves the effect of reducing the dispersion of the phase change operation threshold between different memory cells, improving the yield and performance consistency of batch fabrication of devices, ensuring the uniformity and stability of read and write parameters of each memory cell, and reducing the overall power consumption fluctuation of the device. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a self-powered phase-change memory and its fabrication method proposed in this invention; Figure 2 This is a schematic diagram of the self-powered phase-change memory and its fabrication method proposed in this invention.

[0017] In the figure: 100, transparent conductive substrate; 101, photoelectric conversion layer; 102, connecting electrode layer; 103, insulating dielectric layer; 104, phase change material layer; 105, top electrode layer. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Please see Figure 1 - Figure 2As shown in the figure, a self-powered phase-change memory adopts a vertically stacked integrated architecture, which includes, from bottom to top, a transparent conductive substrate 100, a photoelectric conversion layer 101, a connecting electrode layer 102, an insulating dielectric layer 103, a phase change material layer 104, and a top electrode layer 105. The transparent conductive substrate 100 serves as both a substrate support and a bottom electrical lead-out function. The photoelectric conversion layer 101 is used to convert incident light energy into directional electrical energy to power the phase change unit. The connecting electrode layer 102 is used to construct interlayer conductive paths to ensure ohmic contact at the interface. The insulating dielectric layer 103 has through-holes extending to the connecting electrode layer 102 for unit isolation and phase change region confinement. The phase change material layer 104 fills the through-holes and achieves a reversible phase transition between crystalline and amorphous states through the Joule heating effect to complete data reading and writing. The top electrode layer 105 is used for the upper electrical lead-out of the phase change memory unit.

[0020] First, the photoelectric conversion layer 101 uses perovskite materials or organic photovoltaic materials. Perovskite materials include organic-inorganic hybrid perovskites, all-inorganic perovskites, and lead-free perovskites, with the general chemical formula ABX3, where A is a methylamino, formamidinyl, or cesium ion, B is a lead, tin, or germanium ion, and X is a halide ion. Organic photovoltaic materials include polymer donor materials, small molecule donor materials, non-fullerene acceptor materials, and fullerene acceptor materials. Donor materials include PM6, PBDB-T, and PTB7-Th, while acceptor materials include Y6, QX-5F-Br, and PC. 61 BM and IT-4F. Perovskite materials, with their ABX3 crystal structure, allow for flexible control of the band gap width by adjusting the composition at the A, B, and X sites, covering the absorption range from visible to near-infrared light. They possess high light absorption coefficients and carrier mobility, efficiently converting incident photons into output photogenerated carriers. Organic-inorganic hybrid perovskites offer low preparation costs and good film-forming properties, while all-inorganic perovskites exhibit excellent thermal stability, and lead-free perovskites reduce environmental toxicity. Organic photovoltaic materials achieve exciton dissociation through heterojunctions formed by donor-acceptor blends. Polymer donor materials offer good film-forming properties and mechanical flexibility, while small-molecule donor materials boast high purity and stable photoelectric performance. Non-fullerene acceptor materials can further broaden the absorption spectrum and improve energy conversion efficiency. Various material systems can be flexibly selected according to application scenarios, ensuring that the current output from the photoelectric conversion layer 101 stably matches the operating power consumption of the phase-change memory unit, providing a reliable energy source for self-powered functionality.

[0021] Secondly, the phase change material layer 104 adopts a chalcogenide compound phase change material, specifically any one or any combination of GeSbTe, GeTe, SbTe, BiTe, and elemental Sb, or a doping system formed by incorporating at least one element from S, N, O, Cu, Si, Cr, Y, Sc, Ti, and Ni into the above materials; the connecting electrode layer 102 adopts metallic gold or metallic silver, the insulating dielectric layer 103 adopts silicon oxide, and the top electrode layer 105 adopts a Ti / Pt composite metal layer or metallic tungsten. Chalcogenide compounds can achieve a reversible order-disorder transition of atomic arrangement under the Joule heating effect generated by an electric pulse. They exhibit low resistance in the crystalline state and high resistance in the amorphous state. Both states have excellent room temperature non-volatile retention capability, which can stably characterize the two logic states of binary data; the doping elements can control the phase change temperature and crystallization rate, optimizing the thermal stability and cycle erase / write lifetime of the material. The gold and silver materials used in the connecting electrode layer 102 have a high work function matching with the photoelectric conversion layer 101, forming a low-resistance ohmic contact and reducing charge transmission losses at the interface. The silicon oxide material used in the insulating dielectric layer 103 has excellent insulation properties and stable chemical properties, effectively isolating adjacent memory cells and preventing current crosstalk between cells. It can also limit the lateral diffusion of phase change heat and improve thermal efficiency. In the top electrode layer 105, the Ti / Pt composite layer enhances the interfacial adhesion with the phase change material, while Pt blocks element interdiffusion. The tungsten metal has a high melting point and good thermal conductivity, can withstand the high temperature of phase change, and assists in heat dissipation, improving the long-term operational reliability of the device.

[0022] A self-powered phase-change memory and its fabrication method, applied to the self-powered phase-change memory according to any one of claims 1-3, further includes the following steps: S1. Select an ITO conductive glass with a transparent conductive substrate 100 as a substrate, and prepare a photoelectric conversion layer 101 on the upper surface of the transparent conductive substrate 100. S2. A connecting electrode layer 102 is prepared on the upper surface of the photoelectric conversion layer 101; S3. Deposit an insulating dielectric layer 103 on the upper surface of the connecting electrode layer 102; S4. Photolithography and etching are performed on the insulating dielectric layer 103 to form a through-hole structure that extends to the connecting electrode layer 102. S5. A phase change material layer 104 is deposited on the surface of the insulating dielectric layer 103 with a through-hole structure, so that the phase change material fills the inside of the through-hole and covers the upper surface of the insulating dielectric layer 103. S6. A top electrode layer 105 is prepared on the upper surface of the phase change material layer 104 to complete the vertical stacking integration of the self-powered phase change memory.

[0023] This fabrication method employs a bottom-up vertical stacking process, enabling monolithic integration of the photoelectric conversion functional layer and the phase-change memory unit on the same substrate. This avoids the additional wiring losses and packaging volume associated with discrete device assembly, effectively reducing the overall device size and improving integration density. The transparent conductive substrate 100 simultaneously serves as a substrate support and a bottom electrode lead-out point, simplifying the device structure and fabrication process. Sequentially depositing each functional layer ensures tight interfacial contact between layers, reducing interfacial resistance. The via structure precisely defines the lateral dimensions of the phase-change material layer 104, reducing the effective volume of the phase-change region and lowering the energy threshold required for phase-change operation. This allows the electrical energy output from the photoelectric conversion layer 101 to fully drive the phase-change process, ensuring stable device operation in self-powered mode.

[0024] Furthermore, in step S1, the photoelectric conversion layer 101 is prepared using either solution spin coating or vapor deposition. When perovskite material is used, the thickness of the photoelectric conversion layer 101 is controlled to be 300 nm to 800 nm; when organic photovoltaic material is used, the thickness of the photoelectric conversion layer 101 is controlled to be 100 nm to 300 nm. Solution spin coating is simple and low-cost, suitable for large-area thin film preparation, and the film thickness can be precisely controlled by adjusting the spin coating speed and solution concentration. The film prepared by vapor deposition has good density and high uniformity, and can achieve precise thickness control. Perovskite material has a long carrier diffusion length, and a thickness range of 300 nm to 800 nm can fully absorb incident photons in the visible light band, while ensuring that photogenerated carriers can migrate smoothly to the electrodes on both sides, avoiding recombination of carriers during transport due to excessive thickness. Organic photovoltaic materials have a shorter exciton diffusion length. A thinner thickness of 100nm~300nm can shorten the distance that excitons need to reach the heterojunction interface, improve exciton dissociation efficiency and charge collection rate, balance light absorption capacity and carrier transport performance, and enable the photoelectric conversion layer 101 to achieve the optimal photoelectric conversion efficiency.

[0025] Furthermore, in step S1, when the photoelectric conversion layer 101 is prepared using perovskite material, a perovskite thin film with a halogen composition gradient distribution is prepared using a step-by-step spin coating process; from the transparent conductive substrate 100 side to the electrode layer 102 side, the molar proportion of halogen atoms in the perovskite material gradually increases, forming a continuously gradient band structure, which enhances the directional transport capability of photogenerated carriers and reduces the probability of carrier recombination in bulk. The continuous increase in the molar percentage of halogen atoms causes the band gap of the perovskite material to gradually narrow along the film thickness direction, forming a wider band gap on the transparent conductive substrate 100 side and a narrower band gap on the connecting electrode layer 102 side, thereby constructing a gradient built-in electric field along the thickness direction. This gradient electric field and the heterojunction electric field of the perovskite material itself form a superposition effect, providing an additional directional driving force for photogenerated electrons, driving electrons to continuously migrate towards the connecting electrode layer 102, while suppressing the reverse diffusion of electrons, greatly reducing the probability of collision recombination between electrons and holes inside the film, enabling more photogenerated carriers to reach the electrode smoothly and be effectively collected, significantly improving the output current density of the photoelectric conversion layer 101, and providing sufficient driving energy for the phase change material layer 104 even in weak light environments, improving the adaptability of the device in complex lighting environments.

[0026] Furthermore, in step S5, the phase change material layer 104 is prepared using magnetron sputtering or atomic layer deposition, with an overall thickness controlled to be 50nm~100nm. Magnetron sputtering offers a fast deposition rate and high film density, making it suitable for batch preparation of phase change films with uniform thickness. Atomic layer deposition provides atomic-level thickness control precision and excellent step coverage, enabling uniform deposition in high aspect ratio structures. The 50nm~100nm thickness range matches the size of the via structure, ensuring a reasonable volume for the phase change region. This allows for the formation of a stable resistance difference between crystalline and amorphous states, ensuring data readability, while avoiding excessive Joule heat required for phase change due to excessive thickness, thus improving energy utilization efficiency. This thickness range also provides a good match with the output energy of the photoelectric conversion layer 101, ensuring that the phase change process can proceed fully and completely in self-powered mode, avoiding data storage errors caused by intermediate resistance states.

[0027] Furthermore, in step S5, when the phase change material layer 104 is deposited using magnetron sputtering, a negative bias voltage of -50V to -200V is simultaneously applied to the substrate. The phase change material particles sputtered are driven to move in a directional and accelerated manner by the bias electric field, thereby enhancing the deposition uniformity of the phase change material at the bottom and sidewalls of the via and forming a conformally covered phase change material layer 104, thereby reducing the contact resistance between the phase change material at the bottom of the via and the connecting electrode layer 102. The negative bias voltage of the substrate will generate an electric field pointing towards the substrate in the deposition cavity, which will give the ionized phase change material particles during sputtering additional axial acceleration, and allow them to enter the via structure at a more perpendicular angle. This effectively overcomes the shadowing effect of conventional magnetron sputtering and solves the problems of low deposition amount at the bottom of the via and uneven sidewall thickness. The formed conformal phase change material layer 104 can form a sufficiently tight surface contact with the connecting electrode layer 102 at the bottom of the via, which effectively increases the conductive contact area, reduces charge scattering and potential barriers at the interface, significantly reduces contact resistance, and allows current to be injected uniformly into the phase change region. This ensures that the phase change operation threshold of each memory cell is highly consistent, reduces the performance dispersion of different cells in the device array, and improves the yield of batch fabrication and the overall performance stability of the device.

[0028] Finally, in step S2, the connecting electrode layer 102 is prepared using vacuum thermal evaporation, with a thickness controlled to be 10nm~20nm; in step S3, the insulating dielectric layer 103 is prepared using plasma-enhanced chemical vapor deposition, with a thickness controlled to be 80nm~120nm; in step S4, through-hole patterns are prepared using electron beam lithography, and the through-hole structure is processed using dry etching, with the radius of the through-hole structure controlled to be 100nm~500nm, and the etching depth consistent with the thickness of the insulating dielectric layer 103; in step S6, the top electrode layer 105 is prepared using magnetron sputtering, with a thickness controlled to be 80nm~120nm. The metal thin film prepared by vacuum thermal evaporation has high purity and a smooth surface. The ultra-thin thickness of 10nm~20nm allows the connecting electrode layer 102 to exhibit semi-transparent properties, ensuring that incident light can pass smoothly through this layer to reach the photoelectric conversion layer 101, avoiding electrode obstruction and reducing light reception efficiency, while also meeting the conductivity requirements. Plasma-enhanced chemical vapor deposition (PECVD) can prepare dense silicon oxide films at low temperatures. A thickness of 80 nm to 120 nm provides sufficient depth for via etching, ensuring reasonable vertical dimensions of the phase transition units and achieving good unit isolation. Electron beam lithography (EBCD) offers nanometer-level pattern resolution, enabling precise fabrication of micro-sized vias to support the fabrication of high-density memory arrays. Dry etching can form via structures with steep sidewalls and regular morphology. Precise control of the etching depth allows it to penetrate the insulating dielectric layer 103, ensuring complete exposure of the connecting electrode layer 102 for reliable electrical contact while avoiding over-etching and damage to the underlying photoelectric conversion layer 101. Magnetron sputtering produces a uniform and well-adhesive top electrode layer 105. A thickness of 80 nm to 120 nm ensures sufficient conductivity and mechanical strength, while also providing good heat dissipation. This helps regulate the cooling rate of the phase transition region, improving the controllability of the phase transition process and extending the device's cycle life.

[0029] Working principle: When this self-powered phase-change memory is in operation and use, incident light enters from the substrate side of the device, first passing through the transparent conductive substrate 100, which serves as both substrate support and bottom electrical lead-out function, and reaches the photoelectric conversion layer 101 located above it. After absorbing the energy of the incident photons, the valence band electrons in the photoelectric conversion layer 101 are excited to jump to the conduction band, forming a large number of electron-hole pairs. Driven by the intrinsic built-in electric field and gradient band structure within the layer, the photogenerated electrons migrate directionally towards the side closer to the connecting electrode layer 102, and the photogenerated holes migrate directionally towards the side closer to the transparent conductive substrate 100. After the charge carriers are effectively collected by the electrodes on both sides, a stable directional photogenerated current is formed, completing the conversion from incident light energy to usable electricity. The autonomous energy conversion provides the energy source for subsequent storage operations, eliminating the need for external power supply. The generated photocurrent is conducted upwards through the semi-transparent connecting electrode layer 102, which simultaneously serves as the upper electrode of the photoelectric conversion layer 101 and the bottom electrode of the phase-change memory cell. This ensures low-resistance ohmic contact at the interface, reduces charge transfer loss, and, thanks to its ultra-thin and semi-transparent properties, avoids blocking incident light, ensuring the light-receiving efficiency of the photoelectric conversion layer 101. The current then enters the phase-change material layer 104, confined by the through-hole structure of the insulating dielectric layer 103. The insulating dielectric layer 103 surrounds the phase-change region, achieving electrical isolation between adjacent memory cells, avoiding current crosstalk and read / write interference. By limiting the lateral dimensions of the phase change material and reducing the volume of the phase change region, the energy threshold required for phase change operation is effectively lowered. When current flows through the phase change material layer 104, Joule heating is generated by the material's own resistance effect. By controlling the pulse amplitude and duration of the input current, the temperature change of the phase change region can be precisely controlled, achieving reversible state switching and data operation: when a long-pulse, medium-amplitude current pulse is input, the temperature of the phase change material layer 104 rises above the crystallization temperature and remains there for a corresponding duration, and the atoms inside the material complete the ordered arrangement, changing from a high-resistivity amorphous state to a low-resistivity crystalline state, corresponding to the completion of the data writing operation; when a short-pulse, high-peak current pulse is input, the temperature of the phase change material layer 104 rises above the crystallization temperature and remains there for a corresponding duration, and the atoms inside the material complete the ordered arrangement, changing from a high-resistivity amorphous state to a low-resistivity crystalline state, corresponding to the completion of the data writing operation; when a short-pulse, high-peak current pulse is input, the temperature of the phase change material layer 104... The temperature rises rapidly above the melting point, and then the material cools down quickly through the top electrode layer 105 and the surrounding insulating dielectric layer 103. The material atoms do not have time to form an ordered lattice and solidify into a disordered structure, changing from a low-resistivity crystalline state to a high-resistivity amorphous state, which corresponds to the data erasure operation. The top electrode layer 105 covers the phase change material layer 104 and the insulating dielectric layer 103, serving as the upper electrical lead of the phase change storage unit. Together with the transparent conductive substrate 100 and the connecting electrode layer 102, it forms a complete current loop. At the same time, it uses its own thermal conductivity to help regulate the heat dissipation rate of the phase change region, ensuring the stability and repeatability of the phase change process. It can also block the diffusion of phase change elements and improve the cycle life of the device.When reading stored data, only a weak probe current with an amplitude far below the phase transition threshold needs to be applied to the device. By detecting the resistance value presented by the phase change material layer 104, the corresponding stored binary logic state can be identified. Moreover, this reading process does not change the phase state of the material, achieving non-destructive data reading.

[0030] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A self-powered phase-change memory, characterized in that, The system adopts a vertically stacked integrated architecture, which includes, from bottom to top, a transparent conductive substrate (100), a photoelectric conversion layer (101), a connecting electrode layer (102), an insulating dielectric layer (103), a phase change material layer (104), and a top electrode layer (105). The transparent conductive substrate (100) serves as both a substrate support and a bottom electrical lead-out function. The photoelectric conversion layer (101) is used to convert incident light energy into directional electrical energy to power the phase change unit. The connecting electrode layer (102) is used to construct an interlayer conductive path to ensure ohmic contact at the interface. The insulating dielectric layer (103) has a through-hole that extends to the connecting electrode layer (102) for unit isolation and phase change region confinement. The phase change material layer (104) fills the through-hole and achieves a crystalline / amorphous reversible phase transition through the Joule heating effect to complete data reading and writing. The top electrode layer (105) is used for the upper electrical lead-out of the phase change memory unit.

2. The self-powered phase-change memory according to claim 1, characterized in that, The photoelectric conversion layer (101) is made of perovskite material or organic photovoltaic material; the perovskite material includes organic-inorganic hybrid perovskite, all-inorganic perovskite, and lead-free perovskite, with the general chemical formula ABX3, where A is methylamino, formamidinyl, or cesium ion, B is lead, tin, or germanium ion, and X is a halide ion; the organic photovoltaic material includes polymer donor material, small molecule donor material, non-fullerene acceptor material, and fullerene acceptor material, wherein the donor material includes PM6, PBDB-T, and PTB7-Th, and the acceptor material includes Y6, QX-5F-Br, and PC. 61 BM, IT-4F.

3. The self-powered phase-change memory according to claim 1, characterized in that, The phase change material layer (104) is a chalcogenide compound phase change material, specifically any one or any combination of GeSbTe, GeTe, SbTe, BiTe, and elemental Sb, or a doping system formed by incorporating at least one element from S, N, O, Cu, Si, Cr, Y, Sc, Ti, and Ni into the above materials; the connecting electrode layer (102) is made of metallic gold or metallic silver, the insulating dielectric layer (103) is made of silicon oxide, and the top electrode layer (105) is made of Ti / Pt composite metal layer or metallic tungsten.

4. A self-powered phase-change memory and its fabrication method, applied to the self-powered phase-change memory according to any one of claims 1-3, characterized in that, It also includes the following steps: S1. Select an ITO conductive glass with a transparent conductive substrate (100) as a substrate, and prepare a photoelectric conversion layer (101) on the upper surface of the transparent conductive substrate (100). S2. A connecting electrode layer (102) is prepared on the upper surface of the photoelectric conversion layer (101). S3. Deposit an insulating dielectric layer (103) on the upper surface of the connecting electrode layer (102). S4. Photolithography and etching are performed on the insulating dielectric layer (103) to form a through-hole structure that extends to the connecting electrode layer (102); S5. A phase change material layer (104) is deposited on the surface of the insulating dielectric layer (103) with through-hole structure, so that the phase change material fills the through-hole and covers the upper surface of the insulating dielectric layer (103); S6. A top electrode layer (105) is prepared on the upper surface of the phase change material layer (104) to complete the vertical stacking integration of the self-powered phase change memory.

5. The self-powered phase-change memory and its fabrication method according to claim 4, characterized in that, In step S1, the photoelectric conversion layer (101) is prepared by solution spin coating or vapor deposition. When perovskite material is used, the thickness of the photoelectric conversion layer (101) is controlled to be 300nm~800nm. When organic photovoltaic material is used, the thickness of the photoelectric conversion layer (101) is controlled to be 100nm~300nm.

6. The self-powered phase-change memory and its fabrication method according to claim 5, characterized in that, In step S1, when the photoelectric conversion layer (101) is prepared using perovskite material, a perovskite thin film with a gradient distribution of halogen components is prepared by step spin coating process; from the transparent conductive substrate (100) side to the connecting electrode layer (102) side, the molar proportion of halogen atoms in the perovskite material gradually increases, forming a continuously gradient band structure, which enhances the directional transport capability of photogenerated carriers and reduces the probability of carrier recombination in the bulk.

7. The self-powered phase-change memory and its fabrication method according to claim 4, characterized in that, In step S5, the phase change material layer (104) is prepared by magnetron sputtering or atomic layer deposition, and the overall thickness is controlled to be 50nm~100nm.

8. The self-powered phase-change memory and its fabrication method according to claim 7, characterized in that, In step S5, when the phase change material layer (104) is deposited using magnetron sputtering, a negative bias voltage of -50V to -200V is simultaneously applied to the substrate. The phase change material particles sputtered are driven to move in a directional and accelerated manner by the bias electric field, thereby enhancing the deposition uniformity of the phase change material at the bottom and sidewalls of the via and forming a conformally covered phase change material layer (104), which reduces the contact resistance between the phase change material at the bottom of the via and the connecting electrode layer (102).

9. A self-powered phase-change memory and its fabrication method according to claim 4, characterized in that, In step S2, the connecting electrode layer (102) is prepared by vacuum thermal evaporation, and the thickness is controlled to be 10nm~20nm; in step S3, the insulating dielectric layer (103) is prepared by plasma-enhanced chemical vapor deposition, and the thickness is controlled to be 80nm~120nm; in step S4, the through-hole pattern is prepared by electron beam exposure, and the through-hole structure is processed by dry etching, the radius of the through-hole structure is controlled to be 100nm~500nm, and the etching depth is consistent with the thickness of the insulating dielectric layer (103); in step S6, the top electrode layer (105) is prepared by magnetron sputtering, and the thickness is controlled to be 80nm~120nm.

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