Semiconductor memory device and method of manufacturing the same

Abstract

A method of fabricating a semiconductor memory device includes the following steps. A gate conductor stack having a tungsten layer is formed on a substrate, wherein the tungsten layer has a tungsten oxide film. The tungsten oxide film is subjected to a nitrogen-containing plasma treatment to form at least a tungsten oxynitride (WNxOy) layer on the tungsten layer, wherein x and y are positive integers and x is greater than y. The WNxOy layer serves as a barrier layer that is chemically stable and has a diffusion resistance on the tungsten layer.

Description

Technical Field

[0001] This invention relates to a semiconductor memory device and a method for manufacturing the same. Background Technology

[0002] In advanced semiconductor manufacturing, the gate conductor structure plays a crucial role in determining transistor performance, reliability, and device yield. Tungsten is widely used in gate conductor integration due to its low resistivity, good thermal stability, and compatibility with high-density device architectures. However, during downstream manufacturing processes, especially after prolonged thin-film deposition or thermal processes, the tungsten surface is easily oxidized, forming tungsten oxide. This oxidation phenomenon becomes a major reliability concern because tungsten oxide is chemically unstable under certain wet chemical environments. Therefore, during high-temperature chemical processing, the gate conductor structure becomes susceptible to corrosion and material loss, ultimately affecting the yield of wafer acceptance testing.

[0003] Tungsten oxide formation is primarily associated with oxygen exposure during deposition, plasma treatment, post-cleaning waiting time, or thermal cycling. Compared to pure metallic tungsten, tungsten oxide is significantly less chemically resistant. When wafers undergo wet cleaning or stripping processes involving chemicals such as phosphoric acid or hot deionized water, the oxide layer reacts with the solution and gradually dissolves. At elevated temperatures, the reaction rate increases significantly, accelerating the removal of tungsten oxide and even eroding the underlying metallic tungsten. This results in tungsten depressions, increased surface roughness, and localized tungsten loss within the gate conductor region.

[0004] This damage mechanism is particularly severe in structures with extended thin-film process flows or insufficient surface protection. Longer process times mean greater exposure to oxygen and moisture, increasing the likelihood of oxide growth. Furthermore, if the process queue time between deposition and wet cleaning is not properly controlled, native oxidation can persist on the tungsten surface. Once the oxide thickness exceeds a critical level, high-temperature chemicals can more easily penetrate grain boundaries and fragile interfaces, leading to uneven etching behavior. This localized corrosion can cause gate resistance variations, open circuits, or degraded transistor electrical characteristics.

[0005] From a device performance perspective, tungsten loss within the gate conductor directly impacts key electrical parameters measured during wafer acceptance testing. For example, increased gate resistance alters transistor switching speed and timing behavior. Severe tungsten pitting can also affect the uniformity of the critical voltage and the distribution of leakage current. Therefore, even minute tungsten oxide corrosion can translate into significant yield losses during the final electrical testing phase.

[0006] Several process-related factors can further exacerbate the problem of tungsten oxide corrosion. High chemical temperature is one of the most influential parameters, as the increased heat accelerates the kinetics of oxide dissolution. Chemical concentration and process duration also strongly influence the severity of corrosion. For example, prolonged immersion in hot phosphoric acid at high temperatures can continuously remove the protective oxide layer, exposing the fresh tungsten surface to further corrosion. Furthermore, inefficient rinsing or residual chemical contamination can leave reactive species on the wafer surface, leading to continued corrosion even after the wet process has finished.

[0007] To minimize tungsten oxide damage, semiconductor manufacturers typically implement various process optimization strategies. One common approach is to reduce oxygen exposure after tungsten deposition by improving vacuum transport or shortening queue time control. Another effective solution is to introduce protective barrier layers or capping films to isolate tungsten from environmental oxidation. Process engineers can also optimize wet cleaning formulations by lowering chemical temperatures, shortening immersion times, or adjusting chemical concentrations to reduce tungsten corrosion. Furthermore, advanced surface pretreatment and post-cleaning drying techniques help suppress residual moisture and oxidation reactions.

[0008] In summary, the formation of tungsten oxide within the gate conductor structure is a key integration challenge in advanced semiconductor manufacturing. Because tungsten oxide exhibits poor resistance to high-temperature chemicals such as hot phosphoric acid and deionized water, this structure is highly susceptible to corrosion and tungsten loss during wet processes. This degradation can severely impact the electrical performance of devices and reduce wafer acceptance test yields. Therefore, controlling oxidation behavior, optimizing chemical processes, and enhancing on-line monitoring are crucial for improving gate conductor reliability and maintaining stable semiconductor manufacturing yields. Summary of the Invention

[0009] This invention proposes an innovative semiconductor memory device and its manufacturing method, solving the problems of prior art.

[0010] In some embodiments of the present invention, a method for manufacturing a semiconductor memory device includes: forming a gate conductor stack having a tungsten layer on a substrate, wherein the tungsten layer has a tungsten oxide thin film; and subjecting the tungsten oxide thin film to a nitrogen-containing plasma treatment to form at least one tungsten oxynitride (WNxOy) layer on the tungsten layer, wherein x and y are both positive integers, and x is greater than y.

[0011] In some embodiments of the present invention, the WNxOy layer is in direct contact with the tungsten layer.

[0012] In some embodiments of the present invention, the nitrogen-containing plasma comprises pure N2 gas.

[0013] In some embodiments of the present invention, the nitrogen-containing plasma comprises 4% H2 and 96% N2 gas.

[0014] In some embodiments of the present invention, the tungsten oxide film is subjected to the nitrogen-containing plasma treatment to form another tungsten oxynitride (WNzOk) layer, wherein z and k are both positive integers, and k is greater than z.

[0015] In some embodiments of the present invention, the WNxOy layer is located between the WNzOk layer and the tungsten layer.

[0016] In some embodiments of the present invention, the manufacturing method further includes performing a phosphoric acid process after the nitrogen-containing plasma treatment.

[0017] In some embodiments of the present invention, the manufacturing method further includes performing a hot deionized water process after the nitrogen-containing plasma treatment.

[0018] In some embodiments of the present invention, a semiconductor memory device includes: a gate conductor stack on a substrate, wherein the gate conductor stack has a tungsten layer; and a tungsten oxynitride (WNxOy) layer on the tungsten layer, wherein x and y are both positive integers, and x is greater than y.

[0019] In some embodiments of the present invention, the WNxOy layer is in direct contact with the tungsten layer.

[0020] In some embodiments of the present invention, the semiconductor memory device further includes another tungsten oxynitride (WNzOk) layer, wherein z and k are both positive integers and k is greater than z, and the WNxOy layer is located between the WNzOk layer and the tungsten layer.

[0021] In some embodiments of the present invention, the WNxOy layer is in direct contact with the tungsten layer.

[0022] In some embodiments of the present invention, the gate conductor stack further includes a polysilicon layer located between the tungsten layer and the substrate.

[0023] In some embodiments of the present invention, the gate conductor stack further includes a gate oxide layer located between the polysilicon layer and the substrate.

[0024] In some embodiments of the present invention, the gate oxide layer is in contact with the substrate.

[0025] Therefore, nitrogen-containing plasma can form a tungsten oxynitride stacked structure with a chemical composition gradient, wherein the upper WNzOk layer serves as a chemically reactive or sacrificial surface layer, while the lower WNxOy layer serves as a chemically stable barrier layer with anti-diffusion capabilities located on the tungsten layer. The above description will be further explained below with reference to embodiments, providing a more detailed explanation of the technical solution of the present invention. Attached Figure Description

[0026] To make the above and other objects, features, advantages and embodiments of the present invention more apparent and understandable, the accompanying drawings are described below: Figures 1 to 3 A cross-sectional view illustrating some manufacturing steps of a semiconductor memory device according to some embodiments of the present invention. Detailed Implementation

[0027] To provide a more detailed and complete description of the invention, reference can be made to the accompanying drawings and the various embodiments described below, in which the same numbers represent the same or similar elements. Furthermore, well-known elements and steps are not described in the embodiments to avoid unnecessarily limiting the invention.

[0028] Please refer to Figure 1 This diagram illustrates a cross-sectional view of a semiconductor memory device fabrication process according to some embodiments of the present invention. The cross-sectional view shows a portion of a memory device 100, including a gate conductor stack layer formed on a semiconductor substrate 101. The semiconductor substrate may be processed to form PMOS and NMOS regions. To form the NMOS region, a P-type well is formed by implanting a P-type dopant (e.g., boron) into a selected region of the substrate. High-temperature thermal annealing or rapid thermal processing is then performed to activate the dopant and drive it to the desired depth. Subsequently, an NMOS transistor, in which electrons are the primary carriers, is fabricated within the P-type doped region.

[0029] For PMOS regions, N-type wells are formed by implanting N-type dopants (such as phosphorus or arsenic) into other selected regions of the same substrate. After thermal activation, PMOS transistors are fabricated in these N-type doped wells, where holes serve as the dominant carriers. Shallow trench isolation (STI) structures are typically used in conjunction with well formation processes to electrically isolate adjacent devices and define device boundaries.

[0030] Through this selective doping and annealing process, a single silicon wafer can be effectively partitioned into NMOS and PMOS active regions. This dual-well structure enables complementary operation of CMOS devices and provides a basis for subsequent gate stacking integration.

[0031] After the substrate containing the PMOS and NMOS regions is fabricated, a thin gate oxide layer 101a (SiO2 or SiOx) is formed on its top surface, usually by thermal oxidation or controlled pre-cleaning oxidation.

[0032] Next, a polysilicon layer 102 is deposited on the gate oxide layer 101a. The polysilicon layer 102 can be formed on the gate oxide layer 101a using a chemical vapor deposition (CVD) process, most commonly low-pressure chemical vapor deposition (LPCVD). In a typical semiconductor manufacturing process, the gate oxide layer 101a is first thermally grown on the surface of a semiconductor substrate to serve as the gate dielectric layer. After the gate oxide layer is formed, the substrate is moved into an LPCVD reaction chamber to deposit the polysilicon layer.

[0033] During the deposition process, a silicon-containing precursor gas (e.g., silane (SiH4) or dichlorosilane (SiH2Cl2)) is introduced into the reaction chamber and reacted under high temperature conditions. The precursor thermally decomposes on the surface of the gate oxide layer 101a, thus forming a conformal polycrystalline silicon layer 102 on the gate oxide layer 101a.

[0034] The deposition temperature is typically maintained in the range of approximately 550°C to 650°C to promote the formation of polycrystalline silicon. The film thickness, grain structure, and uniformity are controlled by adjusting the chamber pressure and gas flow conditions. The formed polycrystalline silicon layer 102 can then undergo further doping processes, such as ion implantation or in-situ doping during deposition, to improve its conductivity when used as a gate electrode.

[0035] Therefore, the polysilicon layer 102 can be deposited on the gate oxide layer 101a using a silicon-containing precursor gas under conditions sufficient to form a polysilicon thin film on the gate oxide layer surface by LPCVD.

[0036] Next, a tungsten layer 104 is formed on the polysilicon layer 102. The tungsten layer 104 can be formed on the polysilicon layer 102 using a chemical vapor deposition (CVD) process, particularly a tungsten chemical vapor deposition process using a tungsten precursor gas. In a typical semiconductor manufacturing process, after the polysilicon layer 102 is formed, the substrate is moved into a deposition chamber where tungsten is selectively or completely deposited on the exposed surfaces of the polysilicon layer 102.

[0037] In one embodiment, tungsten hexafluoride (WF6) is introduced into a reaction chamber along with a reducing gas (e.g., hydrogen (H2) or silane (SiH4)). Under high-temperature conditions, the WF6 precursor undergoes a chemical reduction reaction, thereby depositing metallic tungsten on the polycrystalline silicon surface. Alternatively, silane can also be used as a reducing agent.

[0038] The deposition temperature is typically maintained within a range sufficient to promote tungsten nucleation and thin film growth, while ensuring compatibility with the underlying polysilicon layer 102 and gate oxide layer 101a. During deposition, tungsten atoms nucleate on the surface of the polysilicon layer 102 and gradually accumulate to form the tungsten layer 104. The thickness of the tungsten layer can be controlled by adjusting the precursor flow rate, chamber pressure, deposition temperature, and process time.

[0039] In some embodiments, a thin adhesion layer or barrier layer, such as titanium nitride (TiN), may be selectively formed between the polysilicon layer 102 and the tungsten layer 104 to improve adhesion, reduce fluorine permeation, or inhibit interfacial reactions. After deposition, the tungsten layer 104 may further undergo annealing or patterning processes to form a gate conductor structure.

[0040] Therefore, the tungsten layer 104 can be formed on the polysilicon layer 102 using a tungsten chemical vapor deposition (CVD) process, using a tungsten-containing precursor and a reducing gas, under conditions sufficient to deposit metallic tungsten on the polysilicon layer 102. The gate conductor stack layer GC may include the gate oxide layer 101a, the polysilicon layer 102, and the tungsten layer 104, etc.

[0041] In some embodiments, the top surface of the tungsten layer 104 is typically covered with a naturally formed or intentionally formed tungsten oxide film 106, such as WO2 or WO3. In some embodiments, a nitride layer 103 and a natural oxide layer 105 may be formed on the back side of the semiconductor substrate 101.

[0042] Please refer to Figure 2 A nitrogen-containing plasma 120 treatment can be applied to the tungsten oxide film 106 to form at least one tungsten oxynitride (WNxOy) layer 106b on (e.g., in direct contact with) the tungsten layer 104. The nitrogen-containing plasma 120 is used to convert at least a portion of the tungsten oxide film 106 (i.e., the lower portion adjacent to the tungsten layer 104) into the tungsten oxynitride (WNxOy) layer 106b. This process is typically implemented using plasma-based surface treatment techniques, such as inductively coupled plasma (ICP), capacitively coupled plasma (CCP), or remote plasma nitriding processes, depending on the required ion energy and damage control requirements.

[0043] In some embodiments, the tungsten oxide film 106 is first exposed to a nitrogen-containing plasma 120, which is generated from pure N2 gas or a mixture thereof (e.g., 4% H2 and 96% N2). In the plasma environment, high-energy electrons dissociate the supply gas to generate active species, including atomic nitrogen (N2). ), nitrogen ions (N + ), and atomic hydrogen (H) produced when hydrogen is present. These active species interact with the tungsten oxide surface, triggering simultaneous reduction and nitriding reactions.

[0044] When the nitrogen-containing plasma 120 is generated solely by N2 gas, its primary mechanism is nitrogen incorporation driven by ion bombardment and free radical diffusion. High-energy nitrogen species penetrate the near-surface region of the tungsten oxide film 106, breaking WO bonds and partially replacing oxygen atoms with nitrogen atoms. This leads to the gradual formation of WN bonds while retaining some residual WO bonds, thus forming the tungsten oxynitride layer 106b.

[0045] When using a mixed-gas plasma (4% H2 and 96% N2), hydrogen radicals provide an additional reduction pathway. These hydrogen species assist in the removal of oxygen from the tungsten oxide lattice by forming volatile byproducts such as water vapor, thus creating oxygen vacancies that facilitate nitrogen incorporation. This combined effect accelerates the transformation of WO2 and WO3 into a more uniform WNxOy layer 106b.

[0046] During the process, key parameters such as plasma power, chamber pressure, substrate temperature, gas flow rate ratio, and processing time are carefully controlled to adjust the nitrogen content (x), oxygen content (y), and formation depth in the tungsten oxynitride layer 106b. Higher RF power increases radical density and ion energy, promoting deeper nitrogen penetration, but also increases the risk of surface damage or sputtering. Lower process temperatures generally favor surface-specific modification, while moderate heating helps improve the diffusion and uniformity of the WNxOy layer.

[0047] The tungsten layer 104, located beneath the tungsten oxide film 106, also plays a crucial role during plasma processing. As a conduction path for electricity and heat, it can influence the charge distribution and localized heating during ion bombardment. By appropriately adjusting the process conditions, it can be ensured that changes in oxidation state occur primarily within the tungsten oxide film 106 without causing excessive etching or damage to the underlying tungsten layer 104.

[0048] In some embodiments, the WNxOy layer 106b can be controlled such that its nitrogen content (x) is greater than its oxygen content (y), where x and y are both positive integers. When the WNxOy layer 106b is controlled such that its nitrogen content (x) is greater than its oxygen content (y), the WNxOy layer 106b can exhibit better resistance to phosphoric acid (H3PO4) and hot deionized water (HDIW).

[0049] Tungsten oxide (WOx) is generally highly reactive in polar, proton-rich environments because WO bonds readily undergo hydroxylation. In hot deionized water or acidic solutions such as H3PO4, surface WO bonds may undergo hydration and proton-assisted dissolution reactions, leading to the formation of soluble tungsten compounds (e.g., tungstate-related ions). This process is further accelerated at high temperatures due to increased diffusion rates and reaction kinetics.

[0050] When the nitrogen doping amount is increased (x > y), a significant proportion of the structure in the crystal lattice changes from a WO-dominated coordination structure to a WN or mixed WNW bond network. These bonds exhibit higher covalent properties and lower polarity compared to WO bonds. This reduces the surface's affinity for protonation and nucleophilic attacks by water molecules. Therefore, the initial step required for the dissolution reaction (surface hydroxide reaction) is significantly suppressed.

[0051] In some embodiments, if oxygen is completely removed, the WNxOy layer 106b can be more precisely described as WNx.

[0052] Furthermore, a nitrogen-containing plasma 120 treatment can be applied to the tungsten oxide film 106 to form another tungsten oxynitride (WNzOk) layer 106a on top of the tungsten oxynitride (WNxOy) layer 106b, where z and k are both positive integers, and k is greater than z. When the WNzOk layer 106a is controlled such that the oxygen content (k) is greater than the nitrogen content (z), the WNzOk layer 106a has lower resistance to phosphoric acid (H3PO4) and hot deionized water (HDIW) compared to the WNxOy layer 106b. The nitrogen-containing plasma 120 is used to convert at least a portion of the tungsten oxide film 106 (i.e., the upper portion farther from the tungsten layer 104 than the WNxOy layer 106b) into the WNzOk layer 106a.

[0053] A nitrogen-containing plasma 120 treatment can be applied to the tungsten oxide film 106. By controlling the plasma chemical properties and the depth-dependent reaction kinetics along the thickness direction in the oxide film, a tungsten oxynitride structure with a differentiated composition along the vertical direction is formed, which includes an upper WNzOk layer 106a and a lower WNxOy layer 106b.

[0054] In some embodiments, a tungsten oxide film 106 (e.g., WO2 or WO3) located on the tungsten layer 104 is exposed to a nitrogen-containing plasma 120, which may be generated by pure N2 gas or a mixture of gases (e.g., 4% H2 and 96% N2). The nitrogen-containing plasma 120 generates reactive nitrogen species (N... N + Furthermore, when hydrogen is present, reducing species (H) are also produced. These active species interact with the surface and subsurface regions of the tungsten oxide film 106, simultaneously initiating nitriding and partial reduction reactions.

[0055] The formation of these two distinct sublayers is achieved by controlling the reaction gradient along the depth direction of the film. The surface region is preferentially affected by oxygen-rich reactivity, while the deeper (or lower) regions are more strongly affected by hydrogen-assisted reduction and nitrogen incorporation.

[0056] As plasma-active species diffuse further into the tungsten oxide film 106, oxygen is gradually depleted through hydrogen-assisted reduction (in the presence of H2) and plasma-induced desorption. Simultaneously, nitrogen radicals infiltrate and replace oxygen vacancies, forming a strong WN bond network.

[0057] Since deeper (or lower) regions are more effective at preventing oxygen re-incorporation and experience stronger reducing conditions, nitrogen incorporation will become dominant compared to oxygen, thus forming a nitrogen-rich tungsten oxynitride layer 106b.

[0058] When the WNzOk layer 106a is oxygen-rich (k > z), it exhibits lower resistance to phosphoric acid (H3PO4) and hot deionized water (HDIW) compared to the nitrogen-rich WNxOy layer 106b below it. Therefore, the nitrogen-containing plasma 120 can form a tungsten oxynitride stacked structure with a chemical composition gradient, wherein the upper WNzOk layer 106a serves as a chemically reactive or sacrificial surface layer, while the lower WNxOy layer 106b acts as a chemically stable barrier layer with anti-diffusion capabilities located on the tungsten layer 104.

[0059] Please refer to Figure 3 After treatment with nitrogen-containing plasma 120, a further cleaning process 130 may be performed. In some embodiments, the cleaning process 130 may include a phosphoric acid cleaning process and / or a hot deionized water cleaning process to remove the tungsten oxynitride layer 106a or the natural oxide layer 105.

[0060] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0061] [Symbol Explanation] 100: Memory device 101: Semiconductor substrate 101a: Gate oxide layer 102: Polycrystalline silicon layer 104: Tungsten layer 103: Nitride layer 105: Natural Oxide Layer 106: Tungsten oxide thin film 106b: Tungsten oxynitride layer, WNxOy layer 106a: Tungsten oxynitride layer, WNzOk layer 120: Nitrogen-containing plasma 130: Cleaning process GC: Gate conductor stack layer.

Claims

1. A method for manufacturing a semiconductor memory device, characterized in that, Include: A gate conductor stack having a tungsten layer is formed on a substrate, wherein the tungsten layer has a tungsten oxide thin film; and The tungsten oxide film is subjected to nitrogen-containing plasma treatment to form at least one tungsten oxynitride (WNxOy) layer on the tungsten layer, where x and y are both positive integers and x is greater than y.

2. The manufacturing method according to claim 1, characterized in that, The WNxOy layer is in direct contact with the tungsten layer.

3. The manufacturing method according to claim 1, characterized in that, This nitrogen-containing plasma contains pure N2 gas.

4. The manufacturing method according to claim 1, characterized in that, This nitrogen-containing plasma contains 4% H2 and 96% N2 gas.

5. The manufacturing method according to claim 1, characterized in that, The tungsten oxide film is subjected to nitrogen-containing plasma treatment to form another tungsten oxynitride (WNzOk) layer, where z and k are both positive integers, and k is greater than z.

6. The manufacturing method according to claim 5, characterized in that, The WNxOy layer is located between the WNzOk layer and the tungsten layer.

7. The manufacturing method according to claim 1, characterized in that, It also includes a phosphoric acid process following the nitrogen-containing plasma treatment.

8. The manufacturing method according to claim 1, characterized in that, It also includes a thermal deionization water process following the nitrogen-containing plasma treatment.

9. A semiconductor memory device, characterized in that, Include: A gate conductor stack located on a substrate, wherein the gate conductor stack has a tungsten layer; and A tungsten oxynitride (WNxOy) layer is located on the tungsten layer, where x and y are both positive integers, and x is greater than y.

10. The semiconductor memory device according to claim 9, characterized in that, The WNxOy layer is in direct contact with the tungsten layer.

11. The semiconductor memory device according to claim 9, characterized in that, It also includes another tungsten oxynitride (WNzOk) layer, where z and k are both positive integers and k is greater than z, and the WNxOy layer is located between the WNzOk layer and the tungsten layer.

12. The semiconductor memory device according to claim 11, characterized in that, The WNxOy layer is in direct contact with the tungsten layer.

13. The semiconductor memory device according to claim 9, characterized in that, The gate conductor stack also includes a polysilicon layer located between the tungsten layer and the substrate.

14. The semiconductor memory device according to claim 13, characterized in that, The gate conductor stack also includes a gate oxide layer located between the polysilicon layer and the substrate.

15. The semiconductor memory device according to claim 14, characterized in that, The gate oxide layer is in contact with the substrate.

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