Photodetector and method of manufacturing the same

Abstract

The application provides an optoelectronic detector and a preparation method thereof, and relates to the field of ultraviolet optoelectronic detectors, and comprises a substrate, a first n-type layer arranged on the substrate, wherein the first n-type layer comprises a heterostructure, a P-type layer arranged on the side of the first n-type layer away from the substrate, a second n-type layer arranged on the side of the P-type layer away from the substrate, a first electrode arranged on the side of the second n-type layer away from the substrate and electrically connected with the second n-type layer, and a second electrode arranged on the side of the first n-type layer away from the substrate and electrically connected with the first n-type layer. The quasi-n-p-n heterojunction is formed along the thickness direction by the heterojunction unit, the n-p junction barrier and the polarization barrier are superimposed, a stable and continuous recombination built-in electric field is formed under the condition of zero bias, efficient separation of photo-generated electron-hole pairs is realized, and self-powered light response is obtained.

Description

Technical Field

[0001] This application relates to the field of ultraviolet photodetectors, and more particularly to a photodetector and its fabrication method. Background Technology

[0002] Current ultraviolet photodetectors mainly employ silicon-based, oxide, and nitride material systems. Si-based ultraviolet detectors, limited by their narrow bandgap, have limited visible light suppression capabilities and high dark current. Wide bandgap oxide materials suffer from insufficient device stability and repeatability. The inherently high bandgap characteristics of group III-nitrides typically require a large bias voltage to achieve sufficient photogenerated gain. Nitride devices have limited absorption layer thickness and insufficient built-in electric field, making it difficult to efficiently separate photogenerated electron-hole pairs without an external bias voltage, thus affecting self-powered capability. Summary of the Invention

[0003] This application proposes a photodetector and its fabrication method, which realizes the formation of a stable and continuous composite built-in electric field under zero bias conditions, improves the separation efficiency of photogenerated electron-hole pairs, and obtains a self-powered photoresponse.

[0004] To achieve the above objectives, embodiments of this application provide the following technical solutions: On one hand, a photodetector is provided, comprising a plurality of heterojunction units. The heterojunction unit includes: A substrate, a first n-type layer disposed on the substrate, the first n-type layer including a heterostructure. A p-type layer disposed on the side of the first n-type layer away from the substrate. A second n-type layer disposed on the side of the p-type layer away from the substrate. A first electrode disposed on the side of the second n-type layer away from the substrate and electrically connected to the second n-type layer. A second electrode disposed on the side of the first n-type layer away from the substrate and electrically connected to the first n-type layer.

[0005] The embodiments of this application provide that a quasi-npn heterojunction is formed by heterojunction units along the thickness direction, so that the np junction barrier and the polarization barrier are superimposed, forming a stable and continuous composite built-in electric field under zero bias conditions, thereby achieving efficient separation of photogenerated electron-hole pairs and obtaining a self-powered photoresponse.

[0006] In some embodiments, the heterostructure includes a first semiconductor layer and a second semiconductor layer stacked in a direction perpendicular to the substrate, wherein the materials of the first semiconductor layer and the second semiconductor layer both include group III-nitrides.

[0007] In some embodiments, the photodetector further includes an insertion layer disposed between the first semiconductor layer and the second semiconductor layer, the material of the insertion layer including group III-nitrides.

[0008] In some embodiments, the photodetector further includes an intrinsic semiconductor layer disposed between the second n-type layer and the p-type layer.

[0009] In some embodiments, the intrinsic semiconductor layer is made of at least one of oxide, nitride, or high dielectric constant thin film.

[0010] In some embodiments, the photodetector further includes an insulating layer disposed on the side of the first n-type layer away from the substrate and located between the p-type layer and the second electrode.

[0011] In some embodiments, multiple heterojunction units are arranged in a linear array or a planar array.

[0012] On the other hand, a method for fabricating a photodetector is provided, the method comprising: forming a first n-type layer on a substrate, the first n-type layer comprising a heterostructure; forming a p-type layer on the side of the first n-type layer away from the substrate; forming a second n-type layer on the side of the p-type layer away from the substrate; forming a first electrode on the side of the second n-type layer away from the substrate, the first electrode being electrically connected to the second n-type layer; and forming a second electrode on the side of the first n-type layer away from the substrate, the second electrode being electrically connected to the first n-type layer.

[0013] The fabrication method provided in the above embodiments of this application forms a quasi-npn heterojunction along the thickness direction using heterojunction units. This superposition of the np junction barrier and the polarization barrier creates a stable and continuous built-in composite electric field under zero bias conditions, thereby achieving efficient separation of photogenerated electron-hole pairs and obtaining a self-powered photoresponse. This fabrication method can be implemented using mature semiconductor processes and is compatible with spin coating, sputtering, evaporation, spraying, MOCVD, MBE epitaxy, photolithography, metal deposition, annealing, and existing GaN electronic device processes. It can achieve wafer-level array fabrication and has high process compatibility.

[0014] In some embodiments, after forming the P-type layer and before forming the second n-type layer, the preparation method further includes: An intrinsic semiconductor layer is formed between the P-type layer and the second n-type layer. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in some embodiments of this application will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not actual dimensions of the products or actual processes of the methods involved in the embodiments of this application.

[0016] Figure 1This is a schematic diagram of the structure of a quasi-npn photodetector provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of a quasi-NIPN photodetector provided in an embodiment of this application; Figure 3 This diagram illustrates the steps of fabricating a photodetector as provided in an embodiment of this application. Detailed Implementation

[0017] The technical solutions in some embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application are within the scope of protection of this application.

[0018] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open and encompassing, that is, "including, but not limited to".

[0019] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this application, unless otherwise stated, "a plurality of" means two or more.

[0020] Existing ultraviolet photodetectors mainly employ silicon-based, oxide, and nitride material systems. While Si-based ultraviolet detectors have mature manufacturing processes, their limited visible light suppression capability and high dark current are constrained by their narrow bandgap. Wide-bandgap oxide materials, such as ZnO and Ga2O3, exhibit good ultraviolet response, but their stability and repeatability are insufficient due to interface defects and polycrystalline thin film quality fluctuations. Group III nitrides, such as GaN and AlGaN, are important material systems for deep ultraviolet detection due to their wide bandgap, good thermal stability, and polarization field advantages. Currently, widely studied p-n junctions, metal-semiconductor-metal (MSM) detectors, Schottky junctions, and AlGaN / GaN heterostructure detectors can all achieve ultraviolet detection. However, these devices still face two core challenges under low-bias or even zero-bias conditions: 1. High dark current limits specific detectivity. In the AlGaN / GaN structure, due to the stable conductive channel formed by the two-dimensional electron gas, dark current is difficult to suppress effectively even under zero bias conditions.

[0021] II. Limited Light Absorption and Carrier Separation Capabilities Traditional nitride devices have limited absorber layer thickness and insufficient built-in electric field, making it difficult to efficiently separate photogenerated electron-hole pairs without an external bias voltage, thus affecting self-powered capability.

[0022] Furthermore, due to the high bandgap characteristics of group III-nitrides, their ultraviolet absorption is limited, typically requiring a large bias voltage to obtain sufficient photogenerated gain, which contradicts the current trends of "low power consumption" and "solid-state self-powered" systems. To improve zero-bias performance, some studies have attempted to introduce quantum dots, nanocrystals, or two-dimensional materials onto the nitride surface to enhance light absorption and modulate interface states. However, these structures generally only alter surface properties, lacking optimization of the electric field of the overall heterojunction system. The interface bandgap is not effectively matched, resulting in an insufficient built-in electric field, making it difficult for photogenerated carriers to achieve adequate gradient acceleration and separation. In addition, the synergistic design of the p-region, i-region, and n-region in multilayer heterostructures remains imperfect, and an npn or nipn-type system capable of systematically enhancing the built-in field has not yet been formed.

[0023] Existing technologies still urgently need an ultraviolet photodetector structure that can simultaneously achieve the following characteristics: a stronger built-in electric field to achieve zero-bias efficient carrier separation; lower dark current to improve specific detectivity; an integrable and scalable structural system suitable for multi-pixel ultraviolet imaging and on-chip integration; and versatility in material systems, especially compatibility with different n-type wide bandgap materials as the surface light absorption layer.

[0024] This invention proposes a self-powered ultraviolet photodetector based on an n-type semiconductor / group III nitride heterostructure to solve the problems of insufficient built-in electric field, high dark current, limited light absorption capacity, and limited carrier separation efficiency of existing ultraviolet detectors under zero bias conditions.

[0025] An embodiment of this application provides a photodetector, see [link to relevant documentation]. Figure 1 The photodetector includes multiple heterojunction units. Heterojunction unit 1 includes: Substrate 2, A first n-type layer 3 is disposed on a substrate 2, and the first n-type layer 3 includes a heterostructure; P-type layer 4 is disposed on the side of the first n-type layer 3 away from the substrate 2; The second n-type layer 5 is disposed on the side of the p-type layer 4 away from the substrate 2; The first electrode 6 is disposed on the side of the second n-type layer 5 away from the substrate and is electrically connected to the second n-type layer 5; The second electrode 7 is disposed on the side of the first n-type layer 3 away from the substrate and is electrically connected to the first n-type layer 3.

[0026] Exemplarily, the first n-type layer 3 includes a heterostructure, which can be AlGaN / GaN. In the heterostructure, a two-dimensional electron gas (2DEG) is formed due to the polarization effect. The first n-type layer 3 provides a second built-in electric field for the device and serves as an electron collection path. The second n-type layer 5 is used to absorb ultraviolet light and generate photogenerated carriers. The material of the second n-type layer 5 can be quantum dots, nanocrystals, nanosheets, or wide bandgap semiconductor thin film materials, such as SnO2, ZnO, In2O3, TiO2, Ga2O3, GaN, or AlN. The p-type layer 4 is used to form an np junction with the first n-type layer 3 to provide a first built-in electric field. The material of the p-type layer 4 can be GaN.

[0027] In the above embodiments of this application, a quasi-npn heterojunction is formed by heterojunction unit 1 along the thickness direction, so that the np barrier and the polarization barrier are superimposed, forming a stable and continuous composite built-in electric field under zero bias conditions, thereby achieving efficient separation of photogenerated electron-hole pairs and obtaining self-powered photoresponse.

[0028] In some embodiments, see Figure 1 Along the direction perpendicular to the substrate 2, the heterostructure includes a first semiconductor layer 8 and a second semiconductor layer 9 stacked together, and the materials of the first semiconductor layer 8 and the second semiconductor layer 9 both include group III-nitrides.

[0029] For example, the photodetector further includes an insertion layer 10 disposed between the first semiconductor layer 8 and the second semiconductor layer 9, and the material of the insertion layer 10 includes a group III-nitride.

[0030] The first semiconductor layer 8 can be made of AlGaN, the second semiconductor layer 9 can be made of GaN, and the insertion layer 10 can be made of AlN. The first semiconductor layer 8 and the second semiconductor layer 9 form an AlGaN / GaN heterostructure. The insertion layer 10 is used to alleviate the lattice mismatch and thermal expansion difference between the first semiconductor layer 8 and the second semiconductor layer 9, and to reduce dislocation defects.

[0031] In the above embodiments of this application, the material system has strong versatility, high process compatibility, and can be expanded to large-area arrays. A heterostructure is formed by the first semiconductor layer 8 and the second semiconductor layer 9. Due to the polarization effect, the heterostructure forms a two-dimensional electron gas, which improves the carrier mobility. Together with the insertion layer 10, it constitutes the first n-type layer 3, which provides a second built-in electric field for the device and serves as an electron collection path.

[0032] In some embodiments, see Figure 2 The photodetector also includes an intrinsic semiconductor layer 11, which is disposed between the second n-type layer 5 and the p-type layer 4.

[0033] For example, the intrinsic semiconductor layer 11 is made of at least one of oxide, nitride, or high dielectric constant thin film.

[0034] For example, the material of the intrinsic semiconductor layer 11 can be HfO2, HfZrO, AlScN, AlN, Al2O3, SiO2, or SiN. x Or BaTiO3.

[0035] In the above embodiments of this application, an intrinsic semiconductor layer 11 is provided between the second n-type layer 5 and the p-type layer 4 to form a quasi-nipn structure. The intrinsic semiconductor layer 11 is used to modulate the interface energy band, enhance the built-in electric field, or improve the interface quality. By introducing the intrinsic semiconductor layer 11, the carrier separation efficiency is further improved, the dark current is reduced, and the photogenerated voltage is enhanced. Furthermore, the first n-type layer 3, the intrinsic semiconductor layer 11, the p-type layer 4, and the second n-type layer 5 are arranged sequentially along a direction perpendicular to the substrate 2, making the superposition effect of the built-in electric field more significant and further enhancing the zero-bias self-powered performance.

[0036] In some embodiments, see Figure 1 The photodetector also includes an insulating layer 12, which is disposed on the side of the first n-type layer 3 away from the substrate 2 and located between the p-type layer 4 and the second electrode 7.

[0037] For example, the material of the insulating layer 12 can be SiO2, Si3N4 and Al2O3.

[0038] In the above embodiments of this application, the insulating layer 12 insulates the P-type layer 4 from the second electrode 7, thereby preventing the P-type layer 4 from conducting electricity with the second electrode 7 and thus preventing the second n-type layer 5 from being short-circuited.

[0039] In some embodiments, the plurality of heterojunction units 1 are arranged in a linear array or a planar array.

[0040] In the above embodiments of this application, multiple heterojunction units 1 can be arranged in the form of a linear array or a planar array to achieve ultraviolet imaging or large-area monitoring. The layered structure is naturally suitable for planar processes and has good consistency over a large area.

[0041] Embodiments of this application also provide a method for fabricating a photodetector, see [link to documentation]. Figure 3 The preparation method includes steps S1 to S5: S1: A first n-type layer 3 is formed on the substrate 2. The first n-type layer 3 includes a heterostructure. S2: A P-type layer 4 is formed on the side of the first n-type layer 3 away from the substrate 2. S3: A second n-type layer 5 is formed on the side of the p-type layer 4 away from the substrate 2. S4: A first electrode 6 is formed on the side of the second n-type layer 5 away from the substrate, and the first electrode 6 is electrically connected to the second n-type layer 5. S5: A second electrode 7 is formed on the side of the first n-type layer 3 away from the substrate 2, and the second electrode 7 is electrically connected to the first n-type layer 3.

[0042] For example, the material range of the second n-type layer 5 is not limited, as long as it is an n-type wide bandgap semiconductor, including oxides, nitrides, quantum dots, nanocrystals, nanosheets, etc. p-GaN, AlGaN and GaN can all be formed by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or other epitaxial processes.

[0043] The first electrode 6 can be a transparent electrode or a semi-transparent electrode, and the second electrode 7 is a metal electrode. The electrode materials include conventional systems such as Ti, Al, Ni, Au and ITO.

[0044] In the above embodiments of this application, a quasi-npn heterojunction is formed along the thickness direction by heterojunction unit 1, so that the np junction barrier and the polarization barrier are superimposed, forming a stable and continuous composite built-in electric field under zero bias conditions, thereby achieving efficient separation of photogenerated electron-hole pairs and obtaining a self-powered photoresponse. This fabrication method can be implemented using mature semiconductor processes, is compatible with spin coating, sputtering, evaporation, spraying, MOCVD, MBE epitaxy, photolithography, metal deposition, annealing, and is compatible with existing GaN electronic device processes. It can achieve wafer-level array fabrication and has high process compatibility.

[0045] In some embodiments, forming a first n-type layer on a substrate includes: forming a first semiconductor layer 8 on a substrate 2, and forming a second semiconductor layer 9 on the side of the first semiconductor layer 8 away from the substrate 2, wherein the materials of the first semiconductor layer 8 and the second semiconductor layer 9 both include group III-nitrides.

[0046] In the above embodiments of this application, the material system has strong versatility, high process compatibility, and can be expanded to large-area arrays. A heterostructure is formed by the first semiconductor layer 8 and the second semiconductor layer 9. Due to the polarization effect, the heterostructure forms a two-dimensional electron gas, which improves the carrier mobility. Together with the insertion layer 10, it constitutes the first n-type layer 3, which provides a second built-in electric field for the device and serves as an electron collection path.

[0047] In some embodiments, after forming the P-type layer 4 and before forming the second n-type layer 5, the fabrication method further includes forming an intrinsic semiconductor layer 11 between the P-type layer 4 and the second n-type layer 5.

[0048] For example, the intrinsic semiconductor layer 11 can be prepared by atomic layer deposition (ALD), physical vapor deposition (PVD), sputtering, spin coating or other methods.

[0049] In the above embodiments of this application, an intrinsic semiconductor layer 11 is formed between the second n-type layer 5 and the p-type layer 4 to form a quasi-nipn structure. The intrinsic semiconductor layer 11 is used to modulate the interface bandgap, enhance the built-in electric field, or improve the interface quality. By introducing the intrinsic semiconductor layer 11, the carrier separation efficiency is further improved, the dark current is reduced, and the photogenerated voltage is enhanced. Furthermore, the first n-type layer 3, the intrinsic semiconductor layer 11, the p-type layer 4, and the second n-type layer 5 are arranged sequentially along a direction perpendicular to the substrate 2, making the superposition effect of the built-in electric field more significant and further enhancing the zero-bias self-powered performance.

[0050] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A photodetector, characterized in that, Includes multiple heterojunction units; The heterojunction unit includes: Substrate; A first n-type layer is disposed on the substrate, and the first n-type layer includes a heterostructure; A P-type layer is disposed on the side of the first n-type layer away from the substrate; The second n-type layer is disposed on the side of the p-type layer away from the substrate; The first electrode is disposed on the side of the second n-type layer away from the substrate and is electrically connected to the second n-type layer; The second electrode is disposed on the side of the first n-type layer away from the substrate and is electrically connected to the first n-type layer.

2. The photodetector according to claim 1, characterized in that, Along a direction perpendicular to the substrate, the heterostructure includes a stacked first semiconductor layer and a second semiconductor layer; The materials of both the first semiconductor layer and the second semiconductor layer include group III-nitrides.

3. The photodetector according to claim 2, characterized in that, The photodetector further includes an insertion layer disposed between the first semiconductor layer and the second semiconductor layer; The material of the insertion layer includes group III-nitrides.

4. The photodetector according to claim 1, characterized in that, The photodetector further includes an intrinsic semiconductor layer disposed between the second n-type layer and the p-type layer.

5. The photodetector according to claim 4, characterized in that, The intrinsic semiconductor layer is made of at least one of oxide, nitride, or high dielectric constant thin film.

6. The photodetector according to claim 1, characterized in that, The photodetector further includes an insulating layer disposed on the side of the first n-type layer away from the substrate and located between the p-type layer and the second electrode.

7. The photodetector according to claim 1, characterized in that, The multiple heterojunction units are arranged in a linear array or a planar array.

8. A method for fabricating a photodetector, characterized in that, include: A first n-type layer is formed on the substrate, the first n-type layer comprising a heterostructure; A P-type layer is formed on the side of the first n-type layer away from the substrate; A second n-type layer is formed on the side of the p-type layer away from the substrate; A first electrode is formed on the side of the second n-type layer away from the substrate, and the first electrode is electrically connected to the second n-type layer; A second electrode is formed on the side of the first n-type layer away from the substrate, and the second electrode is electrically connected to the first n-type layer.

9. The preparation method according to claim 8, characterized in that, The formation of the first n-type layer on the substrate includes: A first semiconductor layer is formed on the substrate; A second semiconductor layer is formed on the side of the first semiconductor layer away from the substrate; The materials of both the first semiconductor layer and the second semiconductor layer include group III-nitrides.

10. The preparation method according to claim 8, characterized in that, After forming the P-type layer and before forming the second n-type layer, the preparation method further includes: An intrinsic semiconductor layer is formed between the P-type layer and the second n-type layer.

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