An optoelectronic detector with gate voltage regulation and encrypted communication function, and a preparation method and application thereof

CN123021793APending Publication Date: 2026-10-30SOUTH CHINA NORMAL UNIV
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202610950604.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-29
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

尽管二维材料光电探测器在响应速度、探测波段和器件集成方面取得了显著进展,但仍面临暗电流较高、载流子复合严重以及自供电性能不足等问题

Benefits of technology

1.本发明通过构建基于TaIrTe4/MoTe2异质结的光电探测器,其中TaIrTe4具有各向异性、高迁移率、良好的光响应等优势, MoTe2具有双极性的二维材料。该光电探测器有两部分功能,一部分是基于MoTe2的双极性做的栅压调控功能,另一部分是基于TaIrTe4的各向异性,通过不同偏振角度进行三部分的栅压调控。TaIrTe4/MoTe2异质结的光电探测器实现了高灵敏偏振光探测和栅压可调光电响应,展现出优异的偏振选择特性;实现了简单的逻辑运算功能。利用TaIrTe4的拓扑各向异性和异质结内建电场实现高效光生载流子分离与输运,在偏振成像、光信息处理、安全光通信及智能集成光电子系统等领域具有广阔的应用前景。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN123021793A_ABST
    Figure CN123021793A_ABST
Patent Text Reader

Abstract

The application belongs to the technical field of photoelectric detectors, and discloses a photoelectric detector with gate voltage regulation and encryption communication function, and a preparation method and application thereof. The photoelectric detector comprises a SiO2 / Si substrate and a MoTe2 / TaIrTe4 heterojunction arranged on the substrate. The MoTe2 / TaIrTe4 heterojunction is a cross-over area of MoTe2 nanosheets and TaIrTe4 nanosheets. A source electrode is arranged on any one end of the MoTe2 nanosheet of the MoTe2 / TaIrTe4 heterojunction, and a drain electrode is arranged on any one end of the TaIrTe4 nanosheet. A gate electrode is arranged on the Si layer of the SiO2 / Si substrate. The photoelectric detector has the gate voltage regulation and encryption communication functions, and has excellent photoelectric properties. Through gate voltage modulation, the photoelectric detector has the encryption communication function, and can be applied to the fields of photoelectric detection and communication.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention belongs to the field of photodetector technology, specifically relating to a photodetector with gate voltage regulation and encrypted communication functions, its preparation method, and its application. Background Technology

[0002] In recent years, photodetectors based on two-dimensional materials have attracted widespread attention due to their atomic-level thickness, excellent electrical performance, and tunable optical properties. Compared with traditional bulk materials, two-dimensional materials have advantages such as larger specific surface area, stronger light-matter interaction, and ease of constructing van der Waals heterostructures, showing great potential in the field of broadband photodetection. Among them, graphene has achieved high-speed photodetection due to its ultra-high carrier mobility and ultra-wideband absorption characteristics, but its zero bandgap characteristic leads to high dark current and low photoresponsivity; transition metal dichalcogenides (TMDs) have tunable bandgap and high on / off ratio, enabling high-sensitivity photodetection. Although two-dimensional material photodetectors have made significant progress in response speed, detection band, and device integration, they still face problems such as high dark current, severe carrier recombination, and insufficient self-powered performance. Therefore, improving carrier separation efficiency and photoelectric conversion performance by constructing two-dimensional van der Waals heterostructures and introducing topological quantum materials has become an important direction in the research of high-performance photodetectors. Summary of the Invention

[0003] To address the technical problems existing in the prior art, the primary objective of this invention is to provide a photodetector with gate voltage regulation and encrypted communication functions. This photodetector includes a SiO2 / Si substrate and MoTe2 nanosheets and TaIrTe4 nanosheets disposed thereon, which can simultaneously realize multi-level regulation and logic operations.

[0004] Another objective of this invention is to provide a method for fabricating the above-mentioned photodetector with gate voltage regulation and encrypted communication functions.

[0005] Another object of the present invention is to provide an application of the above-mentioned photodetector with gate voltage regulation and encrypted communication functions.

[0006] The objective of this invention is achieved through the following technical solution: A photodetector with gate voltage regulation and encrypted communication functions includes a SiO2 / Si substrate and a MoTe2 / TaIrTe4 heterojunction disposed thereon. The MoTe2 / TaIrTe4 heterojunction is a cross-shaped overlapping region of MoTe2 nanosheets and TaIrTe4 nanosheets. A source is disposed at any end of the non-overlapping MoTe2 nanosheets of the MoTe2 / TaIrTe4 heterojunction, and a drain is disposed at any end of the TaIrTe4 nanosheets. The gate is disposed on the Si layer of the SiO2 / Si substrate.

[0007] Preferably, the thickness of the MoTe2 nanosheets is 10-15 nm, and the thickness of the TaIrTe4 nanosheets is 20-25 nm.

[0008] Preferably, both the source and drain electrodes are made of Au, and the thickness of the Au electrode is 45~55 nm.

[0009] The method for fabricating the photodetector with gate voltage modulation and encrypted communication functions includes the following steps: S1. MoTe2 nanosheets and TaIrTe4 nanosheets were exfoliated using a mechanical exfoliation method and placed on a glass slide; S2. MoTe2 nanosheets are fabricated on a SiO2 / Si substrate using a mechanical exfoliation method, with the MoTe2 nanosheets in contact with the SiO2 layer of the SiO2 / Si substrate; S3. Using the PVA transfer method, TaIrTe4 nanosheets were transferred onto MoTe2 nanosheets to form a cross structure (the angle between the MoTe2 nanosheets and TaIrTe4 nanosheets was 90°), and a MoTe2 / TaIrTe4 heterojunction was fabricated on a SiO2 / Si substrate. S4. A source electrode is set at any end of a MoTe2 nanosheet that does not overlap with a MoTe2 / TaIrTe4 heterostructure, and a drain electrode is set at any end of a TaIrTe4 nanosheet. A gate electrode is set on the Si layer of a SiO2 / Si substrate. Then, the substrate is annealed in an inert gas at 100~150℃ to obtain a photodetector with gate voltage regulation and encrypted communication functions.

[0010] Preferably, the annealing time in step S4 is 40-45 minutes.

[0011] The application of the photodetector with gate voltage regulation and encrypted communication functions in the fields of photoelectric detection or communication.

[0012] Compared with the prior art, the present invention has at least the following beneficial effects: 1. This invention constructs a photodetector based on a TaIrTe4 / MoTe2 heterojunction. TaIrTe4 possesses advantages such as anisotropy, high mobility, and good photoresponse, while MoTe2 is a bipolar two-dimensional material. This photodetector has two functionalities: one is gate voltage modulation based on the bipolarity of MoTe2, and the other is three-part gate voltage modulation based on the anisotropy of TaIrTe4 through different polarization angles. The TaIrTe4 / MoTe2 heterojunction photodetector achieves highly sensitive polarization light detection and gate voltage-tunable photoresponse, exhibiting excellent polarization selectivity; it also implements simple logic operation functions. Utilizing the topological anisotropy of TaIrTe4 and the built-in electric field of the heterojunction to achieve efficient photogenerated carrier separation and transport has broad application prospects in polarization imaging, optical information processing, secure optical communication, and intelligent integrated optoelectronic systems.

[0013] 2. This invention applies different voltage pulses to the bottom grid, thereby applying different optical powers and polarization angles to the photodetector. Using the bottom grid and the optical signal as two logic inputs and the channel current as the logic output, this photodetector functions as a photoelectric logic gate, enabling multi-level storage of at least four states. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the photodetector with gate voltage regulation and encrypted communication functions according to the present invention.

[0015] Figure 2 An optical microscope image of the photodetector prepared in Example 1; Figure 3 The data curves of the photodetector obtained in Example 1 under different gate voltages are shown. Figure 4 The current of the photodetector prepared in Example 1 under different gate voltages; Figure 5 This is a demonstration of the logic gate function of the photodetector prepared in Example 1. Detailed Implementation

[0016] The technical solutions in the embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. The described embodiments are merely some, not all, of the embodiments of the present invention. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are all within the scope of protection of the present invention. Unless otherwise specified, the experimental methods described in the following embodiments are conventional methods; the reagents and materials, unless otherwise specified, can be obtained from publicly available commercial channels.

[0017] This specification uses spatially relative terms such as “below,” “under,” “down,” “above,” “above,” and “upper” to explain the positioning of one element relative to a second element. These terms are intended to cover different orientations of the device, except for those different from those shown in the figures.

[0018] Furthermore, the use of terms such as "first" and "second" to describe various elements, layers, regions, and sections is not intended to be restrictive. The use of terms such as "having," "containing," "including," and "comprises" are open-ended terms, indicating the presence of the stated elements or features, but not excluding additional elements or features, unless the context explicitly states otherwise.

[0019] Figure 1 This is a schematic diagram of the photodetector with gate voltage modulation and encrypted communication functions of the present invention, as shown below. Figure 1 As shown, the photodetector includes a SiO2 / Si substrate and a MoTe2 / TaIrTe4 heterojunction disposed thereon. The MoTe2 / TaIrTe4 heterojunction is a cross-shaped overlapping region of MoTe2 nanosheets and TaIrTe4 nanosheets. A drain (Au) is formed on any end of the non-overlapping TaIrTe4 nanosheet of the MoTe2 / TaIrTe4 heterojunction, and a source (Au) is formed on any end of the MoTe2 nanosheet. The gate is disposed on the Si layer of the SiO2 / Si substrate. The MoTe2 nanosheet is disposed on the SiO2 layer of the SiO2 / Si substrate, and the source is disposed on any end of the MoTe2 nanosheet, laterally spanning the conductive channel (the gap region between the source and drain), so that the MoTe2 nanosheet contacts the source, thereby forming a continuous lateral structure of the conductive channel. The source and drain electrodes, acting as lateral metals, contact the SiO2 surface in the SiO2 / Si substrate. MoTe2 nanosheets serve as the dominant semiconductor channel material, connecting the source and drain electrodes to realize carrier transport channels. TaIrTe4 nanosheets are disposed on top of MoTe2 nanosheets, partially overlapping to form a vertical van der Waals heterojunction, which is used to introduce interfacial charge transfer effects.

[0020] The method for fabricating a photodetector includes the following steps.

[0021] 1. A single crystal tape was obtained by mechanically peeling off the single crystal with blue tape. MoTe2 / PDMS was obtained by using PDMS to adhere the single crystal tape. MoTe2 nanosheets of about 10 nm were selected under an optical microscope. PDMS containing MoTe2 was then applied to the surface of a SiO2 / Si substrate to form a MoTe2 nanolayer on the surface of the SiO2 / Si substrate.

[0022] 2. A single crystal tape was obtained by mechanically peeling off the single crystal with blue adhesive tape. TaIrTe4 / PDMS was obtained by using PDMS to adhere the single crystal tape. The TaIrTe4 / PDMS was then applied to the surface of the SiO2 / Si substrate to form a TaIrTe4 nanolayer on the surface of the SiO2 / Si substrate.

[0023] 3. The TaIrTe4 nanosheets on the glass slide were transferred to the MoTe2 nanosheets using the PVA transfer method. The MoTe2 nanosheets and TaIrTe4 nanosheets formed a cross structure, creating a MoTe2 / TaIrTe4 heterojunction. 4. Select a positive electrode photoresist and spin coat at 4000 rpm for 60 s. Then bake at 100℃ for 5-10 min on a heated stage. Use UV laser to lithographically pattern the source / drain electrodes and the gate electrode. Employ electron beam evaporation at a rate of 0.01 nm / s to deposit a 45-55 nm Au layer. After evaporation, soak in anhydrous ethanol for 10 min to dissolve the photoresist and remove excess Au layer. Place the source electrode at one end of a non-overlapping MoTe2 nanosheet in the MoTe2 / TaIrTe4 heterojunction and the drain electrode at one end of a TaIrTe4 nanosheet, forming the gate electrode on the Si surface of the SiO2 / Si substrate. Then anneal at 150℃ for 40 min in argon to increase the contact between the different materials and improve stability, resulting in a photodetector based on the TaIrTe4 / MoTe2 heterojunction.

[0024] Figure 2 This is an optical microscope image of the photodetector based on the TaIrTe4 / MoTe2 heterojunction prepared in Example 1. From... Figure 2 It can be seen that the drain and source are respectively disposed on either end of the TaIrTe4 nanosheet and the MoTe2 nanosheet, and the gate is disposed on the Si layer. The ratio of the actual length of the MoTe2 nanosheet and the TaIrTe4 nanosheet to the measured length in the figure is 1cm:10µm. Figure 3 The figures show the Ids-Vds (IV) and IT curves of the photodetector based on the TaIrTe4 / MoTe2 heterojunction prepared in Example 1 under different gate voltages. (a) is the IV curve; (b) shows the Ids-Vds (IT) curve under the same optical power but different bias voltages (V). ds (c) Photoelectric response under different optical powers and applied bias voltages (40 V, 0 V, -40 V); Figure 3 From (a), it can be seen that when the bias voltage (V) ds When V = −1 / 1, the rectification ratio of this photodetector can reach 1 × 10⁻¹⁰. 4 .Depend on Figure 3As shown in (b), the photodetector exhibits different photoelectric responses under the same optical power but different bias voltages, with the highest current at a bias voltage of -40V. This indicates that under a bias voltage of -40V, the photodetector possesses good photoelectric response, repeatability, and stable switching states. Figure 3 As shown in (c), under negative bias (-40 V), the current modulation amplitude is significantly enhanced, indicating that the reverse electric field helps to separate photogenerated electron-hole pairs and suppress recombination, thereby improving the photoelectric response. The response is relatively weaker under positive bias, possibly due to the cancellation of the directions of the built-in electric field and the applied electric field. The photodetector exhibits a stable and periodic current response, indicating good dynamic repeatability. This obvious bias dependence further proves that the TaIrTe4 / MoTe2 heterojunction possesses an effective built-in electric field, which plays a dominant role in carrier separation and transport.

[0025] Figure 4 The photodetector based on the TaIrTe4 / MoTe2 heterojunction prepared in Example 1 was tested at different gate voltages (V). gs The current under the condition is shown in (a), where (a) is the transfer curve of the photodetector based on the TaIrTe4 / MoTe2 heterojunction, and (b) is a schematic diagram of the working principle of the optoelectronic logic gate. Figure 4 As shown in (a), when the gate voltage is close to -40V, the current is close to 0; when the gate voltage is close to 40V, the current is close to 20nA. The current output of this photodetector is highly sensitive to the gate voltage, and the current changes with the gate voltage. Its significant gate control effect originates from the tunable heterojunction barrier formed between TaIrTe4 and MoTe2. The overlapping region of TaIrTe4 and MoTe2 in the photodetector can be effectively modulated by an external gate voltage, thereby achieving precise control of carrier transport behavior. It is this electrical tunability that enables the photodetector to not only possess traditional photoresponse functions but also serve as a basic building block for optoelectronic logic operations, providing a new device solution for optoelectronic fusion computing and information processing. Based on the above characteristics, by Figure 4 As shown in (b), in this logic architecture, the switching state of the incident light and the applied gate voltage together serve as dual input signals, while the photocurrent output by the photodetector is defined as the logic output state. By reasonably setting the photocurrent threshold (e.g., 10 nA), the continuously changing analog current signal can be mapped to discrete logic "0" and "1", thereby realizing basic logic operations such as "AND". The relevant logic behavior has been fully verified through truth table analysis of the system and experimentally measured output current results. This programmable logic operation based on the TaIrTe4 / MoTe2 heterostructure photodetector provides an effective way to simplify the optoelectronic circuit structure and reduce system complexity.

[0026] Figure 5 This section demonstrates the logic gate functionality of the photodetector based on the TaIrTe4 / MoTe2 heterojunction fabricated in Example 1. Specifically, (a) demonstrates dual-channel secure communication using ASCII encoding to transmit "#Ta#" data, with the gate voltage and laser input serving as encryption keys. Figure 5 As shown in (a), in the security demonstration, a modulated 635 nm laser is used to optically encode the string "#Ta#", while a specific voltage sequence (ASCII encoding) is introduced to define the corresponding logical operation rules. After device processing, the output photoelectric signal accurately corresponds to the ASCII encoding of the character "#Ta#", namely 00100011 0101010001100001 00100011. In this communication system, the combination of the gate voltage input and the laser signal is equivalent to a set of "universal keys". Only when the two match correctly can the correct logical output be obtained, thereby achieving fast optical encryption of transmitted information. (b) shows the effect of anti-interference secure communication when decoding superimposed signals using a preset ASCII key sequence. Figure 5 As shown in (b), when the photodetector receives the excited optical signal and the gate gating operation works together to form a composite input signal, the system's anti-interference and decoding capabilities are further demonstrated. Only when the correct key sequence (e.g., the ASCII encoding sequence representing a specific character) is known at the receiving end can the target information be accurately decoded from the complex output signal. For example, by parsing the output binary string using the known key sequence, the encoded signal can be successfully restored to the original text information, thereby effectively filtering out irrelevant interference and achieving reliable communication.

[0027] The photodetector based on the TaIrTe4 / MoTe2 heterojunction of this invention not only serves as a multimode optoelectronic logic gate, enabling integrated logic operations and encrypted optical communication, but also exhibits unique gate-tunable response characteristics and electromagnetic mode control capabilities. This photodetector boasts a simple structure, low power consumption, and ease of integration, providing an attractive and practically promising solution for next-generation security information technology and on-chip optoelectronic systems.

[0028] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A photodetector with gate voltage modulation and encrypted communication functions, characterized in that, The photodetector includes a SiO2 / Si substrate and a MoTe2 / TaIrTe4 heterojunction disposed thereon. The MoTe2 / TaIrTe4 heterojunction is a cross-shaped overlapping region of MoTe2 nanosheets and TaIrTe4 nanosheets. A source is disposed at any end of the non-overlapping MoTe2 nanosheets of the MoTe2 / TaIrTe4 heterojunction, and a drain is disposed at any end of the TaIrTe4 nanosheets. The gate is disposed on the Si layer of the SiO2 / Si substrate.

2. The photodetector with gate voltage modulation and encrypted communication functions according to claim 1, characterized in that, The thickness of the MoTe2 nanosheets is 10-15 nm, and the thickness of the TaIrTe4 nanosheets is 20-25 nm.

3. The photodetector with gate voltage regulation and encrypted communication functions according to claim 1, characterized in that, Both the source and drain electrodes are made of Au, and the thickness of the Au electrode is 45~55 nm.

4. The method for fabricating a photodetector with gate voltage modulation and encrypted communication functions according to any one of claims 1-3, characterized in that, Includes the following steps: S1. MoTe2 nanosheets and TaIrTe4 nanosheets were exfoliated using a mechanical exfoliation method and placed on a glass slide; S2. MoTe2 nanosheets are fabricated on a SiO2 / Si substrate using a mechanical exfoliation method, with the MoTe2 nanosheets in contact with the SiO2 layer of the SiO2 / Si substrate; S3. A cross-shaped structure was formed by transferring TaIrTe4 nanosheets onto MoTe2 nanosheets using the PVA transfer method, and a MoTe2 / TaIrTe4 heterojunction was prepared on a SiO2 / Si substrate; S4. A source electrode is set at any end of a MoTe2 nanosheet that does not overlap with a MoTe2 / TaIrTe4 heterostructure, and a drain electrode is set at any end of a TaIrTe4 nanosheet. A gate electrode is set on the Si layer of a SiO2 / Si substrate. Then, the substrate is annealed in an inert gas at 100~150℃ to obtain a photodetector with gate voltage regulation and encrypted communication functions.

5. The method for fabricating a photodetector with gate voltage modulation and encrypted communication functions according to claim 4, characterized in that, The annealing time in step S4 is 40-45 minutes.

6. The application of the photodetector with gate voltage regulation and encrypted communication functions as described in any one of claims 1-3 in the field of photoelectric detection or communication.