A cadmium zinc telluride detection module and a method of manufacturing the same

Abstract

The application provides a cadmium zinc telluride detection module and a preparation method. The cadmium zinc telluride detection module comprises a CZT crystal detection layer, a first glass substrate, a second glass substrate, an ASIC chip and an FPC plate. The CZT crystal detection layer is arranged on the upper surface of the first glass substrate. The ASIC chip is arranged between the first glass substrate and the second glass substrate. The first glass substrate and the second glass substrate are further provided with solder balls in electrical connection. The electrodes of the CZT crystal detection layer are electrically connected with the ASIC chip through the solder balls. The lower surface of the second glass substrate is further provided with a connecting pad. The FPC plate is electrically connected with the ASIC chip through the connecting pad. The FPC plate is further provided with a connector for transmitting the detection signal of the cadmium zinc telluride detection module. The cadmium zinc telluride detection module is prepared through the first glass substrate and the second glass substrate, and the device life and yield can be greatly improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor radiation detectors, and more specifically to a zinc cadmium telluride detection module and its preparation method. Background Technology

[0002] CZT (cadmium zinc telluride) crystals, as a new generation of wide-bandgap semiconductor radiation detection materials, have core advantages such as room temperature operation, high energy resolution, high detection efficiency, no liquid nitrogen cooling, and fast response speed. They are core devices that can replace traditional cesium iodide scintillation detectors and high-purity germanium detectors, and are widely used in various high-precision radiation detection scenarios.

[0003] Currently, the mainstream fabrication processes for CZT detection modules in the industry mostly adopt ceramic substrates, metal substrates, or direct bare-die packaging structures. Existing technologies mainly have the following drawbacks: 1. Poor substrate compatibility, which easily leads to crystal stress damage: The thermal expansion coefficients of alumina ceramic and metal substrates are very different from those of CZT crystals. During wafer coating, photolithography, annealing, encapsulation and curing, and high and low temperature operating cycles, thermal stress and mechanical stress are easily generated, which leads to microcracks and lattice distortion in CZT crystals, significantly increases device leakage current, reduces energy resolution, and in severe cases, directly causes crystal breakage and device scrapping. 2. Limited processing accuracy and poor array consistency: Traditional ceramic substrates have high surface roughness and poor flatness, making it difficult to achieve micron-level high-precision photolithography electrode fabrication. The electrode spacing and electrode thickness of array-type CZT detector units have low consistency, severe crosstalk between units, and it is difficult to guarantee imaging resolution and detection uniformity, thus failing to meet the requirements of high-precision imaging and detection.

[0004] The aforementioned defects severely restrict the industrial application and performance improvement of CZT detectors, necessitating optimization of existing CZT detector structures. Summary of the Invention

[0005] To address the problems in the prior art, this invention provides a cadmium zinc telluride (CZT) detection module and its preparation method. By utilizing the material properties and processing advantages of glass substrates, it solves problems such as thermal stress mismatch, low processing accuracy, and insufficient consistency of traditional substrates, thereby significantly improving the detection performance of CZT detection modules.

[0006] The present invention discloses a cadmium zinc telluride (CZT) detection module, comprising a CZT crystal detection layer, a first glass substrate, a second glass substrate, an ASIC chip, and an FPC board. The CZT crystal detection layer is disposed on the upper surface of the first glass substrate, and the ASIC chip is disposed between the first and second glass substrates. Electrically connected solder balls are also provided between the first and second glass substrates. The electrodes of the CZT crystal detection layer are electrically connected to the ASIC chip through the solder balls. A connection pad is also provided on the lower surface of the second glass substrate, and the FPC board is electrically connected to the ASIC chip through the connection pad. The FPC board is also provided with a connector for transmitting the detection signal of the CZT detection module.

[0007] Furthermore, the lower surface of the second glass substrate is also provided with a heat sink and several capacitors, and the upper surface of the heat sink that contacts the second glass substrate is also provided with a receiving groove that matches the shape of the capacitors.

[0008] Furthermore, a limiting structure is provided on the lower surface of the radiator.

[0009] Furthermore, there are two FPC boards, and the connecting pads are symmetrically arranged at both ends of the lower surface of the second glass substrate. The upper surface of one end of each FPC board is electrically connected to the corresponding connecting pad, so that the two FPC boards are symmetrically arranged on both sides of the second glass substrate. The connector is arranged at the other end of the FPC board.

[0010] Furthermore, the connector is disposed on the lower surface of the FPC board away from the connecting pad, and a reinforcing plate is also provided on the upper surface of the FPC board at the position corresponding to the connector.

[0011] Furthermore, the connection gaps between the CZT crystal probe layer, the first glass substrate, the second glass substrate, the ASIC chip, and the FPC board are filled with an insulating encapsulation layer.

[0012] Furthermore, the insulating encapsulation layer is epoxy resin adhesive.

[0013] Furthermore, a low-temperature solder is provided on the upper surface of the first glass substrate, and the CZT crystal probe layer is electrically connected to the via on the first glass substrate through the low-temperature solder.

[0014] This invention also provides a method for preparing a tellurium zinc cadmium detection module, which includes the following steps: S1. Processing the lower surface of the first glass substrate: Print solder paste on the lower surface of the first glass substrate, and then insert solder balls at the set positions; S2. ASIC chip mounting: ASIC chip is mounted on the lower surface of the first glass substrate. The ASIC chip is soldered to the first glass substrate by reflow soldering. Then the flux is cleaned off and insulating sealant is filled into the gap between the first glass substrate and the ASIC chip. S3. Process the lower surface of the second glass substrate: Print solder paste on the second glass substrate, attach the FPC board with connector to the lower surface of the second glass substrate, reflow solder, and then fix it with insulating sealant. S4. Packaging of the first glass substrate and the second glass substrate: Solder paste is printed on the upper surface of the second glass substrate using a stencil, thermally conductive silver paste is applied to the corresponding area of ​​the ASIC chip, and then the lower surface of the first glass substrate is bonded and fixed to the upper surface of the second glass substrate, and reflow soldering is performed. S5. Cleaning: Clean the upper surface of the first glass substrate and the lower surface of the second glass substrate to remove any foreign matter residue, and then bake at high temperature. S6. Mounting the CZT crystal probe layer: Apply low-temperature solder to the upper surface of the first glass substrate, then mount the CZT crystal probe layer, and reflow solder at a second temperature.

[0015] Furthermore, step S3 also includes arranging several capacitors on the lower surface of the second glass substrate before reflow soldering. Before step S6 is executed, a heat sink mounting step is also included: applying thermally conductive silver paste to the connection area between the lower surface of the second glass substrate and the heat sink, then fixing the heat sink in the connection area, and then baking and curing.

[0016] Compared with the prior art, the beneficial effects of the present invention are: the thermal expansion coefficient of the glass substrate is close to that of the CZT crystal, which completely solves the problem of thermal mismatch of traditional substrates. There is no obvious thermal stress or mechanical stress during the production and welding process and long-term operation. It completely avoids the problems of microcracks and lattice distortion of CZT crystal, and greatly improves the device life and yield. The glass substrate has a flat surface with extremely low roughness, which enables the fabrication of high-precision photolithography electrodes. The electrode array spacing, thickness and flatness are highly consistent, which effectively reduces crosstalk of the detection unit and improves imaging resolution and detection uniformity. It can meet the stringent precision requirements of high-end medical imaging and high-precision industrial inspection, and break through the bottleneck of traditional substrate processing precision. The glass substrate itself is a highly insulating medium with good insulation uniformity and no leakage defects. There is no need to add an additional insulating layer, which simplifies the structure, significantly reduces device noise, and improves radiation detection accuracy. Attached Figure Description

[0017] To more clearly illustrate the solutions in this invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of an embodiment of the present invention; Figure 2 This is a schematic diagram of the first glass substrate structure of the present invention; Figure 3 This is a schematic diagram of the second glass substrate structure of the present invention; Figure 4 This is a flowchart illustrating the preparation method of the tellurium zinc cadmium detection module of the present invention. Detailed Implementation

[0019] Unless otherwise defined, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains; the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings are used to distinguish different objects, not to describe a particular order.

[0020] In this invention, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment to other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this invention can be combined with other embodiments.

[0021] To enable those skilled in the art to better understand the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings.

[0022] like Figure 1As shown, the cadmium zinc telluride (CZT) detection module of the present invention includes a CZT crystal detection layer 1, a first glass substrate 2, a second glass substrate 4, an ASIC chip 3, and an FPC board 5. The CZT crystal detection layer 1 is disposed on the upper surface of the first glass substrate 2, and the ASIC chip 3 is disposed between the first glass substrate 2 and the second glass substrate 4. Electrically connected solder balls 12 are also provided between the first glass substrate 2 and the second glass substrate 4. The electrodes of the CZT crystal detection layer 1 are electrically connected to the ASIC chip 3 through the solder balls 12. A connection pad 11 is also provided on the lower surface of the second glass substrate 4. The FPC board 5 is electrically connected to the ASIC chip 3 through the connection pad 11. The FPC board 5 is also provided with a connector 6 for transmitting the detection signal of the CZT detection module.

[0023] like Figure 1 and Figure 3 As shown, the lower surface of the second glass substrate 4 is also provided with a heat sink 9 and several capacitors 10. The second glass substrate 4 is also provided with two connection areas 401 connected to the heat sink 9. On both sides of the lower surface of the second glass substrate 4, two sets of connection pads 11 are also provided for connecting the FPC board. The upper surface of the heat sink 9 in contact with the second glass substrate 4 is also provided with a receiving groove matching the shape of the capacitor 10. The ASIC chip connection area 402 on the upper surface of the second glass substrate 4 is coated with thermally conductive silver paste 8. The ASIC chip 3 is attached to a designated position on the upper surface of the second glass substrate 4 by the thermally conductive silver paste 8. Pads 403 for connecting solder balls 12 are also provided on both sides and in the middle. Circuit layers are constructed on both the upper and lower surfaces of the second glass substrate 4. Several through holes connecting the circuit layers on the upper and lower surfaces are provided on the second glass substrate 4.

[0024] Placing several capacitors on the side closest to the heat sink 9 helps dissipate heat and avoids the impact of capacitor operating heat on the entire module.

[0025] Preferably, the lower surface of the radiator 9 in this example is provided with a limiting structure 901. The limiting structure 901 is a boss provided in the middle of the radiator 9, or it can be a number of limiting posts, or it can be one or a number of limiting grooves.

[0026] like Figure 1 As shown, there are two FPC boards 5 in this example. The connecting pads 11 are symmetrically arranged at both ends of the lower surface of the second glass substrate 4. The upper surface of one end of each FPC board is electrically connected to the corresponding connecting pad 11, so that the two FPC boards are symmetrically arranged on both sides of the second glass substrate 4. The connector 6 is arranged at the other end of the FPC board 5.

[0027] The connector 6 is disposed on the lower surface of the FPC board 5 away from the connecting pad 11. The upper surface of the FPC board 5 at the corresponding position of the connector 6 is also provided with a reinforcing plate 7 to protect the connector 6 and facilitate the insertion of the connector 6.

[0028] like Figure 1 and Figure 2 As shown, the upper surface of the first glass substrate 2 in this example is provided with low-temperature solder 13 and positioning holes 201 and 202. The CZT crystal probe layer 1 is electrically connected to the vias on the first glass substrate 2 through the low-temperature solder 13, and is precisely connected to the pads under the low-temperature solder 13 through the positioning holes 201 and 202. The back side of the first glass substrate 2 in this example is provided with a second pad 204 that docks with the solder ball in the middle of the second glass substrate, and mating areas 203 on both sides that dock with the ASIC chip 3. Third pads that dock with the pads 403 are also provided on both sides of the back side of the first packaging substrate.

[0029] In this example, the low-temperature solder can be indium lead silver solder, etc., which has a low melting point and is suitable for precision soldering in the field of electronic packaging. Avoid excessively high temperatures that could damage the CZT crystal probe layer.

[0030] Preferably, in this example, the connection gaps between the CZT crystal probe layer 1, the first glass substrate 2, the second glass substrate 4, the ASIC chip 3, and the FPC board 5 are filled with an insulating encapsulation layer. Preferably, a flexible transparent encapsulation layer is also provided on the upper surface of the CZT crystal probe layer 1 to protect the CZT crystal probe layer 1.

[0031] Preferably, the insulating encapsulation layer is epoxy resin adhesive. This invention uses epoxy resin as a carrier, which provides high matrix stability and meets the requirements for long-term use under various operating conditions.

[0032] This invention employs two glass substrates, separating the mounting of the CZT crystal detector layer 1 from the ASIC chip 3, which facilitates circuit layout and effectively reduces the product's packaging area. The glass substrate itself is a highly insulating medium with good insulation uniformity and no leakage defects, eliminating the need for additional insulating layers. This simplifies the structure while significantly reducing device noise and improving radiation detection accuracy.

[0033] The thermal expansion coefficient of the glass substrate of this invention is close to that of CZT crystal, which completely solves the problem of thermal mismatch of traditional substrates. There is no obvious thermal stress or mechanical stress during the production and welding process and long-term operation. It completely avoids the problems of microcracks and lattice distortion of CZT crystal, and greatly improves the device life and yield.

[0034] The glass substrate has a flat surface with extremely low roughness, which enables the fabrication of high-precision photolithography electrodes. The electrode array spacing, thickness and flatness are highly consistent, which effectively reduces crosstalk of the detection unit and improves imaging resolution and detection uniformity. It can meet the stringent precision requirements of high-end medical imaging and high-precision industrial inspection, and break through the bottleneck of traditional substrate processing precision.

[0035] like Figure 4 As shown, this invention also provides a method for fabricating a zinc-cadmium telluride (CdC) detection module. This invention employs a novel structural module and integrates SMT (Surface Mount Technology), FC (Flip Chip) packaging, cleaning, underfill adhesive, thermally conductive silver paste, and ball-mounting processes, among others. Specifically, the fabrication method of the CdC telluride detection module of this invention includes the following steps: S1. Processing the lower surface of the first glass substrate: Print solder paste on the lower surface of the first glass substrate, and then insert solder balls on the pads at the set positions on the lower surface of the first glass substrate. S2. ASIC chip mounting: ASIC chip is mounted on the lower surface of the first glass substrate. The ASIC chip is soldered to the first glass substrate by reflow soldering. Then the flux is cleaned off and insulating sealant is filled into the gap between the first glass substrate and the ASIC chip. S3. Process the lower surface of the second glass substrate: Print solder paste on the second glass substrate, attach the FPC board with connector to the lower surface of the second glass substrate, reflow solder, and then fix it with insulating sealant. S4. Packaging of the first glass substrate and the second glass substrate: Solder paste is printed on the upper surface of the second glass substrate using a stencil, thermally conductive silver paste is applied to the corresponding area of ​​the ASIC chip, and then the lower surface of the first glass substrate is bonded and fixed to the upper surface of the second glass substrate, and reflow soldering is performed. S5. Cleaning: Clean the upper surface of the first glass substrate and the lower surface of the second glass substrate to remove any foreign matter residue, and then bake at high temperature. S6. Mounting the CZT crystal probe layer: Apply low-temperature solder to the upper surface of the first glass substrate, then mount the CZT crystal probe layer, and reflow solder at a second temperature. In this example, the second temperature is determined by the melting point of the low-temperature solder, typically around 150°C, far lower than the normal reflow soldering temperature, to avoid damage to the CZT crystal probe layer caused by high-temperature soldering.

[0036] Furthermore, step S3 also includes arranging several capacitors on the lower surface of the second glass substrate. Specifically, capacitor components are attached to the pads corresponding to the capacitors one by one, and then reflow soldering is performed.

[0037] Before step S6 is performed, the heat sink mounting step is also included: applying thermally conductive silver paste to the connection area between the lower surface of the second glass substrate and the heat sink, then fixing the heat sink in the connection area, and then baking and curing.

[0038] In steps S1 and S3, solder paste printing involves precisely printing solder paste onto the pads of two glass substrates using a stencil. After melting in a high-temperature hot air furnace, the solder paste forms a reliable solder connection with the pins of electronic components. These solder connections provide conductivity, mechanical fixation, and heat transfer between the electronic components and the circuit layer of the second glass substrate. In this example, before printing the solder paste, the sides of the glass substrates are carefully inspected for damage or cracks; any substrates with defects are rejected. Preferably, this invention combines CCD visual inspection and visual inspection for dual verification.

[0039] After solder paste printing, solder paste inspection is performed. In the industry, over 60% of soldering defects are caused by poor solder paste printing. Therefore, adding an inspection after solder paste printing is more cost-effective than reworking the soldering process if problems arise later. This step is achieved using SPI (Solder Paste Inspection) equipment. SPI equipment uses a high-precision camera and image processing technology to perform comprehensive, high-precision inspection and analysis of the solder paste printed on the second glass substrate, including key parameters such as height, volume, area, shape, and position. The main purpose is to identify and correct problems in the solder paste printing process, such as insufficient solder paste, misalignment, bridging, and solder spikes, thereby improving production quality, reducing defect rates, saving costs, and increasing production efficiency.

[0040] In step S5, the equipment is cleaned using a plasma cleaning device at 60°C for 12 minutes, then rinsed at 55°C for 12 minutes, and then cleaned with DI (plasma water) at 55°C for 12 minutes. The conductivity of the plasma water is 10 μS / cm. Finally, the equipment is dried at 80°C for 5 minutes.

[0041] In step S3, the FPC board will also undergo plasma cleaning before being fixed, with the cleaning conditions being the same as above. After cleaning, the baking conditions are 120°C for 30 minutes.

[0042] The plasma cleaning equipment in this example has a power of 200 watts and a total flow rate of 100 ml / min.

[0043] In this example, the ASIC chip was mounted after manual dispensing of adhesive on the lower surface of the first glass substrate. The air pressure for manual dispensing was 0.9 kg / cm². 2In this example, after applying or filling the insulating sealant during processing, baking and curing are required. This example uses gradient temperature control to reduce the thermal stress on the glass substrate and prevent cracking or bursting caused by thermal stress. The gradient temperature in this example releases thermal stress by gradually decreasing the temperature. For example, the first baking is done at 150℃ for 7 minutes, then the next baking process is done at 130℃ for 10 minutes, and the temperature decreases sequentially.

[0044] In actual production, it has been found that drastic temperature changes during the reflow soldering process can cause cracks in the glass substrate, leading to the scrapping of the entire glass substrate. Therefore, in steps S2-S4 of this invention, the reflow soldering process is optimized to effectively prevent and control the occurrence of cracks in the glass substrate caused by temperature changes.

[0045] The reflow soldering equipment of the present invention includes a conveyor belt for transporting glass substrates, and a preheating zone, a constant temperature zone, a reflow soldering zone, a heat preservation and stress relief zone and a cooling zone arranged sequentially along the conveyor belt transport direction. The preheating zone, the constant temperature zone, the reflow soldering zone, the heat preservation and stress relief zone and the cooling zone are respectively provided with an upper temperature zone and a lower temperature zone, and the conveyor belt is arranged between the upper temperature zone and the lower temperature zone.

[0046] Preferably, the present invention employs a fourteen-temperature zone configuration. The preheating zone includes a first, second, and third temperature zone with an increasing temperature gradient, arranged side-by-side, with a temperature gradient of 20°C. The constant-temperature zone includes a fourth, fifth, sixth, and seventh temperature zone with an increasing temperature gradient, arranged side-by-side, with a set temperature difference of less than 5-8°C between the sixth and seventh temperature zones. The reflow soldering zone includes an eighth, ninth, and tenth temperature zone with an increasing temperature gradient, arranged side-by-side, with a temperature difference of 3-6°C between adjacent zones. In this example, the thermal insulation and stress-relieving zone includes an eleventh and twelfth temperature zone, with the same temperature, lower than the temperature of the reflow soldering zone. In this example, the cooling zone includes a thirteenth and fourteenth temperature zone, with cooling structures provided in the upper and lower temperature zones of the thirteenth and fourteenth temperature zones to reduce the temperature of the glass substrate to room temperature.

[0047] Preferably, the outer surfaces of the preheating zone, constant temperature zone, reflow soldering zone, heat preservation and stress relief zone, and cooling zone in this example are respectively provided with heat preservation structures to prevent heat leakage.

[0048] The temperature settings for each temperature zone in this example are shown in Table 1.

[0049] Table 1 Temperature settings for each zone of the reflow soldering equipment The reflow soldering equipment of this invention is a reflow oven, and the temperature is mainly regulated by a controlled hot airflow, which can be hot air, steam, or nitrogen, etc. In this example, temperature-controlled nitrogen is preferably used to create an oxygen-free environment, effectively preventing soldering defects caused by solder oxidation.

[0050] As shown in Table 1, after the glass substrate is sent into the reflow oven, the temperature of the glass substrate gradually rises from the preheating zone to the reflow soldering zone to the highest point. If it is cooled directly from the highest temperature, it is easy to cause cracks in the glass substrate. This invention innovatively improves the process and reflow soldering equipment. After reflow soldering, it does not directly enter the cooling zone for cooling, but adds a heat preservation and stress relief zone. This temperature can not only achieve solder joint crystallization, but also keep the glass substrate warm within a certain temperature range, providing a buffer zone for the release of internal stress in the glass substrate, while not affecting the crystallization and solidification of the solder joint, reducing the internal stress of the glass substrate, greatly reducing the risk of cracks in the glass substrate, and maintaining the quality of the solder joint.

[0051] Through the optimization of this invention, the defect rate of glass substrate cracks is less than 0.5%, the yield rate of product packaging is greater than 98.5%, and the reliability of product packaging can pass the MSL3 level test.

[0052] In this example, AOI (Automated Optical Inspection) is performed both before and after the reflow oven to improve the overall quality of the cadmium zinc telluride detection module.

[0053] The specific embodiments described above are preferred embodiments of the present invention and are not intended to limit the specific scope of the present invention. The scope of the present invention includes, but is not limited to, these specific embodiments. All equivalent changes made in accordance with the present invention are within the protection scope of the present invention.

Claims

1. A tellurium zinc cadmium detection module, characterized in that: The device includes a CZT crystal detection layer, a first glass substrate, a second glass substrate, an ASIC chip, and an FPC board. The CZT crystal detection layer is disposed on the upper surface of the first glass substrate. The ASIC chip is disposed between the first and second glass substrates. Electrically connected solder balls are also provided between the first and second glass substrates. The electrodes of the CZT crystal detection layer are electrically connected to the ASIC chip through the solder balls. The lower surface of the second glass substrate is also provided with connection pads. The FPC board is electrically connected to the ASIC chip through the connection pads. The FPC board is also provided with a connector for transmitting the detection signal of the cadmium zinc telluride detection module.

2. The tellurium zinc cadmium detection module according to claim 1, characterized in that: The lower surface of the second glass substrate is also provided with a heat sink and several capacitors, and the upper surface of the heat sink that contacts the second glass substrate is also provided with a receiving groove that matches the shape of the capacitors.

3. The tellurium zinc cadmium detection module according to claim 2, characterized in that: The lower surface of the radiator is provided with a limiting structure.

4. The tellurium zinc cadmium detection module according to claim 2, characterized in that: The number of FPC boards is two, and the connecting pads are symmetrically arranged at both ends of the lower surface of the second glass substrate. The upper surface of one end of each FPC board is electrically connected to the corresponding connecting pad, so that the two FPC boards are symmetrically arranged on both sides of the second glass substrate. The connector is arranged at the other end of the FPC board.

5. The tellurium zinc cadmium detection module according to claim 4, characterized in that: The connector is disposed on the lower surface of the FPC board away from the connecting pad, and a reinforcing plate is also provided on the upper surface of the FPC board at the corresponding position of the connector.

6. The tellurium zinc cadmium detection module according to any one of claims 1-5, characterized in that: The connection gaps between the CZT crystal probe layer, the first glass substrate, the second glass substrate, the ASIC chip, and the FPC board are filled with an insulating encapsulation layer.

7. The tellurium zinc cadmium detection module according to claim 6, characterized in that: The insulating encapsulation layer is epoxy resin.

8. The tellurium zinc cadmium detection module according to any one of claims 1-5, characterized in that: The upper surface of the first glass substrate is provided with a low-temperature solder, and the CZT crystal probe layer is electrically connected to the via on the first glass substrate through the low-temperature solder.

9. A method for preparing a tellurium zinc cadmium detection module, used to prepare the tellurium zinc cadmium detection module according to any one of claims 1-8, characterized in that, Includes the following steps: S1. Processing the lower surface of the first glass substrate: Print solder paste on the lower surface of the first glass substrate, and then insert solder balls at the set positions; S2. ASIC chip mounting: ASIC chip is mounted on the lower surface of the first glass substrate. The ASIC chip is soldered to the first glass substrate by reflow soldering. Then the flux is cleaned off and insulating sealant is filled into the gap between the first glass substrate and the ASIC chip. S3. Process the lower surface of the second glass substrate: Print solder paste on the second glass substrate, attach the FPC board with connector to the lower surface of the second glass substrate, reflow solder, and then fix it with insulating sealant. S4. Packaging of the first glass substrate and the second glass substrate: Solder paste is printed on the upper surface of the second glass substrate using a stencil, thermally conductive silver paste is applied to the corresponding area of ​​the ASIC chip, and then the lower surface of the first glass substrate is bonded and fixed to the upper surface of the second glass substrate, and reflow soldering is performed. S5. Cleaning: Clean the upper surface of the first glass substrate and the lower surface of the second glass substrate to remove any foreign matter residue, and then bake at high temperature. S6. Mounting the CZT crystal probe layer: Apply low-temperature solder to the upper surface of the first glass substrate, then mount the CZT crystal probe layer, and reflow solder at a second temperature.

10. The method for preparing the tellurium zinc cadmium detection module according to claim 9, characterized in that: Step S3 also includes arranging several capacitors on the lower surface of the second glass substrate, and then performing reflow soldering. Before step S6 is performed, the heat sink mounting step is also included: applying thermally conductive silver paste to the connection area between the lower surface of the second glass substrate and the heat sink, then fixing the heat sink in the connection area, and then baking and curing.

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