Back contact solar cell with anti-ultraviolet attenuation, method for manufacturing the same and photovoltaic module

Abstract

The application provides an anti-ultraviolet attenuation back contact solar cell and a preparation method and a photovoltaic module thereof, and particularly relates to the technical field of solar cells. The anti-ultraviolet attenuation back contact solar cell comprises an N-type silicon substrate; on the light-receiving surface of the N-type silicon substrate, an interface oxide layer, an ultraviolet response and hydrogen source composite layer, a perovskite ultraviolet conversion layer and an antireflection layer are sequentially stacked away from the N-type silicon substrate; on the back surface of the N-type silicon substrate, P-type doped regions and N-type doped regions are alternately arranged, and an insulating isolation region is arranged between adjacent P-type doped regions and N-type doped regions. The interface oxide layer and the ultraviolet response-hydrogen source composite layer cooperate to passivate defects on the light-receiving surface, and in-situ release hydrogen strengthening body passivation; the perovskite ultraviolet conversion layer converts ultraviolet light into visible light that can be absorbed by silicon, thereby improving short-wave response; the back surface realizes transverse carrier separation and selective collection without metal penetration, thereby inhibiting recombination and improving the open-circuit voltage, short-circuit current and photoelectric conversion efficiency of the cell.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and in particular to a back-contact solar cell with UV degradation resistance, its preparation method, and a photovoltaic module. Background Technology

[0002] Back-contact (BC) cells have become the forefront of crystalline silicon solar cell development due to their advantages such as no grid lines obstructing the front side, aesthetic appeal, and high efficiency. However, crystalline silicon cells, especially high-performance boron-doped P-type crystalline silicon cells, have long faced a severe challenge: light-induced degradation (LID), in which ultraviolet-excited boron-oxygen complexes are the main cause of degradation (i.e., UV-LID).

[0003] To suppress UV-LID, the industry commonly employs methods such as replacing boron-doped silicon wafers with gallium-doped silicon wafers; performing bulk passivation during the manufacturing process; and using UV-blocking encapsulation materials. On the other hand, hydrogen (H) has been proven to be the most effective element for passivating bulk defects in crystalline silicon (such as boron-oxygen complexes and metallic impurities). Traditional hydrogen sources often come from silazane (SiNx:H) passivation films, releasing hydrogen atoms during sintering. However, this hydrogen release is a one-time event, and hydrogen atoms easily diffuse and escape during subsequent battery use, failing to provide dynamic and long-term passivation for UV-induced defects that continuously arise during operation.

[0004] Therefore, there is an urgent need for an innovative solution that can dynamically and continuously provide hydrogen throughout the entire battery lifecycle and intelligently respond to UV light to specifically passivate UV-induced defects. Summary of the Invention

[0005] The purpose of this invention is to provide a back-contact solar cell with resistance to ultraviolet degradation, a method for its preparation, and a photovoltaic module, aiming to solve at least one of the above-mentioned technical problems in the prior art.

[0006] In order to achieve the above-mentioned objectives of the present invention, the following technical solution is adopted: A first aspect of the present invention provides a back-contact solar cell resistant to ultraviolet degradation, comprising an N-type silicon substrate; on the light-receiving surface of the N-type silicon substrate, an interface oxide layer, an ultraviolet response and hydrogen source composite layer, a perovskite ultraviolet conversion layer and an antireflection layer are sequentially stacked away from the N-type silicon substrate; on the back-lighting surface of the N-type silicon substrate, P-type doped regions and N-type doped regions are alternately disposed, and an insulating isolation region is disposed between adjacent P-type doped regions and N-type doped regions.

[0007] Furthermore, the material of the interface oxide layer is SiO2.

[0008] Preferably, the thickness of the interface oxide layer is 1~5nm, and more preferably 1.5~2.5nm.

[0009] Preferably, the material of the ultraviolet-responsive hydrogen source composite layer is SiN. a :H, where a is 0.8~1.3.

[0010] Preferably, the thickness of the UV-responsive hydrogen source composite layer is 5~30nm, and more preferably 10~20nm.

[0011] Preferably, the SiN a In H, the Si-H bond density is ≥1×10⁻⁶. 22 cm -3 .

[0012] Furthermore, the perovskite ultraviolet conversion layer is made of CsPbX3, where X is at least one of Cl, Br, and I.

[0013] Preferably, the thickness of the perovskite ultraviolet conversion layer is 20~100nm, and more preferably 40~60nm.

[0014] Preferably, the antireflective layer is made of SiN. a :H, where a is 0.8~1.3.

[0015] Preferably, the thickness of the antireflective layer is 60~120nm, and more preferably 75~85nm.

[0016] Preferably, the refractive index of the antireflective layer is 1.9 to 2.1.

[0017] Furthermore, the P-type doped region is provided with a tunneling oxide layer, a P+ poly layer and a P-region metal electrode layer in sequence in the direction away from the N-type silicon substrate.

[0018] Preferably, the N-type doped region is provided with a tunneling oxide layer, an N+ poly layer and an N-region metal electrode layer in sequence in the direction away from the N-type silicon substrate.

[0019] Preferably, the insulating isolation region is provided with a tunneling oxide layer and a passivation layer in sequence in the direction away from the N-type silicon substrate.

[0020] Preferably, the thickness of the tunneling oxide layer is 1~2 nm.

[0021] Preferably, the thickness of the P+ poly layer is 150~250nm.

[0022] Preferably, the thickness of the N+ poly layer is 180~250nm.

[0023] Preferably, the passivation layer extends into the non-metallic electrode region and is deposited on the sidewall of the N-type silicon substrate.

[0024] Preferably, the passivation layer is made of aluminum oxide and / or SiN. a , where a is 0.8~1.3.

[0025] A second aspect of the present invention provides a method for fabricating the aforementioned back-contact solar cell, comprising the following steps: S1. Alternating P-type doped regions and N-type doped regions are formed on the back surface of the double-textured N-type silicon substrate. S2. An interface oxide layer is prepared on the light-receiving surface of the N-type silicon substrate, and then a composite layer of ultraviolet response and hydrogen source is deposited by PECVD. The perovskite ultraviolet conversion layer is then prepared, and finally an anti-reflection layer is prepared by PECVD to obtain a semi-finished product. S3. After forming a metal electrode on the back surface of the semi-finished product, perform photothermal annealing and naturally cool to room temperature to obtain the back contact solar cell.

[0026] Furthermore, the preparation method of the interface oxide layer includes ozone oxidation or nitric acid oxidation.

[0027] Preferably, the ozone oxidation process is as follows: the light-receiving surface of the N-type silicon substrate is placed under an ultraviolet lamp source, and the interface oxide layer is formed by irradiation for 5 to 10 minutes at a power of 80~120W and a temperature of 25~50℃.

[0028] Preferably, the nitric acid oxidation process is as follows: the light-receiving surface of the N-type silicon substrate is immersed in nitric acid solution for 3-5 minutes to form an interface oxide layer.

[0029] Furthermore, the specific process of using PECVD to deposit the UV-responsive and hydrogen source composite layer is as follows: In the PECVD equipment, silicon source, nitrogen source and carrier gas are deposited by PECVD, the substrate temperature is 300~400℃, the radio frequency power is 50~150W, and the gas pressure is 50~200Pa.

[0030] Preferably, the flow rate ratio of the silicon source, the nitrogen source, and the carrier gas is 1:(1~5):(4~15).

[0031] Preferably, the perovskite ultraviolet conversion layer is prepared by a solution spin coating method or a thermal evaporation method.

[0032] Preferably, the solution spin coating process is as follows: CsX and PbX2 are dissolved in a mixed solvent to obtain a perovskite solution, and then the perovskite solution is spin-coated on the N-type silicon substrate at 2000-4000 rpm for 30-60 s to form a perovskite layer. Finally, the perovskite ultraviolet conversion layer is obtained by annealing on a hot plate at 150-200℃ for 10-30 min.

[0033] Preferably, the concentration of the perovskite solution is 0.5~1.0M.

[0034] Preferably, the process of preparing the antireflection layer by PECVD is as follows: in a PECVD equipment, silicon source, nitrogen source, hydrogen source and carrier gas are deposited by PECVD, the substrate temperature is ≤150℃, the radio frequency power is 30~80W, and the gas pressure is 30~80Pa.

[0035] Preferably, the flow rate ratio of the silicon source, the nitrogen source, the hydrogen source and the carrier gas is 1:(1~5):(3~8):(4~15).

[0036] Furthermore, the photothermal annealing process is as follows: the semi-finished product forming the metal electrode is placed on a heating plate at 200~230°C, and a UV-LED light source with a wavelength of 300~400 nm is used with a light power density of 5~50 mW / cm². 2 Irradiate the front of the battery for 10-30 minutes.

[0037] Further, the method for forming the metal electrode is as follows: depositing a passivation film in the P-type doped region and the N-type doped region, then etching an opening on the passivation film, then printing a metal electrode in the opening region, and finally annealing at 700~800℃ for 10~30s to obtain the metal electrode.

[0038] Preferably, the etching solution used for etching the opening is an HF solution.

[0039] Preferably, the metal electrode is made of aluminum and / or silver.

[0040] Preferably, the process of forming alternating P-type and N-type doped regions on the back surface of the double-textured N-type silicon substrate is as follows: a first tunneling oxide layer is deposited on the back surface of the double-textured N-type silicon substrate using LPCVD, followed by boron doping and a first annealing to form boron-doped polysilicon; a mask layer is deposited on the back surface, and then the layered structure on the N-type doped region and the insulating isolation region is removed to expose the N-type silicon substrate; a second tunneling oxide layer is deposited on the exposed N-type silicon substrate using LPCVD, followed by phosphorus doping and a second annealing in the N-type doped region.

[0041] Preferably, the height of the nap is 1.1~2μm.

[0042] Preferably, the temperature of the first annealing is 800~900℃ and the time is 10~60min.

[0043] Preferably, the second annealing temperature is 800~900℃ and the time is 10~60min.

[0044] A third aspect of the present invention provides a photovoltaic module, including the aforementioned back-contact solar cell.

[0045] Compared with the prior art, the present invention has at least the following beneficial effects: The back-contact solar cell provided by this invention uses an interface oxide layer and an ultraviolet response and hydrogen source recombination layer on the light-receiving surface to synergistically passivate defects on the light-receiving surface of the N-type silicon substrate, and release hydrogen atoms in situ to reinforce passivation; the perovskite ultraviolet conversion layer downconverts ultraviolet photons into visible light, which is efficiently absorbed by the underlying silicon substrate, improving the short-wavelength response; the P / N alternating doped region on the back-lighting surface, combined with the insulating isolation region, achieves lateral carrier separation and selective collection without metal penetration, significantly reducing recombination loss and improving the overall open-circuit voltage, short-circuit current and photoelectric conversion efficiency of the cell.

[0046] The preparation method provided by this invention directly forms alternating P / N doped regions on the back surface of a double-textured substrate, preserving the textured surface structure and avoiding damage to the front side, thereby improving light capture and selective carrier collection capabilities. PECVD is used to sequentially deposit an interface oxide layer, a UV-responsive and hydrogen source composite layer, and a perovskite UV conversion layer, ensuring interface compatibility and simultaneous hydrogen passivation between functional layers, thus enhancing silicon surface / bulk defect passivation. Photothermal annealing activates hydrogen diffusion and perovskite lattice reforming in situ after metal electrode formation, balancing electrode contact optimization and photoelectric layer stability improvement. The entire process requires no high-temperature, long-term heat treatment, suppressing doping diffusion mismatch.

[0047] The photovoltaic module provided by this invention, given the advantages of the aforementioned back-contact solar cells, enables the assembled photovoltaic module to be free of front electrode shading. The fully transparent design of the light-receiving surface significantly improves the effective light-receiving area and short-circuit current. The P / N alternating doping structure of the back surface is compatible with standard series-parallel packaging processes and can be directly adapted to existing back-contact module interconnection technology without the need for additional adapter structures, reducing packaging complexity and the risk of microcracks. The perovskite ultraviolet conversion layer and the hydrogen source composite layer synergistically improve long-term stability, significantly enhancing the power retention rate and lifetime power generation of the module under high temperature and high humidity conditions. Attached Figure Description

[0048] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0049] Figure 1 This is a schematic diagram of a back-contact solar cell.

[0050] Figure 2 The graph shows the SIMS results obtained from test example 2.

[0051] Icons: 1-N-type silicon substrate; 22-Antireflective layer; 24-Perovskite UV conversion layer; 26-UV response and hydrogen source composite layer; 28-Interface oxide layer; 31-N+ poly layer; 32-P+ poly layer; 33-N-region metal electrode layer; 34-P-region metal electrode layer; 36-Passivation layer; 38-Tunneling oxide layer. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0053] In the following, the terms “comprising,” “having,” and their cognates, which may be used in various embodiments of the invention, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as excluding, firstly, the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more features, numbers, steps, operations, elements, components, or combinations thereof.

[0054] A first aspect of the present invention provides a back-contact solar cell, such as Figure 1 As shown, it includes an N-type silicon substrate 1; on the light-receiving surface of the N-type silicon substrate 1, an interface oxide layer 28, an ultraviolet response and hydrogen source composite layer 26, a perovskite ultraviolet conversion layer 24, and an antireflection layer 22 are sequentially stacked away from the N-type silicon substrate 1; P-type doped regions and N-type doped regions are alternately arranged on the backlight surface of the N-type silicon substrate 1, and an insulating isolation region is provided between adjacent P-type doped regions and N-type doped regions.

[0055] The back-contact solar cell provided by this invention uses an interface oxide layer 28 and an ultraviolet response and hydrogen source composite layer 26 on the light-receiving surface to passivate defects on the light-receiving surface of the N-type silicon substrate 1, and release hydrogen atoms in situ to reinforce the passivation. The perovskite ultraviolet conversion layer 24 downconverts ultraviolet photons into visible light, which is efficiently absorbed by the underlying silicon substrate, improving the short-wavelength response. The P / N alternating doped region on the back-lighting surface, together with the insulating isolation region, achieves lateral carrier separation and selective collection without metal penetration, significantly reducing recombination loss and improving the overall open-circuit voltage, short-circuit current and photoelectric conversion efficiency of the cell.

[0056] Furthermore, the interface oxide layer 28 is made of SiO2, which is intended to provide excellent chemical passivation effect and significantly reduce the interface state density on the silicon substrate surface.

[0057] Preferably, the thickness of the interface oxide layer 28 is 1~5nm, more preferably 1.5~2.5nm.

[0058] Typically, but not limitingly, the thickness of the interface oxide layer 28 can be, for example, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 4 nm or 5 nm, or any value in the range of 1 to 5 nm; preferably, the thickness can be, for example, 1.5 nm, 2 nm or 2.5 nm, or any value in the range of 1.5 to 2.5 nm.

[0059] Preferably, the ultraviolet-responsive hydrogen source composite layer 26 is made of SiN. a :H, where a is 0.8~1.3. SiN is degraded via photocatalysis. a The Si-H bonds in the H layer trigger the release of hydrogen ions (or hydrogen atoms), and simultaneously convert incident ultraviolet photons into visible light that can be efficiently absorbed by the silicon substrate, thus achieving the dual functions of passivation and gain.

[0060] Typically, but not restrictively, the value of 'a' can be, for example, 0.8, 0.9, 1.0, 1.1, 1.2, or 1.3, or any value in the range of 0.8 to 1.3.

[0061] Preferably, the thickness of the UV-responsive and hydrogen source composite layer 26 is 5~30nm, more preferably 10~20nm.

[0062] Typically, but not limitingly, the thickness of the UV-responsive hydrogen source composite layer 26 can be, for example, 5 nm, 10 nm, 15 nm, 20 nm, 25 nm or 30 nm, or any value in the range of 5 to 30 nm; preferably, the thickness can be, for example, 10 nm, 15 nm or 20 nm, or any value in the range of 10 to 20 nm.

[0063] Preferably, the SiN aIn H, the Si-H bond density is ≥1×10⁻⁶. 22 cm -3 .

[0064] Typical, but not limiting, Si-H bond density can be, for example, 1 × 10⁻⁶. 22 cm -3 2 3 ×10 22 cm -3 3 3 ×10 22 cm -3 Or a higher value, as long as it is not less than 1×10 22 cm -3 That's all.

[0065] Furthermore, the perovskite UV conversion layer 24 is made of CsPbX3, where X is at least one of Cl, Br, and I. The CsPbX3 perovskite material with UV-responsive properties is integrated as a functionalized photosensitive hydrogen gate layer in the light-receiving layer of the back-contact (BC) solar cell. Under UV light (300-400 nm) excitation, the perovskite layer not only efficiently absorbs UV light and downconverts it into visible light that silicon can absorb, but also drives the directional cleavage of Si-H bonds at the interface through its strong photocatalytic activity, and reduces the hydrogen release barrier in conjunction with the photothermal effect, thereby triggering the underlying SiN... a Controllable, in-situ release of hydrogen atoms / ions in the H layer; the released active hydrogen can rapidly diffuse into the silicon substrate, dynamically passivating boron-oxygen complexes, metal impurities, and bulk defects, forming a closed-loop intelligent response mechanism, fundamentally suppressing UV-induced degradation, and significantly improving the operational stability and power retention rate of the battery throughout its entire life cycle.

[0066] Preferably, the thickness of the perovskite ultraviolet conversion layer 24 is 20~100nm, more preferably 40~60nm.

[0067] Typically, but not limitingly, the thickness of the perovskite ultraviolet conversion layer 24 can be, for example, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 80 nm or 100 nm, or any value in the range of 20 to 100 nm; preferably, the thickness can be, for example, 40 nm, 50 nm or 60 nm, or any value in the range of 40 to 60 nm.

[0068] Preferably, the antireflective layer 22 is made of SiN. a H, where a is 0.8~1.3. The antireflection layer 22 is made of hydrogen-rich silicon nitride material and has three functions: optical antireflection, auxiliary provision of slow-release hydrogen source, and physical / chemical barrier protection for the underlying perovskite ultraviolet conversion layer 24.

[0069] Typically, but not restrictively, the value of 'a' can be, for example, 0.8, 0.9, 1.0, 1.1, 1.2, or 1.3, or any value in the range of 0.8 to 1.3.

[0070] It is particularly important to emphasize that in this invention, the UV-responsive and hydrogen source composite layer 26 and the perovskite UV conversion layer 24 together constitute a functionally coupled and indispensable synergistic stacked structure: the actual source of hydrogen species is not the perovskite itself, because its crystal structure does not contain hydrogen elements, but rather the hydrogen-rich silicon nitride (SiN) located directly below it. a The core function of the H layer and the CsPbX3 layer lies in photo-activated technology, specifically through a dual mechanism: one is photocatalytic cleavage, leveraging a high efficiency of up to 10... 5 cm -1 The above-mentioned ultraviolet absorption coefficient and suitable valence band position enable efficient generation of photogenerated holes under UV irradiation. These holes migrate to the perovskite / SiN a After the H interface, its strong oxidizing ability is used to directionally break the Si–H bond (bond energy ≈ 3.0 eV), triggering the breakage of hydrogen atoms (H·) or protons (H·). + The two processes are: first, in-situ release of hydrogen; and second, photothermal-assisted desorption, where the perovskite layer absorbs ultraviolet light and generates a localized temperature rise (photothermal effect) through non-radiative transitions. This, combined with subsequent external hot plate heating, significantly reduces the activation energy barrier for the thermal dissociation of Si-H bonds, thereby achieving precise control of hydrogen release kinetics and enhanced deep diffusion. The synergy of these two processes transforms hydrogen passivation from a traditional one-time sintering release into a light-driven, temperature-enhanced, and spatially localized process.

[0071] It should be noted that, although both the ultraviolet-response and hydrogen source composite layer and the antireflection layer in this invention are made of hydrogen-rich silicon nitride (SiN), a While both materials are H, they play distinct roles in the laminated structure, achieving functional differentiation based on the following four aspects: (1) The structural position determines the functional positioning: the ultraviolet response and hydrogen source composite layer is located below the perovskite layer, forming a direct interface with it, accepting the photogenerated holes generated by the perovskite layer under ultraviolet light, realizing photocatalytic cracking of Si-H bonds to trigger hydrogen release; while the antireflection layer is located above the perovskite layer, does not participate in the catalytic reaction at this interface, and mainly plays the role of optical antireflection and physical and chemical barrier.

[0072] (2) Thickness and optical design are different: the thickness of the ultraviolet response and hydrogen source composite layer is only 5~30nm, and the thin layer design is conducive to the tunneling of photogenerated holes into SiN. a The H / Si interface does not interfere with the light absorption of the underlying silicon substrate; the antireflection layer has a thickness of 60~120nm and is designed with refractive index matching (1.9~2.1) to achieve the best antireflection effect.

[0073] (3) Clear distinction between primary and secondary roles of hydrogen source: The composite layer of ultraviolet response and hydrogen source serves as the primary hydrogen source, with a Si-H bond density ≥ 1×10 22 cm -3 Targeted hydrogen release is achieved through the synergistic effect of perovskite photocatalysis and photothermal action; although the antireflection layer is also made of SiN... a It is made of H material, but its Si-H bond density is relatively low (0.78 × 10⁻⁶ in Example 1). 22 cm -3 It mainly serves as an auxiliary slow-release hydrogen source and an outer physical barrier, protecting the underlying perovskite layer from water and oxygen erosion and damage from corrosive reagents in subsequent processes.

[0074] (4) Different preparation process temperatures: The UV response and hydrogen source composite layer is deposited at a high temperature of 300~400℃ using PECVD, which is conducive to the formation of high-density Si-H bonds; the antireflection layer is deposited at a low temperature of ≤150℃ using PECVD, which avoids thermal damage to the already formed perovskite layer. The differentiated design of the two process temperatures reflects the precise control of the preparation window of each functional layer.

[0075] Preferably, the thickness of the antireflective layer 22 is 60~120nm, and more preferably 75~85nm.

[0076] Typically, but not limitingly, the thickness of the antireflection layer 22 can be, for example, 60 nm, 70 nm, 75 nm, 80 nm, 85 nm, 100 nm or 120 nm, or any value in the range of 60 to 120 nm; preferably, the thickness can be, for example, 75 nm, 80 nm or 85 nm, or any value in the range of 75 to 85 nm.

[0077] Preferably, the refractive index of the antireflective layer 22 is 1.9 to 2.1.

[0078] Typically, but not limitingly, the refractive index can be, for example, 1.9, 2.0, or 2.1, or any value in the range of 1.9 to 2.1.

[0079] Furthermore, the P-type doped region is provided with a tunneling oxide layer, a P+ poly layer 32 and a P-region metal electrode layer 34 in sequence in the direction away from the N-type silicon substrate 1.

[0080] Preferably, the N-type doped region is provided with a tunneling oxide layer, an N+ poly layer 31 and an N-region metal electrode layer 33 in a direction away from the N-type silicon substrate 1.

[0081] Preferably, the insulating isolation region is provided with a tunneling oxide layer 38 and a passivation layer 36 in sequence in the direction away from the N-type silicon substrate 1.

[0082] Preferably, the thickness of the tunneling oxide layer 38 is 1~2 nm.

[0083] Typically, but not limitingly, the thickness of the tunneling oxide layer 38 can be, for example, 1 nm, 1.2 nm, 1.5 nm, 1.8 nm or 2 nm, or any value in the range of 1 to 2 nm.

[0084] Preferably, the thickness of the P+ poly layer 32 is 150~250nm.

[0085] Typical, but not limiting, the thickness of the P+ poly layer 32 can be, for example, 150 nm, 180 nm, 200 nm, 220 nm or 250 nm, or any value in the range of 150 to 250 nm.

[0086] Preferably, the thickness of the N+ poly layer 31 is 180~250nm.

[0087] Typically, but not limitingly, the thickness of the N+ poly layer 31 can be, for example, 180 nm, 190 nm, 200 nm, 220 nm or 250 nm, or any value in the range of 180 to 250 nm.

[0088] Preferably, the passivation layer 36 extends into the non-metallic electrode region and is deposited on the sidewall of the N-type silicon substrate 1.

[0089] Preferably, the passivation layer 36 is made of aluminum oxide and / or SiN. a , where a is 0.8~1.3.

[0090] The preparation method of this invention has four major technical advantages: Firstly, turning harm into benefit and increasing efficiency: the perovskite UV conversion layer 24 efficiently converts the 300-400 nm UV light, which is difficult to utilize in traditional crystalline silicon cells and is prone to photoluminescence degradation, into visible light in the peak response region (400-700 nm) of the silicon substrate. This not only eliminates the source of UV damage but also directly improves the short-circuit current and the overall photoelectric conversion efficiency.

[0091] Secondly, synergistic passivation and attenuation elimination: During the photothermal annealing process, the perovskite layer simultaneously exerts both photocatalytic and photothermal effects, activating the underlying SiN in situ. a The :H hydrogen source layer drives the deep diffusion of active hydrogen into the silicon body, precisely passivating key defects such as boron-oxygen complexes, and cutting off the UV-LID generation path from a physical mechanism.

[0092] Third, it is a one-time solution with high reliability: the intelligent passivation system is built in one step at the manufacturing stage without the need for additional intervention during device operation; combined with photovoltaic module-level sealing packaging, it not only ensures the structural stability of the perovskite layer under high temperature and high humidity conditions, but also ensures that the hydrogen passivation effect runs through the entire life cycle of the battery, significantly improving power retention rate and power generation revenue.

[0093] Fourth, the process is compatible and the cost is controllable: the perovskite layer can be flexibly prepared using low-cost solution methods (such as spin coating) or gas-phase methods (such as thermal evaporation). Each functional layer is compatible with mainstream PECVD, LPCVD and ALD production line equipment, without the need for additional expensive process modules, and has excellent feasibility for industrialization.

[0094] A second aspect of the present invention provides a method for fabricating the aforementioned back-contact solar cell, comprising the following steps: S1. Alternating P-type doped regions and N-type doped regions are formed on the back surface of the double-textured N-type silicon substrate 1. S2. An interface oxide layer 28 is prepared on the light-receiving surface of the N-type silicon substrate 1. Then, a UV-response and hydrogen source composite layer 26 is deposited by PECVD. A perovskite UV conversion layer 24 is prepared. Finally, an anti-reflection layer 22 is prepared by PECVD to obtain a semi-finished product. S3. After forming a metal electrode on the back surface of the semi-finished product, perform photothermal annealing and naturally cool to room temperature to obtain the back contact solar cell.

[0095] The preparation method provided by this invention directly forms alternating P / N doped regions on the back surface of a double-textured substrate, preserving the textured structure and avoiding damage to the front side, thereby improving light capture and selective carrier collection capabilities. PECVD is used to sequentially deposit an interface oxide layer 28, a UV-responsive and hydrogen source composite layer 26, and a perovskite UV conversion layer 24, ensuring interface compatibility and simultaneous hydrogen passivation between functional layers, thus enhancing silicon surface / bulk defect passivation. Photothermal annealing activates hydrogen diffusion and perovskite lattice reforming in situ after metal electrode formation, balancing electrode contact optimization and photoelectric layer stability improvement. The entire process requires no high-temperature, long-term heat treatment, suppressing doping diffusion mismatch.

[0096] Furthermore, the interface oxide layer 28 is prepared by ozone oxidation or nitric acid oxidation. Before the interface oxide layer 28 is deposited, the light-receiving surface of the N-type silicon substrate 1 needs to be briefly rinsed with dilute hydrofluoric acid to selectively remove the naturally formed thin layer of SiO2 on the surface, ensuring that the subsequently artificially constructed ultrathin interface oxide layer 28 can grow uniformly and controllably on a clean and active silicon surface, thereby obtaining a lower interface state density and a better chemical passivation effect.

[0097] Preferably, the ozone oxidation process is as follows: the light-receiving surface of the N-type silicon substrate 1 is placed under an ultraviolet lamp source, and the interface oxide layer 28 is formed by irradiation for 5 to 10 minutes at a power of 80~120W and a temperature of 25~50℃.

[0098] Typically, but not limitingly, the power of the ultraviolet lamp can be, for example, 80W, 90W, 100W, 110W or 120W, or any value within the range of 80 to 120W; the irradiation temperature can be, for example, 25℃, 30℃, 35℃, 40℃, 45℃ or 50℃, or any value within the range of 25 to 50℃; the irradiation time can be, for example, 5min, 6min, 7min, 8min, 9min or 10min, or any value within the range of 5 to 10min.

[0099] Preferably, the nitric acid oxidation process is as follows: the light-receiving surface of the N-type silicon substrate 1 is immersed in nitric acid solution for 3-5 minutes to form an interface oxide layer 28.

[0100] Furthermore, the specific process of using PECVD to deposit the UV-responsive and hydrogen source composite layer 26 is as follows: In the PECVD equipment, silicon source, nitrogen source and carrier gas are deposited by PECVD, the substrate temperature is 300~400℃, the radio frequency power is 50~150W, and the gas pressure is 50~200Pa.

[0101] Typical, but not limiting, substrate temperature can be, for example, 300°C, 320°C, 350°C, 380°C, or 400°C, or any value within the range of 300°C to 400°C; RF power can be, for example, 50W, 80W, 100W, 120W, or 150W, or any value within the range of 50 to 150W; gas pressure can be, for example, 50Pa, 80Pa, 100Pa, 150Pa, or 200Pa, or any value within the range of 50 to 200Pa.

[0102] Preferably, the flow rate ratio of the silicon source, the nitrogen source, and the carrier gas is 1:(1~5):(4~15).

[0103] Typical, but not limiting, the flow ratio can be, for example, 1:1:4, 1:2:8, 1:3:10, 1:4:12 or 1:5:15, or any ratio in the range of 1:(1~5):(4~15).

[0104] Preferably, the perovskite ultraviolet conversion layer 24 is prepared by a solution spin coating method or a thermal evaporation method.

[0105] Preferably, the solution spin coating process is as follows: CsX and PbX2 are dissolved in a mixed solvent to obtain a perovskite solution, and then the perovskite solution is spin-coated on the N-type silicon substrate 1 at 2000-4000 rpm for 30-60 s to form a perovskite layer. Finally, the perovskite ultraviolet conversion layer 24 is obtained by annealing on a hot plate at 150-200℃ for 10-30 min.

[0106] Typical, but not limiting, spin coating speeds can be, for example, 2000 rpm, 2500 rpm, 3000 rpm, 3500 rpm, or 4000 rpm, or any value within the range of 2000 to 4000 rpm; spin coating times can be, for example, 30 s, 40 s, 50 s, or 60 s, or any value within the range of 30 to 60 s; annealing temperatures can be, for example, 150℃, 160℃, 170℃, 180℃, 190℃, or 200℃, or any value within the range of 150 to 200℃; annealing times can be, for example, 10 min, 15 min, 20 min, 25 min, or 30 min, or any value within the range of 10 to 30 min.

[0107] Preferably, the concentration of the perovskite solution is 0.5~1.0M.

[0108] Typical, but not limiting, concentrations of perovskite solutions can be, for example, 0.5 M, 0.6 M, 0.7 M, 0.8 M, 0.9 M, or 1.0 M, or any value in the range of 0.5 to 1.0 M.

[0109] Preferably, the process of preparing the antireflection layer 22 by PECVD is as follows: in a PECVD equipment, silicon source, nitrogen source, hydrogen source and carrier gas are deposited by PECVD, the substrate temperature is ≤150℃, the radio frequency power is 30~80W, and the gas pressure is 30~80Pa.

[0110] Typical, but not limiting, substrate temperature can be, for example, 100°C, 120°C, 140°C, or 150°C, or any value within the range of ≤150°C; RF power can be, for example, 30W, 40W, 50W, 60W, 70W, or 80W, or any value within the range of 30~80W; gas pressure can be, for example, 30Pa, 40Pa, 50Pa, 60Pa, 70Pa, or 80Pa, or any value within the range of 30~80Pa.

[0111] Preferably, the flow rate ratio of the silicon source, the nitrogen source, the hydrogen source and the carrier gas is 1:(1~5):(3~8):(4~15).

[0112] Typical, but not limiting, the flow ratio can be, for example, 1:1:3:4, 1:2:5:8, 1:3:6:10, 1:4:7:12 or 1:5:8:15, or any ratio within the range of 1:(1~5):(3~8):(4~15).

[0113] Furthermore, the photothermal annealing process is as follows: the semi-finished product forming the metal electrode is placed on a heating plate at 200~230°C, and a UV-LED light source with a wavelength of 300~400 nm is used with a light power density of 5~50 mW / cm². 2 Irradiate the front of the battery for 10-30 minutes.

[0114] Typical, but not limiting, heating plate temperatures can be, for example, 200°C, 210°C, 220°C, or 230°C, or any value within the range of 200°C to 230°C; UV-LED wavelengths can be, for example, 300nm, 320nm, 350nm, 380nm, or 400nm, or any value within the range of 300nm to 400nm; optical power density can be, for example, 5mW / cm². 2 10mW / cm 2 20mW / cm 2 30mW / cm 2 40mW / cm 2 Or 50mW / cm 2 It can also be 5~50mW / cm 2 Any value within the range; the irradiation time can be, for example, 10 min, 15 min, 20 min, 25 min or 30 min, or any value within the range of 10 to 30 min.

[0115] Further, the method for forming the metal electrode is as follows: depositing a passivation film in the P-type doped region and the N-type doped region, then etching an opening on the passivation film, then printing a metal electrode in the opening region, and finally annealing at 700~800℃ for 10~30s to obtain the metal electrode.

[0116] Typically, but not limitingly, the annealing temperature can be, for example, 700°C, 720°C, 750°C, 780°C, or 800°C, or any value within the range of 700°C to 800°C; the annealing time can be, for example, 10s, 15s, 20s, 25s, or 30s, or any value within the range of 10 to 30s.

[0117] Preferably, the etching solution used for etching the opening is an HF solution.

[0118] Preferably, the metal electrode is made of aluminum and / or silver.

[0119] Preferably, the process of forming alternating P-type doped regions and N-type doped regions on the back surface of the double-textured N-type silicon substrate 1 is as follows: a first tunneling oxide layer is deposited on the back surface of the double-textured N-type silicon substrate 1 using LPCVD, followed by boron doping and a first annealing to form boron-doped polysilicon; a mask layer is deposited on the back surface, followed by removing the layered structure on the N-type doped region and the insulating isolation region to expose the N-type silicon substrate 1; a second tunneling oxide layer is deposited on the exposed N-type silicon substrate 1 using LPCVD, followed by phosphorus doping and a second annealing in the N-type doped region.

[0120] Preferably, the height of the nap is 1.1~2μm.

[0121] Typical, but not limiting, the nap height can be, for example, 1.1 μm, 1.3 μm, 1.5 μm, 1.7 μm, 1.9 μm or 2 μm, or any value in the range of 1.1 to 2 μm.

[0122] Preferably, the temperature of the first annealing is 800~900℃ and the time is 10~60min.

[0123] Typically, but not limitingly, the first annealing temperature can be, for example, 800°C, 820°C, 850°C, 880°C, or 900°C, or any value within the range of 800°C to 900°C; the annealing time can be, for example, 10 min, 20 min, 30 min, 40 min, 50 min, or 60 min, or any value within the range of 10 to 60 min.

[0124] Preferably, the second annealing temperature is 800~900℃ and the time is 10~60min.

[0125] Typically, but not limitingly, the second annealing temperature can be, for example, 800°C, 820°C, 850°C, 880°C, or 900°C, or any value within the range of 800°C to 900°C; the annealing time can be, for example, 10 min, 20 min, 30 min, 40 min, 50 min, or 60 min, or any value within the range of 10 to 60 min.

[0126] Then, a phosphorus-doped amorphous silicon layer is deposited on the second tunneling oxide layer using LPCVD or PECVD: the reaction gases include SiH4, PH3 and H2, wherein the SiH4 flow rate is 1500-2000 sccm, the PH3 (1% PH3 and H2 premixed gas) flow rate is 5000-6000 sccm, the H2 flow rate is 1000-6000 sccm, the deposition temperature is 200-300℃, and the thickness of the phosphorus-doped amorphous silicon layer is 180-250 nm.

[0127] The back passivation structure uses Al2O3 / SiNa The specific thickness, component ratio and deposition sequence of the stacked layers are optimized according to the mature back contact (BC) battery process specifications, taking into account high negative charge density, excellent chemical passivation capability and long-term environmental stability, and meeting the industry mass production standards.

[0128] The front structure design adopts a functional integration strategy: after the layer-by-layer construction of the interface oxide layer 28, the ultraviolet response and hydrogen source composite layer 26, the perovskite ultraviolet conversion layer 24 and the antireflection layer 22 is completed, the light-receiving surface has formed a complete stacked system with multiple functions such as chemical passivation, bulk defect passivation, optical antireflection and physical encapsulation. Therefore, there is no need to deposit an additional independent passivation film. At the same time, the front side always avoids contact with corrosive wet reagents such as HF throughout the entire process, effectively avoiding the risk of etching or degradation of the sensitive perovskite layer and significantly improving the structural integrity.

[0129] A third aspect of the present invention provides a photovoltaic module, including the aforementioned back-contact solar cell.

[0130] The photovoltaic module provided by this invention, given the advantages of the aforementioned back-contact solar cells, enables the assembled photovoltaic module to be free of front electrode shading. The fully transparent design of the light-receiving surface significantly improves the effective light-receiving area and short-circuit current. The P / N alternating doping structure of the back surface is compatible with standard series-parallel packaging processes and can be directly adapted to existing back-contact module interconnection technology without the need for additional adapter structures, reducing packaging complexity and the risk of microcracks. The perovskite ultraviolet conversion layer 24 and the hydrogen source composite layer synergistically improve long-term stability, significantly enhancing the power retention rate and lifetime power generation of the module under high temperature and high humidity conditions.

[0131] The present invention is further illustrated below with specific embodiments and comparative examples. However, it should be understood that these embodiments are merely for illustrative purposes and should not be construed as limiting the invention in any way. Unless otherwise specified, the raw materials used in the embodiments and comparative examples of the present invention were carried out under conventional conditions or conditions recommended by the manufacturer. Reagents or instruments used, unless otherwise specified, are all commercially available conventional products.

[0132] Example 1 This embodiment provides a back-contact solar cell, and the specific fabrication method is as follows: S1, Double-sided fleece lining Double-sided chemical texturing of N-type monocrystalline silicon wafers was performed using a KOH alkaline solution to remove surface damage layers and form a low-reflectivity pyramidal textured surface structure; the texture height was controlled to 1.4 μm. After texturing, the wafers were cleaned with standard RCA and dried to obtain a clean N-type silicon substrate with a uniform texture on both sides.

[0133] S2, Deposition of the first tunneling oxide layer on the back side On the back surface of an N-type silicon substrate, a first tunneling oxide layer (SiO2) is deposited using low-pressure chemical vapor deposition (LPCVD) at a temperature of 600°C. The reaction gases are O2 and N2 with a flow rate ratio of 1:5, and the resulting SiO2 layer has a thickness of 1–2 nm.

[0134] S3, Backside boron-doped amorphous silicon thin film deposition On the back surface where the first tunneling oxide layer has been deposited, boron-doped amorphous silicon thin film is deposited using LPCVD process; the reaction gases are silane (SiH4), borane (BH3) and hydrogen (H2) in a flow ratio of 4:3:20, and plasma glow discharge is applied during the deposition process, resulting in an amorphous silicon thin film with a thickness of 200 nm.

[0135] S4, Boron-doped layer activation annealing and mask layer deposition The boron-doped silicon wafer was placed in a tube annealing furnace and annealed at 880°C under a nitrogen atmosphere for 30 min to crystallize the amorphous silicon layer and activate boron atoms, forming a boron-doped polycrystalline silicon layer (p0.05) with a thickness of approximately 180 nm. + After annealing, in poly-Si); + A SiO2 mask layer is then deposited on the surface of the poly-Si layer using LPCVD.

[0136] S5, laser film cutting and N-region / insulating region etching Nanosecond pulsed lasers were used to selectively open the N-type doped region and the insulating isolation region: laser power was 300 W, and the spot size was controlled within the range of 50 μm × 50 μm to 500 μm × 500 μm; subsequently, wet etching was performed using a 15 wt% HNO3 and HF mixed solution to remove the SiO2 mask layer and p-type doped region above the insulating region. + The poly-Si layer and the first tunneling oxide layer beneath it completely expose the N-type silicon substrate in this region; finally, standard cleaning is used to remove residues, ensuring that the N-region surface is clean and free of contamination.

[0137] Deposition of the second tunneling oxide layer and phosphorus-doped amorphous silicon layer in regions S6 and N. On the exposed N-region silicon substrate surface, a second tunneling oxide layer (SiO2) with a thickness of 1.5 nm was deposited using LPCVD. Subsequently, a phosphorus-doped amorphous silicon layer was deposited on the SiO2 layer using plasma-enhanced chemical vapor deposition (PECVD). The reaction gases were SiH4, 1% PH3 / H2 premixed gas and H2, with flow rates of 1800 sccm, 5500 sccm and 3000 sccm, respectively. The deposition temperature was 250℃, and the resulting amorphous silicon layer had a thickness of 220 nm.

[0138] S7. High-temperature annealing to form a phosphorus-doped polycrystalline silicon layer The silicon wafer with the above structure was placed in a tube annealing furnace and annealed at 850°C in an N2 atmosphere containing trace amounts of O2. This crystallized the phosphorus-doped amorphous silicon layer in the N-region and activated phosphorus atoms, forming a phosphorus-doped polycrystalline silicon layer with a thickness of approximately 200 nm. + (poly-Si); the annealing process simultaneously stabilizes the p-formed poly-Si in S4. + passivation properties of poly-Si layers.

[0139] S8, Preparation of front-side functional stack S8.1 Ultrathin Interface Oxide Layer: An ozone-ultraviolet oxidation method (UV-O3) is used to form a 2 nm thick SiO2 interface layer on the light-receiving surface of an N-type silicon substrate. The process conditions are: temperature 40℃, UV lamp power 100 W, and processing time 80 min, achieving excellent chemical passivation effect.

[0140] S8.2 UV-responsive and hydrogen source composite layer: Hydrogen-rich silicon nitride (SiN) is deposited on the interface oxide layer using PECVD. a The substrate has an H layer with a thickness of 15 nm. The process parameters are: substrate temperature 350℃, RF power 100 W, reaction gas SiH4 / NH3 / N2 flow ratio of 1:3:10, and reaction pressure 120 Pa.

[0141] S8.3 Perovskite UV Conversion Layer: The precursor solution was prepared by dissolving CsX and PbX2 in a 1:1 molar ratio in a 1:4 volume ratio DMSO / DMF mixed solvent, with a concentration of 0.8 M, and stirring at 60℃ for 12 h; spin coating was carried out in two stages: the first stage was 500 rpm for 5 s; the second stage was 3000 rpm for 45 s; the resulting wet film was annealed on a hot plate at 180℃ for 20 min to obtain a dense perovskite layer with a thickness of approximately 50 nm; the entire process was completed in a glove box under an inert atmosphere of N2 or Ar.

[0142] S8.4 Antireflection Layer: Above the perovskite layer, hydrogen-rich silicon nitride (SiN) is deposited using low-temperature PECVD. a The antireflective layer (H) is 80 nm thick with a refractive index of 2.05. The process parameters are: substrate temperature 120 °C, RF power 50 W, reactant gas flow ratio of SiH4 / NH3 / N2 / H2 of 1:4:15:5, and reaction pressure 50 Pa. The Si-H bond density of this layer, calibrated by Fourier transform infrared spectroscopy (FTIR), is 0.78 × 10⁻⁶. 22 cm -3 .

[0143] S9, front and back composite passivation film deposition Front (light-receiving surface): The functional stack composed of S8 remains unchanged.

[0144] Back side (backlit side): An Al2O3 passivation layer (precursors were TMA and H2O, deposition temperature 150℃, 50 cycles, thickness approximately 5 nm) was deposited on the entire surface using atomic layer deposition (ALD), followed by PECVD deposition of SiN. a The layer (temperature 300℃, SiH4 / NH3 flow ratio 1:5, thickness 80 nm) constitutes a composite passivation structure.

[0145] S10, Selective thinning and pore opening of the back passivation film Photoresist AZ5214 was coated on the back composite passivation film. After pre-baking, exposure, development, and hardening, the electrode contact window pattern was formed. Wet etching was performed at 25°C for 30 s using buffered hydrofluoric acid (BHF, containing 6% HF + 30% NH4F) to selectively remove Al2O3 / SiN from the opening areas. a Composite layer, exposing p + poly-Si and n + The poly-Si electrode contact area was then ultrasonically cleaned with acetone, rinsed with isopropanol, and dried with nitrogen to remove residual photoresist and impurities.

[0146] S11, screen printing and rapid thermal sintering In the back opening area, silver (Ag) electrodes in the P area and aluminum (Al) electrodes in the N area are printed using screen printing (or Ag / Al co-printed); then rapid thermal annealing (RTA) is performed at 750°C for 10 s to form ohmic contacts with low contact resistance; after sintering, edge isolation etching is performed to eliminate edge leakage paths.

[0147] S12, Synergistic photothermal annealing treatment The semi-finished battery, after metallization and edge isolation, is placed in a dedicated UV-thermal coupling treatment system, and the following processes are performed simultaneously: the battery is placed on a 210°C heating plate, and a UV-LED light source with a peak wavelength of 365 nm is used with a solar equivalent UV intensity of 0.6 (light power density of 30 mW / cm²). 2 Irradiate the sun-receiving surface of the battery vertically for 20 minutes. After the irradiation and heating are complete, allow it to cool naturally to room temperature without any additional cleaning or passivation treatment.

[0148] S13, Testing and Sorting The back-contact solar cell (effective area 244.3 cm²) that has undergone S12 treatment. 2 The sample was placed under standard test conditions (AM1.5G, 1000 W / m², 25℃) and I-V characteristic tests were performed using a solar simulator. Key electrical parameters were determined by combining TLM method, dark-state IV fitting and other methods, and the sorting was finally completed.

[0149] Example 2 This embodiment provides a back-contact solar cell, which differs from Embodiment 1 in that: S8.3 Perovskite UV Conversion Layer: The precursor solution was prepared by dissolving CsBr, PbBr2, and PbI2 in a stoichiometric ratio of 1:0.5:0.5 in a DMSO / DMF mixed solvent with a volume ratio of 1:4, and adding 2% SnF2 as a crystallization aid at a concentration of 0.7 M. The mixture was stirred at 60 °C for 12 h. Spin coating was performed in two stages: the first stage at 500 rpm for 5 s, and the second stage at 3500 rpm for 40 s. During spin coating, an antisolvent (chlorobenzene, 200 μL) was dropped onto the substrate surface to promote rapid nucleation. The resulting wet film was annealed on a hot plate at 100 °C for 5 min, and then annealed on a hot plate at 200 °C for 15 min to obtain a dense perovskite layer with a thickness of approximately 55 nm. The entire process was completed in a glove box under an inert atmosphere of N2 or Ar. Its band gap can be adjusted to about 2.0 eV by adjusting the halogen ratio, thereby having a higher absorption coefficient in the 300-450nm ultraviolet band.

[0150] The remaining steps are the same as in Example 1, and will not be repeated here.

[0151] Example 3 This embodiment provides a back-contact solar cell, which differs from Embodiment 1 in that: S8.3 Perovskite UV Conversion Layer: The precursor solution was prepared by mixing CsX and PbX2 in a 1:1 molar ratio and then placing it in a dual-source evaporation boat with a background vacuum of <5×10⁻⁶. -4 The evaporation rate was controlled at 0.2-0.3 Å / s, and the substrate temperature was maintained at 80℃. After deposition, the substrate was annealed at 200℃ in a nitrogen atmosphere for 15 min to complete the crystallization transformation and obtain a dense perovskite layer with a thickness of approximately 30 nm.

[0152] The remaining steps are the same as in Example 1, and will not be repeated here.

[0153] Example 4 This embodiment provides a back-contact solar cell, which differs from Embodiment 1 in that: S8.3 Perovskite UV Conversion Layer: The precursor solution was prepared by dissolving CsX and PbX2 in a 1:1 molar ratio in a 1:4 volume ratio DMSO / DMF mixed solvent, with a concentration of 1.2 M, and stirring at 60℃ for 12 h. Spin coating was performed in two stages: the precursor solution was spin-coated at 1500 rpm for 50 s; the resulting wet film was annealed on a hot plate at 120℃ for 5 min, followed by annealing on a hot plate at 200℃ for 20 min; a dense perovskite layer with a thickness of approximately 100 nm was obtained; the entire process was completed in a glove box under an inert atmosphere of N2 or Ar.

[0154] The remaining steps are the same as in Example 1, and will not be repeated here.

[0155] Example 5 This embodiment provides a back-contact solar cell, which differs from Embodiment 1 in that: S8.2 UV-responsive and hydrogen source composite layer: Hydrogen-rich silicon nitride (SiN) is deposited on the interface oxide layer using PECVD. a The Si-H layer is 25 nm thick; the Si-H bond density of this layer, calibrated by Fourier transform infrared spectroscopy (FTIR), is 1.3 × 10⁻⁶. 22 cm -3 .

[0156] S12, Synergistic photothermal annealing treatment The semi-finished battery, after metallization and edge isolation, is placed in a dedicated UV-thermal coupling treatment system, and the following processes are performed simultaneously: the battery is placed on a 190°C heating plate, and a UV-LED light source with a peak wavelength of 365 nm is used with a solar equivalent UV intensity of 0.6 (light power density of 30 mW / cm²). 2 Irradiate the sun-receiving surface of the battery vertically for 20 minutes. After the irradiation and heating are complete, allow it to cool naturally to room temperature without any additional cleaning or passivation treatment.

[0157] The remaining steps are the same as in Example 1, and will not be repeated here.

[0158] Comparative Example 1 This comparative example provides a back-contact solar cell, which differs from Example 1 in that the preparation of the perovskite ultraviolet conversion layer in step S8.3 is omitted. The remaining steps are the same as in Example 1 and will not be repeated here.

[0159] Comparative Example 2 This comparative example provides a back-contact solar cell, which differs from Example 1 in that the S12 synergistic photothermal annealing treatment is omitted, while the remaining steps are the same as in Example 1, and will not be repeated here.

[0160] Comparative Example 3 This comparative example provides a back-contact solar cell, which differs from Example 1 in that the preparation of the ultrathin interface oxide layer in step S8.1 is omitted. The remaining steps are the same as in Example 1 and will not be repeated here.

[0161] Comparative Example 4 This comparative example provides a back-contact solar cell, which differs from Example 1 in that the preparation of the ultraviolet response and hydrogen source composite layer in step S8.2 is omitted. The remaining steps are the same as in Example 1 and will not be repeated here.

[0162] Comparative Example 5 This comparative example provides a back-contact solar cell, which differs from Example 1 in that: the preparation of the S8.2 ultraviolet response and hydrogen source composite layer and the preparation of the S8.3 perovskite ultraviolet conversion layer are omitted. The remaining steps are the same as in Example 1 and will not be repeated here.

[0163] Test Example 1 The back-contact solar cells (area 244.3 cm²) prepared in the above embodiments and comparative examples are compared. 2 Under standard test conditions (AM 1.5G, 1000 W / m) 2 The test was conducted at 25°C, and the results are shown in Table 1 below.

[0164] Table 1

[0165] Based on the electrical performance data in Table 1, Example 1 The average efficiency of sample 5 was 26.00%, significantly higher than that of control sample 1. The average efficiency of the four examples is 25.65%, an absolute improvement of 0.34 percentage points, with Example 1 achieving the highest efficiency of 26.05%. The average open-circuit voltage (Voc) of the examples is 744.77 mV, an improvement of approximately 1.7 mV compared to the comparative example's average of 743.06 mV, thanks to the effective passivation of the boron-oxygen complex and interface defects by hydrogen atoms. The average short-circuit current (Isc) of the examples is 14.19 A, slightly lower than the comparative example's average of 14.22 A (approximately 0.2%), attributed to the weak parasitic absorption of the perovskite layer itself, but the gains in voltage and fill factor completely compensate for this small current loss. The average fill factor (FF) of the examples is 82.68%, an improvement of 0.82 percentage points compared to the comparative example's average of 81.86%, indicating that the improved passivation reduces contact resistance and recombination current, resulting in improved carrier collection efficiency. In summary, all examples are superior to the comparative examples, confirming that the structure of the present invention can effectively suppress UV-induced decay and comprehensively improve electrical performance, with Example 1 being the optimal solution.

[0166] Test Example 2 The batteries obtained in Example 1 and Comparative Examples 1 and 2 were subjected to SIMS testing, and the results are as follows: Figure 2 As shown.

[0167] from Figure 2 It can be observed that only Example 1 (which simultaneously possesses a perovskite layer and synergistic photothermal treatment) achieved efficient release and diffusion of hydrogen atoms: SiN a The hydrogen concentration in the H layer decreases by 65% ​​in SiN. a A 1.20×10⁻⁶ m² / h₂O₃ layer is formed at the H / Si interface. 18 cm -3The sharp hydrogen peaks are visible, and the hydrogen concentration remains at 5.0 × 10⁻⁶ within a depth range of 30-100 nm after penetrating the silicon substrate. 17 cm -3 The above indicates that hydrogen has been largely injected into the silicon mass; while the interfacial peak values ​​of Comparative Example 1 (without perovskite layer) and Comparative Example 2 (without photothermal treatment) are only 2.0 × 10⁻⁶. 17 cm -3 and 3.0×10 17 cm -3 Furthermore, the hydrogen concentration within the silicon substrate rapidly decreased to background levels. This result directly demonstrates the importance of the perovskite layer and synergistic photothermal treatment in triggering hydrogen release and deep diffusion.

[0168] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A back-contact solar cell resistant to ultraviolet degradation, characterized in that, Including N-type silicon substrates; On the light-receiving surface of the N-type silicon substrate, an interface oxide layer, an ultraviolet response and hydrogen source composite layer, a perovskite ultraviolet conversion layer and an antireflection layer are sequentially stacked away from the N-type silicon substrate. P-type doped regions and N-type doped regions are alternately disposed on the backlight surface of the N-type silicon substrate, and an insulating isolation region is disposed between adjacent P-type doped regions and N-type doped regions.

2. The back-contact solar cell according to claim 1, characterized in that, The material of the interface oxide layer is SiO2; Preferably, the thickness of the interface oxide layer is 1~5 nm, more preferably 1.5~2.5 nm; Preferably, the material of the ultraviolet response and hydrogen source composite layer is SiN a : H, wherein a is 0.8-1.3; Preferably, the thickness of the UV-responsive hydrogen source composite layer is 5~30nm, more preferably 10~20nm; Preferably, the SiN a In H, the Si-H bond density is ≥1×10⁻⁶. 22 cm -3 .

3. The back-contact solar cell according to claim 1, characterized in that, The perovskite ultraviolet conversion layer is made of CsPbX3, where X is at least one of Cl, Br, and I. Preferably, the thickness of the perovskite ultraviolet conversion layer is 20~100nm, more preferably 40~60nm; Preferably, the antireflective layer is made of SiN. a :H, where a is 0.8~1.3; Preferably, the thickness of the antireflective layer is 60~120nm, more preferably 75~85nm; Preferably, the refractive index of the antireflective layer is 1.9 to 2.

1.

4. The back-contact solar cell according to any one of claims 1 to 3, characterized in that, The P-type doped region is provided with a tunneling oxide layer, a P+ poly layer and a P-region metal electrode layer in sequence in the direction away from the N-type silicon substrate. Preferably, the N-type doped region is provided with a tunneling oxide layer, an N+poly layer and an N-region metal electrode layer in sequence in the direction away from the N-type silicon substrate; Preferably, the insulating isolation region is provided with a tunneling oxide layer and a passivation layer in sequence in the direction away from the N-type silicon substrate; Preferably, the thickness of the tunneling oxide layer is 1~2 nm; Preferably, the thickness of the P+ poly layer is 150~250 nm; Preferably, the thickness of the N+ poly layer is 180~250 nm; Preferably, the passivation layer extends into the non-metallic electrode region and is deposited on the sidewall of the N-type silicon substrate; Preferably, the passivation layer is made of aluminum oxide and / or SiN. a , where a is 0.8~1.

3.

5. A method for preparing a back-contact solar cell according to any one of claims 1 to 4, characterized in that, Includes the following steps: S1. Alternating P-type doped regions and N-type doped regions are formed on the back surface of the double-textured N-type silicon substrate. S2. An interface oxide layer is prepared on the light-receiving surface of the N-type silicon substrate, and then a composite layer of ultraviolet response and hydrogen source is deposited by PECVD. The perovskite ultraviolet conversion layer is then prepared, and finally an anti-reflection layer is prepared by PECVD to obtain a semi-finished product. S3. After forming a metal electrode on the back surface of the semi-finished product, perform photothermal annealing and naturally cool to room temperature to obtain the back contact solar cell.

6. The preparation method according to claim 5, characterized in that, The preparation method of the interface oxide layer includes ozone oxidation or nitric acid oxidation; Preferably, the ozone oxidation process is as follows: the light-receiving surface of the N-type silicon substrate is placed under an ultraviolet lamp source, and the interface oxide layer is formed by irradiation at a power of 80~120W and a temperature of 25~50℃ for 5~10 minutes. Preferably, the nitric acid oxidation process is as follows: the light-receiving surface of the N-type silicon substrate is immersed in nitric acid solution for 3-5 minutes to form an interface oxide layer.

7. The preparation method according to claim 5, characterized in that, The specific process of using PECVD to deposit a composite layer of ultraviolet response and hydrogen source is as follows: In the PECVD equipment, silicon source, nitrogen source and carrier gas are deposited by PECVD, the substrate temperature is 300~400℃, the radio frequency power is 50~150W, and the gas pressure is 50~200Pa. Preferably, the flow rate ratio of the silicon source, the nitrogen source, and the carrier gas is 1:(1~5):(4~15); Preferably, the perovskite ultraviolet conversion layer is prepared by a solution spin coating method or a thermal evaporation method; Preferably, the solution spin coating process is as follows: CsX and PbX2 are dissolved in a mixed solvent to obtain a perovskite solution, and then the perovskite solution is spin-coated on the N-type silicon substrate at 2000-4000 rpm for 30-60 s to form a perovskite layer. Finally, the perovskite ultraviolet conversion layer is obtained by annealing on a hot plate at 150-200℃ for 10-30 min. Preferably, the concentration of the perovskite solution is 0.5~1.0M; Preferably, the process of preparing the antireflection layer by PECVD is as follows: in the PECVD equipment, silicon source, nitrogen source, hydrogen source and carrier gas are deposited by PECVD, the substrate temperature is ≤150℃, the radio frequency power is 30~80W, and the gas pressure is 30~80Pa. Preferably, the flow rate ratio of the silicon source, the nitrogen source, the hydrogen source and the carrier gas is 1:(1~5):(3~8):(4~15).

8. The preparation method according to claim 5, characterized in that, The photothermal annealing process is as follows: the semi-finished product forming the metal electrode is placed on a heating plate at 200~230℃, and a UV-LED light source with a wavelength of 300~400 nm is used with a light power density of 5~50 mW / cm². 2 Irradiate the front of the battery for 10-30 minutes.

9. The preparation method according to any one of claims 5 to 8, characterized in that, The method for forming the metal electrode is as follows: depositing a passivation film in the P-type doped region and the N-type doped region, then etching an opening on the passivation film, then printing a metal electrode in the opening area, and finally annealing at 700~800℃ for 10~30s to obtain the metal electrode. Preferably, the etching solution used for etching the opening is an HF solution; Preferably, the metal electrode is made of aluminum and / or silver; Preferably, the process of forming alternating P-type and N-type doped regions on the back surface of the double-textured N-type silicon substrate is as follows: a first tunneling oxide layer is deposited on the back surface of the double-textured N-type silicon substrate using LPCVD, followed by boron doping and a first annealing to form boron-doped polysilicon; a mask layer is deposited on the back surface, and then the layered structure on the N-type doped region and the insulating isolation region is removed to expose the N-type silicon substrate; a second tunneling oxide layer is deposited on the exposed N-type silicon substrate using LPCVD, followed by phosphorus doping and a second annealing in the N-type doped region; Preferably, the height of the nap is 1.1~2μm; Preferably, the temperature of the first annealing is 800~900℃ and the time is 10~60min; Preferably, the second annealing temperature is 800~900℃ and the time is 10~60min.

10. A photovoltaic module, characterized in that, Includes the back-contact solar cell as described in any one of claims 1 to 4.

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