Solar cell, method of manufacture and photovoltaic module

Abstract

The application discloses a solar cell, a preparation method and a photovoltaic module. The solar cell comprises a silicon substrate with a first surface and a second surface arranged oppositely, wherein the second surface comprises metal regions and non-metal regions arranged alternately along a first direction; a tunneling layer covering at least the metal regions, a first doped layer arranged on the surface of the tunneling layer of the metal regions; a metal film layer arranged on the surface of the first doped layer; a first dielectric layer arranged on the side of the silicon substrate away from the first surface, wherein an opening penetrating through the first dielectric layer along the thickness direction is formed on the first dielectric layer, and the opening is located on the metal region; and a first electrode, at least part of which is in contact with the metal film layer in the opening. The solar cell, the preparation method and the photovoltaic module can guarantee the photoelectric conversion efficiency and long-term stability of the solar cell.

Description

Technical Field

[0001] This invention belongs to the field of solar cell technology, specifically relating to a solar cell, its preparation method, and a photovoltaic module. Background Technology

[0002] Currently, N-type high-efficiency battery technology, represented by tunneling oxide passivated contact (TOPCon), has entered the stage of mass production. Its core device structure relies on a passivation contact system composed of an ultrathin tunneling oxide layer and a doped polycrystalline silicon layer (Poly-Si). This system achieves extremely high open-circuit voltage and fill factor through excellent interfacial chemical passivation and field-effect passivation.

[0003] In the metallization stage, the mainstream approach in the industry is screen printing silver paste. However, since 2025, the international price of silver has increased by over 300%, causing the cost of silver paste to surge to over 30% of the total battery manufacturing cost, surpassing silicon to become the largest cost item. The high price of silver paste and the risk of supply and demand fluctuations have become key bottlenecks restricting the industrialization and promotion of TOPCon technology and the continuous optimization of the entire life cycle cost of photovoltaic power generation.

[0004] To break free from reliance on silver paste, the industry is committed to developing low-silver / silver-free metallization alternatives based on inexpensive metals (such as copper and aluminum). Among these, physical vapor deposition (PVD) coating combined with inexpensive metal grid line technology has emerged as a highly promising alternative due to its ability to significantly reduce silver consumption and improve conductivity. However, directly introducing PVD metal films into existing TOPCon battery structures presents challenges such as a lack of compatibility with device optical structures and multiple damage coupling issues during the interface contact formation process.

[0005] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0006] The purpose of this invention is to provide a solar cell, a preparation method, and a photovoltaic module that can ensure the photoelectric conversion efficiency and long-term stability of the solar cell.

[0007] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution:

[0008] A solar cell, comprising:

[0009] A silicon substrate having a first surface and a second surface disposed opposite to each other, the second surface including metal regions and non-metal regions alternately arranged along a first direction;

[0010] A tunneling layer, at least covering the metal region;

[0011] A first doped layer is disposed on the surface of the tunneling layer in the metal region;

[0012] A metal film layer is disposed on the surface of the first doped layer;

[0013] A first dielectric layer is disposed on the side of the silicon substrate opposite to the first surface, and an opening is formed on the first dielectric layer that penetrates the first dielectric layer along the thickness direction, the opening being located in the metal region;

[0014] The first electrode, at least a portion of which is in contact with the metal film layer within the opening.

[0015] In one or more embodiments of the present invention, the tunneling layer further covers the non-metallic region; the solar cell further includes a second doped layer disposed in the non-metallic region and located on the surface of the tunneling layer away from the substrate, the second doped layer having the same doping type as the first doped layer, and the thickness of the second doped layer being less than the thickness of the first doped layer.

[0016] In one or more embodiments of the present invention, in a first direction, the opening has a first size W1, the metal film layer has a first width W2, and the first size W1 of the opening is smaller than the first width W2 of the metal film layer.

[0017] In one or more embodiments of the present invention, in a first direction, the first electrode has a first width W located within the opening. 31 and the second width W located outside the opening 32 The first width W of the first electrode 31 The first dimension W1 of the opening is less than or equal to the second width W of the first electrode. 32 The first size W1 of the opening is greater than or equal to the first size W2 of the metal film layer.

[0018] In one or more embodiments of the present invention, the openings are spaced apart along a second direction and / or extend continuously along a second direction, the second direction being perpendicular to the first direction.

[0019] In one or more embodiments of the present invention, the opening includes at least one of a circular opening, a square opening, a rectangular opening, and a long strip opening;

[0020] The diameter of the circular opening is 5μm-10μm, the side length of the square opening is 5μm-10μm, and the spacing between adjacent openings is 10μm-20μm.

[0021] The rectangular opening has a width of 8μm-15μm, a length of 15μm-25μm, and a spacing of 5μm-10μm between adjacent openings;

[0022] The width of the elongated opening is 8μm-15μm, and its length is less than or equal to the length of the first electrode.

[0023] In one or more embodiments of the present invention, the linewidth of the first electrode is 20 μm-150 μm, and the thickness is 5 μm-50 μm; and / or,

[0024] The material of the first electrode is selected from non-precious metal materials, including one or more of copper, aluminum, nickel, cobalt, iron, zinc, and tin.

[0025] In one or more embodiments of the present invention, the metal film layer is a composite metal film layer, which includes a seed layer and a conductive layer;

[0026] The seed layer and the conductive layer are made of different materials, and / or the thickness of the seed layer is less than the thickness of the conductive layer.

[0027] In one or more embodiments of the present invention, the material of the seed layer is selected from non-precious metal materials, including one of titanium, nickel, and zinc; and / or, the thickness of the seed layer is 8nm-20nm; and / or, the material of the conductive layer is selected from non-precious metal materials, including one of aluminum, copper, and magnesium; and / or, the thickness of the conductive layer is 50nm-90nm.

[0028] In one or more embodiments of the present invention, the metal film layer is a single-layer metal film layer;

[0029] The material of the metal film is selected from non-precious metal materials, including at least one of nickel, aluminum, titanium, zinc, copper, and magnesium, and / or the thickness of the metal film is 50nm-100nm.

[0030] A method for preparing a solar cell, comprising:

[0031] A silicon substrate is provided, the silicon substrate having a first surface and a second surface disposed opposite to each other, the second surface including metal regions and non-metal regions alternately arranged along a first direction;

[0032] A stacked tunneling layer, a doped layer, and a metal film are prepared in the metal region of the second surface;

[0033] A first dielectric layer is prepared on the side of the silicon substrate opposite to the first surface;

[0034] The first dielectric layer is patterned to form an opening in the metal region that penetrates the first dielectric layer along the thickness direction.

[0035] A first electrode is prepared, wherein at least a portion of the first electrode is in contact with the metal film layer within the opening.

[0036] In one or more embodiments of the present invention, a tunneling layer, a doped layer, and a metal film layer are prepared in the metal region of the silicon substrate, including:

[0037] A tunneling layer, a doped layer, and a metal film layer are sequentially stacked on the second surface of the silicon substrate;

[0038] The metal film and doped layer are patterned to remove the metal film and at least part of the doped layer in the non-metallic regions.

[0039] In one or more embodiments of the present invention, an annealing process is performed after a metal film layer is formed on the second surface of the silicon substrate.

[0040] The annealing atmosphere is a nitrogen protective atmosphere with a nitrogen purity of ≥99.99%. The annealing temperature is 300℃-500℃, the heating rate is 5℃ / min-10℃ / min, the holding time is 30min-60min, and the cooling rate is 3℃ / min-5℃ / min.

[0041] In one or more embodiments of the present invention, patterning the metal film and doped layer to remove the metal film and at least a portion of the doped layer in non-metallic regions includes:

[0042] The first step of the etching process removes the metal film layer and a portion of the doped layer in the non-metallic region;

[0043] A mask layer is prepared, which covers the surface of the metal film and the doped layer in the metal region;

[0044] The second step is the etching process, which removes the remaining doped layer in the non-metallic region or repairs the etching damage on the surface of the remaining doped layer in the non-metallic region.

[0045] The third step is an etching process to remove the mask layer.

[0046] In one or more embodiments of the present invention, the first etching process is a laser process; wherein the laser source is selected from short-pulse lasers, the laser power is 5W-10W, the laser frequency is 100kHz-200kHz, the pulse width is 10ps-50ps, the scanning method is unidirectional scanning, the scanning speed range is 500mm / s-800mm / s, and the laser energy density is 0.1J / cm². 2 -0.3J / cm 2 The laser spot diameter is 5μm-10μm, and the spot overlap rate is 10%-90%.

[0047] In one or more embodiments of the present invention, the preparation of the mask layer includes:

[0048] A mask material is printed on the surface of the metal film layer and the doped layer using a screen printing process, wherein the printing width of the mask material is not less than the width of the metal film layer;

[0049] The mask material is dried in stages to form a mask layer;

[0050] The first drying step has a temperature of 50℃-200℃ and a drying time of 3-5 minutes. The second drying step has a temperature of 100℃-300℃ and a drying time of 5-8 minutes.

[0051] In one or more embodiments of the present invention, the second etching process is an alkaline etching process, wherein...

[0052] The etching solution is a composite etching solution comprising sodium hydroxide and a surfactant, wherein the mass fraction of sodium hydroxide is 5%-8% and the mass fraction of the surfactant is 0.3%-0.5%; and / or,

[0053] The etching temperature is 50℃-80℃, and the etching time is 120s-360s.

[0054] In one or more embodiments of the present invention, the third etching process is an acid etching process, wherein...

[0055] The etching solution is a composite etching solution comprising hydrofluoric acid, acetic acid, deionized water, and a corrosion inhibitor; and / or,

[0056] The etching temperature is 25℃-30℃, the pH value is 1-3, and the etching time is 10min-20min.

[0057] In one or more embodiments of the present invention, a laser process is used to pattern the first dielectric layer; wherein...

[0058] The laser source is a short-pulse laser with a power of 3W-6W, a frequency of 150kHz-250kHz, a pulse width of 10ps-30ps, a bidirectional scanning mode, a scanning speed range of 800mm / s-1000mm / s, and a laser energy density of 0.05J / cm². 2 -0.15J / cm 2 The laser spot diameter is 3μm-8μm, and the spot overlap rate is 60%-80%.

[0059] In one or more embodiments of the present invention, the preparation of the first electrode includes:

[0060] Print the first electrode;

[0061] The first electrode is dried.

[0062] The drying temperature is 150℃-180℃, the drying time is 15min-20min, and the adhesion of the first electrode after drying is greater than or equal to 4N / cm. 2 .

[0063] A photovoltaic module includes the solar cell described above or a solar cell prepared by the method described above.

[0064] Compared with existing technologies, the solar cells, preparation methods, and photovoltaic modules of the present invention, by setting and patterning metal film layers and combining them with non-precious metal electrode technology, can effectively ensure and even improve the photoelectric conversion efficiency and structural stability of the cells while significantly reducing the amount of silver paste used, thus achieving cost reduction and efficiency improvement.

[0065] The solar cell, fabrication method, and photovoltaic module of the present invention limit the collection area of ​​the metal film layer used for current collection to be larger than the contact area of ​​the first electrode that contacts the metal film layer to achieve current conduction. This can significantly reduce the current density at the interface between the metal film layer and the first doped layer and suppress carrier recombination loss at the interface. At the same time, limiting the contact area between the first electrode and the metal film layer to a smaller range further reduces the recombination rate of the metal contact area, thereby achieving decoupling optimization of the collection area and the contact area.

[0066] The solar cell, its preparation method, and the photovoltaic module of the present invention utilize a three-segment structure that works synergistically: large-area collection of the metal film layer, small-area contact between the first electrode and the metal film layer, and wide-body transmission of the first electrode protruding from the surface of the first dielectric layer. This structure effectively suppresses recombination losses while reducing contact resistance and line resistance, comprehensively improving the open-circuit voltage, fill factor, and photoelectric conversion efficiency of the photovoltaic cell, and also possessing excellent industrialization process adaptability and long-term reliability.

[0067] The solar cell, its fabrication method, and its photovoltaic module of the present invention, through graphically optimized laser parameter control, ensure the opening depth while avoiding damage to the tunneling layer, effectively protecting the tunneling layer, thereby improving the open-circuit voltage and fill factor, and ultimately improving the photoelectric conversion efficiency of the cell.

[0068] The solar cell, its preparation method, and photovoltaic module of the present invention feature an alkali-resistant mask layer that provides a protective coating at the edge of the metal film layer. This effectively removes the heat-affected zone, resolidified layer, and lattice damage layer introduced by laser lithography during the alkali polishing process, restores the surface quality of the second doped layer and the first doped layer, effectively prevents lateral corrosion and peeling at the edge of the metal film layer, and ensures the dimensional accuracy and boundary neatness of the metallized pattern. Attached Figure Description

[0069] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0070] Figure 1 This is a schematic diagram of the structure of the solar cell of the present invention;

[0071] Figure 2 for Figure 1 A magnified schematic diagram of the partial structure at point A in the middle;

[0072] Figure 3 This is a schematic diagram of the open-film pattern of the solar cell of the present invention;

[0073] Figures 4a-4h This is a schematic diagram of the fabrication process steps of the solar cell of the present invention;

[0074] Figure 5 This is a partial structural schematic diagram of a solar cell according to another embodiment of the present invention;

[0075] Figure 6 This is a partial structural schematic diagram of a solar cell in another embodiment of the present invention;

[0076] Figure 7 This is a partial structural schematic diagram of a solar cell in another embodiment of the present invention;

[0077] Figure 8 This is a partial structural schematic diagram of a solar cell in another embodiment of the present invention;

[0078] Figure 9 This is a partial structural schematic diagram of a solar cell in another embodiment of the present invention. Detailed Implementation

[0079] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0080] In this invention, unless otherwise expressly specified and limited, the disclosed "range" is defined in the form of a lower limit and / or an upper limit. A given range is defined by selecting a lower limit and / or an upper limit, which defines the boundary of the particular range. Ranges defined in this way may include or exclude endpoints and can be arbitrarily combined; that is, any lower limit can be combined with any upper limit to form an unspecified range, and any lower limit can be combined with other lower limits to form an unspecified range. Similarly, any upper limit can be combined with any other upper limit to form an unspecified range. Furthermore, each individually disclosed point or single value can itself serve as a lower limit or upper limit and can be combined with any other point or single value or with other lower limits or upper limits to form an unspecified range.

[0081] In this invention, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0082] This invention discloses a solar cell, comprising:

[0083] A silicon substrate having a first surface and a second surface disposed opposite to each other, the second surface including metal regions and non-metal regions alternately arranged along a first direction;

[0084] The tunnel layer must at least cover the metallic area.

[0085] The first doped layer is disposed on the surface of the tunneling layer in the metal region;

[0086] A metal film layer is disposed on the surface of the first doped layer;

[0087] A first dielectric layer is disposed on the side of the silicon substrate away from the first surface. An opening is formed on the first dielectric layer that penetrates the first dielectric layer along the thickness direction and is located in the metal region.

[0088] The first electrode, at least a portion of which is in contact with the metal film layer within the opening.

[0089] In a first direction, the opening has a first size W1, and the metal film layer has a first width W2, wherein the first size W1 of the opening is smaller than the first width W2 of the metal film layer. In the first direction, the first electrode has a first width W located within the opening. 31 and the second width W located outside the opening 32 The first width W of the first electrode 31 The first dimension W1 of the opening is less than or equal to the second width W of the first electrode.32 The first size W1 of the opening is greater than or equal to the first size W2 of the metal film layer.

[0090] This invention also discloses a method for preparing a solar cell, comprising:

[0091] A silicon substrate is provided, the silicon substrate having a first surface and a second surface disposed opposite to each other, the second surface including metal regions and non-metal regions alternately arranged along a first direction;

[0092] A stacked tunneling layer, doped layer, and metal film are prepared in the metal region of the second surface;

[0093] A first dielectric layer is prepared on the side of the silicon substrate opposite to the first surface;

[0094] The first dielectric layer is patterned to form an opening in the metal region that penetrates the first dielectric layer along the thickness direction.

[0095] A first electrode is prepared, wherein at least a portion of the first electrode is in contact with a metal film layer within the opening.

[0096] In some embodiments, a tunneling layer, a doped layer, and a metal film are fabricated in the metal region of a silicon substrate, including:

[0097] A tunneling layer, a doped layer, and a metal film are sequentially fabricated on the second surface of a silicon substrate;

[0098] The metal film and doped layer are patterned to remove the metal film and at least part of the doped layer in the non-metallic regions.

[0099] In some embodiments, the metal film layer and the doped layer are patterned, including:

[0100] The first step of the etching process removes the metal film layer and a portion of the doped layer in the non-metallic region;

[0101] A mask layer is prepared, which covers the surface of the metal film and the doped layer in the metal region;

[0102] The second step is the etching process, which removes the remaining doped layer in the non-metallic region or repairs the etching damage on the surface of the remaining doped layer in the non-metallic region.

[0103] The third step is the etching process to remove the mask layer.

[0104] Specifically, in the above patterning process, the first etching step is a laser process; the laser source is a short-pulse laser with a power of 5W-10W, a frequency of 100kHz-200kHz, a pulse width of 10ps-50ps, a unidirectional scanning method, a scanning speed range of 500mm / s-800mm / s, and a laser energy density of 0.1J / cm². 2 -0.3J / cm 2 The laser spot diameter is 5μm-10μm, and the spot overlap rate is 10%-90%. The second etching process is an alkaline etching process. The third etching process is an acid etching process. The mask layer is made of an alkali-resistant but not acid-resistant material.

[0105] In some embodiments, a laser process is used to pattern the first dielectric layer; wherein the laser source is selected from short-pulse lasers, with a laser power of 3W-6W, a laser frequency of 150kHz-250kHz, a pulse width of 10ps-30ps, a scanning mode of bidirectional scanning, a scanning speed range of 800mm / s-1000mm / s, and a laser energy density of 0.05J / cm². 2 -0.15J / cm 2 The laser spot diameter is 3μm-8μm, and the spot overlap rate is 60%-80%.

[0106] The present invention also discloses a photovoltaic module, including the solar cell described above, or including a solar cell prepared by the method for preparing the solar cell described above.

[0107] This invention, by setting a metal film layer and patterning it, combined with non-precious metal electrode technology, can effectively ensure and even improve the photoelectric conversion efficiency and structural stability of the battery while significantly reducing the amount of silver paste used, thus achieving cost reduction and efficiency improvement.

[0108] This invention utilizes a three-segment structure—large-area collection of the metal film, small-area contact between the first electrode and the metal film, and wide-body transmission of the first electrode protruding from the surface of the first dielectric layer—to effectively suppress recombination losses while reducing contact resistance and line resistance. This comprehensively improves the open-circuit voltage, fill factor, and photoelectric conversion efficiency of photovoltaic cells, while also exhibiting excellent industrialization process adaptability and long-term reliability.

[0109] In this invention, the alkali-resistant mask layer achieves a covering effect on the edge of the metal film layer, so as to effectively remove the heat-affected zone, resolidification layer and lattice damage layer introduced by laser film opening during the alkali polishing process, restore the surface quality of the second doped layer and the first doped layer, effectively prevent lateral corrosion and peeling at the edge of the metal film layer, and ensure the dimensional accuracy and boundary neatness of the metallized pattern.

[0110] The present invention will be further described below with reference to the accompanying drawings.

[0111] See Figure 1 which is a schematic structural diagram of the solar cell in the present invention, the solar cell being a TOPCon cell, comprising a silicon substrate 10, in conjunction Figure 4a as shown, the silicon substrate 10 comprising a first surface S1 and a second surface S2 disposed opposite to each other, the second surface S2 comprising a metal region S22 and a non-metal region S21, the first surface S1 being the front surface (i.e., light-receiving surface) of the silicon substrate 10, and the second surface S2 being the back surface (i.e., backlight surface) of the silicon substrate 10. The silicon substrate 10 in the embodiment of the present invention is preferably an N-type silicon substrate.

[0112] See Figure 1 in conjunction with Figure 2 as shown, a tunneling layer 121 and a first doped layer 122 are disposed on the second surface S2 of the silicon substrate 10 in the present invention. In some embodiments of the present invention, the tunneling layer 121 only covers the metal region S22, and the first doped layer 122 is only disposed on the surface of the tunneling layer 121 in the metal region S22 on the second surface S2, while the tunneling layer 121 and the first doped layer 122 are not disposed on the non-metal region S21.

[0113] Specifically, the tunneling layer 121 is in direct contact with the second surface S2 of the silicon substrate 10 on the metal region S22, and can provide a good interface passivation effect on the metal region S22. The projection of the first doped layer 122 on the second surface S2 of the silicon substrate 10 is located within the metal region S22. The first doped layer 122 can provide a field passivation effect, and at the same time can improve contact and reduce resistance. The tunneling layer 121 and the first doped layer 122 are not disposed on the non-metal region S21, so that the thickness of the layer structure on this region is greatly reduced, which can reduce the parasitic absorption of backside light, increase the short-circuit current density of the cell, and significantly improve the cell efficiency and bifaciality.

[0114] Wherein, the tunneling layer 121 is a silicon oxide (SiO X ) layer, a silicon oxynitride (SiO X N Y ) layer, or a combination of both, preferably a silicon oxide layer. The doping type of the first doped layer 122 is the same as the doping type of the silicon substrate 10. Specifically, the first doped layer 122 in some embodiments of the present invention is a phosphorus-doped polysilicon layer.

[0115] In the above technical solution, the tunneling passivation contact structure of the tunneling layer / first doped layer is only disposed in the metal region S22 on the back surface of the silicon substrate, and the first doped layer and the tunneling layer are completely removed in the non-metal region S21, so that the layer thickness of the back non-metal region S21 is greatly reduced, which can reduce the parasitic absorption of backside light and increase the short-circuit current density of the cell, thereby significantly improving the cell efficiency.

[0116] In other embodiments of the present invention, refer Figure 5 as shown, a tunnel passivation contact structure is disposed on the metal region S22 on the second surface S2 of the silicon substrate 10, and a tunnel passivation contact structure is also disposed on the non-metal region S21 on the second surface S2 of the silicon substrate 10. However, for the tunnel passivation contact structure located on the non-metal region S21, the thickness H1 of the doped layer (the second doped layer 123) therein is much smaller than the thickness H2 of the doped layer (the first doped layer 122) in the tunnel passivation contact structure located on the metal region S22. The arrangement of the second doped layer 123 can provide a field passivation effect, improve contact, and reduce resistance. The doping types of the first doped layer 122 and the second doped layer 123 are completely the same.

[0117] refer Figure 1 as shown, in the present invention, a metal film layer 20 is disposed on the surface of the first doped layer 122 located in the metal region S22. The metal film layer 20 may be a single-layer metal film layer or a composite metal film layer, and a composite metal film layer is preferably used. The material of the metal film layer 20 is selected from non-noble metal materials, including at least one of nickel, aluminum, titanium, zinc, copper, and magnesium. The thickness of the single-layer metal film layer is controlled at 50nm-100nm. For example, when a single-layer Ni film is used, the thickness is controlled at 60nm-90nm; when a single-layer Cu film is used, the thickness is controlled at 70nm-100nm.

[0118] The composite metal film layer includes a seed layer and a conductive layer. The seed layer is used to improve the adhesion between the composite metal film layer, the first doped layer 122, and the first dielectric layer. The conductive layer is used to ensure the conductivity of the electrode.

[0119] The thickness of the conductive layer is greater than or equal to the thickness of the seed layer. The thickness of the seed layer is 8nm-20nm, for example, may be 8nm, 10nm, 15nm, 20nm, etc., or may be a range composed of any of the above values. The thickness of the conductive layer is 50nm-90nm, for example, may be 50nm, 60nm, 75nm, 90nm, etc., or may be a range composed of any of the above values.

[0120] The materials of both the seed layer and the conductive layer are selected from non-noble metal materials. The non-noble metal material may include one or more of titanium, zinc, magnesium, nickel, aluminum, and copper.

[0121] It should be noted that the material of the seed layer and the material of the conductive layer in the composite metal film layer shall be different materials. The material of the seed layer may be selected from one of titanium, nickel and zinc; the material of the conductive layer may be selected from one of aluminum, copper and magnesium, that is, the composite metal film layer may adopt combinations such as nickel-copper, titanium-aluminum, nickel-magnesium and the like. When the composite metal film layer is a nickel-copper composite film layer, the thickness of the nickel layer is 10nm-20nm, so as to improve the adhesion and prevent the diffusion of the top copper layer; the thickness of the copper layer is 50nm-80nm, so as to improve the electrical conductivity, and the total film thickness is 60nm-100nm. For other composite metal film layers such as a titanium-aluminum composite film layer, the thickness of the titanium layer is 8nm-15nm, the thickness of the aluminum layer is 55nm-90nm, and the total film thickness is 63nm-105nm.

[0122] In the present invention, the adhesion between the metal film layer 20 and the first doped layer 122 is greater than or equal to 1.5N / mm 2 (no peeling off in the adhesive tape test); the conductivity of the metal film layer 20 is greater than or equal to 5×10 7 S / m; the surface roughness of the metal film layer 20 is less than or equal to 0.5nm, so as to ensure the compatibility of subsequent laser etching and electrode printing; the uniformity of the metal film layer 20 is less than or equal to ±5nm (full-surface deviation), with no pinholes and no cracks.

[0123] It should be noted that, in the Figure 5 other illustrated embodiments, when a doped layer (the second doped layer 123) is also provided on the non-metal region S22 of the second surface S2 of the silicon substrate 10, the metal film layer 20 is still only disposed on the surface of the doped layer (the first doped layer 123) on the metal region S21 of the second surface S2 of the silicon substrate 10, and the rest of the layer structures are the same as those of the Figure 1 illustrated embodiment.

[0124] In the present invention, a first dielectric layer is disposed on the surface of the silicon substrate 10 on the side away from the first surface S1. The first dielectric layer covers the metal film layer 20 and extends into the non-metal region S21, and in the non-metal region S21, the first dielectric layer is in direct contact with the tunneling layer 121. The first dielectric layer includes a first passivation layer 32 and a first anti-reflection layer 42 which are sequentially stacked. The first passivation layer 32 can provide excellent field passivation and chemical passivation effects, and the first anti-reflection layer 42 can reduce the reflectivity and increase the light utilization rate.

[0125] Exemplarily, the first passivation layer 32 is an aluminum oxide passivation layer. The first anti-reflection layer 42 may be a stacked film formed of any one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. Silicon nitride has inactive chemical properties, strong acid and alkali corrosion resistance, and can reduce the sensitivity of the battery to the environment.

[0126] Refer Figure 1 and in conjunction with Figure 3As shown, an opening 331 penetrating the first dielectric layer along the thickness direction is formed in the metal region S22 on the first dielectric layer.

[0127] For example, the second surface S2 of the silicon substrate 10 includes a plurality of surfaces along a first direction ( Figure 3 Metal regions S22 are spaced apart along the second direction (y-direction as shown), with non-metal regions between adjacent metal regions S22. Both the metal regions S22 and the non-metal regions are along the second direction (y-direction as shown). Figure 3 The first direction extends along the x-direction shown, and the second direction is perpendicular to the first direction. Each metal region S22 is provided with a set of openings 33 or multiple sets of openings 33 spaced apart along the first direction (e.g., ...). Figure 3 As shown in f), each group of openings 33 includes multiple openings 331 spaced apart along the second direction (e.g., ...). Figure 3 (as shown in a, b, c, e, f), or includes an opening 331 that extends continuously along the second direction (as shown in a diagram). Figure 3 (as shown in d).

[0128] In some embodiments of the present invention, each metal region S22 is provided with a set of openings 33, and each set of openings 33 includes an opening 331 that extends continuously along the second direction (e.g., ...). Figure 3 (As shown in d). The openings 331 in the multiple metal regions S22 are arranged in an array in the first direction.

[0129] The opening 331, which extends continuously along the second direction, is an elongated opening. The width of the elongated opening is 8μm-15μm, for example, it can be 5μm, 7μm, 9μm, 12μm, 15μm, etc., or it can be any range of the above values. The length of the elongated opening is less than or equal to the length of the first electrode 52.

[0130] In other embodiments, each metal region S22 may be provided with multiple sets of openings 33 spaced apart along a first direction, each set of openings 33 including an elongated opening that extends continuously along a second direction.

[0131] Alternatively, each metal region S22 may have one or more sets of opening groups 33 spaced apart, each set of opening groups 33 including multiple openings 331 spaced apart along the second direction (e.g., Figure 3 (As shown in a, b, c, e, and f). All openings 331 present a discrete point distribution on the second surface S2. When multiple openings 331 in each metal region are arranged in a straight line at equal intervals, and multiple metal regions are arranged at equal intervals with openings 331 corresponding to adjacent metal regions arranged in a straight line at equal intervals in the first direction, all openings 331 present an array of point distributions.

[0132] Wherein, the shapes of the plurality of openings 331 spaced apart along the second direction include at least one of a circular opening, a square opening, and a rectangular opening. The diameter of the circular opening is 5μm-10μm, for example, may be 5μm, 6μm, 8μm, 10μm, etc., or may be a range composed of any of the above values. The side length of the square opening is 5μm-10μm, for example, may be 5μm, 6μm, 8μm, 10μm, etc., or may be a range composed of any of the above values. The distance between adjacent circular openings and / or square openings is 10μm-20μm, for example, may be 10μm, 15μm, 18μm, 20μm, etc., or may be a range composed of any of the above values. The width of the rectangular opening is 8μm-15μm, for example, may be 8μm, 10μm, 12μm, 14μm, 15μm, etc., or may be a range composed of any of the above values, and the length thereof is 15μm-25μm, for example, may be 15μm, 17μm, 19μm, 23μm, 25μm, etc., or may be a range composed of any of the above values. The distance between adjacent rectangular openings is 5μm-10μm, for example, may be 5μm, 7μm, 10μm, etc., or may be a range composed of any of the above values.

[0133] In the above technical solution, by defining the distribution manner of the openings 331 as discrete point distribution, the carrier recombination loss of the metal film layer, the electrode and the tunneling passivation structure can be significantly suppressed, so as to increase the open circuit voltage (Voc), increase the fill factor (FF), maximize the light absorption efficiency, and improve the cell conversion efficiency.

[0134] Alternatively, a part of the metal regions is provided with elongated openings extending continuously along the second direction ( Figure 3 the x direction as shown), and the remaining part of the metal regions is provided with a plurality of circular openings, square openings or rectangular openings spaced apart along the second direction ( Figure 3 the x direction as shown) (such as Figure 3 shown as e therein). The combined distribution of openings of different shapes can also suppress the carrier recombination loss of the metal film layer, the electrode and the tunneling passivation structure, so as to increase the open circuit voltage (Voc) and the fill factor (FF), and improve the light absorption efficiency and the cell conversion efficiency.

[0135] Reference Figure 2 as shown, each opening 331 has a first dimension W1 in the first direction (y direction), the metal film layer 20 also has a first width W2 in the first direction, and the first dimension W1 of the opening 331 is smaller than the first width W2 of the metal film layer 20.

[0136] In the above technical solution, the photogenerated carriers generated by the first doped layer 122 are collected by the metal film layer 20 (W2) with a relatively large area, then laterally transmitted within the metal film layer 20 to the opening 331 (W1) on the first dielectric layer, and then led out via the first electrode. Since W2>W1, the current collection area is much larger than the contact opening area, which significantly reduces the current density at the interface between the metal film layer 20 and the first doped layer 122, suppresses the carrier recombination loss at this interface, reduces the recombination rate of the metal contact region at the same time, and realizes the decoupling optimization of the collection area and the contact area.

[0137] In this embodiment, the first electrode 52 is disposed on the second surface S2 of the silicon substrate 10, specifically located on the metal region S22 in the second surface S2, and is in contact with the metal film layer 20 inside the opening 331.

[0138] Refe Figure 2 as shown, in the first direction (y direction), the first electrode 52 has a first width W located inside the opening 331 31 and a second width W located outside the opening 331 32 , the first width W of the first electrode 52 31 is less than or equal to the first dimension W1 of the opening 331; the second width W of the first electrode 52 32 is greater than or equal to the first dimension W1 of the opening 331 and less than or equal to the first width W2 of the metal film layer 20.

[0139] In the above technical solution, the first width W of the first electrode 52 inside the opening 331 31 is not greater than the first dimension W1 of the opening 331, which ensures the integrity and low resistance characteristic of the contact interface between the first electrode 52 and the metal film layer 20; the second width W of the first electrode 52 outside the opening 331 32 is not less than the first dimension W1 of the opening 331, which increases the cross-sectional area of the first electrode 52 and significantly reduces the line resistance power loss; at the same time, the second width W 32 is not greater than the first width W2 of the metal film layer 20, which ensures that the first electrode 52 is always located within the coverage of the metal film layer 20 and avoids the introduced additional recombination and leakage risk.

[0140] Furthermore, the above dimensional hierarchical relationship provides a sufficient alignment tolerance window for performing the opening process on the first dielectric layer and the first electrode printing process, reduces the dependence on high-precision overlay equipment in mass production, and effectively improves the process stability and production line yield.

[0141] The present invention synergistically adopts a three-section structure of large-area collection by the metal film layer 20, small-area contact between the first electrode 52 and the metal film layer 20, and wide-body transmission where the first electrode 52 protrudes from the surface of the first dielectric layer, which effectively suppresses recombination loss while reducing contact resistance and line resistance, comprehensively improves the open-circuit voltage, fill factor and photoelectric conversion efficiency of the photovoltaic cell, and has excellent industrial process adaptability and long-term reliability.

[0142] In the present invention, the line width of the first electrode 52 (referring to the second width W located outside the opening 311 32 ) is 20 μm-150 μm, for example, may be 20 μm, 30 μm, 50 μm, 70 μm, 100 μm, 120 μm, 150 μm, etc., or may be a range composed of any of the above values. The thickness of the first electrode 52 is 5 μm-50 μm, for example, may be 5 μm, 7 μm, 10 μm, 20 μm, 40 μm, 50 μm, etc., or may be a range composed of any of the above values. The adhesion of the first electrode 52 is greater than or equal to 4 N / cm 2 . The material of the first electrode 52 is selected from non-noble metal materials, including one or more of copper, aluminum, nickel, cobalt, iron, zinc and tin.

[0143] As shown in Figure 1 , the emitter layer 11 is formed at the first surface S1 of the silicon substrate 10 of the present invention by a diffusion process or a PECVD (Plasma Enhanced Chemical Vapor Deposition) process. Exemplarily, the emitter layer 11 of the present invention is a P-type doped layer (i.e., P+ emitter), which is formed below the first surface S1 of the silicon substrate (i.e., inside the silicon substrate) by a boron doping process.

[0144] On the first surface S1 of the silicon substrate 10 of the present invention, a second dielectric layer is disposed on the surface of the emitter layer 11. The second dielectric layer may include a second passivation layer 31 and / or a second anti-reflection layer 41. The second anti-reflection layer 41 can reduce the reflectivity and increase the light utilization rate. The second anti-reflection layer 41 may be a stacked film formed of any one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. The second passivation layer 31 is an aluminum oxide passivation layer, which can provide excellent field passivation and chemical passivation effects.

[0145] The second electrode 51 of the present invention is located on the first surface S1 of the silicon substrate 10 and is in contact with the emitter layer 11. The material of the second electrode 51 may be selected from conventional silver paste.

[0146] It can be understood that the solar cell of the present invention may further include a plurality of main electrodes (not shown) vertically distributed with the first electrode 52 on its backlight surface, and may also include a plurality of main electrodes (not shown) vertically distributed with the second electrode 51 on its light-receiving surface. The material of the main electrode may be selected from conventional silver paste.

[0147] The preparation method of the solar cell of the present invention specifically includes the following steps:

[0148] 1. Providing a cell preform.

[0149] As shown in Figure 4a , the cell preform includes a silicon substrate 10, the silicon substrate 10 includes a first surface S1 and a second surface S2 disposed opposite to each other, the second surface S2 includes a metal region S22 and a non-metal region S21, the first surface S1 is the front surface (i.e., the light-receiving surface) of the silicon substrate 10, and the second surface S2 is the back surface (i.e., the backlight surface) of the silicon substrate 10. The silicon substrate 10 in the embodiment of the present invention is preferably an N-type silicon substrate.

[0150] A P-type doped emitter layer 11 is formed on the first surface S1 of the silicon substrate 10 through a boron diffusion process. Specifically, diffusion can be carried out by a deposition and propulsion method using a boron source (such as BCl3 or BBr3) in a high-temperature furnace tube.

[0151] It should be noted that before the boron diffusion step, single-sided or double-sided texturing may be performed on the first surface S1 and the second surface S2 of the silicon substrate 10. After the boron diffusion step, back surface polishing may be performed on the silicon substrate 10. Since the texturing process and the polishing process are not the innovation points of the present invention, this application does not elaborate on them in detail here.

[0152] A tunnel layer 121 and a doped layer 122' stacked in sequence are prepared on the second surface S2 of the silicon substrate 10 by a PECVD process to form a tunnel passivation contact structure. The tunnel layer 121 is in contact with the second surface S2 of the silicon substrate 10, and can provide a good interface passivation effect. The tunnel layer 121 is one or a combination of a silicon oxide (SiO X ) layer and a silicon oxynitride (SiO X N Y ) layer, preferably a silicon oxide layer. The doping type of the doped layer is the same as that of the silicon substrate 10. The doped layer can provide a field passivation effect, and at the same time can improve contact and reduce resistance.

[0153] 2. Deposition of the metal film layer 20.

[0154] First, the surface of the doped layer 122' is pretreated. Specifically, the cell preform is placed in a vacuum chamber for preheating treatment, with a preheating temperature of 120°C-150°C and a preheating time of 5min-8min, so as to remove trace moisture on the surface of the doped layer.

[0155] Next, as shown in Figure 4b , the entire surface of the metal film layer 20 is coated on the surface of the doped layer by a physical vapor deposition process (such as magnetron sputtering).

[0156] The metal film layer 20 can be a single-layer metal film layer or a composite metal film layer, with composite metal film layers being preferred. The material of the metal film layer 20 is selected from non-precious metal materials, including at least one of nickel, aluminum, titanium, zinc, copper, and magnesium. The thickness of the single-layer metal film layer is controlled between 50 nm and 100 nm. For example, a single-layer Ni film is used with a thickness controlled between 60 nm and 90 nm; a single-layer Cu film is used with a thickness controlled between 70 nm and 100 nm.

[0157] The composite metal film includes a seed layer and a conductive layer. The seed layer is used to enhance the adhesion between the composite metal film and the first doped layer 122 and the first dielectric layer. The conductive layer is used to ensure the conductivity of the electrodes.

[0158] The thickness of the conductive layer is greater than or equal to the thickness of the seed layer. The thickness of the seed layer is 8nm-20nm, for example, it can be 8nm, 10nm, 15nm, 20nm, etc., or any range of the above values. The thickness of the conductive layer is 50nm-90nm, for example, it can be 50nm, 60nm, 75nm, 90nm, etc., or any range of the above values.

[0159] Both the seed layer and the conductive layer are made of non-precious metals. Non-precious metals may include one or more of titanium, zinc, magnesium, nickel, aluminum, and copper.

[0160] It should be noted that the seed layer and the conductive layer in the composite metal film should be made of different materials. The seed layer can be made of titanium, nickel, or zinc; the conductive layer can be made of aluminum, copper, or magnesium. That is, the composite metal film can use combinations such as nickel-copper, titanium-aluminum, or nickel-magnesium. When the composite metal film is a nickel-copper composite film, the nickel layer thickness is 10nm-20nm to improve adhesion and prevent the top copper layer from diffusing; the copper layer thickness is 50nm-80nm to improve conductivity, and the total film thickness is 60nm-100nm. For other composite metal films, such as titanium-aluminum composite films, the titanium layer thickness is 8nm-15nm, the aluminum layer thickness is 55nm-90nm, and the total film thickness is 63nm-105nm.

[0161] In this invention, the adhesion between the metal film layer 20 and the first doped layer 122 is greater than or equal to 1.5 N / mm. 2 (No tape peeling during testing); The conductivity of the metal film layer 20 is greater than or equal to 5 × 10⁻⁶. 7 S / m; The surface roughness of the metal film layer 20 is less than or equal to 0.5nm, ensuring the compatibility of subsequent laser etching and electrode printing; The uniformity of the metal film layer 20 is less than or equal to ±5nm (overall deviation), with no pinholes or cracks.

[0162] After the deposition of the metal film layer 20 is completed, the coated battery preform is subjected to annealing treatment. Specifically, the annealing process of "nitrogen protection combined with staged temperature rise and fall" is adopted; wherein, the annealing atmosphere is a nitrogen protective atmosphere, the nitrogen purity is ≥99.99%, the annealing temperature is controlled at 300°C-500°C, the heating rate is 5°C / min-10°C / min, the holding time is 30min-60min, and then the temperature is lowered to room temperature at a cooling rate of 3°C / min-5°C / min.

[0163] 3. Laser etching.

[0164] As shown in Figure 4c , a laser process is used to pattern the metal film layer 20 of the coated battery preform, partially or completely removing the metal film layer 20 and the doped layer on the non-metal region S21 (the figure shows complete removal, and the tunnel layer 121 on the non-metal region S21 is also removed at the same time), while retaining the metal film layer 20 and the doped layer (collectively referred to as the first doped layer 122 hereinafter) as well as the tunnel layer 121 on the metal region S22.

[0165] Wherein, the laser light source is selected from short-pulse lasers (picosecond lasers), and the laser wavelength is 532nm; the pulse width ranges from 10ps to 50ps, for example, it can be 10ps, 20ps, 30ps, 40ps, 50ps, etc., or it can be a range composed of any of the above values; the laser power is 5W-10W, for example, it can be 5W, 6W, 8W, 10W, etc., or it can be a range composed of any of the above values; the laser frequency is 100kHz-200kHz, for example, it can be 100kHz, 150kHz, 200kHz, etc., or it can be a range composed of any of the above values; the scanning method is unidirectional scanning to ensure uniform etching and avoid under-etching and over-etching. The scanning speed ranges from 500mm / s to 800mm / s, for example, it can be 500mm / s, 600mm / s, 700mm / s, 800mm / s, etc., or it can be a range composed of any of the above values; the number of etching times is 1-2 times (to avoid damage caused by multiple etching); the laser energy density is 0.1J / cm 2 -0.3J / cm 2 , for example, it can be 0.1J / cm 2 , 0.2J / cm 2 , 0.3J / cm 2etc., or may be a range composed of any of the above values; the laser spot diameter is 5μm-10μm, for example, may be 5μm, 7μm, 9μm, 10μm, etc., or may be a range composed of any of the above values; the shape of the laser spot is circular or rectangular, and the spot overlap rate is 10%-90%, for example, may be 10%, 30%, 50%, 70%, 90%, etc., or may be a range composed of any of the above values.

[0166] 4. Repair open film damage.

[0167] Reference Figure 4d as shown, first, a mask layer 100 covering the surfaces of the metal film layer 20 in the metal region S22, the first doped layer 122 and the tunneling layer 121 is prepared.

[0168] Specifically, a screen printing process is adopted to print a mask material on the surfaces of the metal film layer 20, the first doped layer 122 and the tunneling layer 121. The mask material accurately shields the metal film layer 20, the first doped layer 122 and the tunneling layer 121 in the metal region, and exposes the non-metal region. The mask material is selected as epoxy-based acid-strippable ink (alkali-resistant and acid-nonresistant), and a curing agent with a mass ratio of 5%-8% may be added to improve the alkali resistance and adhesion of the mask material.

[0169] In the epoxy-based acid-strippable ink, the ink has a solid content of 20%-30% and a viscosity of 5000Pa·s-8000mPa·s (at 25℃), which meets the characteristics of alkali resistance and acid nonresistance. Tests show that it does not fall off after being immersed in an alkali solution with pH=8-10 for 30min, and can be completely dissolved after being immersed in an acid washing solution with pH=1-3 for 10min-20min.

[0170] The printing width of the mask material is 2μm-10μm larger than the width of the metal film layer 20 retained after laser etching. For example, if the width of the metal film layer 20 is 20μm, the printing width of the mask material is 22μm-30μm. The alignment deviation between the edge of the printed mask material and the edge of the metal film layer 20 is ≤2μm, which ensures that the metal film layer 20 is completely shielded, with no missing shielding and no ink overflow.

[0171] After printing, the mask material is subjected to a stepwise drying treatment to form the mask layer 100. The first step of drying is performed at a temperature of 50℃-200℃ for a duration of 3min-5min to remove moisture in the ink; the second step of drying is performed at a temperature of 100℃-300℃ for a duration of 5min-8min to realize the curing of the mask material. After curing, the hardness of the mask layer is ≥2H, and the adhesion is ≥1.2N / mm 2 , the alkali resistance meets the standard, and the mask layer is insoluble in the alkali solution of the subsequent alkali polishing process; after drying, appearance inspection is carried out to reject unqualified products with damaged mask layer, missing printing or ink overflow.

[0172] Next, the battery preform on which the mask layer 100 has been formed is subjected to a thinning and polishing treatment, to remove the remaining doped layer and tunnel layer in the non-metal region or repair the etching damage on the surface of the remaining doped layer in the non-metal region, and remove surface impurities (the drawing shows that all the doped layer and tunnel layer in the non-metal region are removed).

[0173] Specifically, the etching solution is preferably a sodium hydroxide (NaOH) solution with a concentration of 5%-8% (mass fraction) and a temperature of 40°C-50°C. An appropriate amount of surfactant (mass proportion 0.3%-0.5%, non-ionic surfactant is selected) can be added into the etching solution to improve the uniformity of alkaline polishing and reduce surface scratches. The alkaline polishing temperature is 50°C-80°C, and the alkaline polishing time is controlled to be 120s-360s. After alkaline polishing, deionized water is used for rinsing for 2min-3min at a rinsing rate of 8L / min-12L / min.

[0174] Ref Figure 4e shown, finally, the mask layer 100 is removed by pickling.

[0175] Wherein, the pickling solution formula is formed by mixing hydrofluoric acid (HF), acetic acid (CH3COOH) and deionized water at a volume ratio of 1:3:12, and an appropriate amount of corrosion inhibitor (mass proportion 0.5%-1%, imidazole corrosion inhibitor is selected) can be added to prevent corrosion of the metal film layer 20 and the doped layer. The pickling temperature is controlled at 25°C-30°C, with a pH value of 1-3. The pickling time is 10min-20min, and the stirring speed is 50r / min-80r / min. Ultrasonic-assisted cleaning can be adopted, with an ultrasonic power of 50W-80W and a frequency of 40kHz, to improve the removal effect of the mask layer. Nitrogen (N2) is continuously introduced during the pickling process at a flow rate of 20sccm-30sccm to prevent volatilization and oxidation of the pickling solution.

[0176] After pickling, deionized water is firstly used for rinsing for 3min-5min at a rinsing rate of 10L / min-15L / min and a water temperature of 25°C-30°C to remove the residual pickling solution, and then drying is carried out at a temperature of 100°C-300°C for 3min-5min with a drying wind speed of 2m / s-3m / s, so as to ensure no moisture and no residual pickling solution. After drying, surface inspection is carried out to ensure no mask layer residue and no surface corrosion.

[0177] 5. Preparation of the first dielectric layer, the second dielectric layer and the second electrode.

[0178] Ref Figure 4fAs shown, a second dielectric layer is formed at the first surface S1 of the silicon substrate 10 by an ALD (Atomic Layer Deposition) process. The second dielectric layer may include a second passivation layer 31 and / or a second anti-reflection layer 41. The second anti-reflection layer 41 can reduce the reflectivity and increase the light utilization rate. The second anti-reflection layer 41 may be a stacked film formed of any one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. The second passivation layer 31 is an aluminum oxide passivation layer, which can provide excellent field passivation and chemical passivation effects.

[0179] A first dielectric layer is formed at the second surface S2 of the silicon substrate 10 by an ALD (Atomic Layer Deposition) process. The first dielectric layer includes a first passivation layer 32 and a first anti-reflection layer 42. The first passivation layer 32 can provide excellent field passivation and chemical passivation effects, and the first anti-reflection layer 42 can reduce the reflectivity and increase the light utilization rate. The first passivation layer 32 is an aluminum oxide passivation layer. The first anti-reflection layer 42 may be a stacked film formed of any one or more of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, preferably a silicon nitride layer. Silicon nitride has inactive chemical properties and strong acid and alkali corrosion resistance, which can reduce the sensitivity of the battery to the environment.

[0180] Ref Figure 4g As shown, a screen printing process is used to sequentially print main grids (not shown) and the second electrode 51 on the first surface S1 of the battery preform. After printing, the battery preform is sent into a sintering furnace for sintering treatment. The sintering temperature is in the range of 600°C to 800°C, for example, may be 600°C, 650°C, 700°C, 750°C, 800°C, etc., or may be a range composed of any of the above values; the sintering time is 0.5min to 5min, for example, may be 0.5min, 1min, 2min, 4min, 5min, etc., or may be a range composed of any of the above values. After sintering, the second electrode 51 is electrically connected to the emitter layer 11. The materials of the main grids (not shown) and the second electrode 51 may both be silver.

[0181] 6. Laser film opening.

[0182] Ref Figure 4h As shown, a laser process is used to pattern the first dielectric layer, so as to form an opening 331 on the first dielectric layer located in the metal region S22, exposing the metal film layer 20.

[0183] wherein the laser light source is selected from short-pulse laser (picosecond laser), with a laser wavelength of 355 nm; the pulse width ranges from 10 ps to 30 ps, for example, may be 10 ps, 20 ps, 30 ps, etc., or may be a range composed of any of the above values; the laser power is 3 W to 6 W, for example, may be 3 W, 4 W, 5 W, 6 W, etc., or may be a range composed of any of the above values; the laser frequency is 150 kHz to 250 kHz, for example, may be 150 kHz, 200 kHz, 250 kHz, etc., or may be a range composed of any of the above values; the scanning mode is bidirectional scanning. The scanning speed ranges from 800 mm / s to 1000 mm / s, for example, may be 800 mm / s, 900 mm / s, 1000 mm / s, etc., or may be a range composed of any of the above values; the number of etching times is 1; the laser energy density is 0.05 J / cm 2 -0.15 J / cm 2 , for example, may be 0.05 J / cm 2 , 0.1 J / cm 2 , 0.15 J / cm 2 , etc., or may be a range composed of any of the above values; the laser spot diameter is 3 μm to 8 μm, for example, may be 3 μm, 5 μm, 7 μm, 8 μm, etc., or may be a range composed of any of the above values; the spot overlap rate is 60% to 80%, for example, may be 60%, 70%, 80%, etc., or may be a range composed of any of the above values.

[0184] With reference Figure 3 to the illustration, the laser film-opening pattern may be one or a combination of more patterns (c, e, f) selected from arrayed dots (a), line segments (b) or continuously extending lines (d), wherein the dot pattern may be circular or square, with a diameter or side length of 5 μm to 10 μm, the center point distance between adjacent dots is 10 μm to 20 μm, and the dot array is uniformly distributed without offset; the line segment pattern may be rectangular, with a width of 8 μm to 15 μm and a length of 15 μm to 25 μm, and the distance between adjacent line segments is 5 μm to 10 μm; the continuously extending line pattern may be a long strip, with a width of 8 μm to 15 μm, and the length is consistent with the length of the electrode to be prepared subsequently.

[0185] 7. Printing the first electrode.

[0186] Refe Figure 1As shown, the back side of the battery preform (on the second surface side) after laser film opening is printed with a screen printing process for the back first electrode 52. The back first electrode 52 is made of non-precious metal material, such as copper, aluminum, nickel, cobalt, iron, zinc, tin or other inexpensive metals. The linewidth of the back first electrode 52 is controlled to be 20μm-150μm, for example, 20μm, 30μm, 70μm, 100μm, 120μm, 150μm, etc., or any range of the above values; the thickness of the back first electrode 52 is controlled to be 5μm-50μm, for example, 5μm, 20μm, 40μm, 50μm, etc., or any range of the above values; to ensure effective contact between the first electrode 52 and the metal film layer 20, increasing the carrier transport channel.

[0187] After printing, the material undergoes a drying process at 150℃-180℃ for 15-20 minutes. A single-temperature drying mode is used, while simultaneously controlling the adhesion of the first electrode to ≥4N / cm after drying. 2 It improves performance indicators such as no broken lines or burrs, thus enhancing process stability.

[0188] In this invention, the first electrode on the back is prepared by using a cheap metal instead of silver paste, thereby reducing the use of silver paste and effectively reducing the production cost of the battery.

[0189] Example 1:

[0190] Solar cells are prepared using the following method:

[0191] The battery preform includes an N-type silicon substrate; a P+ emitter layer formed on a first surface of the silicon substrate; a tunneling layer formed on a second surface of the silicon substrate; and a doped layer.

[0192] Physical vapor deposition (PVD) process (magnetron sputtering) is used to coat the entire back surface of the battery preform.

[0193] Before coating, the surface of the doped layer on the back side is pretreated. The battery preform is placed in the vacuum chamber of the PVD coating equipment for vacuum preheating. The preheating temperature is controlled at 135℃, the preheating time is 6 minutes, and the preheating vacuum degree is maintained at 3×10⁻⁶. -3 During the preheating process, inert argon gas (Ar) is continuously introduced at a flow rate of 40 sccm to effectively remove trace amounts of water vapor from the surface of the doped layer, prevent oxidation of the doped layer, and lay the foundation for subsequent PVD metal film layers.

[0194] PVD deposition of a metal film. A Ni / Cu composite film is used, with Ni as the bottom metal film and Cu as the top metal film; the Ni layer thickness is 15 nm, the Cu layer thickness is 65 nm, and the total film thickness is 80 nm. The vacuum level is controlled at 3 × 10⁻⁶. -4The sputtering parameters were: Pa, sputtering power 250W, sputtering temperature 225℃, argon flow rate 75sccm, sputtering time 22min, and target-substrate distance 100mm. The metal film exhibited uniformity ≤±5nm, with no pinholes or cracks, and adhesion to the doped layer ≥1.5N / mm. 2 (No tape peeling during testing), conductivity ≥ 5 × 10⁻⁶ 7 S / m, film surface roughness ≤0.5nm, ensuring compatibility with subsequent laser etching and electrode printing.

[0195] After deposition, the PVD-coated battery is annealed using a process that combines nitrogen protection and segmented heating and cooling. The annealing atmosphere is nitrogen protection with a nitrogen purity of ≥99.99%. The annealing temperature is controlled at 350℃, the heating rate is 5℃ / min, the holding time is 45min, and then the temperature is reduced to room temperature at a cooling rate of 5℃ / min.

[0196] Using a short-pulse picosecond laser, the back of the battery after PVD coating is laser-opened to precisely remove the metal film and doped layer in the non-metallic areas, while retaining the metal film and doped layer in the metallic areas.

[0197] The laser wavelength is 532nm, pulse width is 30ps, repetition rate is 150kHz, laser power is 7.5W, etching speed is 650mm / s, etching is performed once, and laser energy density is 0.2J / cm². 2 The laser spot diameter is 7.5 μm, the spot shape is rectangular, the spot overlap rate is 50%, and the scanning method is unidirectional scanning to ensure uniform etching and avoid missed or over-etching. The removal rate of the metal film layer in the non-metallic area is ≥99.5%, the removal rate of the doped layer is ≥99%, and the underlying tunneling layer is not damaged (the thickness of the tunneling layer is retained at ≥1.5 nm after etching). The etching edge deviation is ≤3 μm, with no burrs or excessive ablation, and the surface roughness after etching is ≤1.0 nm. After etching, a high-pressure air knife (pressure 0.4 MPa) is used to blow away surface dust to avoid residue affecting subsequent processes.

[0198] A screen printing process is used to print a mask layer on the back side after laser delamination, precisely masking the metal areas and exposing the non-metallic areas. The mask layer material is an epoxy resin-based acid-removable ink with 6.5% curing agent added to improve the mask layer's alkali resistance and adhesion. The epoxy resin-based acid-removable ink has a solids content of 25% and a viscosity of 6500 mPa·s (25℃), meeting the requirements of being alkali-resistant but not acid-resistant. It shows no peeling after immersion in an alkaline solution at pH=9 for 30 minutes and completely dissolves after immersion in an acid pickling solution at pH=2 for 15 minutes. The mask layer width is 6μm wider than the width of the laser-delaminated metal film, and the alignment deviation between the mask layer edge and the metal film edge is ≤2μm, ensuring complete masking of the metal areas without any missed areas or ink overflow.

[0199] After printing, the mask layer undergoes segmented drying. The first segment, at 90℃ for 4 minutes, removes moisture from the ink. The second segment, at 135℃ for 6.5 minutes, cures the mask layer. After curing, the mask layer has a hardness ≥2H and an adhesion ≥1.2N / mm. 2 .

[0200] After the battery is printed with the mask layer, it is subjected to alkaline polishing and acid washing in sequence to remove the doped layer, residual damage layer, surface impurities and mask layer in the non-metallic area.

[0201] Alkaline polishing uses a sodium hydroxide (NaOH) solution with a concentration of 6.5% (mass fraction) at a temperature of 45℃, and adds 0.4% (mass fraction) of a nonionic surfactant to improve the uniformity of alkaline polishing. The alkaline polishing tank operates at a temperature of 65℃, and the alkaline polishing time is controlled at 220s. After alkaline polishing, the surface is rinsed with deionized water for 2.5 minutes at a rinsing speed of 10L / min to remove residual alkaline solution.

[0202] Pickling was performed using a mixture of hydrofluoric acid (HF), acetic acid (CH3COOH), and deionized water in a volume ratio of 1:3:12, with 0.75% (w / w) of an imidazole corrosion inhibitor added to prevent corrosion of the metal film and doped layers. The pickling solution temperature was controlled at 27.5℃, pH 2, and the pickling time at 15 min. The stirring speed was 65 r / min, and ultrasonic-assisted cleaning was used at a power of 65 W and a frequency of 40 kHz to improve the removal of the mask layer. Nitrogen gas (N2) was continuously introduced during the pickling process at a flow rate of 25 sccm to prevent the pickling solution from evaporating and oxidizing.

[0203] After pickling, rinse with deionized water for 4 minutes at a speed of 12.5 L / min and a water temperature of 27.5℃ to remove residual pickling solution. Then dry at a temperature of 110℃ for 4 minutes with a drying air speed of 2.5 m / s to ensure that there is no moisture or residual pickling solution on the back side.

[0204] AlO was deposited sequentially on the front and back sides of the battery. X Layers and SiN X The first dielectric layer is formed to improve the passivation performance of the battery.

[0205] Using screen printing technology, the back main grid, the front main grid, and the front second electrode are sequentially printed on the surface of the battery after the first dielectric layer is formed. The battery is then sintered at a peak temperature of 750°C. Conventional silver paste is used for the front and back main grids and the front second electrode.

[0206] Picosecond lasers are used to perform secondary laser delamination on the first dielectric layer on the back side, precisely penetrating the SiN in the first dielectric layer. X and AlO XPassivation film. Laser wavelength 355nm, pulse width 20ps, repetition rate 200kHz, laser power 4.5W, film opening speed 900mm / s, film opening times 1, laser energy density 0.1J / cm². 2 The spot diameter is 5.5 μm, the spot overlap rate is 70%, and the scanning mode is bidirectional scanning. A continuous linear opening is selected, with a line width of 11.5 μm. The first size W1 of the resulting opening is smaller than the first width W2 of the metal film.

[0207] The first electrode is printed on the battery after secondary laser delamination on the back using screen printing technology. The first electrode on the back is a single electrode made of inexpensive Cu metal. The linewidth of the first electrode on the back is controlled at 11.5 μm, and the height is controlled at 9 μm. The first electrode is located within the opening with a first width W. 31 and the second width W located outside the opening 32 Equal to the first electrode linewidth and the first size W1 of the opening, such as Figure 2 As shown. After printing, a drying process is performed at 165℃ for 17.5 minutes. After drying, the electrode adhesion is ≥4N / cm. 2 It is free from defects such as broken lines and burrs.

[0208] Example 2:

[0209] like Figure 6 As shown, the only difference between this embodiment and Embodiment 1 is that in this embodiment, the first electrode 52 is located within the opening at a width W. 31 The first dimension W1 of the opening is equal to the second width W of the first electrode 52 located outside the opening. 32 It is greater than the first dimension W1 of the opening and equal to the first width W2 of the metal film layer.

[0210] Example 3:

[0211] like Figure 7 As shown, the only difference between this embodiment and Embodiment 2 is that in this embodiment, the first electrode 52 is located within the opening at a width W. 31 The first dimension W1 is smaller than the opening; the second width W of the first electrode 52 located outside the opening. 32 It is greater than the first dimension W1 of the opening and equal to the first width W2 of the metal film layer.

[0212] Example 4:

[0213] like Figure 8 As shown, the only difference between this embodiment and Embodiment 1 is that in this embodiment, the film-opening pattern adopts an array of dot patterns. Figure 3(a) Each metal region includes two sets of openings, and each set of openings includes multiple openings. The opening diameter is 8 μm, and the spacing between adjacent openings is 10 μm. In this embodiment, the first electrode 52 is located within the opening at a first width W. 31 The first dimension W1 of the opening is equal to the second width W of the first electrode 52 located outside the opening. 32 It is larger than the first size W1 of the opening and smaller than the first width W2 of the metal film layer.

[0214] Example 5:

[0215] like Figure 9 As shown, the only difference between this embodiment and embodiment 4 is that in this embodiment, the first electrode 52 is located within the opening at a width W. 31 The first dimension W1 of the opening is equal to the second width W of the first electrode 52 located outside the opening. 32 It is greater than the first dimension W1 of the opening and equal to the first width W2 of the metal film layer.

[0216] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0217] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A solar cell, characterized in that, include: A silicon substrate having a first surface and a second surface disposed opposite to each other, the second surface including metal regions and non-metal regions alternately arranged along a first direction; A tunneling layer, at least covering the metal region; A first doped layer is disposed on the surface of the tunneling layer in the metal region; A metal film layer is disposed on the surface of the first doped layer; A first dielectric layer is disposed on the side of the silicon substrate opposite to the first surface, and an opening is formed on the first dielectric layer that penetrates the first dielectric layer along the thickness direction, the opening being located in the metal region; The first electrode, at least a portion of which is in contact with the metal film layer within the opening.

2. The solar cell according to claim 1, characterized in that, The tunneling layer also covers the non-metallic area; The solar cell further includes a second doped layer disposed in the non-metallic region and located on the surface of the tunneling layer away from the substrate. The second doped layer has the same doping type as the first doped layer, and the thickness of the second doped layer is less than that of the first doped layer.

3. The solar cell according to claim 1, characterized in that, In a first direction, the opening has a first size W1, the metal film layer has a first width W2, and the first size W1 of the opening is smaller than the first width W2 of the metal film layer.

4. The solar cell according to claim 3, characterized in that, In a first direction, the first electrode has a first width W located within the opening. 31 and the second width W located outside the opening 32 The first width W of the first electrode 31 The first dimension W1 of the opening is less than or equal to the second width W of the first electrode. 32 The first size W1 of the opening is greater than or equal to the first size W2 of the metal film layer.

5. The solar cell according to claim 1, characterized in that, The openings are spaced apart along a second direction and / or extend continuously along a second direction, which is perpendicular to the first direction.

6. The solar cell according to claim 5, characterized in that, The opening includes at least one of a circular opening, a square opening, a rectangular opening, and a long strip opening; The diameter of the circular opening is 5μm-10μm, the side length of the square opening is 5μm-10μm, and the spacing between adjacent openings is 10μm-20μm. The rectangular opening has a width of 8μm-15μm, a length of 15μm-25μm, and a spacing of 5μm-10μm between adjacent openings; The width of the elongated opening is 8μm-15μm, and its length is less than or equal to the length of the first electrode.

7. The solar cell according to claim 1, characterized in that, The first electrode has a linewidth of 20μm-150μm and a thickness of 5μm-50μm; and / or, The material of the first electrode is selected from non-precious metal materials, including one or more of copper, aluminum, nickel, cobalt, iron, zinc, and tin.

8. The solar cell according to claim 1, characterized in that, The metal film is a composite metal film, which includes a seed layer and a conductive layer. The seed layer and the conductive layer are made of different materials, and / or the thickness of the seed layer is less than the thickness of the conductive layer.

9. The solar cell according to claim 8, characterized in that, The seed layer is made of non-precious metal materials, including one of titanium, nickel, and zinc; and / or, the thickness of the seed layer is 8nm-20nm; and / or, the conductive layer is made of non-precious metal materials, including one of aluminum, copper, and magnesium; and / or, the thickness of the conductive layer is 50nm-90nm.

10. The solar cell according to claim 1, characterized in that, The metal film is a single-layer metal film. The material of the metal film is selected from non-precious metal materials, including at least one of nickel, aluminum, titanium, zinc, copper, and magnesium, and / or the thickness of the metal film is 50nm-100nm.

11. A method for preparing a solar cell, characterized in that, include: A silicon substrate is provided, the silicon substrate having a first surface and a second surface disposed opposite to each other, the second surface including metal regions and non-metal regions alternately arranged along a first direction; A stacked tunneling layer, a doped layer, and a metal film are prepared in the metal region of the second surface; A first dielectric layer is prepared on the side of the silicon substrate opposite to the first surface; The first dielectric layer is patterned to form an opening in the metal region that penetrates the first dielectric layer along the thickness direction. A first electrode is prepared, wherein at least a portion of the first electrode is in contact with the metal film layer within the opening.

12. The method for preparing a solar cell according to claim 11, characterized in that, The process of fabricating a tunneling layer, a doped layer, and a metal film layer in the metal region of the silicon substrate includes: A tunneling layer, a doped layer, and a metal film layer are sequentially stacked on the second surface of the silicon substrate; The metal film and doped layer are patterned to remove the metal film and at least part of the doped layer in the non-metallic regions.

13. The method for preparing a solar cell according to claim 12, characterized in that, After a metal film layer is formed on the second surface of the silicon substrate, an annealing process is performed. The annealing atmosphere is a nitrogen protective atmosphere with a nitrogen purity of ≥99.99%. The annealing temperature is 300℃-500℃, the heating rate is 5℃ / min-10℃ / min, the holding time is 30min-60min, and the cooling rate is 3℃ / min-5℃ / min.

14. The method for preparing a solar cell according to claim 12, characterized in that, Patterning the metal film and doped layer includes: The first step of the etching process removes the metal film layer and a portion of the doped layer in the non-metallic areas; A mask layer is prepared, which covers the surface of the metal film and the doped layer in the metal region; The second step is the etching process, which removes the remaining doped layer in the non-metallic region or repairs the etching damage on the surface of the remaining doped layer in the non-metallic region. The third step is an etching process to remove the mask layer.

15. The method for preparing a solar cell according to claim 14, characterized in that, The first etching step is a laser process; the laser source is a short-pulse laser with a power of 5W-10W, a frequency of 100kHz-200kHz, a pulse width of 10ps-50ps, a unidirectional scanning method, a scanning speed range of 500mm / s-800mm / s, and a laser energy density of 0.1J / cm². 2 -0.3J / cm 2 The laser spot diameter is 5μm-10μm, and the spot overlap rate is 10%-90%.

16. The method for preparing a solar cell according to claim 14, characterized in that, Fabrication of the mask layer includes: A mask material is printed on the surface of the metal film layer and the doped layer using a screen printing process, wherein the printing width of the mask material is not less than the width of the metal film layer; The mask material is dried in stages to form a mask layer; The first drying step has a temperature of 50℃-200℃ and a drying time of 3-5 minutes. The second drying step has a temperature of 100℃-300℃ and a drying time of 5-8 minutes.

17. The method for preparing a solar cell according to claim 14, characterized in that, The second etching process is an alkaline etching process, in which... The etching solution is a composite etching solution comprising sodium hydroxide and a surfactant, wherein the mass fraction of sodium hydroxide is 5%-8% and the mass fraction of the surfactant is 0.3%-0.5%; and / or, The etching temperature is 50℃-80℃, and the etching time is 120s-360s.

18. The method for preparing a solar cell according to claim 14, characterized in that, The third etching process is an acid etching process, in which... The etching solution is a composite etching solution comprising hydrofluoric acid, acetic acid, deionized water, and a corrosion inhibitor; and / or, The etching temperature is 25℃-30℃, the pH value is 1-3, and the etching time is 10min-20min.

19. The method for preparing a solar cell according to claim 11, characterized in that, The first dielectric layer is patterned using laser technology; wherein, The laser source is a short-pulse laser with a power of 3W-6W, a frequency of 150kHz-250kHz, a pulse width of 10ps-30ps, a bidirectional scanning mode, a scanning speed range of 800mm / s-1000mm / s, and a laser energy density of 0.05J / cm². 2 -0.15J / cm 2 The laser spot diameter is 3μm-8μm, and the spot overlap rate is 60%-80%.

20. The method for preparing a solar cell according to claim 11, characterized in that, The preparation of the first electrode includes: Print the first electrode; The first electrode is dried. The drying temperature is 150℃-180℃, the drying time is 15min-20min, and the adhesion of the first electrode after drying is greater than or equal to 4N / cm. 2 .

21. A photovoltaic module, characterized in that, Includes the solar cell as described in any one of claims 1-10, or the solar cell prepared by the method for preparing the solar cell as described in any one of claims 11-20.

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