Light emitting element

Abstract

A light emitting element includes a substrate including a top surface and a side edge; a semiconductor stack on the top surface of the substrate, including a first semiconductor layer, an active layer, and a second semiconductor layer; a scribe street surrounding the semiconductor stack and exposing the top surface of the substrate; a passivation layer covering the semiconductor stack and the scribe street; a reflective layer including a distributed Bragg reflector structure and covering the passivation layer; and an encapsulation layer covering the reflective layer, wherein the reflective layer includes a non-uniform portion adjacent to the side edge of the substrate, and the non-uniform portion includes a non-uniform thickness.

Description

[0001] This application is a divisional application of Chinese invention patent application (application number: 202110458091.3, application date: April 27, 2021, invention title: light-emitting element). Technical Field

[0002] This invention relates to a light-emitting element, and more particularly to an inverted light-emitting element comprising a mirror structure. Background Technology

[0003] Light-emitting diodes (LEDs) are solid-state semiconductor light-emitting devices. Their advantages include low power consumption, low heat generation, long lifespan, shock resistance, small size, fast response speed, and excellent photoelectric properties, such as a stable emission wavelength. Therefore, LEDs are widely used in household appliances, equipment indicator lights, and optoelectronic products. Summary of the Invention

[0004] One object of the present invention is to provide a light-emitting element to improve the light extraction efficiency of the light-emitting element.

[0005] One object of the present invention is to provide a light-emitting element to improve the reliability of the structure of the light-emitting element.

[0006] One objective of this invention is to provide a light-emitting element that reduces the probability of element failure due to insulation layer damage and improves the reliability of electrical insulation.

[0007] To achieve at least one of the above objectives, an embodiment of the present invention discloses a light-emitting element comprising a substrate having an upper surface and a side edge; a semiconductor stack located on the upper surface of the substrate, comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a dicing channel surrounding the semiconductor stack and exposing the upper surface of the substrate; a protective layer covering the semiconductor stack and the dicing channel; a reflective layer comprising a distributed Bragg mirror structure and covering the protective layer; and a cladding layer covering the reflective layer, wherein the reflective layer includes a non-uniform portion adjacent to the side edge of the substrate, and the non-uniform portion includes a non-uniform thickness. Attached Figure Description

[0008] Figure 1 This is a top view of a light-emitting element 1 disclosed in an embodiment of the present invention;

[0009] Figure 2 For along Figure 1 A cross-sectional view of the light-emitting element 1 along the tangent A-A';

[0010] Figure 3 for Figure 1 A partial cross-sectional view of the position C of the light-emitting element 1;

[0011] Figure 4 for Figure 1 SEM image of position C of light-emitting element 1;

[0012] Figures 5A-5F This is a schematic diagram of a method for manufacturing a light-emitting element 1 according to an embodiment of the present invention;

[0013] Figure 6 for Figure 1 SEM image of location D;

[0014] Figure 7 This is a top view of a light-emitting element 1g disclosed in an embodiment of the present invention;

[0015] Figure 8 For along Figure 7 A cross-sectional view of the light-emitting element 1g along the tangent Y-Y';

[0016] Figure 9A The self-disclosed in one embodiment of the present invention Figure 7 A side view of the light-emitting element 1g viewed from the X-axis;

[0017] Figure 9B The self-disclosed in one embodiment of the present invention Figure 7 A side view of the light-emitting element 1g viewed from the Y-axis;

[0018] Figure 9C The self-disclosed in another embodiment of the present invention Figure 7 A side view of the light-emitting element 1g viewed from the X-axis;

[0019] Figure 9D The self-disclosed in another embodiment of the present invention Figure 7 A side view of the light-emitting element 1g viewed from the Y-axis;

[0020] Figure 10 for Figure 8 A partial cross-sectional view of position I of the light-emitting element 1g;

[0021] Figure 11 for Figure 8 SEM image of position I of the 1g light-emitting element;

[0022] Figure 12 for Figure 8 A partial cross-sectional view of the position II of the light-emitting element 1g;

[0023] Figure 13 for Figure 8 SEM image of position II of the light-emitting element 1g;

[0024] Figure 14 This is a schematic diagram of a light-emitting device 2 according to an embodiment of the present invention;

[0025] Figure 15 This is a schematic diagram of a light-emitting device 3 according to an embodiment of the present invention.

[0026] Symbol Explanation

[0027] 1, 1g light-emitting element

[0028] 10 substrate

[0029] 10d cutting track

[0030] 10S side

[0031] 100 Top surface

[0032] 101 Inclined Surface

[0033] 103 First roughening section

[0034] 104 Second roughening section

[0035] 105 Lower surface

[0036] 1000 pores

[0037] 1000s blocking surface

[0038] 1000v recess

[0039] 1001 Cutting Area

[0040] 11 convex part

[0041] 20 Semiconductor stack

[0042] 20S Side

[0043] 20ts surface

[0044] 211 First Semiconductor Layer

[0045] 211a countertop

[0046] 211b First Electrical Contact Area

[0047] 212 Active layer

[0048] 213 Second Semiconductor Layer

[0049] 30 conductive layers

[0050] 41 First contact electrode

[0051] 41b Bottom

[0052] 41t Top

[0053] 410 First recess

[0054] 410S sidewall

[0055] 411 First bonding layer

[0056] 412 First conductive layer

[0057] 42 Second contact electrode

[0058] 42b bottom

[0059] 42t top

[0060] 420 Second Contact Section

[0061] 420S sidewall

[0062] 421 Second connecting part

[0063] 422 Second Extension

[0064] 423 Second bonding layer

[0065] 424 Second conductive layer

[0066] 425 Second recess

[0067] 50 protective layers

[0068] 500 Insulating Reflective Structure

[0069] 501 First Insulating Reflective Structure Opening

[0070] 501d pitch

[0071] 501S sidewall

[0072] 502 Second Insulation Reflection Structure Opening

[0073] 502d spacing

[0074] 502S sidewall

[0075] 51 Reflective layer

[0076] 510 First gasket

[0077] 511 Non-uniform portion

[0078] 512 Second gasket

[0079] 513 package substrate

[0080] 515 Fracture Surface

[0081] 53 Insulation section

[0082] 54. Dense layer

[0083] 58 Reflective Structure

[0084] 61 First electrode pad

[0085] 62 Second electrode pad

[0086] 602 lampshade

[0087] 604 reflector

[0088] 606 Bearing Unit

[0089] 608 luminescent body

[0090] 610 Light-emitting module

[0091] 612 lamp holder

[0092] 614 heatsink

[0093] 616 Connecting part

[0094] 618 Electrical connection element

[0095] d1, d2, d3, d4 are the exposed substrate widths.

[0096] E length

[0097] E1 First Side

[0098] E2 Second Side

[0099] E3 Third Side

[0100] E4 Fourth Side

[0101] H1, H2 steps

[0102] Distance between L1 and L2

[0103] P Connection part

[0104] P1, P3 side views

[0105] S distance

[0106] S1, S2, S3, S4 side

[0107] Widths of W1 and W2 Detailed Implementation

[0108] To make the description of the present invention more detailed and complete, please refer to the following description of the embodiments and related illustrations. However, the embodiments shown below are for illustrating the light-emitting element of the present invention and are not intended to limit the present invention to the following embodiments. Furthermore, the dimensions, materials, shapes, relative arrangements, etc., of the constituent parts described in the embodiments in this specification are not limited thereto, and the scope of the present invention is not limited thereto, but is merely illustrative. Also, the size or positional relationships of the components shown in the illustrations may be exaggerated for clarity. Furthermore, in the following description, for the sake of appropriate omission of detailed descriptions, components of the same or similar nature are shown with the same name and symbol.

[0109] Figure 1 This is a top view of a chip containing a plurality of light-emitting elements 1, as disclosed in an embodiment of the present invention. Figure 2 It is along Figure 1 A cross-sectional view of the light-emitting element 1 along the tangent A-A'.

[0110] like Figure 2 As shown, a light-emitting element 1 includes a substrate 10, which includes an upper surface 100 and a side edge 10S; a semiconductor stack 20 is located on the upper surface 100 of the substrate 10, including a first semiconductor layer 211, an active layer 212 and a second semiconductor layer 213; a dicing channel 10d surrounds the semiconductor stack 20 and exposes the upper surface 100 of the substrate 10; a protective layer 50 covers the semiconductor stack 20 and the dicing channel 10d; a reflective layer 51, which includes a distributed Bragg reflector structure, is located on the protective layer 50; and a covering layer 52 covers the reflective layer 51, wherein the reflective layer 51 includes a non-uniform portion 511 adjacent to the side edge 10S of the substrate 10, and the non-uniform portion 511 includes a non-uniform thickness.

[0111] The substrate 10 can be a growth substrate for epitaxially growing a semiconductor stack 20. The substrate 10 includes gallium arsenide (GaAs) wafers for epitaxially growing aluminum gallium indium phosphide (AlGaInP), or sapphire (Al2O3) wafers, gallium nitride (GaN) wafers, silicon carbide (SiC) wafers, or aluminum gallium nitride (AlGaN) wafers for growing gallium nitride (GaN), indium gallium nitride (InGaN), or aluminum gallium nitride (AlGaN).

[0112] The surface of the substrate 10 that is in contact with the semiconductor stack 20 can be a roughened surface. The roughened surface can be an irregularly shaped surface or a surface with a regular shape. For example, relative to the upper surface 100, the substrate 10 includes one or more protrusions 11 protruding from the upper surface 100, or one or more recesses (not shown) recessed into the upper surface 100. In a cross-sectional view, the protrusions 11 or recesses (not shown) can be hemispherical or pyramidal. To increase the light extraction efficiency of the light-emitting element, the protrusions 11 of the substrate 10 include a first layer and a second layer (not shown). The first layer contains the same material as that constituting the substrate 10, such as gallium arsenide (GaAs), sapphire (Al2O3), gallium nitride (GaN), silicon carbide (SiC), or aluminum nitride (AlN). The second layer contains a material different from that constituting the first layer and the substrate 10. The material of the second layer includes an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. In one embodiment, the refractive index of the selected material for the second layer is between that of the substrate 10 and the semiconductor stack 20. In one embodiment, the dicing 10d does not include a protrusion 11 or a recess. In one embodiment, when forming the dicing 10d, the protrusion 11 or recess on the surface of the substrate 10 can be removed by etching, so that the protective layer 50, the reflective layer 51, and the cladding layer 52 subsequently formed on the dicing 10d can better cover the reflective layer 51. The etching method includes removing the protrusion 11 by dry etching or wet etching when the material of the protrusion 11 is the same as that of the substrate 10, which is an epitaxial growth substrate. When the material of the protrusion 11 is an insulating material, the protrusion 11 can be removed by dry etching or wet etching. Dry etching includes, for example, plasma etching, excited-state ion etching, inductively coupled plasma etching, or enhanced capacitively coupled plasma etching.

[0113] In one embodiment of the present invention, a semiconductor stack 20 with photoelectric properties, such as a light-emitting stack, is formed on a substrate 10 by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD), or ion plating. The physical vapor deposition method includes sputtering or evaporation.

[0114] The semiconductor stack 20 includes a first semiconductor layer 211, a second semiconductor layer 213, and an active layer 212 formed between the first semiconductor layer 211 and the second semiconductor layer 213. The wavelength of light emitted by the light-emitting element 1 can be adjusted by changing the physical and chemical composition of one or more layers in the semiconductor stack 20. The material of the semiconductor stack 20 includes group III semiconductor materials, such as Al. x In y Ga (1-x-y) N or Al xIn y Ga (1-x-y) P, where 0≤x, y≤1; (x+y)≤1. When the material of semiconductor stack 20 is an AlInGaP series material, it can emit red light with wavelengths between 610 nm and 650 nm, or green light with wavelengths between 530 nm and 570 nm. When the material of semiconductor stack 20 is an InGaN series material, it can emit blue light with wavelengths between 400 nm and 490 nm, or green light with wavelengths between 530 nm and 570 nm. When the material of semiconductor stack 20 is an AlGaN series or AlInGaN series material, it can emit ultraviolet light with wavelengths between 250 nm and 400 nm.

[0115] The first semiconductor layer 211 and the second semiconductor layer 213 can be cladding layers, having different conductivity types, electrical properties, and polarities, or depending on the doped elements that provide electrons or holes. For example, the first semiconductor layer 211 can be an n-type semiconductor, and the second semiconductor layer 213 can be a p-type semiconductor. An active layer 212 is formed between the first semiconductor layer 211 and the second semiconductor layer 213. Electrons and holes recombine in the active layer 212 under the drive of a current, converting electrical energy into light energy to emit light. The active layer 212 can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DHH), or a multi-quantum well (MQW). The material of the active layer 212 can be a neutral, p-type, or n-type semiconductor. The first semiconductor layer 211, the second semiconductor layer 213, or the active layer 212 can be a single layer or a structure containing multiple sublayers.

[0116] In one embodiment of the present invention, the semiconductor stack 20 may further include a buffer layer (not shown) located between the first semiconductor layer 211 and the substrate 10 to release stress caused by material lattice mismatch between the substrate 10 and the semiconductor stack 20, thereby reducing misalignment and lattice defects and improving epitaxial quality. The buffer layer may be a single layer or a structure containing multiple sublayers. In one embodiment, PVD aluminum nitride (AlN) may be used as the buffer layer, formed between the semiconductor stack 20 and the substrate 10, to improve the epitaxial quality of the semiconductor stack 20. In one embodiment, the target material used to form PVD aluminum nitride (AlN) is composed of aluminum nitride. In another embodiment, a target material composed of aluminum may be used, which reacts with the aluminum target material in a nitrogen source environment to form aluminum nitride.

[0117] In one embodiment of the present invention, the light-emitting element 1 includes a first contact electrode 41 and a second contact electrode 42 formed on the same side of the semiconductor stack 20. The light-emitting element 1 can be a flip chip structure or a lateral chip structure.

[0118] In this embodiment, a platform 211a and one or more first electrical contact regions 211b are formed by removing portions of the second semiconductor layer 213 and the active layer 212 to expose the first semiconductor layer 211. The sides of the second semiconductor layer 213 and the active layer 212 exposed by etching are inclined relative to the exposed first semiconductor layer 211. A first contact electrode 41 is formed on the first electrical contact region 211b to contact the first semiconductor layer 211 and form an electrical connection with the first semiconductor layer 211. A second contact electrode 42 is formed on the second semiconductor layer 213 and forms an electrical connection with the second semiconductor layer 213.

[0119] In one embodiment of the present invention, in order to reduce contact resistance and improve current diffusion efficiency, the light-emitting element 1 includes a conductive layer 30 located between the second semiconductor layer 213 and the second contact electrode 42. The material of the conductive layer 30 includes a material that is transparent to the light emitted from the active layer 212, such as a metallic material or a transparent conductive oxide having a thickness of less than 500 angstroms (Å). The transparent conductive oxide includes indium tin oxide (ITO) or indium zinc oxide (IZO).

[0120] In one embodiment of the present invention, the light-emitting element 1 includes one or more current-confining layers (not shown) located between the second semiconductor layer 213 and the conductive layer 30, and below the second contact electrode 42. The current-confining layers are formed of non-conductive materials, including aluminum oxide (Al2O3) and silicon nitride (SiN). x ), silicon dioxide (SiO) x Titanium oxide (TiO) x ), or magnesium fluoride (MgF) x In one variation, the current confinement layer may include a distributed Bragg reflector (DBR), wherein the DBR is composed of stacked insulating materials with different refractive indices. To increase the light extraction efficiency of the light-emitting element, the current confinement layer has a light reflectivity of more than 80% for the light emitted from the active layer 212.

[0121] An insulating reflective structure 500 covers the semiconductor stack 20, the first contact electrode 41, and the second contact electrode 42 to reflect light from the active layer 212 to one side of the substrate 10, such as the lower surface 105 of the substrate 10. In this embodiment, to reduce the absorption of light by the metal reflective film, the insulating reflective structure 500 includes an insulating material. The insulating reflective structure 500 can be formed as a single layer or multiple layers, but is preferably a multilayer structure. Specifically, the insulating reflective structure 500 is formed by sequentially stacking a protective layer 50, a reflective layer 51, and / or a covering layer 52, wherein the reflective layer 51 includes a distributed Bragg reflector (DBR) structure.

[0122] In a variation of the invention, one or more of the protective layer 50, reflective layer 51, and covering layer 52 may be omitted. In other words, the structure of the insulating reflective structure 500 may include any one or any two of the protective layer 50, reflective layer 51, and covering layer 52.

[0123] In a variation of the invention, one or more of the protective layer 50 and the covering layer 52 may comprise a multilayer film. Preferably, the covering layer 52 comprises a silicon oxide film in contact with the reflective layer 51, and a silicon nitride film situated on top of the silicon oxide film.

[0124] The insulating reflective structure 500 includes a first insulating reflective structure opening 501 to expose the first contact electrode 41, and a second insulating reflective structure opening 502 to expose the second contact electrode 42. A first electrode pad 61 covers the first insulating reflective structure opening 501 to contact the first contact electrode 41 and forms an electrical connection with the first semiconductor layer 211. A second electrode pad 62 covers the second insulating reflective structure opening 502 to contact the second contact electrode 42 and forms an electrical connection with the second semiconductor layer 213.

[0125] In a variation of the invention, one or more of the first contact electrode 41 and the second contact electrode 42 may be omitted. The first insulating reflective structure opening 501 exposes the first semiconductor layer 211 and / or the second insulating reflective structure opening 502 exposes the conductive layer 30. The first electrode pad 61 covers the first insulating reflective structure opening 501 to contact the first semiconductor layer 211, and / or the second electrode pad 62 covers the second insulating reflective structure opening 502 to contact the conductive layer 30.

[0126] The first contact electrode 41, the second contact electrode 42, the first electrode pad 61, and the second electrode pad 62 comprise metallic materials, such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag), or alloys thereof. The first electrode pad 61 and the second electrode pad 62 may consist of a single layer or multiple layers. For example, the first electrode pad 61 or the second electrode pad 62 may comprise an Al / Pt layer, a Ti / Au layer, a Ti / Pt / Au layer, a Cr / Au layer, a Cr / Pt / Au layer, a Ni / Au layer, a Ni / Pt / Au layer, a Cr / Al / Ti / Pt layer, a Ti / Al / Ti / Pt / Ni / Pt layer, a Cr / Al / Ti / Al / Ni / Pt / Au layer, a Cr / Al / Cr / Ni / Au layer, or an Ag / NiTi / TiW / Pt layer. The first electrode pad 61 and the second electrode pad 62 can serve as current paths for supplying power from an external power source to the first semiconductor layer 211 and the second semiconductor layer 213. In embodiments where the first electrode pad 61 and the second electrode pad 62 comprise multiple layers, the metal structure of the first electrode pad 61 and the second electrode pad 62 in contact with the external power source can be composed of multiple layers of gold (Au) and tin (Sn) or tin (Sn) and silver (Ag), or gold (Au) can be used as the outermost metal layer of the first electrode pad 61 and the second electrode pad 62, wherein the thickness or composition ratio of gold (Au) or silver (Ag) is 0.25% to 2.25% of that of tin (Sn). The first contact electrode 41, the second contact electrode 42, the first electrode pad 61 and / or the second electrode pad 62 comprise a thickness between 1 and 100 μm, preferably between 1.2 and 60 μm, and more preferably between 1.5 and 6 μm. In one embodiment, the first electrode pad 61 and / or the second electrode pad 62 comprises a tin (Sn) metal layer with a thickness between 3.5 and 8.5 μm. In another embodiment, the first electrode pad 61 and / or the second electrode pad 62 comprises a tin-silver (SnAg) metal layer with a thickness between 8 and 10 μm.

[0127] As described above, since the insulating reflective structure 500 covers the uneven structure such as the semiconductor stack 20, the first contact electrode 41, and the second contact electrode 42, the height difference between the semiconductor stack 20, the first contact electrode 41, and the second contact electrode 42 will affect the coating quality of the insulating reflective structure 500. For example, when the insulating reflective structure 500 covers the semiconductor stack 20, a fracture surface (not shown) is easily formed in the insulating reflective structure 500 at the junction of the side surface of the semiconductor stack 20 and the upper surface 100 of the substrate 10. External moisture can easily penetrate the semiconductor stack 20 along the fracture surface, reducing the reliability of the device.

[0128] To improve the aforementioned fracture surface problem, in this embodiment, the coating characteristics of chemical vapor deposition (CVD) with better coating properties are utilized. Preferably, the protective layer 50 and the coating layer 52 are formed by chemical vapor deposition (CVD), and more preferably by plasma-enhanced chemical vapor deposition (PECVD).

[0129] In a variation of the invention, one or more of the protective layer 50 and the covering layer 52 may be formed by atomic vapor deposition.

[0130] The protective layer 50 is made of silicon oxide and preferably has a thickness of 0.2 μm to 2 μm. If the thickness of the protective layer 50 is less than 0.2 μm, it cannot completely cover the first contact electrode 41 and the second contact electrode 42. If the thickness of the protective layer 50 is greater than 2 μm, it will increase the manufacturing time and cost when forming the first insulating reflective structure opening 501 and the second insulating reflective structure opening 502.

[0131] The coating layer 52 is made of metal oxides, such as Al2O3, or nitrides, oxides, or oxynitrides, such as SiN or SiO. x or SiO x N y In a variation of the invention, the coating layer 52 can be formed into a single-layer structure by means of the above-described materials or into a multi-layer structure by means of a combination of the above-described materials. The coating layer 52 preferably has a thickness of 0.5 μm to 2.5 μm.

[0132] A reflective layer 51 is formed between the protective layer 50 and the cladding layer 52. The reflective layer 51 comprises two or more materials with different refractive indices stacked alternately to form a distributed Bragg reflector (DBR) structure that selectively reflects light of specific wavelengths. For example, a highly reflective insulating reflective structure can be formed by stacking layers such as SiO2 / TiO2 or SiO2 / Nb2O5. When SiO2 / TiO2 or SiO2 / Nb2O5 forms a distributed Bragg reflector (DBR) structure, each layer of the DBR structure is designed to have an optical thickness that is one or an integer multiple of one-quarter of the wavelength of light emitted by the active layer 212. The thickness of each layer of the DBR structure can have a deviation of ±30% based on one or an integer multiple of λ / 4. Since the thickness of each layer of the DBR structure affects the reflectivity, electron beam evaporation is preferably used to form the reflective layer 51 to stably control the thickness of each layer of the DBR structure.

[0133] Figure 1 This is a schematic diagram of a wafer with multiple light-emitting elements 1. When the wafer with multiple light-emitting elements 1 is separated into individual light-emitting elements 1 by cutting the cutting area 1001 with a laser and / or a cutting tool, the physical impact of the laser and / or cutting tool can easily cause cracks in the insulating reflective structure 500 at the edge of the light-emitting element 1, especially the reflective layer 51. Furthermore, once the cracks spread to the semiconductor stack 20, external moisture can easily penetrate into the semiconductor stack 20 along the cracks, reducing the reliability of the device.

[0134] To address the aforementioned issues, the light-emitting element 1 includes a dicing channel 10d, which is part of the dicing region 1001 during wafer dicing. The dicing channel 10d is the area remaining on the light-emitting element 1 after the wafer dicing fabrication process. The dicing channel 10d is located between a side edge 10S of the substrate 10 and a side edge 20S of the semiconductor stack 20, and has a width between 0.1 μm and 50 μm, preferably less than 30 μm, and more preferably less than 15 μm. The dicing channel 10d exposes the upper surface 100 of the substrate 10 and surrounds the semiconductor stack 20 around the light-emitting element 1. In this embodiment, the substrate 10 located at the dicing channel 10d also includes an inclined surface 101 connected to the upper surface 100 of the substrate 10. Compared to the inclined surface 101, the upper surface 100 is approximately horizontal. From a top view of the self-emissive element 1, the dicing 10d includes a first surface area, the semiconductor stack 20 includes a second surface area, and the ratio of the first surface area to the second surface area is between 10% and 50%. From a side view of the self-emissive element 1, as shown... Figure 2As shown, the insulating reflective structure 500 located on the cut track 10d directly contacts the upper surface 100 of the substrate 10.

[0135] In one variation, in order to reserve more area on the mesa 211a for placing the first electrode pad 61 and the second electrode pad 62, the side edge 20S of the semiconductor stack 20 and the upper surface 100 of the substrate 10 include an angle between 70 degrees and 110 degrees, preferably between 80 degrees and 100 degrees, and more preferably between 85 degrees and 95 degrees.

[0136] In one variation, to improve the film quality of the reflective layer 51 coated on the side 20S of the semiconductor stack 20 and avoid cracking defects in the reflective layer 51, the side 20S of the semiconductor stack 20 and the upper surface 100 of the substrate 10 include an angle between 10 degrees and 50 degrees, preferably between 20 degrees and 40 degrees, and more preferably between 25 degrees and 35 degrees. In another variation, the side 20S may be composed of inclined surfaces with different slopes. The inclined surface closer to the upper surface 100 of the substrate 10 is steeper than the inclined surface farther from the upper surface 100 of the substrate 10. For example, the inclined surface directly contacting the upper surface 100 of the substrate 10 includes an angle between 50 degrees and 70 degrees with the upper surface 100 of the substrate 10. The inclined surface farther from the upper surface 100 of the substrate 10 includes an angle between 30 degrees and 50 degrees with a horizontal plane parallel to the upper surface 100.

[0137] In this embodiment, as Figure 2 As shown, the protective layer 50 covers the inclined surface 101 of the substrate 10. The reflective layer 51 includes a non-uniform portion 511. The non-uniform portion 511 covers all or part of the inclined surface 101 of the substrate 10. The non-uniform portion 511 includes multiple film layers, and one of the multiple film layers has a wedge shape at its end. The end of one of the multiple film layers has a thickness that gradually decreases in a direction toward the substrate 10. One end of the protective layer 50 and / or the covering layer 52 has a wedge shape, and the thickness of one end of the protective layer 50 and / or the covering layer 52 gradually decreases in a direction toward the substrate 10.

[0138] Figure 3 yes Figure 1 A partial cross-sectional view of the position C of the light-emitting element 1. Figure 4 yes Figure 1 The position C of the light-emitting element 1 and Figure 3 SEM images. (e.g.) Figure 2 , Figure 3 and Figure 4 As shown, the substrate includes a first roughened portion 103 located on a plurality of sides 10S of the substrate 10. The substrate may optionally include a second roughened portion 104 located on an inclined surface 101 of the substrate 10, away from the first roughened portion 103.

[0139] In one embodiment of the invention, such as Figure 2 and Figure 3 As shown, before forming the insulating reflective structure 500, a uniform dense layer 54 is formed on the upper surface 100 of the substrate 10 and a surface 20ts of the semiconductor stack 20 by atomic vapor deposition to directly cover the upper surface 100 of the substrate 10 and the surface 20ts of the semiconductor stack 20. The material of the dense layer 54 includes silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, yttrium oxide, lanthanum oxide, tantalum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. In this embodiment, the interface between the dense layer 54 and the semiconductor stack 20 includes a metal element and oxygen, wherein the metal element includes aluminum, hafnium, zirconium, yttrium, lanthanum, or tantalum. The dense layer 54 has a thickness between 400 Å and 2000 Å, preferably between 800 Å and 1600 Å, and more preferably between 1000 Å and 1400 Å.

[0140] Films formed by atomic layer deposition exhibit excellent step coverage and thickness uniformity, as well as high density. Utilizing these characteristics, a pinhole-free dense layer 54 is conformally formed on the substrate 10 and the semiconductor stack 20. The dense layer 54 formed by atomic layer deposition prevents moisture from penetrating the semiconductor stack 20 through gaps between the substrate 10 and the semiconductor stack 20, or through pores on the surface of the semiconductor stack 20.

[0141] In a variation of the invention (not shown), the dense layer 54 and the protective layer 50 may be stacked in pairs multiple times before being connected to the reflective layer 51 through the protective layer 50.

[0142] Figures 5A-5F This is a method for manufacturing the light-emitting element 1 disclosed in an embodiment of the present invention. The following is for ease of explanation. Figures 5A-5F Therefore, along Figure 1 The structure and position D on the tangent line A-A' will be used to illustrate this; some views will be omitted as appropriate. For example... Figure 5A As shown, a substrate 10 is provided, which includes an upper surface 100, a lower surface 105, and a plurality of protrusions 11 protruding from the upper surface 100. A buffer layer (not shown) and a semiconductor stack 20 are formed on the substrate 10, wherein the semiconductor stack 20 includes a first semiconductor layer 211, a second semiconductor layer 213, and an active layer 212 formed between the first semiconductor layer 211 and the second semiconductor layer 213.

[0143] like Figure 5BAs shown, etching removes portions of the first semiconductor layer 211, the second semiconductor layer 213, and the active layer 212 around the semiconductor stack 20, forming a platform 211a and a first electrical contact area 211b to expose the first semiconductor layer 211, and forming a cutting area 1001 to expose the substrate 10. In this embodiment, viewed from a top view, as shown... Figure 1 As shown, the dicing region 1001 divides the semiconductor stack 20 into multiple light-emitting regions. Mesa 211a continuously surrounds the periphery of each of the multiple light-emitting regions of the semiconductor stack 20 and is approximately quadrilateral in shape. In order to separate the multiple light-emitting regions to form individual light-emitting elements, the dicing region 1001 needs a certain width to ensure that the light-emitting elements are not damaged, while retaining sufficient light-emitting area; preferably, it is between 1 μm and 150 μm, more preferably between 5 μm and 50 μm.

[0144] like Figure 5C As shown, a first contact electrode 41 is formed on the first electrical contact region 211b. A conductive layer 30 and / or a second contact electrode 42 are formed on the second semiconductor layer 213.

[0145] like Figure 5D As shown, a recess 1000v with an inclined surface 101 is formed on the substrate 10 in the cutting area 1001 by a laser scribing and / or etching process. In a side view, the recess 1000v includes a triangular, polygonal, or irregular shape. In one embodiment, the step of forming the recess 1000v with the inclined surface 101 on the substrate 10 in the cutting area 1001 by a laser scribing and / or etching process can be advanced to before the steps of forming the first contact electrode 41 and the second contact electrode 42.

[0146] In one embodiment of the invention, an insulating reflective structure 500 is formed before forming the recess 1000v. When the substrate 10 is a sapphire substrate, the insulating reflective structure 500 and the substrate 10 can be cut and melted in the cutting area 1001 using a laser in the UV wavelength range, for example, 266 nm, 343 nm, or 355 nm, to form the recess 1000v with an inclined surface 101. The substrate 10 after melting may produce residues, which may include aluminum (Al), oxygen (O), silicon (Si), titanium (Ti), and / or carbon (C). In one embodiment, the residues adhere to the inclined surface 101. In this embodiment, the inclined surface 101 after laser melting includes a roughened surface. In an example of forming the recess 1000v by laser cutting, a second roughened portion 104 is formed on the inclined surface 101 of the substrate 10. In one embodiment, the residues adhere to the inclined surface 101 having the second roughened portion 104.

[0147] In one embodiment of the invention, the etching process can be carried out by wet etching, wherein the etching solution comprises hydrochloric acid (HCl), nitric acid (HNO3), potassium hydroxide (KOH), sulfuric acid (H2SO4), phosphoric acid (H3PO4), or a combination of the above solutions. The etching process temperature is approximately 200-300°C. In another embodiment of the invention, the etching process can be carried out by dry etching, such as plasma etching, excited-state ion etching, inductively coupled plasma etching, or enhanced capacitively coupled plasma etching. In an example where the recess 1000V is formed by etching, the second roughened portion 104 is formed on the inclined surface 101 of the substrate 10.

[0148] Next, a protective layer 50 is formed on the semiconductor stack 20, the diced region 1001, and the recess 1000v. The material of the protective layer 50 includes aluminum oxide (Al2O3) and silicon nitride (SiN). x ), silicon dioxide (SiO) x ) or silicon oxynitride (SiO) x N y The protective layer 50 preferably has a thickness between 0.2 μm and 2 μm. If the thickness of the protective layer 50 is less than 0.2 μm, it is insufficient to completely cover the structure with height differences on the semiconductor stack 20 and the recess 1000v. If the thickness of the protective layer 50 is greater than 2 μm, it may increase the time of subsequent patterning etching processes. Chemical vapor deposition (CVD) is more effective than electron beam evaporation or physical vapor deposition in covering structures with height differences. To completely cover the structure with height differences on the semiconductor stack 20 and the recess 1000v, the protective layer 50 is preferably formed by chemical vapor deposition, and more preferably by plasma-assisted chemical vapor deposition (PECVD).

[0149] like Figure 5EAs shown, a reflective layer 51 is formed on the protective layer 50. In this embodiment, the reflective layer 51 comprises two or more materials with different refractive indices stacked alternately to form a distributed Bragg reflector (DBR) structure that selectively reflects light of a specific wavelength. For example, a highly reflective insulating reflective structure can be formed by stacking layers such as SiO2 / TiO2 or SiO2 / Nb2O5. When SiO2 / TiO2 or SiO2 / Nb2O5 forms a distributed Bragg reflector (DBR) structure, at least one layer of the distributed Bragg reflector (DBR) structure is designed to have an optical thickness of one-quarter or an integer multiple of the specific wavelength, greater than one-quarter or an integer multiple of the specific wavelength, or less than one-quarter or an integer multiple of the specific wavelength, and the number of SiO2 / TiO2 or SiO2 / Nb2O5 pairs is preferably between 4 and 30 pairs. If the logarithm of SiO2 / TiO2 or SiO2 / Nb2O5 is less than this range, the reflectivity of the distributed Bragg reflector (DBR) structure will be poor; if the logarithm of SiO2 / TiO2 or SiO2 / Nb2O5 is greater than this range, the thickness of the distributed Bragg reflector (DBR) structure will become too thick. To accurately control the thickness of each layer of the distributed Bragg reflector (DBR) structure, the reflective layer 51 is preferably formed by electron beam evaporation. In one embodiment of the invention, the reflective layer 51 preferably has a thickness between 1 μm and 6 μm, more preferably between 2 μm and 4 μm, for example, 3.5 μm.

[0150] like Figure 5E As shown, due to the poor coverage of structures with height differences by electron beam evaporation, when the reflective layer 51 is formed on the cut area 1001 by electron beam evaporation, the reflective layer 51 cannot completely cover the recess 1000v. Therefore, a hole 1000 is formed in the recess 1000v, and a blocking surface 1000s along the X-X' section is formed in the reflective layer 51 above the hole 1000.

[0151] To protect the distributed Bragg reflector (DBR) structure of the reflective layer 51 and increase its reflectivity, a cladding layer 52 is formed on the reflective layer 51. To achieve the effect of increasing reflectivity, the thickness of the cladding layer 52 is preferably greater than 0.5 μm, more preferably between 0.1 and 2.5 μm, more preferably between 0.2 and 2 μm, and even more preferably between 0.5 and 1.5 μm. To completely cover the surface of the reflective layer 51, the cladding layer 52 is preferably formed by chemical vapor deposition, and more preferably by plasma-assisted chemical vapor deposition (PECVD).

[0152] When separating a wafer with multiple light-emitting elements into individual light-emitting elements, laser and / or cutting tools can be used for cutting, or chemical etching can be used alone or in conjunction with laser and / or cutting tools. When using a laser to cut the wafer, stealth laser cutting can be used to cut the wafer from inside the substrate 10, thereby avoiding the problems of debris and semiconductor material loss. For example, in one direction incident on the lower surface 105 of the substrate 10, the laser is focused between the upper surface 100 and the lower surface 105 of the substrate 10, forming multiple damaged areas along multiple cutting regions 1001 within the substrate 10, but without damaging the upper surface 100 and the lower surface 105 of the substrate 10. Then, using a physical impact force, a cleaving surface is formed along the multiple damaged areas in an extending direction towards the upper and lower surfaces of the substrate. Through the extending cleaving surface and the blocking surface of the reflective layer 51, the wafer with multiple light-emitting elements 1 is separated into individual light-emitting elements 1. On the side 10S of the separated light-emitting elements, the multiple damaged areas form a first roughening portion 103. Compared to cutting directly with a knife, stealth laser cutting reduces the width of the cut path required.

[0153] like Figure 5E As shown, a first insulating reflective structure opening 501 is formed on the protective layer 50, the reflective layer 51, and the covering layer 52 through photolithography and etching processes to expose a first contact electrode 41, and a second insulating reflective structure opening 502 is formed to expose a second contact electrode 42. Subsequently, a first electrode pad 61 is formed on the first insulating reflective structure opening 501, and a second electrode pad 62 is formed on the second insulating reflective structure opening 502.

[0154] Figure 6 yes Figure 1 SEM images of the structure shown at position D in Figure 5E and position D in Figure 5E. Figure 6As shown, the substrate includes one or more protrusions 11 protruding from the upper surface 100 of the substrate 10. The insulating reflective structure 500 includes a protective layer 50, a reflective layer 51, and a covering layer 52. The protective layer 50, reflective layer 51, and / or covering layer 52 include a plurality of protrusions 11 whose surface profile corresponds to the substrate 10. Due to the height difference between the protrusions 11 and the upper surface 100 of the substrate 10, the protective layer 50, reflective layer 51, and / or covering layer 52 include a fracture surface 515 corresponding to a connection P between a protrusion 11 of the substrate 10 and the upper surface 100 of the substrate 10.

[0155] like Figure 5E As shown, along the damaged area of ​​the substrate 10, such as the first roughened portion 103, and the blocking surface 1000s of the reflective layer 51 along the line segment X-X', a physical impact force is used to separate the substrate 10 and the insulating reflective structure 500, forming... Figure 5F The multiple light-emitting elements 1 shown. (e.g.) Figure 5F As shown, the protective layer 50 covers the inclined surface 101 of the substrate 10. The reflective layer 51 includes a non-uniform portion 511. The non-uniform portion 511 covers all or part of the inclined surface 101 of the substrate 10. The non-uniform portion 511 includes multiple film layers, and one of the multiple film layers has a wedge shape at its end. The end of one of the multiple film layers has a thickness that gradually decreases in a direction toward the substrate 10. One end of the protective layer 50 and / or the covering layer 52 has a wedge shape, and the thickness of one end of the protective layer 50 and / or the covering layer 52 gradually decreases in a direction toward the substrate 10.

[0156] Figure 7 This is a top view of a light-emitting element 1g disclosed in an embodiment of the present invention. Figure 8 It is along Figure 7 A cross-sectional view of the light-emitting element 1g along the tangent Y-Y'. In this embodiment, the light-emitting element 1g and... Figures 1-6 The light-emitting elements 1 have the same name and designation, indicating the same structure, the same material, or the same function. The description will be omitted or will not be repeated here.

[0157] A light-emitting element 1g includes a substrate 10, including an upper surface 100 and side edges 10S; a semiconductor stack 20 is located on the upper surface 100 of the substrate 10, including a first semiconductor layer 211, an active layer 212 and a second semiconductor layer 213; a dicing channel 10d surrounds the semiconductor stack 20 and exposes the upper surface 100 of the substrate 10; a conductive layer 30 is located on the second semiconductor layer 213; a current blocking layer 31 is located between the conductive layer 30 and the second semiconductor layer 213; an insulating reflective structure 500 covers the semiconductor stack 20 and the dicing channel 10d, including a first insulating reflective structure opening 501 and a second insulating reflective structure opening 502; a first electrode pad 61 covers the first insulating reflective structure opening 501 to be electrically connected to the first semiconductor layer 211; and a second electrode pad 62 covers the second insulating reflective structure opening 502 to be electrically connected to the second semiconductor layer 213.

[0158] 1g of light-emitting element can be as follows Figure 7 The square shown is either a square or a rectangle with one long side and one short side. Any side of the light-emitting element 1g is at least 50 μm wide but not more than 260 μm. In an example where the longest side of the light-emitting element 1g is less than 200 μm, the distance between the first electrode pad 61 and the second electrode pad 62 is at least 10 μm wide but not more than 45 μm. In an example where the longest side of the light-emitting element 1g is greater than 200 μm, the distance between the first electrode pad 61 and the second electrode pad 62 is at least 50 μm wide but not more than 150 μm.

[0159] In an example where the longest side of the light-emitting element 1g is greater than 200 μm, the light-emitting element 1g further includes a first contact electrode 41 located on the first semiconductor layer 211 and a second contact electrode 42 located on the conductive layer 30. In an example where the longest side of the light-emitting element 1g is less than 200 μm, the light-emitting element 1g may not include the first contact electrode 41 and the second contact electrode 42.

[0160] The second contact electrode 42 includes a second contact portion 420, a second connecting portion 421, and one or more second extension portions 422 extending from the second connecting portion 421 in a direction away from the second contact portion 420. A width W1 of the second connecting portion 421 is greater than or equal to a width W2 of the second extension portion 422. The tail ends of the plurality of second extension portions 422 are separated by a minimum distance S.

[0161] The ratio of the length E of the second connecting portion 421 to the shortest distance S is 0.05 to 0.12. Viewed from above by the self-luminous element 1g, the shortest distance L1 between the second connecting portion 421 and the second electrode pad 62 can be less than or equal to the shortest distance L2 between the second connecting portion 421 and the first electrode pad 61.

[0162] The thickness of a 1g light-emitting element can range from 50μm to 110μm, with a preferred thickness between 70μm and 90μm. For example... Figure 7 As shown, the exposed substrate width d3 or d4 in the lateral direction (X-axis) may be the same as or different from the exposed substrate width d1 or d2 in the longitudinal direction (Y-axis). The exposed substrate widths d1, d2, d3, or d4 are at least greater than 4 μm but do not exceed 10 μm.

[0163] Figure 9A This is a self-disclosed embodiment of the present invention. Figure 7 A side view of the light-emitting element 1g viewed from the X-axis. Figure 9B This is a self-disclosed embodiment of the present invention. Figure 7 A side view of the light-emitting element 1g as viewed along the Y-axis. In one embodiment, as... Figure 7 and Figure 9A As shown, the first electrode pad 61 and the second electrode pad 62 are respectively close to the first side E1 and the second side E2 of the light-emitting element 1g. Viewed from the third side E3 or the fourth side E4 of the light-emitting element 1g, the two side edges S1 and S2 of the side surface P3 of the substrate 10 are inclined relative to the lower surface 105 of the substrate 10. Figure 7 and Figure 9B As shown, viewed from either the first side E1 or the second side E2 of the self-emissive element 1g, the two sides S3 and S4 of the side surface P1 of the substrate 10 are approximately perpendicular to the lower surface 105 of the substrate 10. The lattice plane of side surface P1 can be the R-plane, and the lattice plane of side surface P3 can be the M-plane or the A-plane. The exposed substrate width d1 or d2 is greater than the exposed substrate width d3 or d4. Since the R-plane is more prone to cracking, side surface P1 can contain only one first roughened portion 103. Since the M-plane or A-plane is less prone to cracking, side surface P3 can contain multiple first roughened portions 103. That is, the cutting yield is improved by multiple stealth laser cuts at different depths, and multiple first roughened portions 103 are formed corresponding to multiple stealth laser cuts at different depths.

[0164] Figure 9C This is the self-disclosed in another embodiment of the present invention. Figure 7 A side view of the light-emitting element 1g viewed from the X-axis. Figure 9D This is the self-disclosed in another embodiment of the present invention. Figure 7 A side view of the light-emitting element 1g as viewed along the Y-axis. In another embodiment, as... Figure 7 and Figure 9C As shown, viewed from the third side E3 or the fourth side E4 of the self-emissive element 1g, the two sides S1 and S2 of the side surface P3 of the substrate 10 are approximately perpendicular to the lower surface 105 of the substrate 10. Figure 7 and Figure 9DAs shown, viewed from either the first side E1 or the second side E2 of the self-emissive element 1g, the two sides S3 and S4 of the side surface P1 of the substrate 10 are inclined relative to the lower surface 105 of the substrate 10. The lattice surface of side surface P1 can be an M-plane or an A-plane, and the lattice surface of side surface P3 can be an R-plane. The exposed substrate width d1 or d2 is smaller than the exposed substrate width d3 or d4. Since the R-plane is more prone to cracking, side surface P3 may contain only one first roughened portion 103. Since the M-plane or A-plane is less prone to cracking, side surface P1 may contain multiple first roughened portions 103.

[0165] In one embodiment of the invention, when the length ratio of any long side to any short side of the light-emitting element 1g exceeds 2, for example, when the third side E3 is the long side and the first side E1 is the short side, and the length ratio of E3 / E1 of the third side E3 to the first side E1 is greater than 2, the lattice surface exposed by the third side E3 of the substrate 10 is the R surface, and the lattice surface exposed by the first side E1 of the substrate 10 is the M surface or the A surface.

[0166] Figure 10 yes Figure 8 A partial cross-sectional view of position I of the light-emitting element 1g. Figure 11 yes Figure 8 SEM image of position I of the light-emitting element 1g. To improve the adhesion between the insulating reflective structure 500, such as the SiO2 film, and the first contact electrode 41, the first contact electrode 41 includes a first bonding layer 411 and a first conductive layer 412. During etching to form the opening 501 of the first insulating reflective structure, a portion of the first contact electrode 41 is removed to form a first recess 410. In one embodiment, the first recess 410 is formed in the first bonding layer 411. A step difference H1 exists between a bottom 41b of the first recess 410 and a top 41t of the first contact electrode 41. The step difference H1 is between 20 nm and 200 nm, preferably between 50 nm and 150 nm, and more preferably between 80 nm and 100 nm. A sidewall 501S of the insulating reflective structure 500 and a sidewall 410S of the first recess 410 can be continuously connected or have a minimum spacing 501d. The minimum spacing 501d is between 5 nm and 100 nm, preferably between 10 nm and 50 nm, and more preferably between 20 nm and 30 nm.

[0167] Figure 12 yes Figure 8 A partial cross-sectional view of the position II of the light-emitting element 1g. Figure 13 yes Figure 8The image shows a SEM image of position II of the light-emitting element 1g. To improve the adhesion between the insulating reflective structure 500, such as the SiO2 film, and the second contact electrode 42, the second contact electrode 42 includes a second bonding layer 423 and a second conductive layer 424. During etching to form the opening 502 of the second insulating reflective structure, a portion of the second contact electrode 42 is removed to form a second recess 425. In one embodiment, the second recess 425 is formed in the second bonding layer 423. A step difference H2 exists between a bottom 42b of the second recess 425 and a top 42t of the second contact electrode 42. The step difference H2 is between 20 nm and 200 nm, preferably between 50 nm and 150 nm, and more preferably between 80 nm and 100 nm. A sidewall 502S of the insulating reflective structure 500 and a sidewall 420S of the second recess 425 may be continuously connected or have a minimum spacing 502d. The minimum spacing 502d is between 5 nm and 100 nm, preferably between 10 nm and 50 nm, and more preferably between 20 nm and 30 nm.

[0168] The first bonding layer 411 and the second bonding layer 423 comprise metals such as titanium (Ti), gold (Au), nickel (Ni), and platinum (Pt), or alloys thereof. The first conductive layer 412 and the second conductive layer 424 comprise metals such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), platinum (Pt), nickel (Ni), and silver (Ag), or alloys thereof.

[0169] Figure 14 This is a schematic diagram of a light-emitting device 2 according to an embodiment of the present invention. The light-emitting element 1 or 1g from the aforementioned embodiment is mounted as a flip chip on the first pad 511 and the second pad 512 of the packaging substrate 513. The first pad 511 and the second pad 512 are electrically insulated from each other by an insulating portion 53 containing insulating material. In flip chip mounting, the growth substrate side facing the electrode pad formation surface is designated as the primary light extraction surface. To increase the light extraction efficiency of the light-emitting device 2, a reflective structure 58 can be provided around the light-emitting element 1 or 1g.

[0170] Figure 15 This is a schematic diagram of a light-emitting device 3 according to an embodiment of the present invention. The light-emitting device 3 is a bulb lamp including a lampshade 602, a reflector 604, a light-emitting module 610, a lamp holder 612, a heat sink 614, a connecting part 616, and an electrical connection element 618. The light-emitting module 610 includes a support part 606, and a plurality of light-emitting units 608 located on the support part 606, wherein the plurality of light-emitting units 608 may be the light-emitting element 1, 1g, or light-emitting device 2 in the aforementioned embodiments.

[0171] The embodiments listed in this invention are merely illustrative and not intended to limit the scope of the invention. Any obvious modifications or alterations made to this invention by any person do not depart from the spirit and scope of the invention.

Claims

1. A light-emitting element, comprising: The substrate includes an upper surface (100), a first side edge (10S), and an inclined surface (101) located between the upper surface and the side edge; A semiconductor stack is located on the upper surface of the substrate, the semiconductor stack comprising a first semiconductor layer, an active layer and a second semiconductor layer; A protective layer covers the semiconductor stack, the upper surface, and the inclined surface, the protective layer having an end located on the inclined surface, the thickness of the end gradually decreasing in the direction toward the substrate; as well as A reflective layer is located above the protective layer and covers the semiconductor stack, the upper surface and the inclined surface, and includes a non-uniform portion located on the inclined surface.

2. The light-emitting element as claimed in claim 1, wherein the non-uniform portion of the reflective layer comprises a plurality of film layers, and the ends of the plurality of film layers comprise wedges.

3. The light-emitting element as claimed in claim 1, wherein the non-uniform portion of the reflective layer comprises a plurality of film layers, and the thickness of the ends of the plurality of film layers gradually decreases in the direction toward the substrate.

4. The light-emitting element as claimed in claim 1, wherein the semiconductor stack includes a second side (20S), and the upper surface of the substrate is located between the inclined surface and the second side.

5. The light-emitting element as claimed in claim 1, wherein the non-uniform portion of the reflective layer covers all or part of the inclined surface of the substrate.

6. The light-emitting element as claimed in claim 1 further comprises a coating layer covering the reflective layer.

7. The light-emitting element of claim 1, wherein the end of the protective layer comprises a wedge shape.

8. The light-emitting element of claim 1, wherein the reflective layer comprises a Bragg reflector.

9. The light-emitting element as claimed in claim 1, wherein the substrate further includes a first roughened portion located on the first side of the substrate.

10. The light-emitting element of claim 9, wherein the substrate further comprises a second roughened portion located on the inclined surface of the substrate.

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