Display panel and display device

Abstract

The display panel and the display device are provided, the display panel comprises a substrate, a semiconductor layer, an inorganic layer, a conductive layer and a resist layer. The semiconductor layer is arranged on one side of the substrate, the inorganic layer is arranged on the side of the semiconductor layer away from the substrate, and the conductive layer is arranged on the side of the inorganic layer away from the semiconductor layer. A first opening is arranged to penetrate through the inorganic layer and the semiconductor layer, the conductive layer extends into the first opening and is connected with the semiconductor layer, so that a first signal is transmitted between the conductive layer and the semiconductor layer. The resist layer is arranged at the position corresponding to the first opening on the substrate, and the orthographic projection of the resist layer on the substrate at least covers the orthographic projection of the side of the first opening facing the resist layer on the substrate. In this way, the resist layer plays a role of isolation and protection for the substrate, for example, when etching an opening on the inorganic layer and the semiconductor layer, the resist layer is formed as an etching blocking layer, avoiding the phenomenon that the substrate is etched through, so that the external moisture cannot enter the inside of the display panel through the first opening, and the display reliability of the display panel is improved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more specifically to a display panel and a display device. Background Technology

[0002] Display panels, such as Active Matrix Organic Light Emitting Diode (AMOLED), have self-emissive properties. They use a very thin organic material coating and glass substrate, and have advantages such as low power consumption, high resolution, high image quality, and large screen-to-body ratio. They are widely used in electronic products such as mobile phones, televisions, and laptops.

[0003] In related technologies, a display panel includes a substrate, a semiconductor layer, an inorganic layer, and a conductive layer stacked together. Openings are etched on the inorganic layer and the semiconductor layer, allowing the conductive layer to extend into the openings to electrically connect with the semiconductor layer and achieve signal transmission. However, when the openings are etched on the inorganic layer and the semiconductor layer, the substrate is easily etched through, allowing external moisture to easily enter the interior of the display panel, affecting the reliability of the display. Summary of the Invention

[0004] In view of this, the present disclosure aims to provide a display panel and display device to improve the waterproofing of the panel to a certain extent and enhance the display reliability of the panel.

[0005] In a first aspect, this disclosure provides a display panel, including:

[0006] Base;

[0007] A semiconductor layer is disposed on one side of the substrate;

[0008] An inorganic layer is disposed on the side of the semiconductor layer opposite to the substrate;

[0009] A conductive layer is disposed on the side of the inorganic layer opposite to the semiconductor layer;

[0010] A first opening penetrates at least through the inorganic layer and the semiconductor layer, and the conductive layer extends into the first opening and is connected to the semiconductor layer, so that a first signal is transmitted between the conductive layer and the semiconductor layer;

[0011] A resist layer is disposed on the substrate at a position corresponding to the first opening and close to the semiconductor layer, and the orthographic projection of the resist layer on the substrate at least covers the orthographic projection of the side of the first opening facing the resist layer on the substrate.

[0012] Optionally, the substrate includes a substrate and a buffer layer;

[0013] The substrate and the buffer layer are stacked, and the semiconductor layer is disposed on the side of the buffer layer opposite to the substrate;

[0014] The corrosion-resistant layer is disposed at the position of the buffer layer corresponding to the first opening.

[0015] Optionally, the resist layer is disposed on the side of the buffer layer facing the substrate, and the first opening penetrates the portion of the buffer layer located between the resist layer and the semiconductor layer;

[0016] Alternatively, the resist layer may be disposed on the side of the buffer layer opposite to the substrate.

[0017] Optionally, the thickness of the resist layer is not less than half the thickness of the buffer layer along the thickness direction of the substrate.

[0018] Optionally, at least a portion of the resist layer is disposed between the substrate and the semiconductor layer;

[0019] The anti-corrosion layer is in communication with the first opening, and the anti-corrosion layer is in contact with the portion of the conductive layer that extends into the first opening.

[0020] Optionally, the corrosion-resistant layer includes a metal layer;

[0021] Preferably, the metal layer comprises a molybdenum layer.

[0022] Optionally, the outer contour of the orthographic projection of the resist layer on the substrate is located outside the outer contour of the first opening on the substrate on the side facing the resist layer;

[0023] And / or, the inorganic layer is at least two layers, and the at least two inorganic layers are stacked in the direction from the substrate to the conductive layer.

[0024] Optionally, the display panel further includes an organic planarization layer disposed between the inorganic layer and the conductive layer;

[0025] The first opening extends toward the organic planarization layer to penetrate the organic planarization layer, so that the conductive layer passes through the organic planarization layer and connects to the semiconductor layer.

[0026] Optionally, a first gate layer is disposed within the inorganic layer, and a second opening is disposed at the position of the organic planarization layer corresponding to the first gate layer and at the position of the inorganic layer corresponding to the first gate layer. The conductive layer extends into the second opening and is electrically connected to the first gate layer, and the thickness of the resist layer is less than the thickness of the first gate layer.

[0027] And / or, a second gate layer is provided on the side of the inorganic layer facing the organic planarization layer, a third opening is provided on the organic planarization layer at the position corresponding to the second gate layer, the conductive layer extends into the third opening and is electrically connected to the second gate layer, and the thickness of the resist layer is less than the thickness of the second gate layer.

[0028] In a second aspect, this disclosure provides a display device, including any of the display panels described in the first aspect.

[0029] The display panel and display device disclosed herein comprise a semiconductor layer on one side of a substrate, an inorganic layer on the side of the semiconductor layer facing away from the substrate, and a conductive layer on the side of the inorganic layer facing away from the semiconductor layer. A first opening is provided penetrating the inorganic layer and the semiconductor layer, and the conductive layer extends into the first opening and connects to the semiconductor layer. A resist layer is provided on the substrate at a position corresponding to the first opening, such that the resist layer is disposed close to the semiconductor layer and communicates with the first opening. Furthermore, the orthographic projection of the resist layer on the substrate at least covers the orthographic projection of the side of the first opening facing the resist layer on the substrate.

[0030] The display panel provided in this disclosure has a resist layer disposed on the substrate at the position corresponding to the first opening. When the opening is etched on the inorganic layer and the semiconductor layer, the resist layer plays an isolation and protection role for the substrate. The resist layer forms an etching blocking layer, which avoids the phenomenon of the substrate being etched through. This prevents external moisture from entering the interior of the display panel through the first opening, thereby improving the display reliability of the display panel. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the structure of a display panel according to an embodiment of the present disclosure;

[0032] Figure 2 for Figure 1 Enlarged view of section A;

[0033] Figure 3 for Figure 1 Enlarged view of section B;

[0034] Figure 4 This is a partial structural diagram of a display panel according to an embodiment of the present disclosure;

[0035] Figure 5 This is a schematic diagram of another partial structure of the display panel according to an embodiment of the present disclosure;

[0036] Figure 6 for Figure 5 A schematic diagram of a partial structure;

[0037] Figure 7 This is a schematic diagram of the structure of a display panel according to another embodiment of the present disclosure;

[0038] Figure 8 for Figure 7 Enlarged view of section C;

[0039] Figure 9 for Figure 7 A partial structural diagram.

[0040] Among them, 1 is the substrate; 11 is the substrate; 12 is the buffer layer; 2 is the semiconductor layer; 3 is the inorganic layer; 4 is the conductive layer; 5 is the resist layer; 61 is the first opening; 62 is the second opening; 63 is the third opening; 7 is the organic planarization layer; 8 is the first gate layer; and 9 is the second gate layer. Detailed Implementation

[0041] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure are within the scope of protection of this disclosure.

[0042] With the rapid development of technology and the popularization of smart lifestyles, users' demands for display screen performance are increasing day by day, especially in terms of contrast ratio, viewing angle, and response speed. User needs have reached unprecedented levels. Against this backdrop, Active Matrix Organic Light Emitting Diode (AMOLED) panels, with their unique advantages, have become the preferred material (technology) for screens today.

[0043] AMOLED boasts numerous significant advantages. First, in terms of display quality, AMOLED offers extremely high contrast. Because each pixel can independently emit and turn off, AMOLED can display true blacks with strong contrast between bright and dark areas, making it particularly advantageous when displaying content against a black background.

[0044] Secondly, AMOLED offers a very wide viewing angle. Unlike traditional displays that rely on backlighting and require complex refraction and filtering, AMOLED, based on its self-emissive characteristics, ensures that the propagation and presentation of light are not significantly affected when the user views the screen from different angles. Therefore, its color and brightness can maintain good consistency without noticeable color distortion or brightness reduction.

[0045] Furthermore, fast response speed is another major highlight of AMOLED. Due to the rapid response of its internal organic materials to current, AMOLED can quickly change its light-emitting state. Therefore, when displaying high-speed dynamic images, such as intense sports events and fast-paced game scenes, it can avoid ghosting and blurring caused by untimely pixel state switching, providing users with a smooth visual experience.

[0046] Based on the aforementioned advantages, AMOLED is widely used in a variety of screen display devices, including but not limited to smartphones, tablets, televisions, laptops, automotive displays, and wearable devices, as well as virtual reality (VR), augmented reality (AR) devices, medical devices, industrial control panels, and advertising displays. Furthermore, these various screen display devices include, but are not limited to, horizontal display devices; that is, OLED can also be widely used in a variety of flexible display devices, such as foldable phones and curved screen displays (including computer monitors, advertising displays, and wearable devices).

[0047] In related technologies, AMOLED comprises a substrate, a semiconductor layer, an inorganic layer, and a conductive layer stacked together. The substrate is the basic structure providing support for the entire display panel; the semiconductor layer, with its internal transistors and other components, precisely controls the current of each pixel based on the input electrical signal, thereby controlling the light emission state of each pixel, and thus plays a crucial role in signal processing and control; the inorganic layer prevents damage to the organic material layers from external moisture, oxygen, etc., and also avoids mutual interference between layers, ensuring the stability and performance of each layer; the main function of the conductive layer is to realize current transmission, providing the necessary power support for pixel light emission.

[0048] To achieve efficient collaboration between the various layers of an AMOLED display and thus precisely control pixel emission, it is typically necessary to etch openings in the inorganic and semiconductor layers so that the conductive layer can extend into the openings and be electrically connected to the semiconductor layer. Through this electrical connection, signals can be effectively transmitted between the layers, thereby enabling precise control of the emission of each pixel and ensuring that the AMOLED screen can accurately display various images and information.

[0049] However, there is a technical risk of substrate penetration when etching openings in the inorganic and semiconductor layers. Specifically, during the etching process, it is difficult to precisely control the chemical activity of the etchant, the etching rate, and the matching of process parameters (such as temperature, pressure, and time). This makes substrate penetration a common problem. Once the substrate is penetrated, the multi-layer barrier structure jointly constructed by the substrate and inorganic layers is destroyed. This structural damage allows external moisture to penetrate or diffuse into the AMOLED display panel through the etched area. Notably, moisture intrusion can cause irreversible damage to the organic functional layers and electronic components of the display panel, manifesting as display defects such as pixel failure, uneven brightness, and image retention, thereby significantly reducing the display panel's reliability and lifespan.

[0050] Based on this, embodiments of the present disclosure provide a display panel and a display device. The display panel has a resist layer disposed on the substrate at a position corresponding to the first opening, and the resist layer is disposed close to the semiconductor and communicates with the first opening. In addition, the display panel provided by the present disclosure is such that the orthographic projection of the resist layer on the substrate at least covers the orthographic projection of the side of the first opening facing the resist layer on the substrate (including the orthographic projection of the resist layer on the substrate being the same as the orthographic projection of the side of the first opening facing the resist layer on the substrate, and including the orthographic projection of the resist layer on the substrate being greater than the orthographic projection of the side of the first opening facing the resist layer on the substrate). In this way, when the opening is etched on the inorganic layer and the semiconductor layer, the resist layer can play an isolation and protection role for the substrate. The resist layer is formed as an etching blocking layer, which avoids the phenomenon of the substrate being etched through, so that external moisture will not enter the interior of the display panel through the first opening, thereby improving the display reliability of the display panel.

[0051] The display panel and display device provided by the present invention will now be described in detail with reference to the accompanying drawings and specific embodiments:

[0052] Reference Figures 1 to 9 As shown, this embodiment provides a display panel, which can be applied to a display device, such as a mobile phone, watch, tablet computer, laptop computer, television, or other device with display functionality. It should be understood that... Figures 1 to 9 These are merely examples and are not intended to limit the specific embodiments of the present invention.

[0053] Specifically, refer to Figures 1 to 9As shown, the display panel includes a substrate 1, a semiconductor layer 2, an inorganic layer 3, a conductive layer 4, and a resist layer 5. The semiconductor layer 2 is disposed on one side of the substrate 1, the inorganic layer 3 is disposed on the side of the semiconductor layer 2 opposite to the substrate 1, and the conductive layer 4 is disposed on the side of the inorganic layer 3 opposite to the semiconductor layer 2. A first opening 61 is provided, penetrating at least through the inorganic layer 3 and the semiconductor layer 2. The conductive layer 4 extends into the first opening 61 and connects to the semiconductor layer 2, so that a first signal can be transmitted between the conductive layer (4) and the semiconductor layer (2). The resist layer 5 is disposed on the substrate 1 at a position corresponding to the first opening 61 and close to the semiconductor layer 2, and the orthographic projection of the resist layer 5 on the substrate 1 at least covers the orthographic projection of the side of the first opening 61 facing the resist layer 5 on the substrate 1.

[0054] In this embodiment of the disclosure, the first signal can be any one of a control signal (i.e., a logic signal) or a power signal (i.e., a drive signal).

[0055] The control signals include a gate scan signal, which controls the switching state of the thin film transistor array (TFT) and determines the gating timing of the pixels; the control signals also include a data voltage signal, which carries image grayscale information and adjusts the driving current of the OLED through the TFT to control the pixel brightness.

[0056] The power supply signals include the anode voltage (Voltage Drain-to-Drain, VDD), which provides a positive bias voltage to the display panel through the conductive layer 4 (such as the anode line); the power supply signals also include the cathode voltage (Voltage Source-to-Source, VSS), which forms a current loop through the common electrode layer (or cathode layer).

[0057] By setting a resist layer 5 at the position corresponding to the first opening 61 on the substrate 1, the resist layer 5 is connected to the first opening 61, and the orthogonal projection of the resist layer 5 on the substrate 1 at least covers the orthogonal projection of the side of the first opening 61 facing the resist layer 5 on the substrate 1. This arrangement ensures that the substrate 1 has a resist layer 5 at the position corresponding to the first opening 61, which isolates the first opening 61 from the substrate 1, thus providing isolation and protection for the substrate 1. This prevents the substrate 1 from being etched through when the first opening 61 is etched on the inorganic layer 3 and the semiconductor layer 2, thereby preventing moisture from entering the display panel and ensuring display reliability.

[0058] It is easy to understand that since the position of the resist layer 5 corresponds to the position of the first opening 61, and the orthogonal projection of the resist layer 5 on the substrate 1 at least covers the orthogonal projection of the side of the first opening 61 facing the resist layer 5 on the substrate 1, when the first opening 61 is etched on the inorganic layer 3 and the semiconductor layer 2, the first opening 61 can only be formed on the side of the resist layer 5 facing the inorganic layer 3. The first opening 61 will not be formed on the side of the resist layer 5 away from the inorganic layer 3. The resist layer 5 forms a blocking layer for the first opening 61. The resist layer 5 is located below the first opening 61 and seals the bottom of the first opening 61. Since the resist layer 5 is set on the substrate 1, the phenomenon of the substrate 1 being etched through when the first opening 61 is formed is avoided. In this way, water vapor will not enter the interior of the display panel from the first opening 61, ensuring the water-resistant performance of the substrate 1 and improving the display reliability of the display panel.

[0059] By placing the resist layer 5 close to the semiconductor, the resist layer 5 is located on the portion of the substrate 1 closest to the semiconductor. This results in a smaller distance between the resist layer 5 and the semiconductor layer 2, making the size of the substrate 1 smaller on the side of the resist layer 5 facing the semiconductor layer 2 and larger on the side of the resist layer 5 away from the semiconductor layer 2. This ensures that the size of the side of the resist layer 5 away from the semiconductor and the side of the substrate 1 away from the semiconductor layer 2 are equal, thus ensuring the thickness of the substrate 1 is not affected by etching. This, in turn, ensures the thickness that blocks the first opening 61 from the outside world, resulting in higher display reliability of the display panel.

[0060] The display panel provided in this embodiment has a semiconductor layer 2 on one side of a substrate 1, an inorganic layer 3 on the side of the semiconductor layer 2 away from the substrate 1, a conductive layer 4 on the side of the inorganic layer 3 away from the semiconductor layer 2, and a first opening 61 penetrating the inorganic layer 3 and the semiconductor layer 2. The conductive layer 4 extends into the first opening 61 and is connected to the semiconductor layer 2. A resist layer 5 is disposed on the substrate 1 at the position corresponding to the first opening 61, positioned close to the semiconductor layer 2 and communicating with the first opening 61. The orthographic projection of the resist layer 5 onto the substrate 1 at least covers the orthographic projection of the side of the first opening 61 facing the resist layer 61 onto the substrate 1. This arrangement ensures that the substrate 1 has a resist layer 5 at the position corresponding to the first opening 61. When the opening is etched onto the inorganic layer 3 and the semiconductor layer 2, the resist layer 5 acts as an etching barrier layer, preventing the substrate 1 from being etched through. This prevents external moisture from entering the display panel through the first opening 61, thereby improving the display reliability. Simultaneously, it also protects the organic functional layers and electronic components of the display panel.

[0061] The material of the resist layer 5 is not limited in this disclosure. In some embodiments, the resist layer 5 may be made of inorganic materials, such as silicon nitride (SiNx) which has high hardness, high chemical stability and excellent etching barrier properties, silicon oxide (SiOx) which has good insulation and etching selectivity, and silicon oxynitride (SiON) which combines the advantages of both and has better etching selectivity and mechanical strength.

[0062] In other embodiments, the resist layer 5 may also be made of organic materials, such as polyimide (PI), which has high heat resistance and chemical stability.

[0063] To further improve the performance of the resist layer 5 and enhance the display reliability of the display panel, in some embodiments, a metal layer can be incorporated into the resist layer 5 (i.e., all or part of the resist layer 5 can be made of a metal material) to improve its resistance to etching and weathering. It is easy to understand that, on the one hand, metals have extremely high resistance to etchants (such as plasma or chemical etchants), effectively preventing the substrate from being etched through during the process of setting the first opening 61; on the other hand, the metal layer can also serve as a hard mask to achieve high-precision patterned etching, ensuring the accuracy and consistency of the fine structure of the display panel (such as TFT arrays or pixel electrodes). Furthermore, the metal layer also has superior oxidation and corrosion resistance, protecting the display panel from damage in harsh environments (such as high temperature and high humidity); the high hardness and wear resistance of the metal layer enhance the mechanical strength of the display panel, preventing damage from friction or impact during daily use.

[0064] The manufacturing process of the metal layer is not limited in this disclosure. In some embodiments, physical vapor deposition (PVD) can be used to deposit the metal layer on the substrate via sputtering or evaporation, ensuring uniform layer thickness and high adhesion. In other embodiments, chemical vapor deposition (CVD) can be used to deposit compound metal layers such as titanium nitride, which have higher density and chemical stability. In still other embodiments, a patterning process can be used to fabricate the metal layer into desired clusters via photolithography and etching, serving as a hard mask for subsequent processes.

[0065] Regarding the material of the metal layer, this application does not limit the embodiments. In some embodiments, the resist layer 5 can be made of metallic materials that provide extremely high etching selectivity and mechanical protection, such as titanium (Ti) or titanium nitride (TiN). In still other embodiments, the resist layer 5 can utilize the high hardness, excellent corrosion resistance, and good thermal stability of molybdenum, and can be made of compounds such as molybdenum or molybdenum carbide, i.e., a molybdenum layer.

[0066] It should be understood that the anti-corrosion layer 5 can be any one or a combination of materials described above regarding its material (metal and non-metal), and this disclosure does not limit this.

[0067] It is worth noting that, in this embodiment of the disclosure, the number of first openings 61 etched on the inorganic layer 3 and the semiconductor layer 2 is not limited.

[0068] When a single first opening 61 is used, its advantages are that the process is relatively simple, it can meet the basic functional requirements (transmitting signals through electrical connection), and it helps to reduce costs and production difficulty.

[0069] When multiple first openings 61 are used, on the one hand, the contact area between the conductive layer 4 and the semiconductor layer 2 can be increased, thereby making the electrical connection more stable and reliable, reducing contact resistance, reducing signal loss during transmission, and thus improving the display effect; on the other hand, in complex pixel circuits, especially in circuits with multi-layer structures or multi-pattern designs, multiple first openings 61 are the key to realizing interconnection between different conductive layers 4 or different semiconductor layers 2, so as to meet the complex signal transmission and circuit function requirements.

[0070] Furthermore, the shape of the first opening 61 is not limited in this embodiment. In some embodiments, a circular first opening 61, which is simple in structure and easy to manufacture, can be selected to ensure a more uniform stress distribution and consistent display performance of the display panel in all directions. In other embodiments, a square or rectangular first opening 61 can be selected. It is easy to understand that the edges of a square or rectangular first opening 61 are neater, thereby providing a larger contact area and helping to improve the stability of the electrical connection. At the same time, in certain specific circuit layouts and pattern designs, a square or rectangular first opening 61 is easier to match and integrate with other structures. In still other embodiments, a strip-shaped first opening 61 can be selected to increase the length of the opening, increase the contact area between the conductive layer 4 and the semiconductor layer 2, thereby reducing the contact resistance. The strip-shaped first opening 61 is generally suitable for scenarios requiring a larger contact area.

[0071] It should be understood that, in addition to the common first opening shape 61 described above, there may be some special shapes, such as a triangular first opening 61. The specific shape of the opening can be determined comprehensively based on various factors such as the circuit design of the display panel, process requirements, material properties, and performance optimization goals, and this disclosure does not limit it.

[0072] refer to Figure 1 , Figure 2 , Figures 4 to 9 As shown, in some embodiments, the substrate 1 includes a substrate 11 and a buffer layer 12, which are stacked together. The semiconductor layer 2 is disposed on the side of the buffer layer 12 away from the substrate 11. The resist layer 5 is disposed on the buffer layer 12 at the position corresponding to the first opening 61.

[0073] By making the substrate 1 include a substrate 11 and a buffer layer 12, with the entire surface of the buffer layer 12 disposed on one side of the substrate 11 and the semiconductor layer 2 disposed on the side of the buffer layer 12 away from the substrate 11, the buffer layer 12 is located between the semiconductor layer 2 and the substrate 11. The buffer layer 12 can isolate water vapor, oxygen, etc. from the semiconductor layer 2 side. The buffer layer 12 plays an isolation and support role between the substrate 11 and the semiconductor, thereby improving the water resistance performance of the substrate 1.

[0074] The resist layer 5 is disposed on the buffer layer 12. The resist layer 5 separates the substrate 11 and the first opening 61. The resist layer 5 plays an isolation and protection role for the substrate 11. The resist layer 5 forms a blocking and protection layer for the substrate 11, which avoids the phenomenon of the substrate 11 being etched through and ensures that the substrate 1 is thick enough not to be etched through. This prevents external moisture from entering the first opening 61 through the substrate 11, thereby improving the display reliability of the display panel.

[0075] Since the resist layer 5 is disposed on the buffer layer 12 and corresponds to the position of the first opening 61, when the first opening 61 is etched on the inorganic layer 3 and the semiconductor layer 2, it is ensured that the substrate 11 is not etched and is not affected by the etching. The substrate 11 and the etching layer can block and isolate the first opening 61 from the outside world, further ensuring that moisture will not enter the first opening 61 and improving the reliability of the display panel.

[0076] In some embodiments, the substrate 11 may be made of organic materials, such as one or more of polyimide, polyethylene naphthalate, polyester aramid, and polycarbonate, and the substrate 11 is formed as an organic substrate. This disclosure does not limit the specific materials used in this embodiment.

[0077] In some embodiments, the buffer layer 12 is made of inorganic materials, such as silicon oxide, silicon nitride, etc., but this disclosure does not limit the specific materials used.

[0078] refer to Figure 2 , Figures 4 to 6 As shown, in some embodiments, the resist layer 5 is disposed on the side of the buffer layer 12 facing the substrate 11, and the first opening 61 penetrates the portion of the buffer layer 12 located between the resist layer 5 and the semiconductor layer 2. This arrangement ensures that the substrate 11 is not affected by etching, and also allows the first opening 61 to extend onto the buffer layer 12. That is, a portion of the first opening 61 is formed on the side of the buffer layer 12 facing the semiconductor layer 2, which increases the contact area between the conductive layer 4 and the semiconductor layer 2, allowing the conductive layer 4 and the semiconductor layer 2 to fully contact and conduct, thereby improving the electrical conductivity between the two, resulting in better signal transmission and helping to improve the display performance and reliability of the display panel.

[0079] In some implementations, refer to Figure 7 and Figure 9 As shown, the resist layer 5 is disposed on the side of the buffer layer 12 away from the substrate 11. With this arrangement, when the first opening 61 is etched on the inorganic layer 3 and the semiconductor layer 2, neither the buffer layer 12 nor the substrate 11 will be affected by the etching. The resist layer 5 isolates and protects both the buffer layer 12 and the substrate 11, further ensuring that the thickness of the substrate 1 is not affected by the etching, thereby ensuring the blocking thickness of the first opening 61 from the outside world, and making the display panel more reliable.

[0080] refer to Figure 2 As shown, in some embodiments, along the thickness direction of substrate 1 (reference...) Figure 1 and Figure 2 On the Z), the thickness H1 of the anti-corrosion layer 5 is not less than half the thickness H2 of the buffer layer 12.

[0081] In other words, the resist layer 5 is disposed on the buffer layer 12, and the thickness of the resist layer 5 is greater than or equal to half the thickness of the buffer layer 12. This makes the hole depth of the first opening 61 on the buffer layer 12 less than or equal to half the thickness of the buffer layer 12. While ensuring the connection performance between the conductive layer 4 and the semiconductor layer 2, the water-blocking performance of the resist layer 5 and the buffer layer 12 is guaranteed.

[0082] refer to Figure 9 As shown, in some embodiments, at least part of the resist layer 5 is disposed between the substrate 1 and the semiconductor layer 2, ensuring that the buffer layer 12 and the substrate 11 are completely unaffected by etching. The resist layer 5 isolates and protects both the buffer layer 12 and the substrate 11, further ensuring the thickness of the substrate 1 unaffected by etching, thereby ensuring the blocking thickness of the first opening 61 from the outside world, making the display panel highly reliable.

[0083] In other embodiments, the anti-corrosion layer 5 may be a non-metallic layer such as an alumina layer.

[0084] In some embodiments, reference Figure 1, Figure 2 , Figures 4 to 9 As shown, the resist layer 5 is connected to the first opening 61, and the resist layer 5 is in contact with the portion of the conductive layer 4 that extends into the first opening 61.

[0085] Since the resist layer 5 is connected to the first opening 61 and the resist layer 5 is located on one side of the conductive layer 4 of the semiconductor layer 2, the resist layer 5 and the part of the conductive layer 4 extending into the first opening 61 are in contact, so that the conductive layer 4 extending into the first opening 61 penetrates the semiconductor layer 2, thereby allowing the conductive layer 4 and the semiconductor layer 2 to make full contact, improving the electrical connection performance between the two, and making the structure of the display panel more stable and with better overall integrity.

[0086] refer to Figure 2 , Figures 3 to 9 As shown, in some embodiments, the outer contour of the orthographic projection of the resist layer 5 on the substrate 1 is located outside the outer contour of the side of the first opening 61 facing the resist layer 5 on the substrate 1. This arrangement makes the area of ​​the resist layer 5 larger than the opening area of ​​the first opening 61. In this way, the resist layer 5 not only completely isolates and seals the bottom of the first opening 61, but also plays an isolation role between the substrate 1 and the semiconductor layer 2, further preventing the substrate 1 from being etched through, improving the etching blocking effect of the resist layer 5 on the substrate 1, and improving the water resistance and waterproof performance.

[0087] In some embodiments, reference Figures 1 to 9 As shown, the inorganic layer 3 has at least two layers, and the at least two inorganic layers 3 are stacked in the direction from the substrate 1 to the conductive layer 4. The anti-corrosion layer 5 is disposed on the side of the inorganic layer 3 facing the substrate 1, which is close to the substrate 1.

[0088] Because the inorganic layer 3 has good insulation properties, multiple stacked inorganic layers 3 are set up to improve the support of the conductive layer 4 and the circuit protection performance.

[0089] By placing the anti-corrosion layer 5 on the side of the inorganic layer 3 facing the substrate 1, which is close to the substrate 1, the anti-corrosion layer 5 provides better protection for the substrate 1.

[0090] refer to Figures 1 to 9 As shown, in some embodiments, the display panel further includes an organic planarization layer 7 disposed between the inorganic layer 3 and the conductive layer 4, with a first opening 61 extending toward the direction close to the organic planarization layer 7 to penetrate the organic planarization layer 7, so that the conductive layer 4 passes through the organic planarization layer 7 to connect with the semiconductor layer 2.

[0091] By setting an organic planarization layer 7 between the inorganic layer 3 and the conductive layer 4, the organic planarization layer 7 can provide a flat surface for the conductive layer 4, ensuring the flatness of the conductive layer 4. This can enhance the circuit reliability and stability of the display panel and, to a certain extent, prevent the phenomenon of display panel deformation or damage.

[0092] refer to Figure 3 , Figures 5 to 7 , Figure 9 As shown, in some embodiments, a first gate layer 8 is disposed in the inorganic layer 3, and a second opening 62 is disposed at the position of the organic planarization layer 7 corresponding to the position of the first gate layer 8 and at the position of the inorganic layer 3 corresponding to the position of the first gate layer 8. The conductive layer 4 extends into the second opening 62 and is electrically connected to the first gate layer 8. The thickness of the resist layer 5 is less than the thickness of the first gate layer 8.

[0093] By making the thickness of the resist layer 5 less than the thickness of the first gate layer 8, the thickness of the display panel can be reduced to a certain extent, which is beneficial for thinner and lighter designs.

[0094] refer to Figure 3 , Figures 5 to 7 , Figure 9 As shown, a second gate layer 9 is provided on the side of the inorganic layer 3 facing the organic planarization layer 7. A third opening 63 is provided on the organic planarization layer 7 at the position corresponding to the second gate layer 9. The conductive layer 4 extends into the third opening 63 and is electrically connected to the second gate layer 9. The thickness of the resist layer 5 is less than the thickness of the second gate layer 9.

[0095] By making the thickness of the resist layer 5 less than the thickness of the second gate layer 9, the thickness of the display panel can be reduced to a certain extent, which is beneficial for thinner and lighter designs.

[0096] In one implementation, the second gate layer 9 is located on the side of the first gate layer 8 that is away from the substrate 11.

[0097] This embodiment also provides a display device, which includes a display panel.

[0098] As one implementation, the display panel also includes a display screen, which is disposed on the side of the conductive layer opposite to the inorganic layer and is electrically connected to the conductive layer.

[0099] In some implementations, the display device includes a housing, the display device is disposed within the housing, and the housing has a display window that exposes the display screen.

[0100] Display devices can be, for example, mobile phones, watches, tablets, laptops, televisions, or other devices with display functions.

[0101] The display panel in this embodiment has the same structure and implementation principle as the display panel provided in the above embodiments, and can bring the same or similar technical effects. It will not be described in detail here, but can be referred to the description of the above embodiments.

[0102] In this document, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection or an indirect connection through an intermediate medium, or the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. Furthermore, the terms "upper," "lower," "left," "right," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0103] In this document, relational terms such as “first” and “second” are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase “comprising one…” does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0104] The embodiments described above in this disclosure are not exhaustive, nor do they limit this disclosure to the specific embodiments described. These embodiments were selected and specifically described in this specification to better explain the principles and practical applications of this disclosure, thereby enabling those skilled in the art to make good use of this disclosure and modifications based on it. This disclosure is limited only by the claims and their full scope and equivalents.

[0105] Obviously, based on the above description, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure also intends to include these modifications and variations.

Claims

1. A display panel, characterized in that, include: Base (1); A semiconductor layer (2) is disposed on one side of the substrate (1); An inorganic layer (3) is disposed on the side of the semiconductor layer (2) opposite to the substrate (1); A conductive layer (4) is disposed on the side of the inorganic layer (3) opposite to the semiconductor layer (2); The first opening (61) penetrates at least the inorganic layer (3) and the semiconductor layer (2), and the conductive layer (4) extends into the first opening (61) and is connected to the semiconductor layer (2), so that the first signal is transmitted between the conductive layer (4) and the semiconductor layer (2); A resist layer (5) is disposed on the substrate (1) at a position corresponding to the first opening (61) and close to the semiconductor layer (2), and the orthogonal projection of the resist layer (5) on the substrate (1) at least covers the orthogonal projection of the side of the first opening (61) facing the resist layer (5) on the substrate (1).

2. The display panel according to claim 1, characterized in that, The substrate (1) includes a substrate (11) and a buffer layer (12); The substrate (11) and the buffer layer (12) are stacked, and the semiconductor layer (2) is disposed on the side of the buffer layer (12) away from the substrate (11); The anti-corrosion layer (5) is disposed on the buffer layer (12) at the position corresponding to the first opening (61).

3. The display panel according to claim 2, characterized in that, The resist layer (5) is disposed on the side of the buffer layer (12) facing the substrate (11), and the first opening (61) penetrates the portion of the buffer layer (12) located between the resist layer (5) and the semiconductor layer (2); Alternatively, the resist layer (5) is disposed on the side of the buffer layer (12) opposite to the substrate (11).

4. The display panel according to claim 2, characterized in that, Along the thickness direction of the substrate (1), the thickness of the anti-corrosion layer (5) is not less than half the thickness of the buffer layer (12).

5. The display panel according to claim 1, characterized in that, At least a portion of the resist layer (5) is disposed between the substrate (1) and the semiconductor layer (2); The anti-corrosion layer (5) is connected to the first opening (61), and the anti-corrosion layer (5) is in contact with the portion of the conductive layer (4) that extends into the first opening (61).

6. The display panel according to claim 1, characterized in that, The corrosion-resistant layer (5) includes a metal layer; Preferably, the anti-corrosion layer (5) includes a molybdenum layer.

7. The display panel according to claim 1, characterized in that, The outer contour of the anti-corrosion layer (5) projected onto the substrate (1) is located on the side of the first opening (61) facing the anti-corrosion layer (5) outside the outer contour of the substrate (1). And / or, the inorganic layer (3) is at least two layers, and at least two inorganic layers (3) are stacked in the direction from the substrate (1) to the conductive layer (4).

8. The display panel according to any one of claims 1 to 7, characterized in that, The display panel further includes an organic planarization layer (7) disposed between the inorganic layer (3) and the conductive layer (4); The first opening (61) extends toward the organic planarization layer (7) and through the organic planarization layer (7) so that the conductive layer (4) passes through the organic planarization layer (7) and connects to the semiconductor layer (2).

9. The display panel according to claim 8, characterized in that, The inorganic layer (3) is provided with a first gate layer (8). The organic planarization layer (7) and the inorganic layer (3) are provided with second openings (62) at the positions corresponding to the first gate layer (8). The conductive layer (4) extends into the second openings (62) and is electrically connected to the first gate layer (8). The thickness of the resist layer (5) is less than the thickness of the first gate layer (8). And / or, a second gate layer (9) is provided on the side of the inorganic layer (3) facing the organic planarization layer (7), and a third opening (63) is provided on the organic planarization layer (7) at the position corresponding to the second gate layer (9). The conductive layer (4) extends into the third opening (63) and is electrically connected to the second gate layer (9). The thickness of the resist layer (5) is less than the thickness of the second gate layer (9).

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 9.

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