Display panel and display device comprising the same

Abstract

The present application relates to a display device which can reduce luminance difference of a curved display panel. The display panel according to an embodiment for achieving this can have the following configuration: a first lens is disposed in a first pixel area having no curvature, a second lens is disposed in a second pixel area having a first curvature on one side of the first pixel area, a third lens is disposed in a third pixel area having a second curvature on the other side of the first pixel area, and the second and third lenses are disposed to partially overlap with each respective pixel. Accordingly, luminance difference related to the curvature of the display panel can be compensated for, so that the viewing angle of a viewer can be effectively improved.

Description

Technical Field

[0001] This specification relates to a display device that can reduce brightness differences in curved display panels. Background Technology

[0002] Curved display devices can include plastic organic light-emitting diodes (POLEDs) to reproduce input images on curved display panels. In other words, curved display devices can provide users with images that have enhanced three-dimensional effects, immersion, and presence through curved display areas.

[0003] The curved display device can be bent in the direction of the front surface (inward bending) and also in the direction of the rear surface (outward bending). Summary of the Invention

[0004] However, in curved display devices, the two sides of the display panel experience a greater curvature than the center. This curvature results in lower brightness at the two sides compared to the center, which increases the viewing angle difference for the viewer.

[0005] In view of the above, the inventors of the present invention have invented a display panel and a display device including the display panel, which can improve brightness by adding an organic light-emitting device to each sub-pixel and changing the position of the corresponding lens, so as to solve the above-mentioned problems in curved display devices.

[0006] The objectives of this invention are not limited to those described above, and other objectives and advantages not mentioned herein may be understood from the following description and will become clearer from the embodiments of the invention. Furthermore, it will be readily understood that the objectives and advantages of this specification can be achieved by the means and combinations thereof presented in the claims.

[0007] In a display panel according to an embodiment of this specification, a first lens is disposed in a first pixel region without curvature, a second lens is disposed in a second pixel region having a first curvature on one side of the first pixel region, and a third lens is disposed in a third pixel region having a second curvature on the other side of the first pixel region, and the second and third lenses are configured to partially overlap with each pixel.

[0008] Furthermore, in the display device according to the embodiments of this specification, in the display panel having the above configuration, the gamma driver applies a second gamma voltage lower than the first gamma voltage applied to the first pixel region to the second pixel region, and applies a third gamma voltage lower than the first gamma voltage to the third pixel region.

[0009] According to the embodiments in this specification, the viewing angle is effectively improved by adding a light-emitting device to each sub-pixel on the curved display panel and changing the corresponding lens configuration.

[0010] Furthermore, according to embodiments of this specification, the brightness difference of an image with applied curvature can be compensated by adjusting the width or thickness of the lens corresponding to each sub-pixel in the pixel region of the curved display panel with the applied curvature.

[0011] Furthermore, according to embodiments of this specification, by changing the configuration of the lens corresponding to each sub-pixel in the pixel region of the curved display panel with the applied curvature, the direction of light emitted from each light-emitting device can be controlled to a wide-angle region or a narrow-angle region, thereby adjusting the viewer's viewing angle.

[0012] Furthermore, according to the embodiments of this specification, since there is no optical loss due to the absence of an additional layer, optical efficiency can be improved.

[0013] Furthermore, according to embodiments of this specification, the lifespan of a display device can be improved by compensating for brightness differences in curved display panels.

[0014] Furthermore, according to the embodiments of this specification, by compensating for the brightness difference of the curved display panel, the viewer's viewing angle can be improved, and the lifespan of the display device product can be expected to be extended.

[0015] This specification may have other effects besides those described above, and those skilled in the art will clearly recognize these effects from the following description.

[0016] Along with the effects described above, specific effects of the invention will now be described, while specific matters for practicing the invention will be discussed. Attached Figure Description

[0017] Figure 1 This is a schematic diagram illustrating the configuration of the appearance shape of a display panel according to an embodiment of this specification.

[0018] Figure 2 This is a diagram illustrating an example in which sub-pixels and lenses are provided in the first to third regions of a display panel according to an embodiment of this specification.

[0019] Figure 3 This is a diagram showing an example of the arrangement of the lenses in the first pixel region and the second pixel region.

[0020] Figure 4 This is a diagram showing an example of the arrangement of the lenses in the first pixel region and the third pixel region.

[0021] Figure 5 This is a diagram showing the brightness distribution of the first sub-pixel through the first lens.

[0022] Figure 6This is a diagram showing the brightness distribution of the second sub-pixel through the second lens.

[0023] Figure 7 It is along Figure 2 A cross-sectional view of the first pixel region intercepted by line I-I'.

[0024] Figure 8 It is along Figure 2 A cross-sectional view of the second pixel region intercepted by line II-II'.

[0025] Figure 9 It is along Figure 2 A cross-sectional view of the third pixel region intercepted by line III-III'.

[0026] Figure 10 This is a diagram showing the equivalent circuit diagram of the pixel circuit for each sub-pixel.

[0027] Figure 11 This is a block diagram schematically illustrating the display device described in this specification.

[0028] Figure 12 This is a schematic diagram illustrating the wiring structure of the display panel.

[0029] Figures 13A to 13C This is a graph showing the gamma voltage, pulse width, and offset voltage used to compensate for the brightness differences of individual R, G, and B pixels.

[0030] Figure 14 This is a diagram showing an example of a display panel with odd and even lines.

[0031] Figure 15 This is a diagram showing an example of subpixels connected to odd-numbered lines.

[0032] Figure 16 This is a diagram showing an example of a subpixel connected to an even-numbered line.

[0033] Figure 17A and Figure 17B It is a perspective view showing the shape and structure of each lens. Detailed Implementation

[0034] The specific structural and functional descriptions of the embodiments of the present invention disclosed in the text are merely illustrative for the purpose of explaining the embodiments of the present invention, and the embodiments of the present invention can be implemented in various forms and should not be construed as limited to the embodiments described in the text.

[0035] This invention can be modified in various ways and can take many forms, and specific embodiments will be shown in the accompanying drawings and described in detail in the text. However, this is not intended to limit the invention to the specific forms disclosed, and it should be understood that all modifications, equivalents, or substitutions are included within the spirit and scope of the invention.

[0036] The above-described objects, features, and advantages will now be described in detail with reference to the accompanying drawings, so that those skilled in the art to which this invention pertain can readily practice the technical ideas of this invention.

[0037] Preferred embodiments of the invention will be described in detail below with reference to the accompanying drawings. In the drawings, the same reference numerals are used to refer to the same or similar parts.

[0038] Hereinafter, a display panel and a display device including the display panel according to embodiments of this specification will be described.

[0039] Figure 1 This is a schematic diagram illustrating the configuration of the appearance shape of a display panel according to an embodiment of this specification. Figure 2 This is a diagram illustrating an example in which sub-pixels and lenses are provided in the first to third regions of a display panel according to an embodiment of this specification.

[0040] Reference Figure 1 The display panel 10 according to the embodiments of this specification may include a first substrate 11 and a second substrate 12.

[0041] When viewed from the viewer's perspective, the first substrate 11 can be disposed on the front side, and the second substrate 12 can be disposed on the rear side.

[0042] When the display panel 10 is placed in the left or right direction, the first substrate 11 can be disposed on the top side and the second substrate 12 can be disposed on the bottom side, or the first substrate 11 can be disposed on the bottom side and the second substrate 12 can be disposed on the top side.

[0043] The first substrate 11 may include an upper glass, and the second substrate 12 may include a bottom glass.

[0044] The first substrate 11 and the second substrate 12 may, for example, be formed of a flexible material selected from the group consisting of polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyethylene phthalate, polycarbonate (PC), polyarylate, polyetherimide, polyether sulfonate, polyimide, or polyacrylate.

[0045] The first substrate 11 may include multiple pixel regions. The second substrate 12 may include multiple TFT regions. The multiple TFT regions may be disposed at positions corresponding to the multiple pixel regions.

[0046] The first substrate 11 can be correspondingly bonded to the second substrate 12 by an adhesive, for example. The first substrate 11 and the second substrate 12 can each be bent in the rearward direction. When bent in the rearward direction, compressive stress acts on the second substrate 12 disposed on the rear side, and tensile stress acts on the first substrate 11 disposed on the front side. When the first substrate 11 and the second substrate 12 are bent together in the rearward direction, the first substrate 11 is subjected to tensile stress.

[0047] Although not shown, the first substrate 11 may include an active area for displaying images.

[0048] The display panel 10 may include a first pixel area PA1, a second pixel area PA2, and a third pixel area PA3.

[0049] When viewed from the viewer's perspective, the first pixel region PA1 can be positioned in the center. The second pixel region PA2 can be positioned to one side or to the left of the first pixel region PA1, and the third pixel region PA3 can be positioned to the opposite side or to the right of the first pixel region PA1, and can be positioned relative to the first pixel region PA1 facing the second pixel region PA2. For example, when viewed from the viewer's perspective, the second pixel region PA2 can be located on the left, and the third pixel region PA3 can be located on the right.

[0050] The first pixel region PA1 can be in a flat state without bending or folding towards the front surface direction, which is the direction from which light is emitted from each sub-pixel. For example, the first pixel region PA1 is not subject to curvature so that it can be in a flat state without bending.

[0051] The second pixel region PA2 can be bent toward the rear surface with a first curvature CR1, and the third pixel region PA3 can be bent toward the rear surface with a second curvature CR2 in a manner symmetrical to the second pixel region PA2 in the lateral direction relative to the first pixel region PA1.

[0052] For example, the second pixel region PA2 can bend from the curvature reference line CRL toward the rear surface direction with a first curvature CR1, and the third pixel region PA3 can bend from the curvature reference line CRL toward the rear surface direction with a second curvature CR2.

[0053] The first curvature CR1 and the second curvature CR2 can have the same value. However, the embodiments in this specification are not limited to this, and for example, the first curvature CR1 and the second curvature CR2 can have different values.

[0054] Reference Figure 2The first pixel region PA1 may include the first sub-pixel region SP1, the second pixel region PA2 may include the second sub-pixel region SP2, and the third pixel region PA3 may include the third sub-pixel region SP3.

[0055] In the first sub-pixel region SP1, multiple first sub-pixels R1 and R1' can be set. In the second sub-pixel region SP2, multiple second sub-pixels R2 and R2' can be set. In the third sub-pixel region SP3, multiple third sub-pixels R3 and R3' can be set. Each of the multiple first sub-pixels R1 and R1', multiple second sub-pixels R2 and R2', and multiple third sub-pixels R3 and R3' can emit, for example, one of red light, green light, and blue light.

[0056] Multiple first lenses LZ1 and LZ1' can be configured to correspond to multiple first sub-pixels R1 and R1', respectively. For example, multiple first lenses LZ1 and LZ1' can be respectively disposed on multiple first sub-pixels R1 and R1'. Multiple first sub-pixels R1 and R1' can be configured to overlap with multiple first lenses LZ1 and LZ1', respectively.

[0057] Multiple second lenses LZ2 and LZ2' can be configured to correspond to multiple second sub-pixels R2 and R2', respectively. For example, multiple second lenses LZ2 and LZ2' can be configured to overlap with multiple second sub-pixels R2 and R2', respectively.

[0058] Multiple third lenses LZ3 and LZ3' can be configured to correspond to multiple third sub-pixels R3 and R3' respectively. For example, multiple third lenses LZ3 and LZ3' can be configured to overlap with multiple third sub-pixels R3 and R3' respectively.

[0059] The plurality of first sub-pixels R1, R1' may include the first-1 sub-pixel R1 and the first-2 sub-pixel R1'. The plurality of first lenses LZ1, LZ1' corresponding to them may include the first-1 lens LZ1 and the first-2 lens LZ1'.

[0060] The plurality of second sub-pixels R2, R2' may include the 2-1st sub-pixel R2 and the 2-2nd sub-pixel R2'. The plurality of second lenses LZ2, LZ2' corresponding to them respectively may include the 2-1st lens LZ2 and the 2-2nd lens LZ2'.

[0061] Multiple third sub-pixels R3 and R3' may include the 3-1st sub-pixel R3 and the 3-2nd sub-pixel R3'. The multiple third lenses LZ3 and LZ3' corresponding to them may include the 3-1st lens LZ3 and the 3-2nd lens LZ3'.

[0062] Multiple first lenses LZ1 and LZ1' can be respectively disposed on multiple first sub-pixels R1 and R1' so as to overlap with multiple first sub-pixels R1 and R1' respectively.

[0063] Unlike the multiple first lenses LZ1, LZ1', the multiple second lenses LZ2, LZ2' and the multiple third lenses LZ3, LZ3' can be configured to partially overlap with the multiple second sub-pixels R2, R2' and the multiple third sub-pixels R3, R3', respectively.

[0064] One of the multiple second sub-pixels R2 and R2', R2, can completely overlap with the second lens LZ2, while the other second sub-pixel R2' can only partially overlap with the second lens LZ2'. For example, one of the multiple second sub-pixels R2 and R2', R2, can completely overlap with the second-1 lens LZ2, thus being completely covered by the second-1 lens LZ2, while the second-2 sub-pixel R2' can only partially overlap with the second-2 lens LZ2', thus not being completely covered.

[0065] One of the multiple third sub-pixels R3 and R3', R3, can completely overlap with the third lens LZ3, while the other third sub-pixel R3' can only partially overlap with the third lens LZ3'. For example, one of the multiple third sub-pixels R3 and R3', R3, can completely overlap with the 3-1 lens LZ3, so that it is completely covered by the 3-1 lens LZ3, while the 3-2 sub-pixel R3' can only partially overlap with the 3-2 lens LZ3', so that it is not completely covered.

[0066] In the first pixel region PA1, multiple first sub-pixels R1 and R1' can overlap with multiple first lenses LZ1 and LZ1' respectively, such that each of them is completely covered by each of the multiple first lenses LZ1 and LZ1'.

[0067] For example, when the first-1 sub-pixel R1 has a circular shape, the entire circular shape of the first-1 sub-pixel R1 can overlap with the first-1 lens LZ1, such that the entire circular shape is covered by the first-1 lens LZ1. In this respect, when the first-1 lens LZ1 has a circular shape, the diameter of the first-1 lens LZ1 can be larger than the diameter of the first-1 sub-pixel R1.

[0068] Furthermore, when the first and second sub-pixels R1' also have a circular shape, the entire circular shape of the first and second sub-pixels R1' can overlap with the first and second lenses LZ1', so that the entire circular shape is covered by the first and second lenses LZ1'. In this respect, when the first and second lenses LZ1' have a circular shape, the diameter of the first and second lenses LZ1' can be larger than the diameter of the first and second sub-pixels R1'.

[0069] In the second pixel region PA2, one of the multiple second sub-pixels R2 and R2', the second sub-pixel R2 can overlap with a second lens LZ2, so that it is completely covered by the second lens LZ2, while the other second sub-pixel R2' can partially overlap with another second lens LZ2', so that it is partially covered by the second lens LZ2'.

[0070] For example, when the 2-1 sub-pixel R2 has a circular shape, the entire circular shape of the 2-1 sub-pixel R2 can overlap with the 2-1 lens LZ2, so that the entire circular shape is covered by the 2-1 lens LZ2. In this respect, when the 2-1 lens LZ2 has a circular shape, the diameter of the 2-1 lens LZ2 can be larger than the diameter of the 2-1 sub-pixel R2.

[0071] Furthermore, when the 2-2 sub-pixel R2' also has a circular shape, the entire circular shape may not be completely covered by the 2-2 lens LZ2', and for example, approximately six-sevenths of the circular shape of the 2-2 sub-pixel R2' may overlap with the 2-2 lens LZ2'. In this respect, when the 2-2 lens LZ2' has a circular shape, the diameter of the 2-2 lens LZ2' may be larger than the diameter of the 2-2 sub-pixel R2'.

[0072] In the third pixel region PA3, one of the multiple third sub-pixels R3 and R3', the third sub-pixel R3 can completely overlap with a single third lens LZ3, so that it is completely covered by the third lens LZ3, while the other third sub-pixel R3' can partially overlap with another third lens LZ3', so that it is partially covered by the third lens LZ3'.

[0073] For example, when the 3-1 sub-pixel R3 has a circular shape, the entire circular shape of the 3-1 sub-pixel R3 can overlap with the 3-1 lens LZ3, so that the entire circular shape is covered by the 3-1 lens LZ3. In this respect, when the 3-1 lens LZ3 has a circular shape, the diameter of the 3-1 lens LZ3 can be larger than the diameter of the 3-1 sub-pixel R3.

[0074] Furthermore, when the 3-2 sub-pixel R3' also has a circular shape, the entire circular shape may not be completely covered by the 3-2 lens LZ3', and for example, approximately six-sevenths of the circular shape of the 3-2 sub-pixel R3' may overlap with the 3-2 lens LZ3'. In this respect, when the 3-2 lens LZ3' has a circular shape, the diameter of the 3-2 lens LZ3' may be larger than the diameter of the 3-2 sub-pixel R3'.

[0075] Although in the above embodiments, the plurality of first sub-pixels R1, R1', the plurality of second sub-pixels R2, R2', the plurality of third sub-pixels R3, R3', the plurality of first lenses LZ1, LZ1', the plurality of second lenses LZ2, LZ2', and the plurality of third lenses LZ3, LZ3' are described as having a circular shape, the embodiments of this specification are not limited thereto, and can be implemented in various shapes, including elliptical, triangular, rectangular, pentagonal, or other polygonal shapes.

[0076] Multiple second sub-pixels R2 and R2' may include a second-1st sub-pixel R2 located on the outer periphery of one side of the second pixel region PA2 and a second-2nd sub-pixel R2' located near the first pixel region PA1.

[0077] Multiple third sub-pixels R3 and R3' may include the 3-1st sub-pixel R3 set on the outer periphery of the third pixel region PA3 and the 3-2nd sub-pixel R3' set on the first pixel region PA1.

[0078] The plurality of second lenses LZ2, LZ2' may include a second-1 lens LZ2 that overlaps with the second-1 sub-pixel R2 and a second-2 lens LZ2' that partially overlaps with the second-2 sub-pixel R2'.

[0079] The plurality of third lenses LZ3, LZ3' may include a third-first lens LZ3 that overlaps with the third-first sub-pixel R3 and a third-second lens LZ3' that partially overlaps with the third-second sub-pixel R3'.

[0080] Figure 3 This is a diagram illustrating an example arrangement of lenses corresponding to each sub-pixel in the first and second regions according to an embodiment of this specification, and Figure 4 This is a diagram illustrating an example arrangement of lenses corresponding to each sub-pixel in the first and third regions according to an embodiment of this specification.

[0081] Reference Figure 3 and Figure 4 The first pixel region PA1 is a flat region without the application of curvature CR, including the first-1 sub-pixel R1 and the first-2 sub-pixel R1', and also including the first-1 lens LZ1 and the first-2 lens LZ1' which overlap with and are correspondingly set with the first-1 sub-pixel R1 and the first-2 sub-pixel R1', respectively.

[0082] For example, in the first pixel region PA1 according to an embodiment of this specification, the first-1 sub-pixel R1 and the first-2 sub-pixel R1' may be disposed on the first insulating layer INL1 spaced apart from each other; the second insulating layer INL2 may be disposed on the first-1 sub-pixel R1 and the first-2 sub-pixel R1'; the partially open black matrix BM may be disposed on the second insulating layer INL2; the third insulating layer INL3 may be disposed on the black matrix BM; and the first-1 lens LZ1 and the first-2 lens LZ1' may be disposed on the third insulating layer INL3 spaced apart from each other.

[0083] The first-1 lens LZ1 can be set on the third insulating layer INL3 to correspond to the first-1 sub-pixel R1 and to overlap the first-1 sub-pixel R1 vertically.

[0084] The first and second lenses LZ1' can be set on the third insulating layer INL3 to correspond to the first and second sub-pixels R1' and overlap vertically with the first and second sub-pixels R1'.

[0085] The black matrix BM can open at the position where the first-1 lens LZ1 and the first-1 sub-pixel R1 overlap vertically with each other, and can also open at the position where the first-2 lens LZ1' and the first-2 sub-pixel R1' overlap vertically with each other.

[0086] The first light L1 emitted from the first-1 sub-pixel R1 can pass through the central part of the first-1 lens LZ1 and be output, and the first-2 light L1' emitted from the first-2 sub-pixel R1' can pass through the central part of the first-2 lens LZ1' and be output.

[0087] Reference Figure 3 The second pixel region PA2 is the region that bends from the curvature reference line CRL toward the rear surface direction with the first curvature CR1 when viewed by a viewer. It includes the second-1st sub-pixel R2 and the second-2nd sub-pixel R2', and also includes the second-1st lens LZ2 and the second-2nd lens LZ2' that overlap with and are respectively set with the sub-pixels.

[0088] For example, in the second pixel region PA2 according to an embodiment of this specification, the second-1st sub-pixel R2 and the second-2nd sub-pixel R2' may be disposed on the first insulating layer INL1 spaced apart from each other; the second insulating layer INL2 may be disposed on the second-1st sub-pixel R2 and the second-2nd sub-pixel R2'; the partially open black matrix BM may be disposed on the second insulating layer INL2; the third insulating layer INL3 may be disposed on the black matrix BM; and the second-1st lens LZ2 and the second-2nd lens LZ2' may be disposed on the third insulating layer INL3 spaced apart from each other.

[0089] The second-1 lens LZ2 can be set on the third insulating layer INL3 to correspond to the second-1 sub-pixel R2 and to overlap the second-1 sub-pixel R2 vertically.

[0090] The second-second lens LZ2' can be configured on the third insulating layer INL3 to correspond to and partially vertically overlap with the second-second sub-pixel R2'. The second-second lens LZ2' can be configured to be shifted from the second-second sub-pixel R2' by a predetermined distance, such as a first distance d1, in the direction toward the first pixel region PA1.

[0091] The black matrix BM can open at the position where the 2-1 lens LZ2 and the 2-1 sub-pixel R2 overlap vertically with each other, and can also open at the position where the 2-2 lens LZ2' and the 2-2 sub-pixel R2' partially overlap vertically with each other.

[0092] The second-1 light L2 emitted from the second-1 sub-pixel R2 can pass through the central portion of the second-1 lens LZ2 and be output, and the second-2 light L2' emitted from the second-2 sub-pixel R2' can pass through the second-2 lens LZ2' at an angle slightly deviated from the central portion of the second-2 lens LZ2' toward the first pixel region PA1 and be output.

[0093] Reference Figure 4 The third pixel region PA3 is the region that bends from the curvature reference line CRL toward the rear surface direction with the second curvature CR2 when viewed by a viewer. It includes the 3-1 sub-pixel R3 and the 3-2 sub-pixel R3', and also includes the 3-1 lens LZ3 and the 3-2 lens LZ3' that are respectively arranged and overlapped with the sub-pixels.

[0094] For example, in the third pixel region PA3 according to an embodiment of this specification, the 3-1st sub-pixel R3 and the 3-2nd sub-pixel R3' may be disposed on the first insulating layer INL1 spaced apart from each other; the second insulating layer INL2 may be disposed on the 3-1st sub-pixel R3 and the 3-2nd sub-pixel R3'; the partially open black matrix BM may be disposed on the second insulating layer INL2; the third insulating layer INL3 may be disposed on the black matrix BM; and the 3-1st lens LZ3 and the 3-2nd lens LZ3' may be disposed on the third insulating layer INL3 spaced apart from each other.

[0095] The 3-1 lens LZ3 can be set on the third insulating layer INL3 to correspond to the 3-1 sub-pixel R3 and to overlap the 3-1 sub-pixel R3 vertically.

[0096] The third-second lens LZ3' can be configured on the third insulating layer INL3 to correspond to and partially vertically overlap with the third-second sub-pixel R3'. The third-second lens LZ3' can be configured to be shifted from the third-second sub-pixel R3' toward the first pixel region PA1 by a specified distance, such as a second distance d2.

[0097] The black matrix BM can open at the position where the 3-1 lens LZ3 and the 3-1 sub-pixel R3 overlap vertically with each other, and can also open at the position where the 3-2 lens LZ3' and the 3-2 sub-pixel R3' partially overlap vertically with each other.

[0098] The 3-1 light L3 emitted from the 3-1 sub-pixel R3 can pass through the central portion of the 3-1 lens LZ3 and be output, and the 3-2 light L3' emitted from the 3-2 sub-pixel R3' can pass through the 3-2 lens LZ3' at an angle slightly deviated from the central portion of the 3-2 lens LZ3' toward the first pixel region PA1 and be output.

[0099] Multiple first sub-pixels R1, R1', multiple second sub-pixels R2, R2', and multiple third sub-pixels R3, R3' may each have the same size, area, and thickness. However, the embodiments in this specification are not limited thereto. Multiple first sub-pixels R1, R1', multiple second sub-pixels R2, R2', and multiple third sub-pixels R3, R3' may each have different sizes, areas, and thicknesses.

[0100] Multiple first lenses LZ1, LZ1', multiple second lenses LZ2, LZ2', and multiple third lenses LZ3, LZ3' may each have the same shape, diameter CD, thickness, and length. However, the embodiments in this specification are not limited thereto. Multiple first lenses LZ1, LZ1', multiple second lenses LZ2, LZ2', and multiple third lenses LZ3, LZ3' may each have different shapes, diameter CD, thickness, and length. Alternatively, multiple first lenses LZ1, LZ1', multiple second lenses LZ2, LZ2', and multiple third lenses LZ3, LZ3' may each have the same shape but different diameter CD, thickness, and length.

[0101] When the second lenses LZ2 and LZ2' are hemispherical, the diameter CD, thickness, and length of the second-2 lens LZ2' can each have larger values ​​than the diameter CD, thickness, and length of the second-1 lens LZ2.

[0102] When the third lenses LZ3 and LZ3' are hemispherical, the diameter CD, thickness, and length of the third-1 lens LZ3 can each have larger values ​​than the diameter CD, thickness, and length of the third-2 lens LZ3'.

[0103] Reference Figure 3 and Figure 4 According to embodiments of this specification, the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3 may include: a first insulating layer INL1; a plurality of first sub-pixels R1, R1', a plurality of second sub-pixels R2, R2', and a plurality of third sub-pixels R3, R3' on the first insulating layer; a second insulating layer INL2 on the plurality of first sub-pixels, the plurality of second sub-pixels, and the plurality of third sub-pixels; a black matrix BM partially open on the second insulating layer; a third insulating layer INL3 on the black matrix; and a plurality of first lenses LZ1, LZ1', a plurality of second lenses LZ2, LZ2', and a plurality of third lenses LZ3, LZ3' on the third insulating layer.

[0104] The black matrix BM may include multiple first openings, multiple second openings, and multiple third openings. The multiple first openings are respectively positioned to correspond to multiple first sub-pixels R1 and R1', the multiple second openings are respectively positioned to correspond to multiple second sub-pixels R2 and R2', and the multiple third openings are respectively positioned to correspond to multiple third sub-pixels R3 and R3'. In the accompanying drawings, reference numerals indicating the first openings, second openings, and third openings are not shown.

[0105] In the second pixel region PA2, one of the plurality of second sub-pixels R2, R2' may overlap with one of the plurality of second openings, and another of the plurality of second sub-pixels R2, R2' may partially overlap with another of the plurality of second openings. In the third pixel region PA3, one of the plurality of third sub-pixels R3, R3' may overlap with one of the plurality of third openings, and another of the plurality of third sub-pixels R3, R3' may partially overlap with another of the plurality of third openings.

[0106] Figure 5 This is a diagram illustrating the brightness distribution of a first lens through a first sub-pixel disposed in a first pixel region according to an embodiment of this specification, and Figure 6 This is a diagram illustrating the brightness distribution of a second lens through a second sub-pixel disposed in a second pixel region according to an embodiment of this specification.

[0107] Reference Figure 5 The first lens LZ1 can be set to be perpendicular to and overlap with the first (1-1) sub-pixel R1.

[0108] The first lens LZ1 may have a first width CD1, and the width of the first (1-1)th sub-pixel R1 may be smaller than the first width CD1. For example, the first lens LZ1 may be configured to completely cover the first (1-1)th sub-pixel R1.

[0109] Light emitted from sub-pixel R1 can pass through the center of the first lens LZ1 at an emission angle of 0° and be output. When the center position of sub-pixel R1 coincides with the center position of the first lens LZ1 and the emitted light is output at an emission angle of 0°, the light emitted from sub-pixel R1 can have the highest brightness value, for example, 10 nits or greater.

[0110] Reference Figure 3 and Figure 6 In the second pixel region PA2, when the display panel 10 bends from the curvature reference line CRL with the first curvature CR1, the second-1 lens LZ2 can be set to correspond vertically to and overlap with the second-1 sub-pixel R2, and the second-2 lens LZ2' can be set to correspond vertically to and overlap with the second-2 sub-pixel R2'.

[0111] Light emitted from sub-pixel R2 can pass through lens LZ2 and be output. Light emitted from sub-pixel R2' can pass through lens LZ2' and be output.

[0112] like Figure 6 As shown in (a), the second-first lens LZ2 and the second-second lens LZ2' can have the same first width CD1 and the same first thickness t1. In addition, the second-first sub-pixel R2 and the second-second sub-pixel R2' can have the same width and thickness.

[0113] Therefore, the light emitted from sub-pixel 2-1 R2 and the light emitted from sub-pixel 2-2 R2' can have different brightness values. For example, the light emitted from sub-pixel 2-1 R2 can have a brightness value of 10 nits or greater, and the light emitted from sub-pixel 2-2 R2' can have a brightness value of less than 10 nits.

[0114] like Figure 6 As shown in (b), in the display panel, a second-1 sub-pixel R2 and a second-3 sub-pixel R2” can be set, the second-1 lens LZ2 can be set to be perpendicularly corresponding to and overlapping with the second-1 sub-pixel R2, and the second-3 lens LZ2” can be set to be perpendicularly corresponding to and partially overlapping with the second-3 sub-pixel R2”.

[0115] In this respect, the second-third lens LZ2” can be set to be shifted a first distance d1 from the second-third sub-pixel R2” toward the first pixel region PA1, so that only a portion overlaps instead of all overlaps.

[0116] Light emitted from sub-pixel 2-1 R2 can pass through lens 2-1 LZ2 and be output, and light emitted from sub-pixel 2-3 R2” can pass through lens 2-3 LZ2” and be output.

[0117] like Figure 6 As shown in (b), the second-first lens LZ2 may have a first width CD1 and a first thickness t1, while the second-third lens LZ2” may have a second width CD2 and a second thickness t2. Furthermore, the second-first sub-pixel R2 and the second-third sub-pixel R2” may have different widths. Here, the second width CD2 may have a larger value than the first width CD1, and the second thickness t2 may have a larger value than the first thickness t1.

[0118] Therefore, the second-third lens LZ2” can have a larger second width CD2 and a larger second thickness t2 than the second-first lens LZ2, and the second-third sub-pixel R2” can have a larger width than the second-first sub-pixel R2.

[0119] Therefore, the light emitted from sub-pixel 2-1 R2 and the light emitted from sub-pixel 2-3 R2” can have the same brightness value. For example, the light emitted from sub-pixel 2-1 R2 can have a brightness value of 10 nits or greater, and the light emitted from sub-pixel 2-3 R2” can have the same brightness value of 10 nits or greater.

[0120] Reference Figure 6 In the second pixel region PA2, when bent with a first curvature CR1, as shown in (a), light emitted from subpixels of the same size will have different brightness values ​​when passing through lenses of the same size. However, as shown in (b), by placing a larger subpixel and lens at the same position, light emitted from subpixels of different sizes can have the same brightness value when passing through lenses of different sizes. In other words, it can be seen that although subpixels 2-2' and 2-3'' are located at the same position, the brightness value can increase depending on the size of the subpixel and the size of the lens.

[0121] Figure 7 It is according to the embodiments of this specification along Figure 2 A cross-sectional view of the first pixel region intercepted by line I-I'; Figure 8 It is according to the embodiments of this specification along Figure 2 A cross-sectional view of the second pixel region intercepted by line II-II'; and Figure 9 It is according to the embodiments of this specification along Figure 2 A cross-sectional view of the third pixel region intercepted by line III-III'.

[0122] Reference Figure 7According to an embodiment of this specification, the first pixel region PA1 may include a light-emitting transistor T4, a first-1 sub-pixel R1 and a first-2 sub-pixel R1' connected to the light-emitting transistor T4, and a plurality of first-1 lenses LZ1 and a plurality of first-2 lenses LZ1' respectively configured to overlap with the first-1 sub-pixel R1 and the first-2 sub-pixel R1'.

[0123] In the display panel according to embodiments of this specification, the circuit element layer disposed on the second substrate 12 may include a plurality of insulating layers stacked on the second substrate 12. For example, the plurality of insulating layers may include a buffer layer BUF, a gate insulating layer GI, an interlayer insulating layer IL, a protective layer PL, and a planarization layer PLN.

[0124] The second substrate 12 may comprise an insulating material such as glass or plastic. The plastic substrate may be formed of a flexible material. For example, the second substrate 12 may comprise at least one organic insulating material selected from acrylic resins, epoxy resins, siloxane resins, polyimide resins, or polyamide resins.

[0125] The buffer layer BUF can have a single-layer or multi-layer structure and contains inorganic insulating materials such as silicon oxide (SiOx), silicon nitride (SiNx), or aluminum oxide (Al2O3). The buffer layer BUF can prevent impurities such as hydrogen from penetrating through the substrate 12 into the semiconductor layer ACT.

[0126] The light-emitting transistor T4 can be placed on the buffer layer BUF.

[0127] The light-emitting transistor T4 includes a semiconductor layer ACT, a gate GE, a source SE, and a drain DE disposed on a buffer layer BUF. A gate insulating layer GI is disposed between the semiconductor layer ACT and the gate GE. An interlayer insulating layer IL is disposed between the gate GE and the source SE and drain DE. The source SE and drain DE of the light-emitting transistor T4 can be connected to the source region and drain region of the semiconductor layer ACT, respectively, through contact holes penetrating both the interlayer insulating layer IL and the gate insulating layer GI.

[0128] The semiconductor layer ACT may comprise polycrystalline silicon or oxide semiconductor materials. The semiconductor layer ACT may comprise low-temperature polycrystalline silicon (LTPS). The semiconductor layer ACT may also comprise at least one oxide semiconductor material selected from IZO (InZnO), IGO (InGaO), ITO (InSnO), IGZO (InGaZnO), IGZTO (InGaZnSnO), GZTO (GaZnSnO), GZO (GaZnO), and ITZO (InSnZnO). A light-shielding layer (not shown) may be further disposed beneath the semiconductor layer ACT.

[0129] The gate insulating layer GI can contain inorganic insulating materials, such as silicon oxide (SiOx) and silicon nitride (SiNx). The gate insulating layer GI can also contain materials with high dielectric constants. For example, the gate insulating layer GI can contain high-k materials such as hafnium oxide (HfO). The gate insulating layer GI can have a multilayer structure.

[0130] A gate line (not shown) connected to the gate GE can be provided on the gate insulating layer GI.

[0131] The interlayer insulation layer IL can contain inorganic insulating materials such as silicon oxide (SiOx) and silicon nitride (SiNx). The interlayer insulation layer IL can have a multilayer structure.

[0132] Data lines (not shown) and power lines (not shown) connected to the source SE or drain DE can be provided on the interlayer insulation layer IL.

[0133] On the light-emitting transistor T4, a protective layer PL and a planarization layer PLN can be stacked. The protective layer PL can contain inorganic insulating materials, such as silicon oxide (SiOx) and silicon nitride (SiNx). The planarization layer PLN can include the protective layer PL and other organic insulating materials, and provides a planar surface.

[0134] A light-emitting device layer including the first-1 sub-pixel R1 and the first-2 sub-pixel R1' can be disposed on the planarization layer PLN.

[0135] Sub-pixel R1 (first-1) includes a first electrode AE ​​disposed on the planarization layer PLN, a light-emitting layer EL disposed on the first electrode AE, and a second electrode CE disposed on the light-emitting layer EL. Sub-pixel R1' (first-2) includes a first electrode AE' disposed on the planarization layer PLN, a light-emitting layer EL' disposed on the first electrode AE', and a second electrode CE' disposed on the light-emitting layer EL'. For example, sub-pixel R1 (first-1) and sub-pixel R1' (first-2) disposed in the first pixel region PA1 can emit the same red light.

[0136] The first electrode AE ​​of sub-pixel 1-1 R1 can be connected to the source SE or drain DE of light-emitting transistor T4 through a contact hole penetrating the planarization layer PLN and the protective layer PL. The first electrode AE' of sub-pixel 1-2 R1' can be connected to the source SE or drain DE of light-emitting transistor T4 through a contact hole penetrating the planarization layer PLN and the protective layer PL. The first electrode AE ​​of sub-pixel 1-1 R1 and the first electrode AE' of sub-pixel 1-2 R1' can be integrally formed in the same layer. That is, the first electrode AE' of sub-pixel 1-2 R1' can be formed by extending from the first electrode AE ​​of sub-pixel 1-1 R1. However, the embodiments of this specification are not limited to this. For example, the first electrode AE ​​of sub-pixel 1-1 R1 and the first electrode AE' of sub-pixel 1-2 R1' can be spaced apart from each other by a predetermined distance.

[0137] The first electrodes AE and AE' may comprise a conductive material with high reflectivity. The first electrodes AE and AE' may comprise metals, such as aluminum (Al), silver (Ag), titanium (Ti), or an alloy of silver-palladium-copper (APC). The first electrodes AE and AE' may further comprise a transparent conductive material, such as ITO (indium tin oxide) or IZO (indium zinc oxide). For example, the first electrodes AE and AE' may have a multilayer structure of titanium (Ti) and aluminum (Al) (Ti / Al / Ti), a multilayer structure of ITO and aluminum (Al) (ITO / Al / ITO), or a multilayer structure of ITO and APC (ITO / APC / ITO). For example, the first electrodes AE and AE' may be an anode.

[0138] The light-emitting layers EL and EL' may include a light-emitting material layer EML containing a light-emitting material. The light-emitting material may contain organic, inorganic, or mixed materials. The light-emitting layer EL of the first-1 sub-pixel R1 and the light-emitting layer EL' of the first-2 sub-pixel R1' may be formed integrally. That is, the light-emitting layer EL' of the first-2 sub-pixel R1' can be formed by extending from the light-emitting layer EL of the first-1 sub-pixel R1. However, the embodiments in this specification are not limited to this. For example, the light-emitting layer EL of the first-1 sub-pixel R1 and the light-emitting layer EL' of the first-2 sub-pixel R1' may be spaced apart by a predetermined distance. This prevents light emission caused by leakage current.

[0139] The light-emitting layers EL and EL' can have a multilayer structure. For example, the light-emitting layers EL and EL' can further include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0140] The second electrodes CE and CE' may contain a light-transmitting conductive material. The second electrodes CE and CE' may contain a transparent conductive material, such as ITO (indium tin oxide) or IZO (indium zinc oxide). The second electrodes CE and CE' may contain aluminum (Al), magnesium (Mg), silver (Ag), or alloys thereof, and may be of a thin thickness capable of transmitting light. Therefore, light generated in each of the second electrodes CE and CE' can be emitted through each of the second electrodes CE and CE'.

[0141] The first electrode AE ​​of sub-pixel 1-1 R1 and the first electrode AE' of sub-pixel 1-2 R1' can be formed integrally. That is, the first electrode AE' of sub-pixel 1-2 R1' can be formed on the planarization layer PLN by extending from the first electrode AE ​​of sub-pixel 1-1 R1. However, the embodiments of this specification are not limited to this. For example, the first electrode AE ​​of sub-pixel 1-1 R1 and the first electrode AE' of sub-pixel 1-2 R1' can be spaced apart from each other by a predetermined distance in the same layer.

[0142] On the first electrode AE ​​of the integrally formed first electrode 1-1 sub-pixel R1 and the first electrode AE' of the first electrode 1-2 sub-pixel R1', the embankment layer BNK can be disposed between the light-emitting layer EL of the first electrode 1-1 sub-pixel R1 and the light-emitting layer EL' of the first electrode 1-2 sub-pixel R1'. That is, the light-emitting layer EL of the first electrode 1-1 sub-pixel R1 and the light-emitting layer EL' of the first electrode 1-2 sub-pixel R1' can be separated and distinguished by the embankment layer BNK.

[0143] The dam layer BNK can cover the edge of each of the first electrodes AE and AE'. The dam layer BNK can contain organic insulating material. The dam layer BNK can include a planarization layer PLN and other organic materials, and can have a single-layer or double-layer structure.

[0144] The dam layer BNK may have first electrodes AE and AE' through exposed openings, thereby defining a first-1 light-emitting region and a first-2 light-emitting region. In an embodiment, the dam layer BNK may have a first electrode AE ​​of the first-1 sub-pixel R1 through exposed openings, thereby defining a first-1 light-emitting region. In an embodiment, the dam layer BNK may have a first electrode AE' of the first-2 sub-pixel R1' through exposed openings, thereby defining a first-2 light-emitting region.

[0145] The light-emitting layer EL and the second electrode CE of the first-1 sub-pixel R1 can be stacked on the first electrode AE ​​exposed through the opening of the dam layer BNK. The light-emitting layer EL' and the second electrode CE' of the first-2 sub-pixel R1' can be stacked on the first electrode AE' exposed through the opening of the dam layer BNK. In this respect, as described above, the two first electrodes AE and AE' are integrally formed, and the two light-emitting layers EL and EL' are also integrally formed.

[0146] The second electrode CE of sub-pixel 1-1 R1 can be a common electrode electrically connected to the second electrode CE' of sub-pixel 1-2 R1'. The second electrode CE of sub-pixel 1-1 R1 and the second electrode CE' of sub-pixel 1-2 R1' can be integrally formed on the embankment layer BNK and the light-emitting layers EL, EL'. The second electrode CE' of sub-pixel 1-2 R1' can be formed on the embankment layer BNK and the light-emitting layer EL' by extending from the second electrode CE of sub-pixel 1-1 R1.

[0147] In the first pixel region PA1, an encapsulation layer EnCap may be provided on the light-emitting device layer including the first-1 sub-pixel R1 and the first-2 sub-pixel R1'. The encapsulation layer EnCap can prevent damage to the light-emitting layers EL and EL' caused by external moisture and impact. The encapsulation layer EnCap can have a multi-layer structure. For example, the encapsulation layer EnCap may include the first encapsulation layer EnC1, the second encapsulation layer EnC2, and the third encapsulation layer EnC3 stacked in the order of first encapsulation layer EnC1, second encapsulation layer EnC2, and third encapsulation layer EnC3, but the embodiments of this specification are not limited thereto. The first encapsulation layer EnC1, the second encapsulation layer EnC2, and the third encapsulation layer EnC3 may contain insulating materials. The second encapsulation layer EnC2 may contain a different material than the first encapsulation layer EnC1 and the third encapsulation layer EnC3. For example, the first encapsulation layer EnC1 and the third encapsulation layer EnC3 may be inorganic encapsulation layers containing inorganic insulating materials, while the second encapsulation layer EnC2 may be an organic encapsulation layer containing organic insulating materials. As a result, the light-emitting layers EL and EL' of the display device can be more effectively protected from damage caused by external moisture and impact.

[0148] In the first pixel region PA1, on top of the encapsulation layer EnCap, a lens layer including a first-1 lens LZ1 and a first-2 lens LZ1' can be provided. The first-1 lens LZ1 and the first-2 lens LZ1' can have the same shape, the same width CD1, and the same thickness t1.

[0149] Lens LZ1 (1-1) can be disposed on the encapsulation layer EnCap, such that it overlaps with sub-pixel R1 (1-1). In other words, lens LZ1 (1-1) can be disposed such that it completely overlaps with the first electrode AE, the light-emitting layer EL, and the second electrode CE of sub-pixel R1 (1-1).

[0150] The first and second lenses LZ1' can be disposed on the encapsulation layer EnCap, such that they overlap with the first and second sub-pixels R1'. In other words, the first and second lenses LZ1' can be configured to completely overlap with the first electrode AE', the light-emitting layer EL', and the second electrode CE' of the first and second sub-pixels R1'.

[0151] In the first pixel region PA1, a lens protection layer LZP may be provided on the first-1 lens LZ1 and the first-2 lens LZ1'. The lens protection layer LZP may contain an organic insulating material. The refractive index of the lens protection layer LZP may be less than that of the first-1 lens LZ1 and the first-2 lens LZ1'. As a result, light passing through the first-1 lens LZ1 and the first-2 lens LZ1' can be prevented from being reflected towards the substrate 12 due to the difference in refractive index with the lens protection layer LZP.

[0152] Reference Figure 8 According to an embodiment of this specification, the second pixel region PA2 may include a light-emitting transistor T4, a second-1 sub-pixel R2 and a second-2 sub-pixel R2' connected to the light-emitting transistor T4, and a plurality of second-1 lenses LZ2 and a plurality of second-2 lenses LZ2' respectively configured to overlap with the second-1 sub-pixel R2 and the second-2 sub-pixel R2'.

[0153] exist Figure 8 In this embodiment, the light-emitting layer EL of the second-1st sub-pixel R2 and the light-emitting layer EL' of the second-2nd sub-pixel R2' can be formed integrally. That is, the light-emitting layer EL' of the second-2nd sub-pixel R2' can be formed by extending from the light-emitting layer EL of the second-1st sub-pixel R2. However, the embodiments in this specification are not limited to this. For example, the light-emitting layer EL of the second-1st sub-pixel R2 and the light-emitting layer EL' of the second-2nd sub-pixel R2' can be spaced apart by a predetermined distance.

[0154] exist Figure 8 In this embodiment, the first electrode AE ​​of the 2-1 sub-pixel R2 and the first electrode AE' of the 2-2 sub-pixel R2' can be integrally formed. That is, the first electrode AE' of the 2-2 sub-pixel R2' can be formed by extending from the first electrode AE ​​of the 2-1 sub-pixel R2. However, the embodiments of this specification are not limited to this. For example, the first electrode AE ​​of the 2-1 sub-pixel R2 and the first electrode AE' of the 2-2 sub-pixel R2' can be spaced apart from each other by a predetermined distance in the same layer.

[0155] exist Figure 8 In this embodiment, the second electrode CE of the 2-1 sub-pixel R2 and the second electrode CE' of the 2-2 sub-pixel R2' can be formed integrally. That is, the second electrode CE' of the 2-2 sub-pixel R2' can be formed by extending from the second electrode CE of the 2-1 sub-pixel R2. However, the embodiments of this specification are not limited to this. For example, the second electrode CE of the 2-1 sub-pixel R2 and the second electrode CE' of the 2-2 sub-pixel R2' can be spaced apart from each other by a predetermined distance in the same layer.

[0156] exist Figure 8 In the middle, the pair will be omitted. Figure 7 The description shows components that are positioned in the same location and have the same structure. For example, Figure 8 The 2-1st sub-pixel R2 in the image corresponds to Figure 7 The first-1 sub-pixel R1 in the image has the same structure, and the second-2 sub-pixel R2' corresponds to... Figure 7 The first and second sub-pixels R1' in the model have the same structure, so the description of these components will be omitted.

[0157] exist Figure 8 In the encapsulation layer EnCap, the second-1 lens LZ2 can be configured to correspond to and overlap with the second-1 sub-pixel R2, and the second-2 lens LZ2' can be configured to correspond to and overlap with the second-2 sub-pixel R2'.

[0158] In this respect, the second-1 lens LZ2 and the second-2 lens LZ2' can have the same first width CD1.

[0159] However, the second-1 lens LZ2 and the second-2 lens LZ2' can have different thicknesses t1 and t2. For example, the second-1 lens LZ2 can have a first thickness t1, but the second-2 lens LZ2' can have a second thickness t2 that is greater than the first thickness t1.

[0160] The second-first lens LZ2 can be configured to overlap with the second-first sub-pixel R2, so that it can completely cover the second-first sub-pixel R2. For example, the second-first lens LZ2 can be configured to overlap with the second-first sub-pixel R2, so that it can completely cover the first electrode AE, the light-emitting layer EL, and the second electrode CE of the second-first sub-pixel R2.

[0161] The second-2 lens LZ2' may not completely overlap with the second-2 sub-pixel R2', but may be configured to shift a first distance d1 from one side of the second-2 sub-pixel R2' toward the first pixel region PA so as to partially overlap with the second-2 sub-pixel R2'.

[0162] Reference Figure 9 According to an embodiment of this specification, the third pixel region PA3 may include a light-emitting transistor T4, a third-1st sub-pixel R3 and a third-2nd sub-pixel R3' connected to the light-emitting transistor T4, and a plurality of third-1st lenses LZ3 and a plurality of third-2nd lenses LZ3' respectively configured to overlap with the third-1st sub-pixel R3 and the third-2nd sub-pixel R3'.

[0163] exist Figure 9 In this embodiment, the light-emitting layer EL of the 3-1st sub-pixel R3 and the light-emitting layer EL' of the 3-2nd sub-pixel R3' can be formed integrally. That is, the light-emitting layer EL' of the 3-2nd sub-pixel R3' can be formed by extending from the light-emitting layer EL of the 3-1st sub-pixel R3. However, the embodiments in this specification are not limited to this. For example, the light-emitting layer EL of the 3-1st sub-pixel R3 and the light-emitting layer EL' of the 3-2nd sub-pixel R3' can be spaced apart by a predetermined distance.

[0164] exist Figure 9 In this embodiment, the first electrode AE ​​of the 3-1 sub-pixel R3 and the first electrode AE' of the 3-2 sub-pixel R3' can be integrally formed. That is, the first electrode AE' of the 3-2 sub-pixel R3' can be formed by extending from the first electrode AE ​​of the 3-1 sub-pixel R3. However, the embodiments of this specification are not limited to this. For example, the first electrode AE ​​of the 3-1 sub-pixel R3 and the first electrode AE' of the 3-2 sub-pixel R3' can be spaced apart from each other by a predetermined distance in the same layer.

[0165] exist Figure 9 In this embodiment, the second electrode CE of the 3-1 sub-pixel R3 and the second electrode CE' of the 3-2 sub-pixel R3' can be integrally formed. That is, the second electrode CE' of the 3-2 sub-pixel R3' can be formed by extending from the second electrode CE of the 3-1 sub-pixel R3. However, the embodiments of this specification are not limited to this. For example, the second electrode CE of the 3-1 sub-pixel R3 and the second electrode CE' of the 3-2 sub-pixel R3' can be spaced apart from each other by a predetermined distance in the same layer.

[0166] exist Figure 9 In the middle, the pair will be omitted. Figure 7 and Figure 8 The description of components shown is of components positioned in the same location and having the same structure. For example, Figure 9 The 3-1st sub-pixel R3 corresponds to Figure 8 The second-to-first sub-pixel R2 in the image has the same structure, and the third-to-second sub-pixel R3' corresponds to... Figure 8 The second-to-second sub-pixel R2' in the image has the same structure, so the description of these components will be omitted.

[0167] exist Figure 9In the encapsulation layer EnCap, the 3-1 lens LZ3 can be set to correspond to and overlap with the 3-1 sub-pixel R3, and the 3-2 lens LZ3' can be set to correspond to and overlap with the 3-2 sub-pixel R3'.

[0168] In this respect, the 3-1 lens LZ3 and the 3-2 lens LZ3' can have the same first width CD1.

[0169] However, the third-first lens LZ3 and the third-second lens LZ3' can have different thicknesses t1 and t2. For example, the third-first lens LZ3 can have a first thickness t1, while the third-second lens LZ3' can have a second thickness t2 that is greater than the first thickness t1.

[0170] The third-first lens LZ3 can be configured to overlap with the third-first sub-pixel R3, such that the third-first lens LZ3 can completely cover the third-first sub-pixel R3. For example, the third-first lens LZ3 can be configured to overlap with the third-first sub-pixel R3, such that the third-first lens LZ3 can completely cover the first electrode AE, the emission layer EL, and the second electrode CE of the third-first sub-pixel R3.

[0171] The third-second lens LZ3' may not completely overlap with the third-second sub-pixel R3', but may be set to shift a second distance d2 from one side of the third-second sub-pixel R3' toward the first pixel region PA so as to partially overlap with the third-second sub-pixel R3'.

[0172] Figure 10 This is a diagram illustrating the pixel circuitry for each sub-pixel according to an embodiment of this specification.

[0173] Reference Figure 10 According to the embodiments of this specification, the pixel circuit of each sub-pixel R1, R1', R2, R2', R3, R3' can be connected to the light-emitting transistor T4 on one side and to the low potential voltage VSS on the other side.

[0174] The first electrode of the light-emitting transistor T4 can be either the source or the drain, and the second electrode of the light-emitting transistor T4 can be either the source or the drain.

[0175] Each sub-pixel R1, R1', R2, R2', R3, R3' can be supplied with a high-potential voltage VDD, a low-potential voltage VSS, an initialization voltage VINI, and an anode reset voltage VAR, and can receive scan signals Scan(n), Scan(n-1), emission signal EM(n), and data voltage signal Vdata as input. Additionally, although not shown, each sub-pixel R1, R1', R2, R2', R3, R3' can be supplied with an on-bias stress (OBS) voltage Vobs.

[0176] A pixel circuit may include an organic light-emitting diode (OLED), a driving TFT DT, a capacitor Cst, a first TFT T1, a second TFT T2, a third TFT T3, a fourth TFT T4, a fifth TFT T5, and a sixth TFT T6.

[0177] Each TFT can be constructed from a p-type MOSFET (PMOS) or an n-type MOSFET (NMOS). For example, the driving TFT DT, the first TFT T1 to the sixth TFT T6 can be implemented with a p-type MOSFET (PMOS), and the remaining TFTs can be implemented with an n-type MOSFET (NMOS), but the present invention is not limited thereto.

[0178] Each of the sub-pixels R1, R1', R2, R2', R3, and R3' can comprise each of the OLEDs. The OLED emits light by a driving current supplied from the driving TFT DT. The anode of the OLED is connected to the fourth node N4, and the cathode of the OLED is connected to a line supplied with a low potential voltage VSS.

[0179] The third TFT T3 and the fourth TFT T4 can be light-emitting control transistors used to control the light emission of the OLED. They can be simply referred to as "light-emitting transistors".

[0180] The driving TFT DT has a gate connected to a third node N3, a first electrode connected to a first node N1, and a second electrode connected to a second node N2. The driving TFT DT can generate a drive current in response to a data voltage signal Vdata. The driving TFT DT can be a p-type MOSFET (PMOS) and can be implemented as a low-temperature polycrystalline silicon (LTPS) thin-film transistor.

[0181] The third TFT T3 and the fourth TFT T4 are used to control the light emission of the OLED. The third TFT T3 and the fourth TFT T4 are controlled so that they can be simultaneously turned on / off according to the light emission signal EM(n) simultaneously input to each gate. The third TFT T3 has a first electrode connected to a high potential voltage VDD and a second electrode connected to a first node N1. The third TFT T3 can be used to transfer the high potential voltage VDD to the first electrode of the driving TFT DT in response to the light emission signal EM(n). The fourth TFT T4 can have a first electrode connected to a second node N2 and a second electrode connected to a fourth node N4. The fourth TFT T4 can be used to transfer a driving current to the anode of the OLED in response to the light emission signal EM(n). The third TFT T3 and the fourth TFT T4 can be p-type MOSFETs (PMOS) and can be implemented as low-temperature polycrystalline silicon (LTPS) thin-film transistors.

[0182] The storage capacitor Cst holds the data voltage Vdata stored in the sub-pixel for one frame. The storage capacitor Cst has one electrode connected to a third node N3 connected to the gate of the driving TFT DT and another electrode connected to a high potential voltage VDD.

[0183] The second TFT T2 applies a data voltage signal Vdata to the first node N1, which serves as the first electrode of the driving TFT DT. The second TFT T2 may include a gate connected to the input line of the nth scan signal Scan(n), a first electrode connected to the data line supplied with the data voltage signal Vdata, and a second electrode connected to the first node N1. The second TFT T2 may be a p-type MOSFET (PMOS) and may be implemented as a low-temperature polycrystalline silicon (LTPS) thin-film transistor. Therefore, in response to the low level of the nth scan signal Scan(n), which is the turn-on voltage, the second TFT T2 applies the data voltage signal Vdata supplied from the data line to the first node N1, which serves as the first electrode of the driving TFT DT.

[0184] The first TFT T1 is diode-connected to the driving TFT DT by connecting its gate and its drain (which is the second electrode). The first TFT T1 may include a gate connected to the input line of the nth scan signal Scan(n), a first electrode connected to the third node N3, and a second electrode connected to the second node N2. The first TFT T1 may be a p-type MOSFET (PMOS) and may be implemented as a low-temperature polycrystalline silicon (LTPS) thin-film transistor. Therefore, the first TFT T1 diode-connects the gate and drain of the driving TFT DT in response to the low level of the nth scan signal Scan(n), which is the turn-on voltage. However, the invention is not limited thereto, and the first TFT T1 may be an n-type MOSFET (NMOS) and implemented as an oxide thin-film transistor to minimize leakage current during the off-time period.

[0185] The fifth TFT T5 applies an initialization voltage VINI to the third node N3, which serves as the gate of the driving TFT DT. The fifth TFT T5 may include a gate connected to the input line of the (n-1)th scan signal Scan(n-1), a first electrode connected to the initialization voltage VINI, and a second electrode connected to the third node N3. The fifth TFT T5 can be a p-type MOSFET (PMOS) and can be implemented as a low-temperature polycrystalline silicon (LTPS) thin-film transistor. Therefore, in response to a low-level (n-1)th scan signal Scan(n-1) as a turn-on voltage, the fifth TFT T5 applies the initialization voltage VINI to the third node N3, which serves as the gate of the driving TFT DT. However, the fifth TFT T5 is not limited to this and may also be an n-type MOSFET (NMOS) and implemented as an oxide thin-film transistor to minimize leakage current.

[0186] The sixth TFT T6 applies the anode reset voltage VAR to the anode of the OLED. The sixth TFT T6 may include a gate connected to the input line of the nth scan signal Scan(n), a first electrode connected to the anode reset voltage VAR, and a second electrode connected to the fourth node N4. The sixth TFT T6 may be a p-type MOSFET (PMOS) and may be implemented as a low-temperature polycrystalline silicon (LTPS) thin-film transistor. Therefore, the sixth TFT T6 applies the anode reset voltage VAR to the anode of the OLED in response to a low-level nth scan signal Scan(n) as a turn-on voltage.

[0187] On the other hand, although not shown in the figure, a switching TFT for applying the OBS voltage Vobs to the first electrode of the driving TFT DT can be connected to the first node N1. The switching TFT may include a gate connected to the input line of the nth scan signal Scan(n), a first electrode connected to the OBS voltage Vobs, and a second electrode connected to the first node N1. The switching TFT may be a p-type MOSFET (PMOS) and may be implemented as a low-temperature polycrystalline silicon (LTPS) thin-film transistor. Therefore, the switching TFT applies the OBS voltage Vobs to the first electrode of the driving TFT DT in response to the low level of the nth scan signal Scan(n) as a turn-on voltage.

[0188] The pixel current flowing through the driving TFT DT during the light-emitting period is determined by the gate-source voltage of the driving TFT DT, which is the voltage difference between the first node N1 and the third node N3. During the light-emitting period, the voltage of the first node N1 is fixed at a high potential voltage VDD, but the voltage of the third node N3 is affected by the cutoff characteristics of the fifth TFT T5. This is because the cutoff of the fifth TFT T5 during the light-emitting period causes the third node N3 to be in a floating state. Therefore, the fifth TFT T5 can be implemented as an n-type oxide transistor with good cutoff characteristics (i.e., low off-current).

[0189] In addition, the first TFT T1, which remains in the off state during the light-emitting period, can also be implemented as an n-type oxide transistor with good cutoff characteristics (i.e., low cutoff current) because the voltage of the third node N3 is affected by the coupling action through the storage capacitor Cst.

[0190] On the other hand, since the TFT DT generates pixel current, it can be implemented as a p-type LTPS (low-temperature polysilicon) transistor with good electron mobility characteristics. Similarly, the second TFT T2, the third TFT T3, the fourth TFT T4, and the sixth TFT T6 can also be implemented as p-type LTPS transistors.

[0191] Figure 11 This is a block diagram schematically illustrating a display device for driving a display panel according to an embodiment of this specification, and Figure 12 This is a schematic diagram illustrating the wiring structure of a display panel according to an embodiment of this specification.

[0192] Reference Figure 11 The display device according to the embodiments of this specification may include a display panel 10, an image supply unit 110, a timing controller 120, a gate driver 130, a data driver 140, a power supply unit 150, a gamma driver 155, etc.

[0193] Since it has already been referenced Figures 1 to 10 Display panel 10 has been described, therefore its detailed description will be omitted. In display panel 10, multiple data lines DL1 to DLn extending in the column direction (or vertical direction) and multiple gate lines GL1 to GLm extending in the row direction (or horizontal direction) intersect each other, and sub-pixels SP1, SP2, and SP3 are arranged in a matrix at each intersection area to form a pixel array. Sub-pixels SP arranged on the same pixel line operate simultaneously according to a scan signal Scan(n) and a light emission signal EM(n) applied from the same gate line GL. Each sub-pixel SP includes a light-emitting device and a pixel circuit that controls the amount of current applied to the anode of the light-emitting device. The pixel circuit may include a drive transistor that controls the amount of current so that a predetermined current can flow through the light-emitting device. The light-emitting device emits light during the light-emitting period and does not emit light during other periods. During the other periods, the initialization and programming of the pixel circuit and the reset of the light-emitting device can be performed.

[0194] In the embodiments described herein, the electrode connected to the thin-film transistor (TFT) controlling light emission in each sub-pixel region SP1, SP2, and SP3 of the display panel 10 is referred to as the first electrode, and the electrode disposed on the front surface of the display panel 10 or configured to include two or more pixel regions is referred to as the second electrode. If the first electrode is the anode AE, the second electrode may be the cathode CE, and vice versa. The invention will be described below based on an example where the anode AE ​​is the first electrode and the cathode CE is the second electrode, but is not limited thereto.

[0195] In embodiments of this specification, a pixel may include one or more subpixels. For example, a pixel may include two to four subpixels. A subpixel refers to a unit that has a specific type of color filter layer formed or an organic light-emitting device that can emit light of a specific color without forming a color filter layer. Examples of colors defined at subpixel SP may include red (R), green (G), blue (B), and optionally white (W), but this embodiment is not limited thereto.

[0196] The embodiments described in this specification can implement bottom-emitting organic light-emitting display devices, but the present invention is not limited thereto, and can be applied to top-emitting or dual-emitting organic light-emitting display devices as needed.

[0197] Reference Figure 12In the display panel 10 according to the embodiments of this specification, n gate lines GL1 to GLn extending in the horizontal direction can be arranged at constant intervals in the vertical direction. For example, if 1000 gate lines GL1 to GL1000 are provided, the display panel 10 can have 1000 channels Ch1 to Ch1000.

[0198] Furthermore, in the display panel 10 according to the embodiments of this specification, the n data lines DL1 to DLn extending in the vertical direction can be arranged at constant intervals in the horizontal direction. For example, if 1000 data lines DL1 to DL1000 are provided, the display panel 10 can have 1000 data channels 1H to 1000H.

[0199] One of the red (R) subpixel, green (G) subpixel, blue (B) subpixel, and white (W) subpixel can be electrically connected to the point where a gate line GL and a data line DL intersect.

[0200] A pixel according to an embodiment of this specification includes one or more subpixels SP. A subpixel SP may refer to a unit that has a specific type of color filter or an organic light-emitting device that can emit light of a specific color without forming a color filter. Examples of colors defined at a subpixel may include red (R), green (G), blue (B), and optionally white (W), but this embodiment is not limited thereto. A subpixel may be referred to as a sub-image element or sub-pixel.

[0201] Return to reference Figure 11 The image supply unit 110 can output various drive signals as well as image data signals provided from the outside or stored in the internal memory. The image supply unit 110 can provide data signals and various drive signals to the timing controller 120.

[0202] The timing controller 120 controls the gate driver 130 and the data driver 140. The timing controller 120 can output a gate timing control signal GDC for controlling the operating timing of the gate driver 130, a data timing control signal DDC for controlling the operating timing of the data driver 140, and various synchronization signals (Vsync as a vertical synchronization signal, Hsync as a horizontal synchronization signal), etc. The timing controller 120 can provide the data signal DATA provided from the image supply unit 110 together with the data timing control signal DDC to the data driver 140. The timing controller 120 can be formed as an integrated circuit (IC) and mounted on a printed circuit board, but the present invention is not limited thereto.

[0203] Gate driver 130 applies a gate voltage to display panel 10. Although not shown, gate driver 130 may include a scan driver and a light-emitting driver. The scan driver can provide a scan signal to display panel 10, and the light-emitting driver can provide a light-emitting signal to display panel 10.

[0204] The gate driver 130 can output a scan signal and a light emission signal in response to a gate timing control signal GDC or the like provided from the timing controller 120. The gate driver 130 can provide at least one scan signal and a light emission signal to the sub-pixels included in the display panel 10 through gate lines GL1 to GLm. The gate driver 130 can be formed in the form of an IC, or it can be formed directly on the display panel 10 as an in-panel gate.

[0205] The data driver 140 can sample and latch the data signal DATA in response to a data timing control signal DDC or the like provided from the timing controller 120. It can convert the digital data signal into an analog data voltage based on a gamma reference voltage and output the converted analog data signal. The data driver 140 can supply the data voltage to the sub-pixels included in the display panel 10 via data lines DL1 to DLn. The data driver 140 can be formed as an IC and mounted on the display panel 10 or mounted on a printed circuit board, but the invention is not limited thereto.

[0206] The power supply unit 150 can convert externally supplied power into power required to drive the display device under the control of the timing controller 120, and output the converted power. For example, the power supply unit 150 can convert externally supplied power into high potential voltage VDD, low potential voltage VSS, etc., and can output the converted voltage. It can also generate and output the voltage required to drive the scan driver 130 (e.g., gate voltage including gate high voltage and gate low voltage), the voltage required to drive the data driver 140 (drain voltage including drain voltage and half-drain voltage), etc.

[0207] The gamma driver 155 can apply a gamma voltage to the display panel 10. Here, the gamma voltage can include a first gamma voltage Gm1, a second gamma voltage Gm2, and a third gamma voltage Gm3. Each of the first gamma voltage Gm1, the second gamma voltage Gm2, and the third gamma voltage Gm3 can be one of a gamma reference high voltage (Gamma REF_High Voltage), a gamma voltage, and a gamma reference low voltage (Gamma REF_Low Voltage).

[0208] The gamma driver 155 can apply a first gamma voltage Gm1 to the first pixel region PA1, a second gamma voltage Gm2 to the second pixel region PA2, and a third gamma voltage Gm3 to the third pixel region PA3.

[0209] The gamma driver 155 can apply a second gamma voltage Gm2 to the second pixel region PA2, which is lower than the first gamma voltage Gm1 applied to the first pixel region PA1, and apply a third gamma voltage Gm3 to the third pixel region PA3, which is lower than the first gamma voltage Gm1.

[0210] The gamma driver 155 may be formed as an integrated circuit (IC) and mounted on a printed circuit board, but the present invention is not limited thereto.

[0211] The first gamma voltage Gm1 is greater than the second gamma voltage Gm2, and the second gamma voltage Gm2 is greater than the third gamma voltage Gm3. However, the embodiments described in this specification are not limited thereto.

[0212] Figure 13A This is a graph illustrating the gamma voltage, pulse width, and offset voltage for compensating for the brightness difference of R pixels according to an embodiment of this specification; Figure 13B This is a graph illustrating the gamma voltage, pulse width, and offset voltage for compensating for brightness differences in G pixels according to embodiments of this specification; and Figure 13C This is a graph illustrating the gamma voltage, pulse width, and offset voltage for compensating for the brightness difference of B pixels according to an embodiment of this specification.

[0213] Reference Figure 13A , Figure 13B and Figure 13C The gamma driver 155 can apply a gamma reference high voltage (GammaREF_High Voltage) with the same voltage level to each of the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3.

[0214] For example, the gamma driver 155 can provide the same level of gamma reference high voltage (Gamma REF_Hvoltage_R) to the red (R) sub-pixels located in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, respectively.

[0215] In addition, the gamma driver 155 can provide the same level of gamma reference high voltage (Gamma REF_Hvoltage_G) to the green (G) sub-pixels located in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, respectively.

[0216] In addition, the gamma driver 155 can provide the same level of gamma reference high voltage (Gamma REF_Hvoltage_B) to the blue (B) sub-pixels located in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, respectively.

[0217] The gamma driver 155 can apply a second gamma reference low voltage and a third gamma reference low voltage, respectively, to the second pixel region PA2 and the third pixel region PA3, which are lower than the first gamma reference low voltage (Gamma REF_Low Voltage) applied to the first pixel region PA1. Here, the gamma reference low voltage applied to the first pixel region PA1 is referred to as the first gamma reference low voltage; the gamma reference low voltage applied to the second pixel region PA2 is referred to as the second gamma reference low voltage; and the gamma reference low voltage applied to the third pixel region PA3 is referred to as the third gamma reference low voltage.

[0218] Reference Figure 13A For each sub-pixel of red R located in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, the gamma driver 155 can apply a first gamma reference low voltage to the first pixel region PA1, and supply a second gamma reference low voltage and a third gamma reference low voltage (Gamma REF_Low Voltage_R) lower than the first gamma reference low voltage to the second pixel region PA2 and the third pixel region PA3, respectively. Here, the third gamma reference low voltage (Gamma REF_Low Voltage_R) can be a voltage with a lower level than the second gamma reference low voltage.

[0219] Reference Figure 13B For each sub-pixel of green G located in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, the gamma driver 155 can apply a first gamma reference low voltage to the first pixel region PA1, and supply a second gamma reference low voltage and a third gamma reference low voltage (Gamma REF_Low Voltage_G) lower than the first gamma reference low voltage to the second pixel region PA2 and the third pixel region PA3, respectively. Here, the third gamma reference low voltage (Gamma REF_Low Voltage_G) can be a voltage with a lower level than the second gamma reference low voltage.

[0220] Reference Figure 13CFor each sub-pixel of blue B located in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, the gamma driver 155 can apply a first gamma reference low voltage to the first pixel region PA1, and supply a second gamma reference low voltage and a third gamma reference low voltage (Gamma REF_Low Voltage_B) lower than the first gamma reference low voltage to the second pixel region PA2 and the third pixel region PA3, respectively. Here, the third gamma reference low voltage (Gamma REF_Low Voltage_B) can be a voltage with a lower level than the second gamma reference low voltage.

[0221] The gate driver 130 according to an embodiment of this specification may include a light-emitting driver that applies a first light-emitting signal to a first pixel region PA1, a second light-emitting signal to a second pixel region PA2, and a third light-emitting signal to a third pixel region PA3.

[0222] Reference Figure 13A , Figure 13B and Figure 13C The light-emitting driver can compensate for the brightness difference caused by the curvature of each of the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3 by adjusting the pulse width (EM Width) of the light-emitting signal applied to each pixel region.

[0223] For example, the light-emitting driver can apply a second light-emitting signal with a pulse width smaller than that of the first light-emitting signal applied to the first pixel region PA1 to the second pixel region PA2, and can apply a third light-emitting signal with a pulse width smaller than that of the first light-emitting signal to the third pixel region PA3.

[0224] Reference Figure 13A , Figure 13B and Figure 13C The data driver 140 can compensate for the brightness difference between the second pixel region PA2 and the third pixel region PA3 by adjusting the offset voltage of the data voltage applied to each of the second pixel region PA2 and the third pixel region PA3, which have different brightness values ​​from the brightness value of the first pixel region PA1 due to the curvature.

[0225] For example, the data driver 140 can offset the data voltage applied to each of the second pixel region PA2 and the third pixel region PA3 to apply a data voltage (+10 gray levels) that is 10 gray levels higher than the data voltage of the first pixel region PA1.

[0226] Figure 14 This is a diagram illustrating an example of odd-numbered and even-numbered lines provided on a display panel according to an embodiment of this specification; Figure 15 This is a diagram illustrating an example of a sub-pixel connected to an odd number of lines according to an embodiment of this specification; Figure 16 This is a diagram illustrating an example of a sub-pixel connected to an even-numbered line according to an embodiment of this specification.

[0227] Reference Figure 14 In the display panel 10, n data lines DL1 to DLn extending vertically can be arranged in pairs at constant intervals in the horizontal direction, wherein an odd-numbered line (ODD Line) and an even-numbered line (EVEN Line) can be repeatedly arranged as one of the pairs. For example, if 1000 data lines DL1 to DL1000 are provided, the display panel 10 can have 500 odd-numbered lines (ODD Line) and 500 even-numbered lines (EVEN Line), that is, 1000 data channels 1H to 1000H.

[0228] Furthermore, in the display panel 10 according to the embodiments of this specification, the n gate lines GL1 to GLn extending in the horizontal direction can be arranged at constant intervals in the vertical direction. For example, if 1000 gate lines GL1 to GL1000 are provided, the display panel 10 can have 1000 scan channels Ch1 to Ch1000.

[0229] In this respect, one of the red (R) subpixel, green (G) subpixel, blue (B) subpixel, and white (W) subpixel can be electrically connected to the position where a gate line GL and a data line DL intersect each other.

[0230] For example, at each location where an odd-numbered line (ODD Line) intersects with each gate line, a red R sub-pixel, a green G sub-pixel, a blue B sub-pixel, and a white W sub-pixel can be repeated and electrically connected to that odd-numbered line.

[0231] Additionally, at each location where the odd-numbered line intersects with the gate lines, the red R sub-pixel, green G sub-pixel, blue B sub-pixel, and white W sub-pixel can be repeated and electrically connected to another even-numbered line (EVEN Line).

[0232] Reference Figure 15In the pixel circuit used to drive the first-1st sub-pixel R1, when n data lines DL1 to DLn are arranged at constant intervals of two in the horizontal direction, the first-1st sub-pixel R1 can be connected to one of the two odd-numbered lines (ODD Line). Here, the first-1st sub-pixel R1 is taken as an example of a sub-pixel that emits red light, but the embodiments in this specification are not limited to this. For example, at least one of the red R sub-pixel, green G sub-pixel, blue B sub-pixel, and white W sub-pixel can be connected to each odd-numbered line (ODD Line).

[0233] Reference Figure 16 In the pixel circuit used to drive the first and second sub-pixels R1', when n data lines DL1 to DLn are arranged at constant intervals of two in the horizontal direction, the first and second sub-pixels R1' can be connected to one of the two even-numbered lines (EVEN Line). Here, the first and second sub-pixels R1' is taken as a sub-pixel that emits red light, but the embodiments in this specification are not limited to this. For example, at least one of the red R sub-pixel, green G sub-pixel, blue B sub-pixel, and white W sub-pixel can be connected to each even-numbered line (EVEN Line).

[0234] Figure 17A This is a perspective view showing the shape and structure of the first lens LZ1 according to an embodiment of this specification. Figure 17B This is a perspective view showing the shape and structure of the second lens LZ2 according to another embodiment of this specification.

[0235] exist Figure 17A and Figure 17B In this context, the first direction (X) can be represented as the left-right direction, the horizontal direction, the horizontal direction, or the X-axis direction. The second direction (Y) can be represented as the up-down direction, the vertical direction, the vertical direction, or the Y-axis direction. The third direction (Z) can be represented as the front-back direction, the thickness direction, or the Z-axis direction of the display panel 10.

[0236] The first lens LZ1 and the second lens LZ2 can control (limit) the viewing angle in the left-right direction (X) differently, and control (limit) the viewing angle in the up-down direction (Y) equally.

[0237] For example, the first lens LZ1 can control the viewing angle to a narrow angle by limiting the travel path of the light emitted from the light-emitting device to a specific angle in the left-right direction (X), and the second lens LZ2 can control the viewing angle to a wide angle by not limiting the travel path of the light emitted from the light-emitting device to a specific angle in the left-right direction (X).

[0238] Reference Figure 17A According to an embodiment of this specification, the first lens LZ1 may be a hemispherical lens.

[0239] The hemispherical first lens LZ1 can be Figure 7 The first pixel region PA1 is disposed on the first light-emitting region of the first sub-pixels R1 and R1' to restrict the travel path of light generated in the first light-emitting region in the left-right direction, thereby controlling the viewing angle to a narrow viewing angle. For example, the first lens LZ1 can restrict the travel path of light emitted from the first-1 sub-pixel R1 and the first-2 sub-pixel R1' through the first light-emitting region in the left-right direction to control the viewing angle to a narrow viewing angle, and can also restrict it in the up-down direction to control the viewing angle to a narrow viewing angle.

[0240] Reference Figure 17B According to another embodiment of this specification, the second lens LZ2 may be a semi-cylindrical lens that extends in the first direction (X).

[0241] The second lens LZ2 can be positioned within the lens region on the light-emitting region of the light-emitting device, allowing the path of light generated in the light-emitting region to be unrestricted in the left-right direction, thereby controlling the viewing angle to a wide angle. For example, the second lens LZ2 can not restrict the path of light emitted from the second light-emitting region of the second light-emitting device to a specific angle range in the left-right direction to control the viewing angle to a wide angle, but can restrict it to a specific angle range in the up-down direction to control the viewing angle to a narrow angle.

[0242] Both the first lens LZ1 and the second lens LZ2 can restrict the light travel path within a specific angular range in the vertical direction (Y) to control the viewing angle to a narrow angle. Therefore, in the case of a display device, such as when applied to an automobile, it is possible to prevent the image displayed in the first pixel area PA1 to the third pixel area PA3 of the display panel 10 from being reflected by the windshield of the automobile, thereby preventing it from obstructing the driver's view.

[0243] According to the above embodiments of this specification, a display panel can be implemented, wherein a first lens is disposed in a first pixel region without curvature, a second lens is disposed in a second pixel region with a first curvature, a third lens is disposed in a third pixel region with a second curvature, and the second lens and the third lens are configured to partially overlap with each pixel.

[0244] Furthermore, according to embodiments of this specification, a display device can be implemented, wherein, in a display panel having the above configuration, a gamma driver applies a second gamma voltage, which is lower than a first gamma voltage applied to a first pixel region, to a second pixel region, and applies a third gamma voltage, which is lower than the first gamma voltage, to a third pixel region.

[0245] Although the invention has been described with reference to the illustrative drawings as described above, the invention is not limited to the embodiments and drawings disclosed in this specification, and it will be apparent to those skilled in the art that various modifications can be made without departing from the spirit and scope of the invention. Furthermore, even though the effects related to the configuration of the invention are not explicitly described while explaining the embodiments of the invention, it should be acknowledged that the effects predictable from this configuration are valid.

Claims

1. A display panel, comprising: First pixel region; The second pixel region is disposed on one side of the first pixel region; A third pixel region is disposed on the other side of the first pixel region and facing the second pixel region, wherein the first pixel region is located between the second pixel region and the third pixel region; A plurality of first sub-pixels, wherein the plurality of first sub-pixels are disposed in the first pixel region; A plurality of second sub-pixels, wherein the plurality of second sub-pixels are disposed in the second pixel region; A plurality of third sub-pixels, wherein the plurality of third sub-pixels are disposed in the third pixel region; A plurality of first lenses, wherein the plurality of first lenses are configured to correspond respectively to the plurality of first sub-pixels; A plurality of second lenses, wherein the plurality of second lenses are respectively configured to correspond to the plurality of second sub-pixels; and Multiple third lenses, wherein the multiple third lenses are configured to correspond respectively to the multiple third sub-pixels. The second pixel region is curved toward the rear surface of the display panel with a first curvature. The third pixel region is curved toward the rear surface of the display panel with a second curvature. Wherein, the plurality of first sub-pixels respectively overlap with the plurality of first lenses, and The plurality of second lenses overlap completely or partially with the plurality of second sub-pixels, and the plurality of third lenses overlap completely or partially with the plurality of third sub-pixels.

2. The display panel according to claim 1, wherein, One of the plurality of second sub-pixels overlaps entirely with the second lens, and another of the plurality of second sub-pixels only partially overlaps with the second lens. In this configuration, one of the plurality of third sub-pixels overlaps entirely with the third lens, while another of the plurality of third sub-pixels only partially overlaps with the third lens.

3. The display panel according to claim 2, wherein, In the first pixel region, the plurality of first sub-pixels overlap with the plurality of first lenses, such that each of the plurality of first sub-pixels is completely covered by each of the plurality of first lenses. In the second pixel region, one of the plurality of second sub-pixels overlaps with a second lens to be completely covered by the second lens, and another of the plurality of second sub-pixels partially overlaps with another second lens to be partially covered by the other second lens. In the third pixel region, one of the plurality of third sub-pixels overlaps with a third lens to be completely covered by the third lens, and another of the plurality of third sub-pixels partially overlaps with another third lens to be partially covered by the other third lens.

4. The display panel according to claim 3, wherein, The plurality of second sub-pixels includes a 2-1 sub-pixel located on one outer periphery and a 2-2 sub-pixel located near the first pixel region. The plurality of third sub-pixels include a 3-1 sub-pixel located on the outer periphery of the other side and a 3-2 sub-pixel located near the first pixel region. The plurality of second lenses include a second-1 lens that overlaps with the second-1 sub-pixel and a second-2 lens that partially overlaps with the second-2 sub-pixel. The plurality of third lenses include a third-first lens that overlaps with the third-first sub-pixel and a third-second lens that partially overlaps with the third-second sub-pixel.

5. The display panel according to claim 4, wherein, The second-2 lens is configured to be offset by a predetermined distance from the second-2 sub-pixel toward the first pixel region, and The third-second lens is configured to be offset from the third-second sub-pixel toward the first pixel region by a predetermined distance.

6. The display panel according to claim 5, wherein, Each of the plurality of first sub-pixels, the plurality of second sub-pixels, and the plurality of third sub-pixels has the same size, area, and thickness.

7. The display panel according to claim 6, wherein, Each of the plurality of first lenses, the plurality of second lenses, and the plurality of third lenses has the same shape, diameter, thickness, and length.

8. The display panel according to claim 6, wherein, Each of the plurality of first lenses, the plurality of second lenses, and the plurality of third lenses has the same shape, but has different diameters, thicknesses, and lengths from one another.

9. The display panel according to claim 7, wherein, The first pixel region is flat and does not bend or curve towards the front surface, where the front surface direction is the direction in which light is emitted from each sub-pixel. Wherein, the second pixel region bends toward the rear surface with the first curvature, and The third pixel region is curved toward the rear surface with the second curvature in a manner that is symmetrical to the second pixel region in the lateral direction relative to the first pixel region.

10. The display panel according to claim 9, wherein, The first curvature and the second curvature have the same value.

11. The display panel according to claim 9, wherein, The first curvature and the second curvature have different values ​​from each other.

12. The display panel according to claim 10, wherein, The first pixel region is located in the center of the display panel. The second pixel region is located to one side or to the left of the first pixel region, and The third pixel region is located on the other side or right side of the first pixel region to face the second pixel region, and the first pixel region is located between the second pixel region and the third pixel region.

13. The display panel according to claim 8, wherein, When the second lens and the third lens are hemispherical. Each of the diameter, thickness, and length of the second-2 lens has a larger value than each of the diameter, thickness, and length of the second-1 lens, and Each of the diameter, thickness, and length of the third-2 lens has a larger value than each of the diameter, thickness, and length of the third-1 lens.

14. The display panel according to claim 1, wherein, The first pixel region, the second pixel region, and the third pixel region include: First insulating layer; A plurality of first sub-pixels, a plurality of second sub-pixels, and a plurality of third sub-pixels on the first insulating layer; A second insulating layer is located on a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels; A black matrix, wherein the black matrix is ​​partially open on the second insulating layer; A third insulating layer, the third insulating layer being located on the black matrix; and The plurality of first lenses, the plurality of second lenses, and the plurality of third lenses are on the third insulating layer. The black matrix includes multiple first openings, multiple second openings, and multiple third openings. The multiple first openings are configured to correspond to the multiple first sub-pixels, the multiple second openings are configured to correspond to the multiple second sub-pixels, and the multiple third openings are configured to correspond to the multiple third sub-pixels. Specifically, in the second pixel region, one of the plurality of second sub-pixels overlaps with one of the plurality of second openings, and another of the plurality of second sub-pixels partially overlaps with another of the plurality of second openings. Specifically, in the third pixel region, one of the plurality of third sub-pixels overlaps with one of the plurality of third openings, and another of the plurality of third sub-pixels partially overlaps with another of the plurality of third openings.

15. A display device, comprising: The display panel includes: a first pixel region; a second pixel region disposed on one side of the first pixel region; a third pixel region disposed on the other side of the first pixel region, the third pixel region facing the second pixel region relative to the first pixel region; a plurality of first sub-pixels disposed in the first pixel region; a plurality of second sub-pixels disposed in the second pixel region; a plurality of third sub-pixels disposed in the third sub-pixel region; a plurality of first lenses configured to correspond to the plurality of first sub-pixels respectively; a plurality of second lenses configured to correspond to the plurality of second sub-pixels respectively; and a plurality of third lenses configured to correspond to the plurality of third sub-pixels respectively. A data driver that applies a data voltage to the display panel; A gamma driver that applies a gamma voltage to the display panel; A gate driver that applies a gate voltage to the display panel; and The controller controls the data driver and the gate driver. Wherein, the plurality of first sub-pixels overlap with the plurality of first lenses respectively. Specifically, one of the plurality of second sub-pixels completely overlaps with one of the plurality of second lenses, while another of the plurality of second sub-pixels partially overlaps with another of the plurality of second lenses. Specifically, one of the plurality of third sub-pixels completely overlaps with one of the plurality of third lenses, while another of the plurality of third sub-pixels partially overlaps with another of the plurality of third lenses. Specifically, the gamma driver applies a second gamma voltage, which is lower than the first gamma voltage applied to the first pixel region, to the second pixel region, and applies a third gamma voltage, which is lower than the first gamma voltage, to the third pixel region.

16. The display device according to claim 15, wherein, The gamma driver applies a gamma reference high voltage with the same voltage level to each of the first pixel region, the second pixel region, and the third pixel region, and The gamma driver applies a second gamma reference low voltage and a third gamma reference low voltage, which are lower than the first gamma reference low voltage applied to the first pixel region, to the second pixel region and the third pixel region, respectively.

17. The display device according to claim 16, wherein, The gate driver includes a scan driver that applies a scan signal to the display panel and a light-emitting driver that applies a light-emitting signal to the display panel. The light-emitting driver applies a second light-emitting signal with a pulse width smaller than that of the first light-emitting signal applied to the first pixel region to the second pixel region, and applies a third light-emitting signal with a pulse width smaller than that of the first light-emitting signal to the third pixel region.

18. The display device according to claim 17, wherein, The data driver offsets the data voltage applied to each of the second and third pixel regions to apply a data voltage that is 10 grayscale voltages higher than the data voltage applied to the first pixel region.

19. The display device according to claim 18, wherein, Odd-numbered and even-numbered lines extending vertically are provided in each of the first pixel region, the second pixel region, and the third pixel region. Wherein, one of the plurality of first sub-pixels is connected to either the odd-numbered line or the even-numbered line, and the other of the plurality of first sub-pixels is connected to either the even-numbered line or the odd-numbered line. Wherein, one of the plurality of second sub-pixels is connected to the odd-numbered line or the even-numbered line, and another of the plurality of second sub-pixels is connected to the even-numbered line or the odd-numbered line, and Wherein, one of the plurality of third sub-pixels is connected to the odd line or the even line, and the other of the plurality of third sub-pixels is connected to the even line or the odd line.

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