Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel has a display area and a non-display area arranged around the display area. The display panel comprises a substrate, an encapsulation plate, an encapsulation structure and a buffer structure. The substrate is located in the display area and the non-display area, and comprises a substrate and an array structure arranged on one side of the substrate in a first direction. The encapsulation plate is located in the display area and the non-display area, and is arranged on the side of the array structure away from the substrate. The encapsulation structure is located in the non-display area and surrounds the display area, and is arranged between the substrate and the encapsulation plate. The buffer structure is located in at least the non-display area, and is arranged between the encapsulation plate and the substrate. At least one of the encapsulation plate and the substrate is in contact with the buffer structure, and at least part of the buffer structure is located on the side of the encapsulation structure close to the display area.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel and a display device. Background Technology

[0002] When packaging display panel products, a process of heating the packaging material is often used to form a packaging structure with better packaging effect.

[0003] However, during the fabrication of the encapsulation structure, stress is easily generated between the encapsulation material and the structures on both sides, making the display panel prone to cracking when subjected to external impact. Summary of the Invention

[0004] This application provides a display panel and a display device, which aim to improve the structural stability of the display panel.

[0005] An embodiment of the first aspect of this application provides a display panel. The display panel has a display area and a non-display area disposed around the display area. The display panel includes a substrate, a packaging plate, a packaging structure, and a buffer structure. The substrate is located in the display area and the non-display area, and the substrate includes a base and an array structure disposed on one side of the base in a first direction. The packaging plate is located in the display area and the non-display area, and the packaging plate is disposed on the side of the array structure opposite to the base. The packaging structure is located in the non-display area and surrounds the display area, and the packaging structure is disposed between the substrate and the packaging plate. The buffer structure is located at least in the non-display area, and the buffer structure is disposed between the packaging plate and the substrate. At least one of the packaging plate and the substrate is in contact with the buffer structure, and at least a portion of the buffer structure is located on the side of the packaging structure closer to the display area.

[0006] An embodiment of the first aspect of this application also provides a display panel. The display panel has a display area and a non-display area disposed around the display area. The display panel includes a substrate, a packaging plate, a packaging structure, and a first buffer structure. The substrate is located in the display area and the non-display area, and the substrate includes a base and an array structure disposed on one side of the base in a first direction. The packaging plate is located in the display area and the non-display area, and the packaging plate is disposed on the side of the array structure opposite to the base. The packaging structure is located in the non-display area and surrounds the display area, and the packaging structure is disposed between the substrate and the packaging plate. The first buffer structure is located at least in the non-display area, and the first buffer structure is disposed between the packaging plate and the substrate, and the first buffer structure and the packaging structure are in contact on at least one side surface in the first direction. In a direction parallel to the plane of the base, the packaging structure has a first packaging edge and a second packaging edge facing away from each other. The first packaging edge is located on the side of the second packaging edge closer to the display area. The orthographic projection of the first packaging edge on the base and the orthographic projection of the first buffer structure on the base have a first overlapping area, and the orthographic projection of the second packaging edge on the base and the orthographic projection of the first buffer structure on the base have a second overlapping area. The first overlapping area is larger than the second overlapping area.

[0007] An embodiment of the second aspect of this application provides a display device. The display device includes the display panel of any of the above embodiments.

[0008] In the display panel provided in this application embodiment, the display panel has a display area and a non-display area surrounding the display area. The display area is used to realize the light-emitting display operation of the display panel, and the non-display area is used to arrange structures in the display panel for signal transmission or encapsulation. The display panel includes a substrate, an encapsulation plate, an encapsulation structure, and a buffer structure. The substrate is located in the display area and the non-display area. The substrate includes a base and an array structure disposed on one side of the base in a first direction. The base can be used to support the array structure, and the array structure can be used to control and drive the light-emitting display of the display panel. The encapsulation plate is located in the display area and the non-display area. The encapsulation plate is disposed on the side of the array structure opposite to the base. The encapsulation plate can be used to protect the structure below and limit the intrusion of moisture into the structure below. The encapsulation structure is located in the non-display area and surrounds the display area. The encapsulation structure is disposed between the substrate and the encapsulation plate, so that the encapsulation structure, the substrate, and the encapsulation plate can enclose a sealed space, and the devices within the sealed space can be better encapsulated.

[0009] By setting a buffer structure between the encapsulation plate and the substrate in the non-display area, at least one of the encapsulation plate and the substrate is in contact with the buffer structure, and at least part of the buffer structure is located on the side of the encapsulation structure near the display area, the buffer structure can be used to release the tensile stress exerted on the encapsulation plate and / or the substrate by the edge of the encapsulation structure near the display area, and / or the buffer structure can be used to mitigate the impact transmitted from the display area, thereby improving the structural strength of the display panel. Attached Figure Description

[0010] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application; Figure 2 This is a schematic diagram of a substrate and packaging structure provided in an embodiment of this application; Figure 3 This is a partial cross-sectional schematic diagram of a display panel provided in an embodiment of this application; Figure 4 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 5 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 6 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 7 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 8 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 9 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 10 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in an embodiment of this application; Figure 11 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in another embodiment of this application; Figure 12 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in another embodiment of this application; Figure 13 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in another embodiment of this application; Figure 14 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in another embodiment of this application; Figure 15 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in another embodiment of this application; Figure 16 This is a schematic diagram of an encapsulation structure and a first buffer structure provided in another embodiment of this application; Figure 17 This is a schematic diagram of a substrate, a packaging structure, and a second buffer structure provided in an embodiment of this application; Figure 18 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 19 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 20 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 21 This is a partial cross-sectional schematic diagram of a display panel provided in another embodiment of this application; Figure 22 This is a schematic diagram of an encapsulation structure, a first buffer structure, and a second buffer structure provided in an embodiment of this application.

[0012] Explanation of reference numerals in the attached figures: 10. Display panel; 100, Substrate; 110, Substrate; 120, Array structure; 121, Pixel circuit; 121a, Transistor; 121aa, Gate; 121ab, Source / Drain; 121b, Storage capacitor; 121ba, First electrode plate; 121bb, Second electrode plate; 122, Adhesive layer; 122a, Through hole; 123, Auxiliary conductive structure; 124, Insulating layer; 124a, First insulating layer; 124b, Second insulating layer; 124c, Third insulating layer; 200, Pixel definition layer; 200a, Pixel aperture; 300, Light-emitting device; 310, First electrode; 320, Light-emitting functional layer; 321, Light-emitting structure; 322, Common layer; 330, Second electrode; 400, Packaging board; 500, Package structure; 500a, First package edge; 500b, Second package edge; 501, Overlapping portion; 502, Non-overlapping portion; 600, Buffer structure; 610, First buffer structure; 610a, First buffer edge; 610b, Second buffer edge; 610c, Spacing space; 611, First sub-buffer structure; 611a, First segment; 611b, Second segment; 611ba, First bend segment; 611bb, Second bend segment; 611c, First fan-out segment; 612, Second sub-buffer structure; 612a, Third segment; 612b, Fourth segment; 612c, Second fan-out segment; 620, Second buffer structure; AA, Display area; NA, Non-display area; NA1, First area; NA2, Second area; NA3, Third area; NA4, Fourth area; NA4a, Fan-out area; NA4b, Corner area; X, first direction; Y, second direction; Z, third direction; Detailed Implementation

[0013] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0014] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0015] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0016] When packaging display panel products, a process of heating the packaging material is often used to form a packaging structure with better packaging effect.

[0017] For example, in related technologies, Frit encapsulation technology is often used to encapsulate display panel products. This involves forming a ring-shaped encapsulation material on a substrate using processes such as screen printing or inkjet coating. Then, an encapsulation plate opposite to the substrate can be placed on top of the encapsulation material. The encapsulation material (such as glass powder, whose composition typically includes PbO, BaO, ZnO, B2O3, SiO2, etc.) located between the substrate and the encapsulation plate is then subjected to high-temperature (typically 380–450°C) melting treatment to form a dense, highly airtight encapsulation structure, a glass frit seal. The glass frit seal can effectively block the intrusion of moisture and oxygen as an encapsulation structure, allowing the encapsulation structure, substrate, and encapsulation plate to work together to effectively prevent moisture from entering the screen.

[0018] However, during the heating process of the encapsulation material, stress is easily generated between the encapsulation material and the structures on both sides, making the display panel prone to cracking when subjected to external impact.

[0019] For example, because the coefficients of thermal expansion (CTE) among the encapsulation material, substrate, and encapsulation plate are often not well matched—that is, there is often a certain difference in the CTE between the encapsulation material and the substrate and encapsulation plate on both sides—the encapsulation structure exerts tensile stress on the substrate and encapsulation plate during the cooling process of the encapsulation material to form the encapsulation structure. Furthermore, since the encapsulation structure, substrate, and encapsulation plate are often not strongly bonded together, but rather held together by atmospheric pressure, when the display panel is subjected to external impact (e.g., when the substrate or encapsulation plate within the display area of ​​the display panel is subjected to external impact), the deformation of the encapsulation structure, substrate, and encapsulation plate is inconsistent. This makes the substrate and encapsulation plate prone to cracking under the external impact and the tensile stress provided by the encapsulation structure.

[0020] To address the aforementioned problems, this application provides a display panel and a display device. The following description, in conjunction with the accompanying drawings, will illustrate various embodiments of the display panel and the display device.

[0021] Figure 1 This is a schematic diagram of the structure of a display panel 10 provided in an embodiment of this application. Figure 2 This is a schematic diagram of a substrate 100 and a packaging structure 500 provided in an embodiment of this application. Figure 3This is a partial cross-sectional schematic diagram of a display panel 10 provided in an embodiment of this application. Optionally, the X direction in the figure can represent a first direction X, the Y direction can represent a second direction Y, and the Z direction can represent a third direction Z. The first direction X, the second direction Y, and the third direction Z can intersect each other. For example, the first direction X, the second direction Y, and the third direction Z can be perpendicular to each other. Optionally, Figure 3 Can be Figure 1 A partial cross-sectional view of the display panel 10 corresponding to position AA in the middle.

[0022] like Figures 1 to 3 As shown, an embodiment of the first aspect of this application provides a display panel 10. The display panel 10 has a display area AA and a non-display area NA surrounding the display area AA. The display panel 10 includes a substrate 100, an encapsulation plate 400, an encapsulation structure 500, and a buffer structure 600. The substrate 100 is located between the display area AA and the non-display area NA, and includes a substrate 110 and an array structure 120 disposed on one side of the substrate 110 in a first direction X. The encapsulation plate 400 is located between the display area AA and the non-display area NA, and is disposed on the side of the array structure 120 opposite to the substrate 110. The encapsulation structure 500 is located in the non-display area NA and surrounds the display area AA, and is disposed between the substrate 100 and the encapsulation plate 400. The buffer structure 600 is located at least in the non-display area NA. The buffer structure 600 is disposed between the encapsulation plate 400 and the substrate 100. At least one of the encapsulation plate 400 and the substrate 100 is in contact with the buffer structure 600, and at least a portion of the buffer structure 600 is located on the side of the encapsulation structure 500 closer to the display area AA.

[0023] In the display panel 10 provided in the embodiments of this application, the display panel 10 has a display area AA and a non-display area NA arranged around the display area AA. The display area AA can be used to realize the light-emitting display operation of the display panel 10, and the non-display area NA can be used to arrange the structure in the display panel 10 for signal transmission or for encapsulation.

[0024] Optionally, the non-display area NA may include a first area NA1, a second area NA2, a third area NA3, and a fourth area NA4. The first area NA1 and the second area NA2 are respectively located on both sides of the display area AA in the second direction Y, and the third area NA3 and the fourth area NA4 are respectively located on both sides of the display area AA in the third direction Z.

[0025] The display panel 10 includes a substrate 100, a packaging plate 400, a packaging structure 500, and a buffer structure 600.

[0026] Optionally, the display panel 10 provided in this application embodiment may be a display panel 10 that emits light based on the principle of liquid crystal display (LCD), or a display panel 10 that emits light based on the principle of organic light-emitting diode (OLED), or a display panel 10 that emits light based on the principle of quantum dot light-emitting diodes (QLED). This application does not specifically limit it.

[0027] For ease of description, the following embodiments will be described using the display panel 10 provided in the embodiments of this application as an example, which is a display panel 10 that emits light based on the light-emitting display principle of organic light-emitting diode (OLED).

[0028] The substrate 100 is located between the display area AA and the non-display area NA. The substrate 100 includes a substrate 110 and an array structure 120 disposed on one side of the substrate 110 in the first direction X. The substrate 110 can be used to support the array structure 120, and the array structure 120 can be used to control and drive the light emission display of the display panel 10.

[0029] Optionally, the substrate 110 may be a rigid substrate 110, which allows the substrate 110 to have better structural strength and packaging capabilities. For example, the material of the substrate 110 may include glass.

[0030] Optionally, the first direction X can be perpendicular to the plane where the substrate 110 is located, and the second direction Y and the third direction Z can both be parallel to the plane where the substrate 110 is located.

[0031] Optionally, the array structure 120 can be configured in various ways. The array structure 120 may include, for example, a pixel circuit 121. Exemplarily, the pixel circuit 121 may include a transistor 121a, a storage capacitor 121b, and traces for connecting the various devices. In a further example, the transistor 121a includes a semiconductor structure, a gate 121aa, and source / drain electrodes 121ab. The gate 121aa is located on the side of the semiconductor structure facing away from the substrate 110, and the source / drain electrodes 121ab are connected to the semiconductor structure and are located on the side of the gate 121aa facing away from the substrate 110. The storage capacitor 121b may include a first electrode 121ba and a second electrode 121bb located on the side of the first electrode 121ba away from the substrate 110.

[0032] Optionally, the array structure 120 may include multiple insulating layers 124. The structures in the pixel circuit 121 may be arranged between adjacent insulating layers 124, or between the insulating layer 124 and the substrate 110. For example, the insulating layer 124 may include a first insulating layer 124a, a second insulating layer 124b, and a third insulating layer 124c stacked sequentially in a direction away from the substrate 110. The gate 121aa and the first electrode 121ba may be located on the side of the first insulating layer 124a facing the substrate 110, the second electrode 121bb may be located between the first insulating layer 124a and the second insulating layer 124b, and the source / drain 121ab may be located between the second insulating layer 124b and the third insulating layer 124c.

[0033] Optionally, the third insulating layer 124c can serve as a planarization layer, meaning the surface of the third insulating layer 124c facing away from the substrate 110 can be relatively flat, facilitating the subsequent fabrication of other film layers on the substrate 100. Optionally, at least a portion of the non-display area NA may not have the third insulating layer 124c, making it difficult for moisture to penetrate along the edge of the display panel 10 into the third insulating layer 124c, thereby preventing moisture from easily penetrating into the display area AA through the third insulating layer 124c.

[0034] Optionally, there are various ways to set the working principle and circuit structure of the pixel circuit 121. The pixel circuit 130 can be a 2T1C, 4T1C, 7T1C, 7T2C, 8T1C or 8T2C circuit structure.

[0035] Optionally, the array structure 120 may include signal traces that can be connected to the pixel circuit 121 and provide signals to the pixel circuit 121 to control its operation. For example, the signal traces may include at least one of a positive power supply voltage signal line (ELVDD signal line), a negative power supply voltage signal line (ELVSS signal line), a data signal line (Data signal line), a reset signal line (Vref signal line), an emission control signal line (Emit signal line), and a scan signal line (Scan signal line).

[0036] Optionally, the fourth region NA4 may include a fan-out region NA4a, through which signal traces can fan out. Further, the fourth region NA4 may also include corner regions NA4b located on both sides of the fan-out region NA4a in the second direction Y, through which some signal traces can extend from the first region NA1 and the second region NA2 to the fan-out region NA4a.

[0037] Optionally, the display panel 10 may also include a light-emitting device 300, which is located in the display area AA. The light-emitting device 300 is disposed on the side of the array structure 120 away from the substrate 110. The light-emitting device 300 can be used to emit light to realize the display operation in the display area AA.

[0038] Optionally, in the direction away from the substrate 100, the light-emitting device 300 may include a first electrode 310, a light-emitting functional layer 320, and a second electrode 330 stacked sequentially. Exemplarily, one of the first electrode 310 and the second electrode 330 may serve as an anode, and the other as a cathode to drive the light-emitting functional layer 320 to emit light. In this embodiment, the first electrode 310 is used as the anode of the display panel 10, and the second electrode 330 is used as the cathode of the display panel 10 for illustrative purposes.

[0039] Optionally, the first electrode 310 may include a multilayer structure. For example, the first electrode 310 may include a reflective layer and a pair of conductive oxide layers respectively covering the upper and lower surfaces of the reflective layer. The reflective layer can be formed, for example, using a metallic material with excellent light reflectivity such as silver. Each conductive oxide layer can be formed, for example, from a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0040] Optionally, the light-emitting functional layer 320 may include a light-emitting structure 321 and a common layer 322 disposed on at least one side of the light-emitting structure 321 in the first direction X. For example, the common layer 322 may be disposed on both sides of the light-emitting structure 321 in the first direction X. The common layer 322 disposed on the side of the light-emitting structure 321 facing the substrate 100 may include a hole injection layer (HIL) and a hole transport layer (HTL). The common layer 322 disposed on the side of the light-emitting structure 321 facing away from the substrate 100 may include an electron injection layer (EIL) and an electron transport layer (ETL).

[0041] Optionally, the material of the second electrode 330 may include metallic materials such as an alloy of magnesium and silver (MgAg).

[0042] Optionally, the second electrodes 330 of each light-emitting device 300 can be electrically connected to each other, thereby facilitating control of the display panel 10. For example, the second electrodes 330 of each light-emitting device 300 can be integrally formed. Optionally, the common layer 322 of each light-emitting device 300 can be integrally formed to facilitate the fabrication of the display panel 10.

[0043] Optionally, the pixel circuit 121 can be connected to the light-emitting device 300. For example, the pixel circuit 121 can be connected to the first electrode 310, so that the pixel circuit 121 can provide a driving current to the first electrode 310 to drive the light-emitting device 300 to emit light. In a further example, the pixel circuit 121 can be at least partially located within the display area AA, and signal traces can extend from the non-display area NA into the display area AA and connect to the pixel circuit 121.

[0044] Optionally, the display panel 10 may further include a pixel definition layer 200, which may be located on the side of the first electrode 310 facing away from the substrate 100, and the light-emitting functional layer 320 and the second electrode 330 may be at least partially located within the pixel opening 200a. The pixel definition layer 200 may be used to participate in the division of sub-pixels of the display panel 10.

[0045] The encapsulation plate 400 is located between the display area AA and the non-display area NA. The encapsulation plate 400 is disposed on the side of the array structure 120 away from the substrate 110 (for example, the encapsulation plate 400 may be disposed on the side of the light-emitting device 300 away from the substrate 110). The encapsulation plate 400 can be used to protect the underlying structure and limit the intrusion of moisture into the underlying structure.

[0046] Optionally, the encapsulation plate 400 may have high rigidity, so that the encapsulation plate 400 can provide better protection for the underlying devices and film layers; the material of the encapsulation plate 400 may include a transparent material, so that the arrangement of the encapsulation plate 400 does not easily block the outward emission of light emitted by the light-emitting device 300. For example, the material of the encapsulation plate 400 may include glass.

[0047] The encapsulation structure 500 is located in the non-display area NA and surrounds the display area AA. The encapsulation structure 500 is disposed between the substrate 100 and the encapsulation plate 400, so that the encapsulation structure 500, the substrate 100 and the encapsulation plate 400 can enclose a sealed space, and the device in the sealed space can be well encapsulated.

[0048] Optionally, the package structure 500 may be annular (e.g., the orthographic projection of the package structure 500 on the substrate 110 may be annular), so that the package structure 500 can better surround the display area AA.

[0049] Optionally, the material of the encapsulation structure 500 may include frit, which allows the encapsulation structure 500 to be better bonded to the substrate 100 and the encapsulation plate 400 using high-temperature processes such as laser sintering.

[0050] By providing a buffer structure 600 located between the encapsulation plate 400 and the substrate 100 within the non-display area NA, at least one of the encapsulation plate 400 and the substrate 100 is brought into contact with the buffer structure 600, and at least a portion of the buffer structure 600 is located on the side of the encapsulation structure 500 near the display area AA, the buffer structure 600 can be used to release the tensile stress exerted on the encapsulation plate 400 and / or the substrate 100 by the edge of the encapsulation structure 500 near the display area AA, and / or the buffer structure 600 can be used to mitigate the impact transmitted from the display area AA, thereby improving the structural strength of the display panel 10 (for example, enabling the display panel 10 to have better impact resistance in a drop ball test).

[0051] As an example, during the cooling process of the material of the encapsulation structure 500, the buffer structure 600 can effectively release the tensile stress generated when the edge of the encapsulation structure 500 near the display area AA deforms through its own deformation. This ensures that the tensile stress generated by the encapsulation structure 500 does not act excessively on the encapsulation plate 400 and / or substrate 100 connected to the edge of the encapsulation structure 500 near the display area AA. As a result, when the display area AA of the display panel 10 is subjected to external impact, and the impact is transmitted from the display area AA to the non-display area NA, the encapsulation plate 400 and substrate 100 are less likely to break at the connection with the encapsulation structure 500. This also allows the encapsulation structure 500 to have a better connection with the encapsulation plate 400 and substrate 100, thereby improving the structural strength of the display panel 10.

[0052] As an example, when the display area AA of the display panel 10 is subjected to an external impact, and the impact is transmitted from the display area AA to the non-display area NA, the shock wave caused by the external impact can be mitigated by the buffer structure 600 located on the side of the encapsulation structure 500 near the display area AA. That is, the buffer structure 600 can effectively weaken the shock wave transmitted to the encapsulation structure 500, so that the impact of the final transmission from the display area AA to the encapsulation plate 400 and / or substrate 100 at the connection position with the encapsulation structure 500 is smaller. This makes it less likely for the encapsulation plate 400 and substrate 100 to break at the connection with the encapsulation structure 500, and also allows the encapsulation structure 500 to have a better connection effect with the encapsulation plate 400 and substrate 100, thereby improving the structural strength of the display panel 10.

[0053] Furthermore, by setting a buffer structure 600 to enhance the structural strength of the display panel 10, this application eliminates the need to set an excessively wide encapsulation structure 500 (for example, the width of the encapsulation structure 500 can refer to the distance between the edge of the encapsulation structure 500 near the display area AA and the edge of the encapsulation structure 500 away from the display area AA in a direction parallel to the plane of the substrate 110) in order to enhance the structural strength of the non-display area NA. This helps to reduce the bezel size of the display panel 10 and can better improve the visual effect of the display panel 10.

[0054] Optionally, the buffer structure 600 may have a smaller elastic modulus, allowing it to better mitigate impact or release stress through its own deformation. For example, the elastic modulus of the buffer structure 600 is smaller than that of the encapsulation structure 500.

[0055] In the embodiments provided in this application, there are various ways to position the buffer structure 600 relative to the packaging plate 400 and the substrate 100. The buffering effect of the buffer structure 600 can be adjusted by adjusting the position of the buffer structure 600 relative to the packaging plate 400 and the substrate 100.

[0056] In some alternative embodiments, such as Figure 3 As shown, the buffer structure 600 can contact the substrate 100 and is spaced apart from the encapsulation plate 400, so that the buffer structure 600 can be used to release the tensile stress generated near the end of the encapsulation structure 500 near the substrate 100, and / or can be used to mitigate the impact transmitted from the display area AA to the substrate 100, thereby making the substrate 100 less susceptible to damage (e.g., making the glass substrate 110 in the substrate 100 less susceptible to damage). In addition, since the buffer structure 600 is spaced apart from the encapsulation plate 400, it is also less likely to block the laser when the material of the encapsulation structure 500 is processed from one side of the encapsulation plate 400 using, for example, a laser sintering process, which is beneficial for the laser to irradiate the material of the encapsulation mechanism more fully.

[0057] Optionally, during the fabrication of the display panel 10, after the material of the encapsulation structure 500 and the buffer structure 600 are fabricated on the substrate 100, the encapsulation plate 400 is then covered, and the material of the encapsulation structure 500 is then processed by a high-temperature process to form the encapsulation structure 500.

[0058] In some alternative embodiments, such as Figure 4As shown, the buffer structure 600 can contact the encapsulation plate 400 and be spaced apart from the substrate 100, so that the buffer structure 600 can be used to release the tensile stress generated by the encapsulation structure 500 near the end of the encapsulation plate 400, and / or so that the buffer structure 600 can be used to mitigate the impact transmitted from the display area AA to the encapsulation plate 400, thereby making the encapsulation plate 400 less likely to be damaged.

[0059] Optionally, when the buffer structure 600 contacts the packaging plate 400, the material of the buffer structure 600 in contact with the packaging plate 400 may include a transparent material, so that when the material of the packaging structure 500 is processed from one side of the packaging plate 400 using, for example, laser sintering process, the buffer structure 600 does not easily block the laser, which is conducive to the laser irradiating the material of the packaging mechanism more fully.

[0060] Optionally, during the fabrication of the display panel 10, the material of the encapsulation structure 500 can be fabricated on the substrate 100, and the buffer structure 600 can be fabricated on the encapsulation plate 400. Then, the encapsulation plate 400 is covered onto the material of the encapsulation structure 500, and then the material of the encapsulation structure 500 is processed by a high-temperature process to form the encapsulation structure 500.

[0061] In some alternative embodiments, such as Figure 5 As shown, the buffer structure 600 can contact the encapsulation plate 400 and the substrate 100, so that the buffer structure 600 can be used to release the tensile stress generated at both ends of the encapsulation structure 500 in the first direction X, and / or so that the buffer structure 600 can be used to mitigate the impact transmitted from the display area AA to the encapsulation plate 400 and the substrate 100, thereby making the encapsulation plate 400 and the substrate 100 less susceptible to damage.

[0062] Optionally, during the fabrication of the display panel 10, the material of the encapsulation structure 500 and the buffer structure 600 can be fabricated on the substrate 100, and the buffer structure 600 can be fabricated on the encapsulation plate 400. Then, the encapsulation plate 400 is covered onto the material of the encapsulation structure 500, and then the material of the encapsulation structure 500 is processed by a high-temperature process to form the encapsulation structure 500.

[0063] In the embodiments provided in this application, there are various ways to position the buffer structure 600 relative to the encapsulation structure 500, and the buffering effect of the buffer structure 600 can be adjusted by adjusting the position of the buffer structure 600 relative to the encapsulation structure 500.

[0064] In some alternative embodiments, such as Figures 3 to 5As shown, the buffer structure 600 includes a first buffer structure 610, which contacts at least one side surface of the package structure 500 in the first direction X, and the orthographic projection of the edge of the package structure 500 on the substrate 110 is at least partially located within the orthographic projection of the first buffer structure 610 on the substrate 110.

[0065] For example, in a direction parallel to the plane of the substrate 110, the encapsulation structure 500 has a first encapsulation edge 500a and a second encapsulation edge 500b facing away from each other, with the first encapsulation edge 500a located on the side of the second encapsulation edge 500b closer to the display area AA. The orthographic projection of at least one of the first encapsulation edge 500a and the second encapsulation edge 500b onto the substrate 110 is at least partially within the orthographic projection of the first buffer structure 610 onto the substrate 110.

[0066] Figure 6 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application. Figure 7 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application.

[0067] Further examples, such as Figure 5 As shown, the orthographic projection of the first package edge 500a onto the substrate 110 is at least partially within the orthographic projection of the first buffer structure 610 onto the substrate 110, and the orthographic projection of the second package edge 500b onto the substrate 110 may be outside the orthographic projection of the first buffer structure 610 onto the substrate 110; or, as... Figure 6 As shown, the orthographic projection of the second package edge 500b onto the substrate 110 is at least partially within the orthographic projection of the first buffer structure 610 onto the substrate 110, while the orthographic projection of the first package edge 500a onto the substrate 110 may be outside the orthographic projection of the first buffer structure 610 onto the substrate 110; or, as... Figure 7 As shown, the orthographic projections of the first package edge 500a and the second package edge 500b on the substrate 110 are both at least partially located within the orthographic projection of the first buffer structure 610 on the substrate 110.

[0068] Optionally, when the orthographic projection of the first package edge 500a on the substrate 110 is outside the orthographic projection of the first buffer structure 610 on the substrate 110, the buffer structure 600 may include at least a portion of other structures outside the first buffer structure 610 located on the side of the package structure 500 closer to the display area AA.

[0069] In these optional embodiments, by setting the first buffer structure 610 on at least one side of the encapsulation structure 500 in the first direction X, and setting the orthographic projection of the edge of the encapsulation structure 500 on the substrate 110 to be at least partially within the orthographic projection of the first buffer structure 610 on the substrate 110, the first buffer structure 610 can deform along with the encapsulation structure 500 during the cooling process of the material of the encapsulation structure 500. This allows the first buffer structure 610 to better release the tensile stress generated when the edge of the encapsulation structure 500 deforms through its own deformation, so that the stress generated when the encapsulation structure 500 cools is not easily directly transmitted to the substrate 100 and / or the encapsulation plate 400 located at the edge of the encapsulation structure 500, thereby improving the structural stability of the display panel 10.

[0070] For example, when the orthographic projection of the first encapsulation edge 500a on the substrate 110 is at least partially within the orthographic projection of the first buffer structure 610 on the substrate 110, the first buffer structure 610 can effectively release the tensile stress generated when the edge of the encapsulation structure 500 near the display area AA deforms through its own deformation, so that when the display area AA of the display panel 10 is subjected to external impact, the substrate 100 and / or encapsulation plate 400 near the first encapsulation edge 500a of the encapsulation structure 500 are not easily damaged; when the orthographic projection of the second encapsulation edge 500b on the substrate 110 is at least partially within the orthographic projection of the first buffer structure 610 on the substrate 110, the first buffer structure 610 can effectively release the tensile stress generated when the edge of the encapsulation structure 500 away from the display area AA deforms through its own deformation, so that when the display panel 10 in the non-display area NA located on the side of the encapsulation structure 500 away from the display area AA is subjected to external impact, the substrate 100 and / or encapsulation plate 400 near the second encapsulation edge 500b of the encapsulation structure 500 are not easily damaged.

[0071] Optionally, since the first buffer structure 610 needs to perform a buffering function, the material of the first buffer structure 610 and the material of the encapsulation structure 500 often cannot achieve a good bonding effect. Therefore, by setting at least a portion of the surface of the encapsulation structure 500 in the first direction X to be not bonded to the first buffer structure 610, the encapsulation structure 500 can have a portion of its surface that can bond to other structures, thereby improving the encapsulation effect of the encapsulation structure 500.

[0072] For example, a portion of the encapsulation structure 500 is projected onto the substrate 110 in a way that is outside the projection of the first buffer structure 610 onto the substrate 110.

[0073] In a further example, when the first buffer structure 610 contacts a portion of the surface of the encapsulation structure 500 on the side near the substrate 100 in the first direction X, the encapsulation structure 500 can partially contact the insulating layer 124. The material of the encapsulation structure 500 includes inorganic materials, and the material of the insulating layer 124 in contact with the encapsulation structure 500 also includes inorganic materials, resulting in a good adhesion between the encapsulation structure 500 and the substrate 100. When the first buffer structure 610 contacts a portion of the surface of the encapsulation structure 500 on the side near the encapsulation plate 400 in the first direction X, the encapsulation structure 500 can partially contact the encapsulation plate 400, resulting in a good adhesion between the two encapsulation structures.

[0074] Optionally, a portion of the first buffer structure 610 may have its orthographic projection on the substrate 110 outside the orthographic projection of the encapsulation structure 500 on the substrate 110. This allows a portion of the first buffer structure 610 to extend relative to the encapsulation structure 500 in a direction parallel to the plane of the substrate 110. This allows the first buffer structure 610 to mitigate the impact propagating towards the encapsulation structure 500 in a direction parallel to the plane of the substrate 110. Consequently, the impact transmitted to the encapsulation plate 400 and / or substrate 100 at the connection point with the encapsulation structure 500 is reduced, making it less likely for the encapsulation plate 400 and substrate 100 to crack at the connection point with the encapsulation structure 500.

[0075] For example, in a direction parallel to the plane of the substrate 110, the first buffer structure 610 in the non-display area NA has a first buffer edge 610a and a second buffer edge 610b facing away from each other. The first buffer edge 610a is located on the side of the second buffer edge 610b closer to the display area AA. In the first buffer edge 610a and the second buffer edge 610b adjacent to the edge of the encapsulation structure 500 and extending in a parallel direction (for example, when the first encapsulation edge 500a and the second encapsulation edge 500b of the encapsulation structure 500 extend along the second direction Y, in the direction Y... In the first buffer edge 610a and the second buffer edge 610b; or, when the first package edge 500a and the second package edge 500b of the package structure 500 extend along a third direction Z, in the first buffer edge 610a and the second buffer edge 610b extending along a third direction Z, the orthogonal projection of one of the first buffer edge 610a and the second buffer edge 610b on the substrate 110 is located within the orthogonal projection of the package structure 500 on the substrate 110, and the orthogonal projection of the other on the substrate 110 is located outside the orthogonal projection of the package structure 500 on the substrate 110.

[0076] In a further example, when the orthographic projection of the first buffer edge 610a on the substrate 110 is within the orthographic projection of the encapsulation structure 500 on the substrate 110, and the orthographic projection of the second buffer edge 610b on the substrate 110 is outside the orthographic projection of the encapsulation structure 500 on the substrate 110, the first buffer structure 610 can effectively mitigate the impact transmitted from the display area AA to the encapsulation plate 400 and / or substrate 100 at the connection position with the encapsulation structure 500; when the orthographic projection of the second buffer edge 610b on the substrate 110 is within the orthographic projection of the encapsulation structure 500 on the substrate 110, and the orthographic projection of the first buffer edge 610a on the substrate 110 is outside the orthographic projection of the encapsulation structure 500 on the substrate 110, the first buffer structure 610 can effectively mitigate the impact transmitted from the edge of the display panel 10 to the encapsulation plate 400 and / or substrate 100 at the connection position with the encapsulation structure 500.

[0077] Optionally, in the first buffer edge 610a adjacent to the edge of the package structure 500 and parallel to its extending direction, the distance between the orthographic projection of the first buffer edge 610a on the substrate 110 and the orthographic projection of the edge of the package structure 500 on the substrate 110 is greater than or equal to 10 μm (D1 in the accompanying drawings illustrates the distance between the orthographic projection of the first buffer edge 610a on the substrate 110 and the orthographic projection of the edge of the package structure 500 on the substrate 110); and / or, in the second buffer edge 610b adjacent to the edge of the package structure 500 and parallel to its extending direction, the distance between the orthographic projection of the second buffer edge 610b on the substrate 110 and the orthographic projection of the edge of the package structure 500 on the substrate 110 is greater than or equal to 10 μm (D2 in the accompanying drawings illustrates the distance between the orthographic projection of the second buffer edge 610b on the substrate 110 and the orthographic projection of the edge of the package structure 500 on the substrate 110).

[0078] For example, in a first buffer edge 610a that is adjacent to the edge of the package structure 500 and extends parallel to the edge, the distance between the orthographic projection of the first buffer edge 610a on the substrate 110 and the orthographic projection of the edge of the package structure 500 on the substrate 110 is greater than or equal to 10 μm, 20 μm, 30 μm, 40 μm, 50 μm or 60 μm; and / or, in a second buffer edge 610b that is adjacent to the edge of the package structure 500 and extends parallel to the edge, the distance between the orthographic projection of the second buffer edge 610b on the substrate 110 and the orthographic projection of the edge of the package structure 500 on the substrate 110 is greater than or equal to 10 μm, 20 μm, 30 μm, 40 μm, 50 μm or 60 μm.

[0079] In this optional embodiment, when one of the first buffer edge 610a and the second buffer edge 610b that does not overlap with the encapsulation structure 500 has a large distance from the edge of the encapsulation structure 500, the first buffer structure 610 can have a longer extension length relative to the encapsulation structure 500, which is beneficial to improving the mitigation effect of the first buffer structure 610 against external impacts. When one of the first buffer edge 610a and the second buffer edge 610b that overlaps with the encapsulation structure 500 has a large distance from the edge of the encapsulation structure 500, the first buffer structure 610 can have a suitable contact area with the encapsulation structure 500, ensuring that the contact area between the first buffer structure 610 and the encapsulation structure 500 is neither too large nor too small. This allows the first buffer structure 610 to better release the stress during the manufacturing process of the encapsulation structure 500, while also allowing part of the surface of the encapsulation structure 500 to adhere to other structures, thereby giving the encapsulation structure 500 a better encapsulation effect.

[0080] Optionally, the orthographic projection of the first encapsulation edge 500a onto the substrate 110 and the orthographic projection of the first buffer structure 610 onto the substrate 110 have a first overlapping area, and the orthographic projection of the second encapsulation edge 500b onto the substrate 110 and the orthographic projection of the first buffer structure 610 onto the substrate 110 have a second overlapping area, with the first overlapping area being larger than the second overlapping area. By setting the first overlapping area to be larger than the second overlapping area, during the fabrication of the encapsulation structure 500, the first buffer structure 610 has a better stress relief effect at the location of the first encapsulation edge 500a compared to the second encapsulation edge 500b, allowing the display panel 10 to better withstand external impacts at the display area AA, thereby enabling the display panel 10 to have better impact resistance in drop ball tests. Furthermore, by setting the first overlapping area to be larger than the second overlapping area, the encapsulation structure 500 can have a larger contact area with other structures at the second encapsulation edge 500b, thereby improving the encapsulation effect of the encapsulation structure 500.

[0081] For example, at least a portion of the orthographic projection of the second package edge 500b on the substrate 110 may be located outside the orthographic projection of the first buffer structure 610 on the substrate 110.

[0082] Optionally, the first buffer structure 610 may have a smaller elastic modulus and a smaller softening temperature, allowing the first buffer structure 610 to better mitigate impact or release stress through its own deformation. For example, the elastic modulus of the first buffer structure 610 is smaller than that of the encapsulation structure 500.

[0083] Optionally, the material of the first buffer structure 610 can be configured in various ways. As an example, when at least a portion of the first buffer structure 610 is in contact with the packaging plate 400, the material of the first buffer structure 610 in contact with the packaging plate 400 may include a transparent material, so that when the material of the packaging structure 500 is processed from one side of the packaging plate 400 using, for example, a laser sintering process, the first buffer structure 610 is less likely to block the laser, which is beneficial for the laser to irradiate the material of the packaging structure more fully.

[0084] As an example, the material of the first buffer structure 610 may include a metallic material (e.g., the material of the first buffer structure 610 may include at least one of aluminum, copper, gold, platinum, titanium, molybdenum, and chromium); and / or, the material of the first buffer structure 610 may include a reflective material. When the material of the first buffer structure 610 includes a metallic material, the first buffer structure 610 can be disposed in the same layer and with the same material as a portion of the metallic structure in the display panel 10, which is beneficial to improving the manufacturing efficiency of the display panel 10. When the material of the first buffer structure 610 includes a reflective material, the first buffer structure 610 can be disposed on the side of the encapsulation structure 500 close to the substrate 100, so that when the material of the encapsulation structure 500 is processed, for example, using a laser sintering process, the first buffer structure 610 can improve the utilization rate of the laser by reflecting the laser, allowing the laser to be more fully directed towards the material of the encapsulation structure 500.

[0085] Optionally, when the first buffer structure 610 is located on the side of the encapsulation structure 500 close to the substrate 100, the first buffer structure 610 can be set in the same layer and material as part of the film layer structure in the pixel circuit 121, so that the fabrication of part of the film layer structure in the pixel circuit 121 and the first buffer structure 610 can be completed together during the fabrication process of the display panel 10, thereby improving the fabrication efficiency of the display panel 10.

[0086] For example, when the first buffer structure 610 is located on the side of the encapsulation structure 500 close to the substrate 100, the first buffer structure 610 can be set in the same layer and material as the source and drain electrodes 121ab, which is beneficial to improving the manufacturing efficiency of the display panel 10, and also beneficial to the contact between the first buffer structure 610 and the encapsulation structure 500.

[0087] In a further example, when the first buffer structure 610 is located on the side of the encapsulation structure 500 near the substrate 100, in the direction away from the substrate 110, the first buffer structure 610 includes a first material layer, a second material layer, and a third material layer stacked sequentially. The first material layer may include a titanium material layer, a molybdenum material layer, or a chromium material layer; the second material layer may include an aluminum material layer, a copper material layer, a gold material layer, or a platinum material layer; and the third material layer may include a titanium material layer, a molybdenum material layer, or a chromium material layer. This allows the first buffer structure 610 as a whole to have a suitable elastic modulus, a suitable softening temperature, and good reflective properties. The first material layer and the third material layer may be made of the same material.

[0088] Optionally, when the first buffer structure 610 is located on the side of the encapsulation structure 500 close to the substrate 100, at least a portion of the signal traces are multiplexed as the first buffer structure 610. This means that during the fabrication of the display panel 10, there is no need to add a new process to fabricate the first buffer structure 610 separately. That is, the signal traces extending below the encapsulation structure 500 and overlapping the edge of the encapsulation structure 500 can serve as the first buffer structure 610, so that the signal traces can play a role in buffering and releasing stress, thereby improving the fabrication efficiency of the display panel 10.

[0089] For example, at least one of the positive power supply voltage signal line and the negative power supply voltage signal line is multiplexed as a first buffer structure 610.

[0090] Optionally, when at least one of the positive power supply voltage signal line and the negative power supply voltage signal line is multiplexed as the first buffer structure 610, both the positive power supply voltage signal line and the negative power supply voltage signal line can be set in the same layer and material as the source and drain electrodes 121ab. This is beneficial to improving the manufacturing efficiency of the display panel 10, and also to facilitating the contact between the first buffer structure 610 and the packaging structure 500.

[0091] For ease of description, the following embodiments are illustrated by taking the first buffer structure 610 located on the side of the package structure 500 close to the substrate 100, and at least one of the positive power supply voltage signal line and the negative power supply voltage signal line as the first buffer structure 610.

[0092] Figure 8 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application. Optionally, Figure 8 Can be Figure 1 A partial cross-sectional view of the display panel 10 corresponding to the position BB in the middle.

[0093] Optional, such as Figure 8As shown, the array structure 120 may include an auxiliary conductive structure 123, which may be electrically connected to the first buffer structure 610, so that the auxiliary conductive structure 123 can also be used to transmit signals in the first buffer structure 610, thereby helping to reduce the resistance of signal transmission in the first buffer structure 610.

[0094] For example, the auxiliary conductive structure 123 can be connected to the negative power supply voltage signal line multiplexed as the first buffer structure 610, thereby helping to reduce the resistance during the transmission of the negative power supply voltage signal.

[0095] Optionally, the auxiliary conductive structure 123 may be located in at least one of the first region NA1, the second region NA2 and the third region NA3, which is beneficial to increasing the size of the auxiliary conductive structure 123, thereby further reducing the resistance during signal transmission in the first buffer structure 610.

[0096] Optionally, the auxiliary conductive structure 123 may not be located within the fourth region NA4, so that the arrangement of the auxiliary conductive structure 123 does not easily affect the arrangement of the structure within the fourth region NA4.

[0097] Optionally, the first buffer structure 610 may also be located at least in at least one of the first region NA1, the second region NA2, and the third region NA3, thereby helping to further reduce the resistance during signal transmission in the first buffer structure 610. For example, the negative power supply voltage signal line multiplexed as the first buffer structure 610 may be located at least in at least one of the first region NA1, the second region NA2, and the third region NA3.

[0098] Optionally, the negative power supply voltage signal line multiplexed as the first buffer structure 610 may be partially located within the fourth region NA4, and the negative power supply voltage line may fan outward through the fourth region NA4. For example, the negative power supply voltage signal line multiplexed as the first buffer structure 610 may be partially located within the corner region NA4b and the fan-out region NA4a.

[0099] Optionally, the orthographic projection of the auxiliary conductive structure 123 on the substrate 110 may at least partially overlap with the orthographic projection of the package structure 500 on the substrate 110, thereby reducing the resistance during signal transmission in the first buffer structure 610 and reducing the impact of the auxiliary conductive structure 123 on the size of the non-display area NA in the display panel 10, which in turn helps to reduce the bezel of the display panel 10.

[0100] Optionally, the auxiliary conductive structure 123 can be set in the same layer and material as some of the film layer structures in the pixel circuit 121, so that the fabrication of some of the film layer structures in the pixel circuit 121 and the auxiliary conductive structure 123 can be completed together during the fabrication process of the display panel 10, thereby improving the fabrication efficiency of the display panel 10.

[0101] For example, the auxiliary conductive structure 123 may be disposed in the same layer and with the same material as the gate 121aa or the second electrode 121bb.

[0102] Optionally, the material of the auxiliary conductive structure 123 may include a reflective material, so that when the material of the package structure 500 is processed, for example, using a laser sintering process, the auxiliary conductive structure 123 can improve the utilization of the laser by reflecting the laser, so that the laser can be more fully directed towards the material of the package structure 500.

[0103] Optionally, the array structure 120 further includes an bonding layer 122 located on the side of the auxiliary conductive structure 123 facing away from the substrate 110. At least a portion of the surface of the bonding layer 122 facing away from the substrate 110 is spaced from the first buffer structure 610 and in contact with the encapsulation structure 500, which is beneficial to improving the bonding effect between the encapsulation structure 500 and the substrate 100, thereby improving the encapsulation effect of the encapsulation structure 500.

[0104] For example, the material of the encapsulation structure 500 includes inorganic materials, and the material of the bonding layer 122 includes inorganic materials, so that the encapsulation structure 500 and the bonding layer 122 can have a good bonding effect.

[0105] Optionally, the bonding layer 122 can be made of the same layer and material as a portion of the insulating layer 124 in the array structure 120, so that the partial insulating layer 124 and the bonding layer 122 can be fabricated together during the fabrication process of the display panel 10, thereby improving the fabrication efficiency of the display panel 10.

[0106] For example, when the auxiliary conductive structure 123 can be disposed in the same layer and with the same material as the gate 121aa, the array structure 120 may include two bonding layers 122 (not shown in the figure) stacked in the first direction X, wherein one bonding layer 122 can be disposed in the same layer and with the same material as the first insulating layer 124a, and the other bonding layer 122 can be disposed in the same layer and with the same material as the second insulating layer 124b; when the auxiliary conductive structure 123 can be disposed in the same layer and with the same material as the second electrode 121bb, such as Figure 8 As shown, the bonding layer 122 can be made of the same layer and material as the second insulating layer 124b.

[0107] Optionally, the bonding layer 122 can be integrally formed with a portion of the insulating layer 124 (not shown in the figure); or, as... Figure 8 As shown, the bonding layer 122 can be spaced apart from the insulating layer 124 of the same layer. That is, during the preparation of the display panel 10, the material of part of the insulating layer 124 can be patterned to form the bonding layer 122 and the insulating layer 124 of the same layer that are spaced apart, so that moisture is not easy to invade into the display area AA through the bonding layer 122.

[0108] Figure 9 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application.

[0109] Optionally, to facilitate the electrical connection between the first buffer structure 610 and the auxiliary conductive structure 123, the bonding layer 122 can be arranged in various ways. As an example, such as... Figure 8 As shown, at least a portion of the surface of the auxiliary conductive structure 123 facing away from the substrate 110 may not be covered by the bonding layer 122, allowing the first buffer layer to be directly bonded to the side of the auxiliary conductive structure 123 facing away from the substrate 110, thereby achieving an electrical connection between the buffer structure 600 and the auxiliary conductive structure 123. As another example, such as... Figure 9 As shown, the bonding layer 122 may be partially located between the first buffer structure 610 and the auxiliary conductive structure 123. The bonding layer 122 has a connecting hole 122a. The first buffer structure 610 is electrically connected to the auxiliary conductive structure 123 through the connecting hole 122a, which allows the bonding layer 122 to have a larger size. This helps to reduce the risk that the contact area between the bonding layer 122 and the packaging structure 500 may be small due to process fluctuations.

[0110] Optionally, the number of first buffer structures 610 can be set in various ways, and the display panel 10 may include one or at least two first buffer structures.

[0111] Figure 10 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in an embodiment of this application. Figure 11 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in another embodiment of this application. Figure 12 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in another embodiment of this application. Optionally, Figure 10 Can be Figure 1 A schematic diagram of the encapsulation structure 500 and the first buffer structure 610 at the position corresponding to the middle J position; Figure 11 Can be Figure 1 A schematic diagram of the encapsulation structure 500 and the first buffer structure 610 at the position corresponding to the K position in the middle; Figure 12 Can be Figure 1 A schematic diagram of the encapsulation structure 500 and the first buffer structure 610 at the position corresponding to the L position.

[0112] Optional, such as Figures 7 to 12As shown, the first buffer structure 610 includes a first sub-buffer structure 611 and a second sub-buffer structure 612 spaced apart, with at least a portion of the first sub-buffer structure 611 located on the side of the second sub-buffer structure 612 away from the display area AA. By setting the first sub-buffer structure 611 and the second sub-buffer structure 612, the first sub-buffer structure 611 and the second sub-buffer structure 612 can alternately contact the package structure 500 without significantly affecting the arrangement of signal traces. This ensures that short circuits are less likely to occur between signal traces, and that the edges of the package structure 500 (e.g., the first package edge 500a) do not have too many parts that are not in contact with the first buffer structure 610. As a result, the first buffer structure 610 can provide better stress relief for the overall edges of the package structure 500.

[0113] For example, a portion of the orthogonal projection of the first package edge 500a on the substrate 110 may be located within the orthogonal projection of the first sub-buffer structure 611 on the substrate 110, and another portion of the orthogonal projection of the first package edge 500a on the substrate 110 may be located within the orthogonal projection of the second sub-buffer structure 612 on the substrate 110.

[0114] For ease of description, the following embodiments will be described using the example of the first buffer structure 610 being mainly used to release the stress of the first package edge 500a and to mitigate the impact transmitted from the display area AA to the non-display area NA.

[0115] Optionally, the positive power supply voltage signal line can be reused as the first sub-buffer structure 611, and the negative power supply voltage signal line can be reused as the second sub-buffer structure 612, so that the arrangement of the positive power supply voltage signal line and the arrangement of the negative power supply voltage signal line are less likely to interfere with each other.

[0116] For example, the positive power supply voltage signal line may be partially located within the fan-out area NA4a, and the positive power supply voltage signal line may extend from the fan-out area NA4a to the display area AA in a third direction Z, so as to realize the electrical connection between the positive power supply voltage signal line and the pixel circuit 121 in the display area AA; the negative power supply voltage signal line may be partially located within the corner area NA4b and the fan-out area NA4a, and the negative power supply voltage signal line may extend into the display area AA via at least one of the first area NA1, the second area NA2 and the third area NA3, so as to realize the electrical connection between the negative power supply voltage signal line and the pixel circuit 121 in the display area AA.

[0117] Optionally, the positive power supply voltage signal line may include a first fan-out segment 611c located in the fan-out region NA4a, the first fan-out segment 611c may extend in the third direction Z, and the first fan-out segment 611c may be used for electrical connection with a control device (e.g., a control chip); the negative power supply voltage signal line may include a second fan-out segment 612c located in the fan-out region NA4a, the second fan-out segment 612c may extend in the third direction Z, and the second fan-out segment 612c may be used for electrical connection with a control device (e.g., a control chip).

[0118] Optionally, to facilitate the fan-out of the positive power supply voltage signal line and the negative power supply voltage signal line, the orthogonal projection of at least one of the first fan-out segment 611c and the second fan-out segment 612c on the substrate 110 may at least partially overlap with the orthogonal projection of the package structure 500 on the substrate 110.

[0119] In a further example, the orthographic projection of the edges of the encapsulation structure 500 in the first region NA1, the second region NA2, and the third region NA3 onto the substrate 110 is at least partially within the orthographic projection of the second sub-buffer structure 612 onto the substrate 110 (e.g., the orthographic projection of the first encapsulation edge 500a in the first region NA1, the second region NA2, and the third region NA3 onto the substrate 110 is at least partially within the orthographic projection of the second sub-buffer structure 612 onto the substrate 110), and the orthographic projection of the edges of the encapsulation structure 500 in the first region NA1, the second region NA2, and the third region NA3 onto the substrate 110 is close to the orthographic projection of the first sub-buffer structure 612 onto the substrate 110. The orthographic projection interval on the substrate 110 (e.g., the orthographic projection interval of the first encapsulation edge 500a in the first region NA1, the second region NA2, and the third region NA3 on the substrate 110, and the orthographic projection interval of the first sub-buffer structure 611 on the substrate 110; the orthographic projection interval of the second encapsulation edge 500b in the first region NA1, the second region NA2, and the third region NA3 on the substrate 110, and the orthographic projection interval of the first sub-buffer structure 611 on the substrate 110) allows the first sub-buffer structure 611 to not extend into the first region NA1, the second region NA2, and the third region NA3, thereby facilitating the reduction of the bezel of the display panel 10.

[0120] Optionally, the orthographic projection of the edge of the package structure 500 onto the substrate 110 may not be entirely within the orthographic projection of the first buffer structure 610 onto the substrate 110. To reduce the risk of short circuit between the first sub-buffer structure 611 and the second sub-buffer structure 612, the first sub-buffer structure 611 and the second sub-buffer structure 612 are not connected, so that at the interval between the first sub-buffer structure 611 and the second sub-buffer structure 612, the orthographic projection of the edge of the package structure 500 onto the substrate 110 may not be within the orthographic projection of the first buffer structure 610 onto the substrate 110.

[0121] For example, there is a gap space 610c between the first sub-buffer structure 611 and the second sub-buffer structure 612. The edge of the encapsulation structure 500 includes an overlapping portion 501 and a non-overlapping portion 502. The orthographic projection of the overlapping portion 501 on the substrate 110 is located within the orthographic projection of the first buffer structure 610 on the substrate 110. The orthographic projection of the non-overlapping portion 502 on the substrate 110 overlaps with the orthographic projection of the gap space 610c on the substrate 110.

[0122] Optionally, the length of the orthographic projection of the non-overlapping portion 502 of at least one side of the packaging structure 500 onto the substrate 110 is less than or equal to 50 μm, so that the edge of the packaging structure 500 is not likely to have an excessive length that does not overlap with the first buffer structure 610, thereby allowing the first buffer structure 610 to better release the stress at the edge of the packaging structure 500.

[0123] For example, the length of the non-overlapping portion 502 of the first package edge 500a projected onto the substrate 110 is less than or equal to 50 μm.

[0124] Optionally, within the first region NA1 and the second region NA2, the length of the orthogonal projection of the non-overlapping portion 502 onto the substrate 110 can refer to the size of the orthogonal projection of the non-overlapping portion 502 onto the substrate 110 in the third direction Z; within the third region NA3 and the fourth region NA4, the length of the orthogonal projection of the non-overlapping portion 502 onto the substrate 110 can refer to the size of the orthogonal projection of the non-overlapping portion 502 onto the substrate 110 in the second direction Y.

[0125] Optionally, in the second direction Y, the distance between the non-overlapping portion 502 of at least one edge of the encapsulation structure 500 and the center of the fourth region NA4 is greater than or equal to 5 mm. This allows the first buffer structure 610 at the more central position of the fourth region NA4 to provide better buffering when the central region of the display panel 10 is subjected to external impact. Since the central region of the display panel 10 is more prone to generating large-scale shock waves when subjected to external impact, setting the distance between the non-overlapping portion 502 of at least one edge of the encapsulation structure 500 and the center of the fourth region NA4 to be greater than or equal to 5 mm helps to improve the overall impact resistance of the display panel 10.

[0126] Optionally, the non-overlapping portion 502 of at least one edge of the encapsulation structure 500 is located in the fourth region NA4, and the edge of at least one side of the encapsulation structure 500 in the first region NA1, the second region NA2 and the third region NA3 can overlap with the first buffer structure 610 in a relatively continuous manner.

[0127] For example, the non-overlapping portion 502 of the first encapsulation edge 500a is located in the fourth region NA4, and the first encapsulation edge 500a in the first region NA1, the second region NA2 and the third region NA3 can overlap with the second sub-buffer structure 612 in a relatively continuous manner.

[0128] Optionally, the non-overlapping portion 502 of at least one edge of the package structure 500 is located at least in the corner region NA4b. Since the positive power supply voltage signal line may not extend into the first region NA1, the second region NA2, and the third region NA3, the spacing 610c between the first sub-buffer structure 611 and the second sub-buffer structure 612 is at least partially located in the corner region NA4b, meaning that the first sub-buffer structure 611 and the second sub-buffer structure 612 can alternately contact the package structure 500 at the corner region NA4b. For example, the non-overlapping portion 502 of the first package edge 500a is at least located in the corner region NA4b, and the first sub-buffer structure 611 and the second sub-buffer structure 612 can alternately contact the first package edge 500a at the corner region NA4b.

[0129] Optionally, within the fourth region NA4, there are multiple ways to position the first sub-buffer structure 611 and the second sub-buffer structure 612 relative to the package structure 500. The relative positional relationship between the first sub-buffer structure 611, the second sub-buffer structure 612, and the package structure 500 can be adjusted by adjusting the width of the package structure 500, the arrangement position of the first sub-buffer structure 611, or the arrangement position of the second sub-buffer structure 612.

[0130] In some examples, such as Figure 12 As shown, in the fourth region NA4, the orthographic projection of the first buffer edge 610a extending along the second direction Y in the first sub-buffer structure 611 onto the substrate 110 is outside the orthographic projection of the encapsulation structure 500 onto the substrate 110, and the orthographic projection of the second buffer edge 610b extending along the second direction Y in the first sub-buffer structure 611 onto the substrate 110 is inside the orthographic projection of the encapsulation structure 500 onto the substrate 110. This allows the first sub-buffer structure 611 in the fourth region NA4 to effectively release the stress at the first encapsulation edge 500a, and the first sub-buffer structure 611 in the fourth region NA4 can be used to mitigate the impact transmitted from the display area AA to the non-display area NA.

[0131] Optional, such as Figure 12As shown, in the fourth region NA4, the orthographic projection of the first buffer edge 610a extending along the second direction Y in the second sub-buffer structure 612 onto the substrate 110 is located outside the orthographic projection of the encapsulation structure 500 onto the substrate 110, and the orthographic projection of the second buffer edge 610b extending along the second direction Y in the second sub-buffer structure 612 onto the substrate 110 is also located outside the orthographic projection of the encapsulation structure 500 onto the substrate 110. This makes it less likely that the second sub-buffer structure 612 in the fourth region NA4 will cause significant obstruction to the encapsulation structure 500, resulting in a larger contact area between the encapsulation structure 500 and the underlying insulating layer 124, thereby improving the encapsulation effect of the encapsulation structure 500 in the fourth region NA4.

[0132] Figure 13 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in another embodiment of this application.

[0133] Or optional, such as Figure 13 As shown, in the fourth region NA4, the orthographic projection of the first buffer edge 610a extending along the second direction Y in the second sub-buffer structure 612 onto the substrate 110 is located within the orthographic projection of the encapsulation structure 500 onto the substrate 110, and the orthographic projection of the second buffer edge 610b extending along the second direction Y in the second sub-buffer structure 612 onto the substrate 110 is located outside the orthographic projection of the encapsulation structure 500 onto the substrate 110. This allows the second sub-buffer structure 612 in the fourth region NA4 to effectively release the stress at the second encapsulation edge 500b, and the second sub-buffer structure 612 in the fourth region NA4 can be used to mitigate the impact transmitted from the edge of the display panel 10 to the display area AA.

[0134] Figure 14 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in another embodiment of this application.

[0135] In other examples, such as Figure 14As shown, in the fourth region NA4, the orthogonal projection of the first buffer edge 610a extending along the second direction Y in the first sub-buffer structure 611 onto the substrate 110 is at least partially outside the orthogonal projection of the package structure 500 onto the substrate 110. Similarly, the orthogonal projection of the second buffer edge 610b extending along the second direction Y in the first sub-buffer structure 611 onto the substrate 110 is at least partially outside the orthogonal projection of the package structure 500 onto the substrate 110. The orthogonal projection of the first buffer edge 610a extending along the second direction Y in the second sub-buffer structure 612 onto the substrate 110 is also at least partially outside the orthogonal projection of the package structure 500 onto the substrate 110. The orthogonal projection on 0 is located outside the orthogonal projection of the packaging structure 500 on the substrate 110, and the orthogonal projection of the second buffer edge 610b extending along the second direction Y in the second sub-buffer structure 612 on the substrate 110 is located within the orthogonal projection of the packaging structure 500 on the substrate 110, so that the second sub-buffer structure 612 in the fourth region NA4 can play a better role in releasing the stress at the first packaging edge 500a, and the second sub-buffer structure 612 in the fourth region NA4 can be used to alleviate the impact transmitted from the display area AA to the non-display area NA.

[0136] Optionally, when the second sub-buffer structure 612 in the fourth region NA4 can effectively relieve stress at the first package edge 500a, the orthogonal projection of the first fan-out segment 611c of the positive power supply voltage signal line multiplexed as the first sub-buffer structure 611 on the substrate 110 can at least partially overlap with the orthogonal projection of the package structure 500 on the substrate 110, so that the first fan-out segment 611c can also be used to effectively relieve stress at the package structure 500.

[0137] For example, the orthographic projection of the first fan-out segment 611c on the substrate 110 can be the orthographic projection of the package structure 500 on the substrate 110 along a third direction Z.

[0138] Optionally, when the second sub-buffer structure 612 within the fourth region NA4 can effectively relieve stress at the first package edge 500a, the non-overlapping portion 502 of at least one edge of the package structure 500 can be located at least within the fan-out region NA4a. Since both positive and negative power supply voltage signal lines can fan out through the fan-out region NA4a, and the positive and negative power supply voltage signal lines need to be spaced apart in the fan-out region NA4a, the gap space 610c between the first sub-buffer structure 611 and the second sub-buffer structure 612 is at least partially located in the fan-out region NA4a. That is, the first sub-buffer structure 611 and the second sub-buffer structure 612 can alternately contact the package structure 500 at the fan-out region NA4a. For example, the non-overlapping portion 502 of the first package edge 500a is at least located in the fan-out region NA4a, and the first sub-buffer structure 611 and the second sub-buffer structure 612 can alternately contact the first package edge 500a at the fan-out region NA4a.

[0139] Figure 15 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in another embodiment of this application.

[0140] Optional, such as Figure 15 As shown, in order to improve the contact continuity between the first buffer structure 610 in the fourth region NA4 and the first package edge 500a, the first sub-buffer structure 611 in the fourth region NA4 can also be used to better release the stress at the first package edge 500a, and the first sub-buffer structure 611 in the fourth region NA4 can be used to alleviate the impact transmitted from the display area AA to the non-display area NA.

[0141] For example, the first sub-buffer structure 611 includes at least two first segments 611a and at least one second segment 611b located within the fourth region NA4. The first segments 611a extend along the second direction Y, and their orthogonal projection on the substrate 110 is outside the orthogonal projection of the package structure 500 on the substrate 110. The second segments 611b are located between adjacent first segments 611a in the second direction Y. The second sub-buffer structure 612 includes at least two third segments 612a and at least two fourth segments 612b located within the fourth region NA4. The third segments 612a extend along the second direction Y, and the fourth segments 612b are located between adjacent first segments 611a in the second direction Y. Between the three segments 612a, the fourth segment 612b extends at least along the third direction Z, and there is a gap between adjacent fourth segments 612b in the second direction Y. The second segment 611b is at least partially located within the gap between adjacent fourth segments 612b in the second direction Y. The orthographic projection of the edge of the package structure 500 near the display area AA (i.e., the first package edge 500a) on the substrate 110 is located within the orthographic projection of the second segment 611b on the substrate 110, so that the second segment 611b can play a better role in relieving the stress at the first package edge 500a, and the second segment 611b can be used to alleviate the impact transmitted from the display area AA to the non-display area NA.

[0142] Optionally, the second fan-out segment 612c can be connected to the end of the fourth segment 612b furthest from the display area AA.

[0143] Optionally, there are several ways to set the shape of the second segment 611b. As an example, such as Figure 15As shown, the width of the second segment 611b is greater than the width of the first segment 611a (for example, the width of the first segment 611a may refer to the size of the first segment 611a in the third direction Z; the width of the second segment 611b may refer to the size of the second segment 611b in the third direction Z), which is beneficial to realize that the orthographic projection of the first package edge 500a on the substrate 110 is located within the orthographic projection of the second segment 611b on the substrate 110.

[0144] Figure 16 This is a schematic diagram of an encapsulation structure 500 and a first buffer structure 610 provided in another embodiment of this application.

[0145] As another example, such as Figure 16 As shown, the second segment 611b includes at least two bent segments with different extending directions (for example, the bent segments may include a first bent segment 611ba extending along the second direction Y and two second bent segments 611bb extending along the third direction Z, the two second bent segments 611bb may be connected to the two first segments 611a respectively, and the first bent segment 611ba may be connected between adjacent second bent segments 611bb), so that the second segment 611b can be bent and extended toward the side away from the display area AA, so that the orthographic projection of the first package edge 500a on the substrate 110 is located within the orthographic projection of the second segment 611b on the substrate 110 (for example, the orthographic projection of the first package edge 500a on the substrate 110 is located within the orthographic projection of the first bent segment 611ba on the substrate 110).

[0146] Figure 17 This is a schematic diagram of the structure of a substrate 100, a packaging structure 500, and a second buffer structure 620 provided in an embodiment of this application. Figure 18 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application.

[0147] In some alternative embodiments, such as Figure 17 and Figure 18 As shown, the buffer structure 600 includes a second buffer structure 620, which is located in the non-display area NA. The second buffer structure 620 is spaced apart from the encapsulation structure 500. The second buffer structure 620 can be used to mitigate the impact transmitted to the encapsulation structure 500 in a direction parallel to the plane of the substrate 110, thereby improving the structural strength of the display panel 10.

[0148] For example, such as Figure 18As shown, the second buffer structure 620 can be located at least on the side of the encapsulation structure 500 close to the display area AA, so that the second buffer structure 620 can be used to mitigate the impact transmitted from the display area AA to the encapsulation structure 500, thereby improving the structural strength of the display panel 10.

[0149] Figure 19 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application.

[0150] For example, such as Figure 19 As shown, the second buffer structure 620 can be located at least on the side of the encapsulation structure 500 away from the display area AA, so that the second buffer structure 620 can be used to mitigate the impact transmitted from the edge encapsulation structure 500 of the display panel 10, thereby improving the structural strength of the display panel 10.

[0151] Optionally, in a direction parallel to the plane of the substrate 110, the distance between the second buffer structure 620 and the package structure 500 is greater than or equal to 50 μm, so that the second buffer structure 620 can better block the impact at a position relatively far away from the package structure 500, thereby helping to reduce the impact of the impact on the package structure 500 and its connected structures.

[0152] Optionally, the second buffer structure 620 may have a smaller elastic modulus, allowing it to better mitigate impact or release stress through its own deformation. For example, the elastic modulus of the second buffer structure 620 may be smaller than that of the encapsulation structure 500.

[0153] Optionally, the material of the second buffer structure 620 includes an adhesive, allowing the second buffer structure 620 to adhere well to other structures and have a low modulus of elasticity. For example, the material of the second buffer structure 620 includes a UV-curable adhesive.

[0154] Optionally, the second buffer structure 620 can be positioned relative to the encapsulation plate 400 and the substrate 100 in various ways. The buffering effect of the buffer structure 600 can be adjusted by adjusting the position of the second buffer structure 620 relative to the encapsulation plate 400 and the substrate 100.

[0155] In some examples, such as Figure 18 and Figure 19 As shown, the second buffer structure 620 can contact the substrate 100 and be spaced apart from the encapsulation plate 400, so that the second buffer structure 620 can be used to release the tensile stress generated by the encapsulation structure 500 near the end of the substrate 100, and / or so that the second buffer structure 620 can be used to mitigate the impact transmitted from the display area AA to the substrate 100, thereby making the substrate 100 less likely to be damaged.

[0156] Optionally, during the fabrication of the display panel 10, after the material of the encapsulation structure 500 and the second buffer structure 620 are fabricated on the substrate 100, the encapsulation plate 400 is then covered, and the material of the encapsulation structure 500 is then processed by a high-temperature process to form the encapsulation structure 500.

[0157] Figure 20 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application.

[0158] In some examples, such as Figure 20 As shown, the second buffer structure 620 can contact the encapsulation plate 400 and be spaced apart from the substrate 100, so that the second buffer structure 620 can be used to release the tensile stress generated by the encapsulation structure 500 near the end of the encapsulation plate 400, and / or so that the second buffer structure 620 can be used to mitigate the impact transmitted from the display area AA to the encapsulation plate 400, thereby making the encapsulation plate 400 less likely to be damaged.

[0159] Optionally, during the fabrication of the display panel 10, the material of the encapsulation structure 500 can be fabricated on the substrate 100, and a second buffer structure 620 can be fabricated on the encapsulation plate 400. Then, the encapsulation plate 400 is covered onto the material of the encapsulation structure 500, and then the material of the encapsulation structure 500 is processed by a high-temperature process to form the encapsulation structure 500.

[0160] Figure 21 This is a partial cross-sectional schematic diagram of a display panel 10 provided in another embodiment of this application.

[0161] In some examples, such as Figure 21 As shown, the second buffer structure 620 can contact the encapsulation plate 400 and the substrate 100 (for example, the two ends of the second buffer structure 620 in the first direction X can contact the encapsulation plate 400 and the substrate 100 respectively), so that the second buffer structure 620 can be used to release the tensile stress generated at both ends of the encapsulation structure 500 in the first direction X, and / or so that the second buffer structure 620 can be used to mitigate the impact transmitted from the display area AA to the encapsulation plate 400 and the substrate 100, thereby making the encapsulation plate 400 and the substrate 100 less likely to be damaged.

[0162] Optionally, during the fabrication of the display panel 10, the material of the encapsulation structure 500 can be fabricated on the substrate 100, and a second buffer structure 620 can be fabricated on at least one of the substrate 100 and the encapsulation plate 400. Then, the encapsulation plate 400 is covered onto the material of the encapsulation structure 500, and then the material of the encapsulation structure 500 is processed by a high-temperature process to form the encapsulation structure 500.

[0163] Figure 22This is a schematic diagram of an encapsulation structure 500, a first buffer structure 610, and a second buffer structure 620 provided in an embodiment of this application.

[0164] Optional, such as Figure 22 As shown, when the buffer structure 600 includes the second buffer structure 620, the buffer structure 600 may also include the first buffer structure 610 described in the foregoing embodiments, so that the first buffer structure 610 and the second buffer structure 620 can jointly mitigate the impact.

[0165] As an example, the buffer structure 600 may include a first buffer structure 610 and a second buffer structure 620. The first buffer structure 610 may include a first sub-buffer structure 611 and a second sub-buffer structure 612. In the first sub-buffer structure 611, only the orthographic projection of the first fan-out segment 611c on the substrate 110 may partially overlap with the package structure 500. The orthographic projection of the second package edge 500b on the substrate 110 may be at least partially located within the orthographic projection of the second sub-buffer structure 612 on the substrate 110.

[0166] Optionally, the orthographic projection of the second buffer structure 620 on the substrate 110 at least partially overlaps with the orthographic projection of the first buffer structure 610 on the substrate 110, so that the first buffer structure 610 and the second buffer structure 620 can effectively mitigate the impact together at the same or similar positions.

[0167] For example, the orthographic projection of the second buffer structure 620 on the substrate 110 at least partially overlaps with the orthographic projection of the portion of the first sub-buffer structure 611 outside the first fan-out segment 611c on the substrate 110.

[0168] Optionally, the second buffer structure 620 can be located on the side of the first sub-buffer structure 611 away from the substrate 110. That is, the first buffer structure 610 can be prepared first, and then the second buffer structure 620 can be prepared, so that the second buffer structure 620 can play a certain protective role for the first sub-buffer structure 611.

[0169] Please see Figures 1 to 22An embodiment of the first aspect of this application also provides a display panel 10. The display panel 10 has a display area AA and a non-display area NA surrounding the display area AA. The display panel 10 includes a substrate 100, an encapsulation plate 400, an encapsulation structure 500, and a first buffer structure 610. The substrate 100 is located between the display area AA and the non-display area NA, and the substrate 100 includes a substrate 110 and an array structure 120 disposed on one side of the substrate 110 in a first direction X. The encapsulation plate 400 is located between the display area AA and the non-display area NA, and the encapsulation plate 400 is disposed on the side of the array structure 120 opposite to the substrate 110. The encapsulation structure 500 is located in the non-display area NA and surrounds the display area AA, and the encapsulation structure 500 is disposed between the substrate 100 and the encapsulation plate 400. The first buffer structure 610 is at least located in the non-display area NA, the first buffer structure 610 is disposed between the encapsulation plate 400 and the substrate 100, and the first buffer structure 610 and the encapsulation structure 500 are in contact with at least one surface of the first direction X. In the direction parallel to the plane of the substrate 110, the encapsulation structure 500 has a first encapsulation edge 500a and a second encapsulation edge 500b facing away from each other. The first encapsulation edge 500a is located on the side of the second encapsulation edge 500b closer to the display area AA. The orthographic projection of the first encapsulation edge 500a on the substrate 110 and the orthographic projection of the first buffer structure 610 on the substrate 110 have a first overlapping area. The orthographic projection of the second encapsulation edge 500b on the substrate 110 and the orthographic projection of the first buffer structure 610 on the substrate 110 have a second overlapping area. The first overlapping area is greater than the second overlapping area.

[0170] In the display panel 10 provided in the embodiments of this application, the encapsulation structure 500, the substrate 100 and the encapsulation plate 400 can be enclosed to form a sealed space, and the devices in the sealed space can be well encapsulated.

[0171] By setting a first buffer structure 610 between the encapsulation plate 400 and the substrate 100 in the non-display area NA, at least one of the encapsulation plate 400 and the substrate 100 is brought into contact with the first buffer structure 610, and the first overlapping area is set to be greater than the second overlapping area, so that the first buffer structure 610 can better release the tensile stress exerted on the encapsulation plate 400 and / or the substrate 100 by the edge of the encapsulation structure 500 near the display area AA, and / or so that the first buffer structure 610 can better alleviate the impact transmitted from the display area AA, thereby improving the structural strength of the display panel 10.

[0172] Optionally, the display panel 10 provided in the first aspect of this application may be the display panel 10 in any of the foregoing embodiments. Therefore, the display panel 10 provided in the embodiments of this application may have the structure and beneficial effects of the display panel 10 in any of the foregoing embodiments, and this application will not elaborate on it further.

[0173] An embodiment of the second aspect of this application provides a display device, which includes the display panel 10 of any of the above embodiments. Since the display device provided by the second aspect of this application includes the display panel 10 of any of the embodiments of the first aspect, it possesses the beneficial effects of the display panel 10 of any of the embodiments of the first aspect, which will not be elaborated further here.

[0174] The display devices in this application include, but are not limited to, mobile phones, personal digital assistants (PDAs), tablet computers, e-books, televisions, access control systems, smart landline phones, control consoles, and other devices with display functions.

[0175] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0176] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A display panel, characterized in that, The display panel has a display area and a non-display area surrounding the display area, the display panel comprising: A substrate, located between the display area and the non-display area, includes a substrate and an array structure disposed on one side of the substrate in a first direction; A packaging board is located between the display area and the non-display area, and the packaging board is disposed on the side of the array structure opposite to the substrate; An encapsulation structure is located in the non-display area and surrounds the display area, and the encapsulation structure is disposed between the substrate and the encapsulation plate; A buffer structure is located at least in the non-display area, the buffer structure is disposed between the encapsulation plate and the substrate, at least one of the encapsulation plate and the substrate is in contact with the buffer structure, and at least a portion of the buffer structure is located on the side of the encapsulation structure closer to the display area.

2. The display panel according to claim 1, characterized in that, The buffer structure includes a first buffer structure, which contacts at least one side surface of the encapsulation structure in the first direction, and the orthographic projection of the edge of the encapsulation structure on the substrate is at least partially located within the orthographic projection of the first buffer structure on the substrate. Preferably, in a direction parallel to the plane of the substrate, the encapsulation structure has a first encapsulation edge and a second encapsulation edge facing away from each other. The first encapsulation edge is located on the side of the second encapsulation edge closer to the display area. The orthographic projection of the first encapsulation edge on the substrate and the orthographic projection of the first buffer structure on the substrate have a first overlapping area. The orthographic projection of the second encapsulation edge on the substrate and the orthographic projection of the first buffer structure on the substrate have a second overlapping area. The first overlapping area is greater than the second overlapping area.

3. The display panel according to claim 2, characterized in that, The first buffer structure is located on the side of the packaging structure close to the substrate. The array structure includes a pixel circuit. The first buffer structure and a portion of the film layer structure in the pixel circuit are disposed on the same layer and made of the same material.

4. The display panel according to claim 2, characterized in that, The first buffer structure is located on the side of the packaging structure closer to the substrate, and the array structure includes signal traces, at least a portion of which are multiplexed as the first buffer structure; Preferably, the signal traces include positive power supply voltage signal lines and negative power supply voltage signal lines, and at least one of the positive power supply voltage signal lines and the negative power supply voltage signal lines is multiplexed as the first buffer structure.

5. The display panel according to claim 2, characterized in that, The orthographic projection of a portion of the first buffer structure onto the substrate is outside the orthographic projection of the packaging structure onto the substrate; Preferably, in a direction parallel to the plane of the substrate, the first buffer structure in the non-display area has a first buffer edge and a second buffer edge facing away from each other. The first buffer edge is located on the side of the second buffer edge closer to the display area. Among the first buffer edge and the second buffer edge that are adjacent to the edge of the encapsulation structure and extend in a parallel direction, the orthographic projection of one of the first buffer edge and the second buffer edge on the substrate is located within the orthographic projection of the encapsulation structure on the substrate, and the orthographic projection of the other of the first buffer edge on the substrate is located outside the orthographic projection of the encapsulation structure on the substrate. Preferably, in the first buffer edge that is adjacent to the edge of the packaging structure and extends parallel to the edge, the distance between the orthographic projection of the first buffer edge on the substrate and the orthographic projection of the edge of the packaging structure on the substrate is greater than or equal to 10 μm. And / or, in the second buffer edge adjacent to the edge of the package structure and extending parallel to the edge, the distance between the orthographic projection of the second buffer edge on the substrate and the orthographic projection of the edge of the package structure on the substrate is greater than or equal to 10 μm.

6. The display panel according to claim 2, characterized in that, The orthographic projection of a portion of the packaging structure onto the substrate is located outside the orthographic projection of the first buffer structure onto the substrate; Preferably, the first buffer structure is in contact with a portion of the surface of the encapsulation structure near the substrate in the first direction. The array structure includes multiple insulating layers, and the encapsulation structure is in partial contact with the insulating layers. The material of the encapsulation structure includes inorganic materials, and the material of the insulating layer in contact with the encapsulation structure includes inorganic materials.

7. The display panel according to claim 2, characterized in that, The first buffer structure is located on the side of the package structure closest to the substrate. The array structure includes signal traces, at least a portion of which are multiplexed into the first buffer structure. The array structure includes auxiliary conductive structures. The array structure further includes an adhesive layer located on the side of the auxiliary conductive structure away from the substrate, wherein the orthographic projection of the auxiliary conductive structure on the substrate at least partially overlaps with the orthographic projection of the encapsulation structure on the substrate, the auxiliary conductive structure is electrically connected to the first buffer structure, and at least a portion of the surface of the adhesive layer on the side away from the substrate is spaced from the first buffer structure and in contact with the encapsulation structure. Preferably, the material of the encapsulation structure includes inorganic materials, and the material of the bonding layer includes inorganic materials; Preferably, the non-display area includes a first area, a second area, a third area, and a fourth area. The first area and the second area are respectively located on both sides of the display area in a second direction, and the third area and the fourth area are respectively located on both sides of the display area in a third direction. The fourth area includes a fan-out area. The auxiliary conductive structure is located at least in at least one of the first area, the second area, and the third area. The first direction, the second direction, and the third direction intersect each other.

8. The display panel according to claim 2, characterized in that, The first buffer structure includes a first sub-buffer structure and a second sub-buffer structure that are spaced apart, with at least a portion of the first sub-buffer structure located on the side of the second sub-buffer structure away from the display area; Preferably, the first buffer structure is located on the side of the packaging structure close to the substrate, the array structure includes signal traces, the signal traces include positive power supply voltage signal lines and negative power supply voltage signal lines, the positive power supply voltage signal lines are multiplexed to form the first sub-buffer structure, and the negative power supply voltage signal lines are multiplexed to form the second sub-buffer structure.

9. The display panel according to claim 8, characterized in that, The first sub-buffer structure and the second sub-buffer structure have a gap space. The edge of the encapsulation structure includes an overlapping portion and a non-overlapping portion. The orthogonal projection of the overlapping portion on the substrate is located within the orthogonal projection of the first buffer structure on the substrate. The orthogonal projection of the non-overlapping portion on the substrate overlaps with the orthogonal projection of the gap space on the substrate. The length of the orthogonal projection of the non-overlapping portion of at least one edge of the encapsulation structure on the substrate is less than or equal to 50 μm. Preferably, the non-display area includes a first area, a second area, a third area, and a fourth area. The first area and the second area are respectively located on both sides of the display area in a second direction. The third area and the fourth area are respectively located on both sides of the display area in a third direction. The fourth area includes a fan-out area. The non-overlapping portion of at least one edge of the encapsulation structure is located in the fourth area. The first direction, the second direction, and the third direction intersect each other. Preferably, in the second direction, the distance between the non-overlapping portion of at least one edge of the packaging structure and the center of the fourth region is greater than or equal to 5 mm; Preferably, the fourth region further includes corner regions located on both sides of the fan-out region in the second direction, and the non-overlapping portion of at least one edge of the packaging structure is located at least in the corner regions.

10. The display panel according to claim 8, characterized in that, The non-display area includes a first area, a second area, a third area, and a fourth area. The first area and the second area are located on opposite sides of the display area in a second direction. The third area and the fourth area are located on opposite sides of the display area in a third direction. The fourth area includes a fan-out area. The orthographic projection of the edges of the encapsulation structures in the first region, the second region, and the third region onto the substrate is at least partially located within the orthographic projection of the second sub-buffer structure onto the substrate, and the orthographic projection of the edges of the encapsulation structures in the first region, the second region, and the third region onto the substrate is spaced apart from the orthographic projection of the first sub-buffer structure onto the substrate.

11. The display panel according to claim 10, characterized in that, In a direction parallel to the plane of the substrate, the first buffer structure within the non-display area has a first buffer edge and a second buffer edge facing away from each other, with the first buffer edge located on the side of the second buffer edge closer to the display area. In the fourth region, the orthographic projection of the first buffer edge extending along the second direction in the first sub-buffer structure onto the substrate is outside the orthographic projection of the encapsulation structure onto the substrate, and the orthographic projection of the second buffer edge extending along the second direction in the first sub-buffer structure onto the substrate is inside the orthographic projection of the encapsulation structure onto the substrate. Preferably, in the fourth region, the orthographic projection of the first buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located outside the orthographic projection of the encapsulation structure onto the substrate, and the orthographic projection of the second buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located outside the orthographic projection of the encapsulation structure onto the substrate. Alternatively, in the fourth region, the orthographic projection of the first buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located within the orthographic projection of the encapsulation structure onto the substrate, and the orthographic projection of the second buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located outside the orthographic projection of the encapsulation structure onto the substrate.

12. The display panel according to claim 10, characterized in that, In a direction parallel to the plane of the substrate, the first buffer structure within the non-display area has a first buffer edge and a second buffer edge facing away from each other, with the first buffer edge located on the side of the second buffer edge closer to the display area. In the fourth region, the orthographic projection of the first buffer edge extending along the second direction in the first sub-buffer structure onto the substrate is at least partially located outside the orthographic projection of the encapsulation structure onto the substrate; the orthographic projection of the second buffer edge extending along the second direction in the first sub-buffer structure onto the substrate is at least partially located outside the orthographic projection of the encapsulation structure onto the substrate; the orthographic projection of the first buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located outside the orthographic projection of the encapsulation structure onto the substrate; and the orthographic projection of the second buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located within the orthographic projection of the encapsulation structure onto the substrate.

13. The display panel according to claim 12, characterized in that, The first sub-buffer structure includes at least two first segments and at least one second segment located within the fourth region. The first segments extend along the second direction, and the orthographic projection of the first segment on the substrate lies outside the orthographic projection of the package structure on the substrate. The second segments are located between adjacent first segments in the second direction. The second sub-buffer structure includes at least two third segments and at least two fourth segments located within the fourth region. The third segments extend along the second direction, and the fourth segments are located between adjacent third segments in the second direction. The fourth segments extend at least along the third direction and are spaced apart from adjacent fourth segments in the second direction. The second segment is at least partially located within the interval between adjacent fourth segments in the second direction, and the orthographic projection of the edge of the encapsulation structure on the substrate near the display area is located within the orthographic projection of the second segment on the substrate; Preferably, the width of the second segment is greater than the width of the first segment; Alternatively, the second segment may include at least two bends that extend in opposite directions.

14. The display panel according to any one of claims 1 to 13, characterized in that, The buffer structure includes a second buffer structure, which is located in the non-display area and is spaced apart from the encapsulation structure. Preferably, in a direction parallel to the plane of the substrate, the spacing between the second buffer structure and the packaging structure is greater than or equal to 50 μm; Preferably, the elastic modulus of the second buffer structure is less than the elastic modulus of the encapsulation structure; Preferably, the buffer structure includes a first buffer structure, which contacts at least one side surface of the encapsulation structure in the first direction, and the orthographic projection of the edge of the encapsulation structure on the substrate is at least partially located within the orthographic projection of the first buffer structure on the substrate, and the orthographic projection of the second buffer structure on the substrate at least partially overlaps with the orthographic projection of the first buffer structure on the substrate.

15. A display panel, characterized in that, The display panel has a display area and a non-display area surrounding the display area, the display panel comprising: A substrate, located between the display area and the non-display area, includes a substrate and an array structure disposed on one side of the substrate in a first direction; A packaging board is located between the display area and the non-display area, and the packaging board is disposed on the side of the array structure opposite to the substrate; An encapsulation structure is located in the non-display area and surrounds the display area, and the encapsulation structure is disposed between the substrate and the encapsulation plate; A first buffer structure is located at least in the non-display area, the first buffer structure is disposed between the encapsulation plate and the substrate, and the first buffer structure is in contact with at least one surface of the encapsulation structure in the first direction. In a direction parallel to the plane of the substrate, the encapsulation structure has a first encapsulation edge and a second encapsulation edge facing away from each other. The first encapsulation edge is located on the side of the second encapsulation edge closer to the display area. The orthographic projection of the first encapsulation edge on the substrate and the orthographic projection of the first buffer structure on the substrate have a first overlapping area. The orthographic projection of the second encapsulation edge on the substrate and the orthographic projection of the first buffer structure on the substrate have a second overlapping area. The first overlapping area is greater than the second overlapping area.

16. The display panel according to claim 15, characterized in that, The first buffer structure is located on the side of the package structure closest to the substrate. The array structure includes signal traces, at least a portion of which are multiplexed into the first buffer structure. The array structure includes auxiliary conductive structures. The array structure further includes an adhesive layer located on the side of the auxiliary conductive structure away from the substrate, wherein the orthographic projection of the auxiliary conductive structure on the substrate at least partially overlaps with the orthographic projection of the encapsulation structure on the substrate, the auxiliary conductive structure is electrically connected to the first buffer structure, and at least a portion of the surface of the adhesive layer on the side away from the substrate is spaced from the first buffer structure and in contact with the encapsulation structure. Preferably, the material of the encapsulation structure includes inorganic materials, and the material of the bonding layer includes inorganic materials; Preferably, the non-display area includes a first area, a second area, a third area, and a fourth area. The first area and the second area are respectively located on both sides of the display area in a second direction, and the third area and the fourth area are respectively located on both sides of the display area in a third direction. The fourth area includes a fan-out area. The auxiliary conductive structure is located at least in at least one of the first area, the second area, and the third area. The first direction, the second direction, and the third direction intersect each other.

17. The display panel according to any one of claims 15 or 16, characterized in that, The first buffer structure includes a first sub-buffer structure and a second sub-buffer structure that are spaced apart, with at least a portion of the first sub-buffer structure located on the side of the second sub-buffer structure away from the display area; Preferably, the first buffer structure is located on the side of the packaging structure close to the substrate, the array structure includes signal traces, the signal traces include positive power supply voltage signal lines and negative power supply voltage signal lines, the positive power supply voltage signal lines are multiplexed to form the first sub-buffer structure, and the negative power supply voltage signal lines are multiplexed to form the second sub-buffer structure.

18. The display panel according to claim 17, characterized in that, The non-display area includes a first area, a second area, a third area, and a fourth area. The first area and the second area are located on opposite sides of the display area in a second direction. The third area and the fourth area are located on opposite sides of the display area in a third direction. The fourth area includes a fan-out area. The orthographic projection of the edges of the encapsulation structures in the first region, the second region, and the third region onto the substrate is at least partially located within the orthographic projection of the second sub-buffer structure onto the substrate, and the orthographic projection of the edges of the encapsulation structures in the first region, the second region, and the third region onto the substrate is spaced apart from the orthographic projection of the first sub-buffer structure onto the substrate.

19. The display panel according to claim 18, characterized in that, In a direction parallel to the plane of the substrate, the first buffer structure within the non-display area has a first buffer edge and a second buffer edge facing away from each other, with the first buffer edge located on the side of the second buffer edge closer to the display area. In the fourth region, the orthographic projection of the first buffer edge extending along the second direction in the first sub-buffer structure onto the substrate is at least partially located outside the orthographic projection of the encapsulation structure onto the substrate; the orthographic projection of the second buffer edge extending along the second direction in the first sub-buffer structure onto the substrate is at least partially located outside the orthographic projection of the encapsulation structure onto the substrate; the orthographic projection of the first buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located outside the orthographic projection of the encapsulation structure onto the substrate; and the orthographic projection of the second buffer edge extending along the second direction in the second sub-buffer structure onto the substrate is located within the orthographic projection of the encapsulation structure onto the substrate. Preferably, the first sub-buffer structure includes at least two first segments and at least one second segment located within the fourth region. The first segments extend along the second direction, and the orthographic projection of the first segment on the substrate lies outside the orthographic projection of the packaging structure on the substrate. The second segments are located between adjacent first segments in the second direction. The second sub-buffer structure includes at least two third segments and at least two fourth segments located within the fourth region. The third segments extend along the second direction, and the fourth segments are located between adjacent third segments in the second direction. The fourth segments extend at least along the third direction and are spaced apart from adjacent fourth segments in the second direction. The second segment is at least partially located within the interval between adjacent fourth segments in the second direction, and the orthographic projection of the edge of the encapsulation structure on the substrate near the display area is located within the orthographic projection of the second segment on the substrate; Preferably, the width of the second segment is greater than the width of the first segment; Alternatively, the second segment may include at least two bends that extend in opposite directions.

20. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 19.

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