Light emitting display device

Abstract

A light-emitting display device according to the present invention includes a plurality of pixels on a substrate; a drive element layer on the substrate; a pixel electrode disposed on the drive element layer in each pixel; a dummy pixel electrode disposed at at least one side of the pixel electrode; a bank portion defining a light-emitting region at the pixel electrode and a dummy light-emitting region at the dummy pixel electrode; a light-emitting layer continuously deposited on the pixel electrode, the dummy pixel electrode, and the bank portion; a common electrode on the light-emitting layer; and a light-shielding layer overlapping the dummy pixel electrode and not overlapping the pixel electrode, wherein the pixel electrode and the dummy pixel electrode are connected to a drive element disposed in the drive element layer.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2025-0057518, filed on April 30, 2025, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] This invention relates to a light-emitting display device. Background Technology

[0004] A self-emissive display device can have a structure in which multiple pixel regions equipped with light-emitting diodes are arranged. As pixel density increases, the distance between pixels becomes closer. Furthermore, under the same resolution conditions, as the luminous area increases, the distance between the luminous areas becomes closer to improve brightness (or luminance). Under these conditions, when a common functional layer is deposited as a single layer spanning all pixels, lateral leakage current can occur between adjacent pixels in the horizontal direction.

[0005] When lateral leakage current occurs, unwanted pixels become operational, making it difficult to display normal colors, which can lead to image quality degradation. Various methods have been proposed to prevent lateral leakage current.

[0006] However, problems may arise in voltage compensation at the pixel level for specific colors in related technologies used to prevent lateral leakage current. The brightness displayed on a display device can be represented by dividing it into 256 gray levels between perfect black and perfect white. For example, for 8-bit gray levels, perfect black (or true black) could have a gray level value of 255, and perfect white (or true white) could have a gray level value of 0. For a 16-bit gray level example, perfect black could have a gray level value of 65536, and perfect white could have a gray level value of 0.

[0007] In cases where a specific pixel is displayed as perfect black and then changed to a grayscale color, or a specific pixel is displayed as a grayscale color and then changed to perfect white, color representation may not be executed to display the correct grayscale value. Therefore, instead of simply eliminating lateral leakage current, a more effective way to control lateral leakage current is needed. For example, there is a need to develop a structure for ultra-high resolution light-emitting display devices that can eliminate lateral leakage current or intentionally provide compensating current based on the driving conditions of the display device. Summary of the Invention

[0008] To address the aforementioned problems, one object of the present invention is to provide a bottom-emitting display device having a structure capable of compensating for drive current, thereby achieving optimal image quality under any conditions based on the grayscale level of the image displayed on the display device. Another object of the present invention is to provide a bottom-emitting display device that solves the problem of white pixels that should be displayed at low grayscale levels being displayed at high grayscale levels due to lateral leakage current.

[0009] To achieve the above-mentioned objectives of the present invention, a light-emitting display device according to the present invention includes: a plurality of pixels on a substrate; a driving element layer on the substrate; a pixel electrode disposed in each pixel on the driving element layer; a virtual pixel electrode disposed at at least one side of the pixel electrode; a dam defining a light-emitting area at the pixel electrode and a virtual light-emitting area at the virtual pixel electrode; a light-emitting layer continuously deposited on the pixel electrode, the virtual pixel electrode and the dam; a common electrode on the light-emitting layer; and a light-shielding layer overlapping with but not overlapping with the pixel electrode. The pixel electrode and the virtual pixel electrode are connected to a driving element disposed in the driving element layer.

[0010] In one example, the light-emitting display device further includes: a color filter disposed between the driving element layer and the pixel electrode; and a planarization layer located between the color filter and the pixel electrode. The light-shielding layer is disposed between the substrate and the driving element layer.

[0011] In one example, the driving element layer includes: a data line; a driving current line parallel to the data line; a scan line intersecting the data line and the driving current line; a switching thin-film transistor located between the data line and the scan line; and a driving thin-film transistor located between the switching thin-film transistor and the driving current line. The pixel electrode is connected to the driving thin-film transistor. The virtual pixel electrode is connected to any one of the data line, the switching thin-film transistor, and the driving thin-film transistor. A compensation light-emitting diode is disposed corresponding to the light-shielding layer.

[0012] In one example, the virtual pixel electrode is separate from the pixel electrode and connected to the source of the switching thin-film transistor. The embankment covers the periphery of both the pixel electrode and the virtual pixel electrode.

[0013] In one example, the virtual pixel electrode is disposed at the virtual light-emitting area by extending from the pixel electrode. The embankment covers the periphery of the pixel electrode and the virtual pixel electrode and is disposed between the pixel electrode and the virtual pixel electrode.

[0014] In one example, the plurality of pixels includes blue pixels, white pixels, and red pixels arranged in sequence. The virtual pixel electrode of the white pixel includes: a first virtual pixel electrode disposed at a first virtual light-emitting area between the white pixel and the blue pixel; and a second virtual pixel electrode disposed at a second virtual light-emitting area between the white pixel and the red pixel.

[0015] In one example, the driving element layer includes: a data line in each pixel, a driving current line parallel to the data line, and a scan line intersecting the data line and the driving circuit line; a switching thin-film transistor located between the data line and the scan line; and a driving thin-film transistor located between the switching thin-film transistor and the driving current line. The pixel electrode of the white pixel is connected to the driving thin-film transistor. The first virtual pixel electrode and the second virtual pixel electrode of the white pixel are connected to any one of the data line, the switching thin-film transistor, and the driving thin-film transistor.

[0016] In one example, the first virtual pixel electrode is located in the first virtual light-emitting area and connected to either the data line or the switching thin-film transistor. The second virtual pixel electrode extends from the pixel electrode to the second virtual light-emitting area. The embankment covers the periphery of the pixel electrode, the first virtual pixel electrode, and the second virtual pixel electrode in the white pixel, and is disposed between the pixel electrode and the second virtual pixel electrode of the white pixel.

[0017] In one example, the first virtual pixel electrode extends from the pixel electrode to the first virtual light-emitting area. The second virtual pixel electrode extends from the pixel electrode to the second virtual light-emitting area. The embankment covers the periphery of the pixel electrode, the first virtual pixel electrode, and the second virtual pixel electrode, and is disposed between the pixel electrode and the first virtual pixel electrode, and between the pixel electrode and the second virtual pixel electrode.

[0018] In one example, the light-emitting layer includes: a first light-emitting layer on the pixel electrode, the virtual pixel electrode, and the embankment; a first charge-generating layer on the first light-emitting layer; a second light-emitting layer on the first charge-generating layer; a second charge-generating layer on the second light-emitting layer; a third light-emitting layer on the second charge-generating layer; a third charge-generating layer on the third light-emitting layer; and a fourth light-emitting layer on the third charge-generating layer.

[0019] In one example, the pixel electrode includes: a hole functional layer on the pixel electrode, the virtual pixel electrode, and the embankment and below the first light-emitting layer; and an electronic functional layer between the fourth light-emitting layer and the common electrode.

[0020] In one example, the first light-emitting layer provides red light. The second light-emitting layer provides a first blue light. The third light-emitting layer provides green light. The fourth light-emitting layer provides a second blue light.

[0021] In one example, the light-emitting area is a first area, in which light provided from the light-emitting layer is emitted to the outside through the substrate. The virtual light-emitting area is a second area, in which light provided from the light-emitting layer is blocked from being emitted to the outside by the light-shielding layer.

[0022] The light-emitting display device according to the present invention may include a compensating light-emitting diode disposed on at least one side of a white pixel, which emits light through lateral leakage current. Therefore, the grayscale level of the white pixel will not change due to lateral leakage current. Furthermore, the compensating light-emitting diode may be disposed in the non-light-emitting area where the light-shielding layer is located, so that it has light-emitting conditions that are not exposed to the outside. Therefore, due to the light-emitting conditions of the compensating light-emitting diode, high-quality images can be provided without image information distortion.

[0023] In addition to the effects of the present invention described above, other features and advantages of the present invention will be described below, or may be clearly understood by those skilled in the art from these descriptions and explanations. Attached Figure Description

[0024] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings:

[0025] Figure 1 This is a plan view illustrating the schematic structure of a light-emitting display device according to an embodiment of the present invention.

[0026] Figure 2 This is an enlarged plan view showing the structure of pixels provided in a light-emitting display device according to a first embodiment of the present invention.

[0027] Figure 3 It is along Figure 2 The enlarged cross-sectional view taken along line I-I' is used to illustrate the structure of the light-emitting display device according to the first embodiment of the present invention.

[0028] Figure 4 This is an enlarged plan view showing the structure of pixels provided in a light-emitting display device according to a second embodiment of the present invention.

[0029] Figure 5 It is along Figure 4 The enlarged cross-sectional view taken by line II-II' in the figure is used to illustrate the structure of the light-emitting display device according to the second embodiment of the present invention.

[0030] Figure 6 This is an enlarged plan view showing the structure of three pixels arranged sequentially in a light-emitting display device according to a third embodiment of the present invention.

[0031] Figure 7 It is along Figure 6 The enlarged cross-sectional view taken by line III-III' in the figure is used to illustrate the structure of the light-emitting display device according to the third embodiment of the present invention.

[0032] Figure 8 This is an enlarged plan view showing the structure of three pixels arranged sequentially in a light-emitting display device according to a fourth embodiment of the present invention.

[0033] Figure 9 It is along Figure 8 The enlarged cross-sectional view taken along line IV-IV' is used to illustrate the structure of the light-emitting display device according to the fourth embodiment of the present invention. Detailed Implementation

[0034] The advantages and features of the present invention, as well as its implementation methods, will become apparent from the following description of the embodiments with reference to the accompanying drawings. However, the present invention may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. More precisely, these exemplary embodiments are provided so that the disclosure of the present invention is thorough and complete, assisting those skilled in the art in fully understanding the scope of the invention. Furthermore, the scope of protection of the present invention is defined by the claims and their equivalents.

[0035] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings to describe various exemplary embodiments of the invention are given by way of example only. Therefore, the invention is not limited to the details shown. Throughout the specification, similar reference numerals refer to similar elements unless otherwise specified. In the following description, detailed descriptions of related known functions or constructions may be omitted where such detailed descriptions would unnecessarily obscure the focus of the invention.

[0036] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. The same reference numerals will be used as much as possible throughout the drawings to refer to the same or similar parts. In the specification, it should be noted that similar reference numerals already used to refer to similar elements in other drawings will be employed whenever possible. In the following description, detailed descriptions of functions and constructions known to those skilled in the art that are not essential to the construction of the invention will be omitted. The terminology described in the specification should be understood as follows.

[0037] In this specification, where terms such as “comprising,” “having,” or “including” are used, one or more other elements may be added, unless a term such as “only” is used. Elements described in the singular are intended to include multiple elements, and vice versa, unless the context clearly indicates otherwise.

[0038] When interpreting an element, it is interpreted as including a range of errors or tolerances, even if no explicit description of such a range of errors or tolerances is provided.

[0039] In describing various embodiments of the invention, when describing positional relationships, for example, when using terms such as "on," "above," "below," "upper part," "lower part," "next to," "next," etc., to describe the positional relationship between two parts, one or more other parts may be located between these two parts, unless more restrictive terms such as "immediately," "directly," or "immediately following" are used. For example, in the case where one element or layer is disposed "on" another element or layer, a third layer or element may be inserted therebetween. Furthermore, if a first element is described as being positioned "on" a second element, it does not necessarily mean that the first element is positioned above the second element in the drawing. The upper and lower parts of the object involved may change depending on the orientation of the object. Therefore, in the case where a first element is described as being positioned "on" a second element, depending on the orientation of the object, the first element may be positioned "below" or "above" the second element in the drawing or in the actual construction.

[0040] When describing temporal relationships, discontinuous situations may be included when the time sequence is described as such as "after", "following", "next", or "before", unless more restrictive terms such as "exactly", "immediately after", or "directly" are used.

[0041] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms, as they are not intended to define a particular order. These terms are only used to distinguish one element from another. For example, without departing from the scope of the invention, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0042] In describing the various elements of this invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are used only to distinguish one element from another and not to define a particular nature, order, sequence, or number of elements. Where an element is described as “linked,” “joined,” or “connected” to another element, that element may be directly or indirectly connected to the other element unless otherwise specified. It should be understood that one or more additional elements may be “inserted” between two elements described as “linked,” “connected,” or “joined” to each other.

[0043] It should be understood that the term "at least one" should be interpreted as including any and all combinations of one or more of the associated listed items. For example, the meaning of "at least one of the first element, the second element, and the third element" covers: combinations of all three listed elements; combinations of any two of the three elements; and each of the first, second, or third elements individually.

[0044] Features of the various embodiments of the present invention may be partially or entirely combined or integrated with each other, and may be technically interoperable and driven in various ways, as will be fully understood by those skilled in the art. Embodiments of the present invention may be implemented independently of each other, or may be implemented together in an interdependent relationship.

[0045] In the following, examples of display devices according to the present invention will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts.

[0046] The invention will be explained below with reference to the accompanying drawings. For ease of description, the scale of each element shown in the drawings may differ from the actual scale, therefore the invention is not limited to the scales shown in the drawings.

[0047] Figure 1 This is a plan view illustrating the schematic structure of a light-emitting display device according to an embodiment of the present invention. Figure 1 In this diagram, the X-axis refers to the direction parallel to the scan lines, the Y-axis refers to the direction parallel to the data lines, and the Z-axis refers to the thickness (or height) direction of the display device.

[0048] Reference Figure 1A light-emitting display device, such as an electroluminescent display, includes: a substrate 110; a gate (or scan) driver 200; a pad portion 300; a source driver IC (integrated circuit) 410; a flexible circuit film 430; a circuit board 450; and a timing controller 500. Multiple pixels P can be arranged on the substrate 110. For example, red pixels RP, green pixels GP, blue pixels BP, and white pixels WP can be arranged sequentially in the horizontal (X-axis) direction. A group of red pixels RP, green pixels GP, blue pixels BP, and white pixels WP can constitute a unit pixel UP.

[0049] The substrate 110 may include an electrically insulating material or a flexible material. The substrate 110 may be made of glass, metal, or plastic, but is not limited to these. When the light-emitting display device is a flexible display, the substrate 110 may be made of a flexible material such as plastic. For example, the substrate 110 may include a transparent polyimide material.

[0050] The substrate 110 may include a display area AA and a non-display area NDA. The display area AA, which is the area used to display video images, may be defined as most of the central area of ​​the substrate 110, but is not limited thereto. In the display area AA, a plurality of pixels P are arranged in a matrix. In addition, a plurality of scan lines (or gate lines) and a plurality of data lines may be arranged to intersect each other. Each pixel P may be located at the intersection of a scan line extending along the X-axis and a data line extending along the Y-axis.

[0051] Here, pixel P can be any of red, green, blue, and white. Red pixel RP, green pixel GP, blue pixel BP, and white pixel WP can be grouped together to form a unit pixel UP. For example, each pixel representing each color can be called a "pixel P", and four "pixels P" are grouped together to form a "unit pixel UP".

[0052] The non-display area NDA, which is a region that does not display video images, can be defined in the peripheral area of ​​the substrate 110 surrounding all or part of the display area AA. In the non-display area NDA, a gate driver 200 and a pad portion 300 can be formed or disposed.

[0053] The gate driver 200 can direct the scan line SL (see [link to scan line] SL) according to the gate control signal received from the timing controller 500 via the pad section 300. Figure 2 The gate driver 200 provides a scan (or gate) signal. It can be formed as a GIP (Gate In-Panel Driver) type on the substrate 110 at a non-display area NDA located either outside the display area DA. GIP type means that the gate driver 200 is formed directly on the substrate 110. For example, the gate driver 200 may be configured with a shift register. In GIP type, the transistor for the shift register of the gate driver 200 is formed directly on the upper surface of the substrate 110.

[0054] The pad portion 300 may be disposed in the non-display area NDA at one edge of the display area AA of the substrate 110. The pad portion 300 may include a data pad connected to each of the data lines DL, a drive current pad connected to the drive current line, a high-potential pad that receives a high-potential voltage, and a low-potential pad that receives a low-potential voltage.

[0055] The source driver IC 410 receives digital video data and source control signals from the timing controller 500. The source driver IC 410 converts the digital video data into analog data voltages based on the source control signals and then provides them to the data lines. When the source driver IC 410 is manufactured as a chip, it can be mounted on the flexible circuit film 430 as a COF (chip-on-film) or COP (chip-on-plastic) type.

[0056] The flexible circuit film 430 may include: multiple first connection lines connecting the pad portion 300 to the source driver IC 410; and multiple second connection lines connecting the pad portion 300 to the circuit board 450. The flexible circuit film 430 may be attached to the pad portion 300 using an anisotropic conductive film, such that the pad portion 300 can be connected to the first connection lines of the flexible circuit film 430.

[0057] The circuit board 450 may be attached to the flexible circuit film 430. The circuit board 450 may include multiple circuits implemented as driver chips. For example, the circuit board 450 may be a printed circuit board or a flexible printed circuit board.

[0058] The timing controller 500 can receive digital video data and timing signals from an external system board via the line cable of the circuit board 450. Based on the timing signals, the timing controller 500 can generate gate control signals for controlling the operating timing of the gate driver 200 and source control signals for controlling the source driver IC 410. The timing controller 500 can supply the gate control signals to the gate driver 200 and the source control signals to the source driver IC 410. Depending on the product type, the timing controller 500 can be integrated with the source driver IC 410 into a single driver chip and can be mounted on the substrate 110 to connect to the pad portion 300.

[0059] <First Implementation Method>

[0060] In the following text, reference will be made to Figure 2 and Figure 3 The detailed structure of the light-emitting display device according to the first embodiment of the present invention will be described. Figure 2 This is an enlarged plan view showing the structure of pixels provided in a light-emitting display device according to a first embodiment of the present invention. Figure 3 It is along Figure 2The enlarged cross-sectional view taken along line I-I' is used to illustrate the structure of the light-emitting display device according to the first embodiment of the present invention.

[0061] Reference Figure 2 According to a first embodiment of the present invention, a pixel P of a light-emitting display device may include a light-emitting area EA and a non-light-emitting area NEA. The light-emitting area EA may be an area that provides light and displays image information. The non-light-emitting area NEA may be an area surrounding the light-emitting area EA and may not display image information.

[0062] Scan lines SL may extend along a first direction (X-axis) and may be arranged at regular intervals along a second direction (Y-axis) intersecting the first direction (X-axis). The display area AA of substrate 110 may include multiple scan lines SL spaced apart from each other along the second direction (Y-axis) and parallel to the first direction (X-axis). Here, the first direction (X-axis) may be defined as the horizontal (or lateral) direction of the surface of substrate 110, and the second direction (Y-axis) may be defined as the vertical direction of the surface of substrate 110. However, the invention is not limited thereto and may be defined in the opposite manner.

[0063] The data lines DL can extend along the second direction (Y-axis) and be arranged at regular intervals along the first direction (X-axis). The display area AA of the substrate 110 may include multiple data lines DL that are spaced apart from each other along the first direction (X-axis) and parallel to the second direction (Y-axis).

[0064] The drive current line VDD can be arranged parallel to the data line DL on the substrate 110. However, the invention is not limited thereto. In some cases, the drive current line VDD can be arranged parallel to the scan line SL. The drive current line VDD can be provided with a high-level voltage for driving the light-emitting diode OLE.

[0065] A pixel P may include: a driving element electrically connected to a scan line SL, a data line DL, and a drive current line VDD; and a light-emitting element electrically connected to the driving element. Specifically, pixel P may be surrounded by the scan line SL, the data line DL, and the drive current line VDD. Each pixel P of the light-emitting display device according to the present invention may be defined by the scan line SL, the data line DL, and the drive current line VDD. Each pixel P of the light-emitting display device may include: a switching thin-film transistor ST; a driving thin-film transistor DT; a light-emitting diode OLE; a storage capacitor (or capacitor) Cst; and a compensation light-emitting diode DLE. The drive current line VDD may be provided with a high-level voltage for driving the light-emitting diode OLE.

[0066] A switching thin-film transistor ST can be positioned between the data line DL and the scan line SL. When a gate voltage is applied to the scan line SL, the switching thin-film transistor ST can transmit the electrical signal of the data line DL to the gate DG of the driving thin-film transistor DT. In other words, the switching thin-film transistor ST can be a device used to select and drive the driving thin-film transistor DT.

[0067] The driving thin-film transistor (DT) can be positioned between the driving current line VDD and the light-emitting diode (OLE). The driving DT controls the amount of current flowing from the driving current line VDD to the OLE based on the voltage difference between the gate (DG) and source (DS). The OLE displays an image by emitting light according to the current controlled by the driving DT.

[0068] An OLE (Optical Light Emitting Diode) can be connected to drive a DT (Thin Film Transistor). The OLE can be configured to correspond to the light-emitting area EA. (See reference...) Figure 3 An OLED can have a structure in which a pixel electrode (ANO), an emissive layer (EL), and a common electrode (CAT) can be stacked sequentially. When holes are supplied from the pixel electrode (ANO) and electrons are supplied from the common electrode (CAT), the electrons and holes can combine at the emissive layer (EL) to generate excitons. As the excitons change from an excited state to a ground state, fluorescent molecules in the emissive layer (EL) can emit light, thus producing color.

[0069] A virtual light-emitting diode (DLE) can be connected to the source SS of a switching thin-film transistor (ST) and a data line DL. The DLE can be disposed within a non-light-emitting region NEA. Driving elements and the DLE can be disposed within the NEA. Here, the driving elements may include a scan line SL, a data line DL, a drive current line VDD, a switching thin-film transistor ST, a capacitor Cst, and a driving thin-film transistor DT. The DLE may have a structure in which a virtual pixel electrode DNO, a light-emitting layer EL, and a common electrode CAT are stacked sequentially. Therefore, the DLE can generate light at the light-emitting layer EL, similar to an OLE.

[0070] A light-shielding layer LS can be disposed below the switching thin-film transistor ST, capacitor Cst, and driving thin-film transistor DT within the driving element to block light intrusion from the outside. The light-shielding layer LS can be disposed between the substrate 110 and the driving element layer 220. Alternatively, the light-shielding layer LS can be disposed below the virtual light-emitting diode DLE in the non-light-emitting area NEA, thereby blocking light generated from the virtual light-emitting diode DLE and preventing it from being provided to the outside of the substrate 110.

[0071] The following will refer to Figure 3 A cross-sectional structure of the light-emitting display device according to the first embodiment is described. (Refer to...) Figure 3 According to the first embodiment, the cross-sectional shape of the light-emitting display device may have a structure in which a substrate 110, a driving element layer 220, a light-emitting element layer 330 and an encapsulation layer 440 are stacked sequentially.

[0072] On substrate 110, a light shielding layer LS, a data line DL, and a drive current line VDD can be formed. The light shielding layer LS, the data line DL, and the drive current line VDD can be formed of a metallic material with excellent conductivity and opacity. For example, the light shielding layer LS, the data line DL, and the drive current line VDD can be made of any one of molybdenum (Mo), nickel (Ni), titanium (Ti), copper (Cu), aluminum (Al), tantalum (Ta), and their alloys. The driving element layer 220 on substrate 110 may include: a data line DL, a drive current line VDD, and a scan line SL in each pixel; a switching thin-film transistor ST located between the data line DL and the scan line SL; and a driving thin-film transistor DT located between the switching thin-film transistor ST and the drive current line VDD.

[0073] A buffer layer BUF can be deposited on the optical shielding layer LS, the data line DL, and the drive current line VDD to cover the entire surface of the substrate 110. The buffer layer BUF can be made of inorganic materials such as silicon oxide SiOx or silicon nitride SiNx.

[0074] The switching thin-film transistor ST, the driving thin-film transistor DT, and the capacitor Cst can be formed on the buffer layer BUF. The switching thin-film transistor ST may include a gate SG, a semiconductor layer SA, a source SS, and a drain SD. The driving thin-film transistor DT may include a gate DG, a semiconductor layer DA, a source DS, and a drain DD.

[0075] Specifically, the semiconductor layer SA of the switching thin-film transistor ST and the semiconductor layer DA of the driving thin-film transistor DT can be formed on the buffer layer BUF. Preferably, the semiconductor layers SA and DA are configured to overlap with the light-shielding layer LS. The light-shielding layer LS can be a component used to prevent light from entering from the outside of the substrate 110 and affecting the semiconductor layers SA and DA. The semiconductor layers SA and DA can be made of any of the following materials: low-temperature polycrystalline silicon (LTPS), oxide semiconductor materials, and amorphous silicon (a-Si) materials. For example, the oxide semiconductor material may include indium gallium zinc oxide (IGZO).

[0076] A gate insulating layer GI can be deposited on semiconductor layers SA and DA to cover the entire surface of substrate 110. The gate SG of the switching thin-film transistor ST and the gate DG of the driving thin-film transistor DT can be formed on the gate insulating layer GI. Each of the gates SG and DG can be configured to overlap with a corresponding one of the semiconductor layers SA and DA. The portions of semiconductor layers SA and DA that overlap with the gates SG and DG can be defined as channel regions.

[0077] The source (SS) and drain (SD) of the switching thin-film transistor (ST), and the source (DS) and drain (DD) of the driving thin-film transistor (DT) can be formed on the gate insulating layer (GI). The source (SS) of the switching thin-film transistor (ST) can be connected to one side of the semiconductor layer (SA) of the switching thin-film transistor (ST). The drain (SD) of the switching thin-film transistor (ST) can be connected to the other side of the semiconductor layer (SA) of the switching thin-film transistor (ST). Similarly, the source (DS) of the driving thin-film transistor (DT) can be connected to one side of the semiconductor layer (DA) of the driving thin-film transistor (DT). The drain (DD) of the driving thin-film transistor (DT) can be connected to the other side of the semiconductor layer (DA) of the driving thin-film transistor (DT).

[0078] Gates SG and DG, sources SS and DS, and drains DS and DD are formed on the gate insulating layer GI, but they are spaced apart from each other. Even if not shown in the figures, scan lines SL for connecting the gate SG of the switching thin-film transistor ST can also be disposed on the gate insulating layer GI. The invention is not limited thereto; an insulating layer can be further deposited on the gate, and the source and drain can be formed on this insulating layer. As another example, the gate can be disposed below the semiconductor layer in a bottom gate structure. As yet another example, the source and drain can be formed first, a semiconductor layer can be formed thereon, a gate insulating layer can be deposited on the semiconductor layer, and the gate can be formed on the gate insulating layer.

[0079] The source SS of the switching thin-film transistor ST can be connected to the data line DL via a contact hole that penetrates the gate insulating layer GI and the buffer layer BUF. Similarly, the drain DD of the driving thin-film transistor DT can be connected to the driving current line VDD via a contact hole that penetrates the gate insulating layer GI and the buffer layer BUF.

[0080] A passivation layer PAS can be deposited on driving elements including scan lines SL, data lines DL, drive current lines VDD, switching thin-film transistors ST, and driving thin-film transistors DT to cover the entire surface of substrate 110. A color filter CF can be deposited on the passivation layer PAS. The color filter CF can be disposed between the driving element layer 220 and the pixel electrode ANO. The color filter CF can include a red filter, a green filter, a blue filter, and a white filter. The red filter can correspond to a red pixel RP, the green filter can correspond to a green pixel GP, the blue filter can correspond to a blue pixel BP, and the white filter can correspond to a white pixel WP.

[0081] The light-emitting element layer 330 may be formed on the color filter CF. The light-emitting element layer 330 may include a planarization layer PL, a light-emitting diode (OLE), and a dummy light-emitting diode (DLE). The light-emitting diode OLE may include a pixel electrode ANO, a light-emitting layer EL, and a common electrode CAT. The dummy light-emitting diode DLE may include a dummy pixel electrode DNO, a light-emitting layer EL, and a common electrode CAT. The dummy pixel electrode DNO may be disposed at at least one side of the pixel electrode ANO in each pixel. The dummy pixel electrode DNO may be connected to any one of a data line DL, a switching thin-film transistor ST, and a driving thin-film transistor DT.

[0082] Specifically, a planarization layer PL can be deposited on the color filter CF to cover the entire surface of the substrate 110. The planarization layer PL can be made of one or more layers. The planarization layer PL can be a layer used to planarize the uneven surface of the substrate 110 on which driving elements are formed. To equalize or compensate for height differences caused by uneven surface conditions, the planarization layer PL can be formed of an organic material. The passivation layer PAS, the color filter CF, and the planarization layer PL can have pixel contact holes PH that expose a portion of the source DS of the driving thin-film transistor DT.

[0083] The pixel electrode ANO can be formed on the planarization layer PL and has a size corresponding to the light-emitting region EA. The pixel electrode ANO can have a size slightly larger than the light-emitting region EA. The pixel electrode ANO can be connected to the source DS of the driving thin-film transistor DT via the pixel contact hole PH.

[0084] A virtual pixel electrode DNO can be disposed on the planarization layer PL within the non-emitting region NEA. Specifically, the virtual pixel electrode DNO can be configured to completely overlap with the light shielding layer LS. The light shielding layer LS can overlap with the virtual pixel electrode DNO but not with the pixel electrode ANO. The pixel electrode ANO and the virtual pixel electrode DNO can be connected to a driving element disposed in the driving element layer 220. For example, the virtual pixel electrode DNO can be disposed on one side (e.g., the left side) of the pixel electrode ANO. The data line DL can be disposed to the left of the pixel electrode ANO. The virtual pixel electrode DNO can be disposed to the left of the data line DL. Specifically, the virtual pixel electrode DNO can be configured to overlap with the light shielding layer LS located to the left of the data line DL. The virtual pixel electrode DNO can be connected to the source SS of the switching thin-film transistor ST via a virtual contact hole DH penetrating the planarization layer PL, the color filter CF, and the passivation layer PAS. Furthermore, the source SS can be connected to the data line DL, therefore the virtual pixel electrode DNO can also be connected to the data line DL.

[0085] The pixel electrode ANO and the virtual pixel electrode DNO can have various structures depending on the light-emitting structure of the light-emitting diode OLE. For bottom-emitting types that provide light to the substrate 110, the pixel electrode ANO and the virtual pixel electrode DNO can contain a transparent conductive material. For example, the pixel electrode ANO and the virtual pixel electrode DNO can be made of at least one of indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO).

[0086] The dam BA can be deposited around the pixel electrode ANO to define the light-emitting area EA. Additionally, the dam BA can be deposited around the virtual pixel electrode DNO to define the virtual light-emitting area DEA.

[0087] The light-emitting layer EL can be deposited on the surfaces of the pixel electrode ANO, the virtual pixel electrode DNO, and the embankment BA. The light-emitting layer EL can be deposited to cover all pixels P arranged on the substrate 110, and the light-emitting layer EL can have a single sheet shape that is continuously deposited on the entire surface of the substrate 110.

[0088] The light-emitting layer EL may have a structure in which a hole functional layer HFL, an organic light-emitting layer, and an electron functional layer EFL are stacked sequentially. The hole functional layer HFL may be in contact with the surfaces of the pixel electrode ANO and the virtual pixel electrode DNO. The electron functional layer EFL may be deposited on the organic light-emitting layer. The organic light-emitting layer may have a structure in which a first light-emitting layer E1, a first charge-generating layer CG1, a second light-emitting layer E2, a second charge-generating layer CG2, a third light-emitting layer E3, a third charge-generating layer CG3, and a fourth light-emitting layer E4 are stacked sequentially. However, the present invention is not limited thereto, and the organic light-emitting layer may have a structure in which a first light-emitting layer, a charge-generating layer, and a second light-emitting layer are stacked sequentially. As another example, the organic light-emitting layer may have a structure in which a first light-emitting layer, a first charge-generating layer, a second light-emitting layer, a second charge-generating layer, and a third light-emitting layer are stacked sequentially.

[0089] The first emitting layer E1 may include an organic light-emitting material configured to provide red light. The second emitting layer E2 may include an organic light-emitting material configured to provide blue light. The third emitting layer E3 may include an organic light-emitting material configured to provide green light. The fourth emitting layer E4 may include an organic light-emitting material configured to provide blue light. The second emitting layer E2 and the fourth emitting layer E4 may include the same organic light-emitting material configured to provide blue light. In other aspects, the second emitting layer E2 and the fourth emitting layer E4 may be made of different organic light-emitting materials to provide different blue lights (e.g., blue lights with different brightness or saturation). For example, the second emitting layer E2 may include an organic light-emitting material providing a first blue light. The fourth emitting layer E4 may include an organic light-emitting material providing a second blue light.

[0090] The first emitting layer E1, the second emitting layer E2, the third emitting layer E3, and the fourth emitting layer E4 can be stacked to mix their colors. Ultimately, the emitting layer EL can provide white light. However, it is not limited to this; depending on the combination of the first emitting layer E1, the second emitting layer E2, the third emitting layer E3, and the fourth emitting layer E4, the emitting layer EL can provide blue or green light. For convenience, it will be interpreted as providing white light in the following text. For the bottom-emitting type, when white light passes through the color filter CF, the light of the color assigned to each pixel P can be emitted. Even though not shown in the figure, for the top-emitting type, when white light passes through the color filter CF located above the light-emitting diode OLE, the light of the color assigned to each pixel P can be emitted. Additionally, a color conversion layer can be disposed between the light-emitting diode OLE and the color filter CF.

[0091] A common electrode CAT can be deposited on the light-emitting layer EL. The common electrode CAT can be deposited to cover all pixels P disposed on the substrate 110, and the common electrode CAT can have a monolithic shape with continuous deposition to cover the entire surface of the substrate 110. For bottom-emitting types, the common electrode CAT can comprise a metallic material with excellent light reflectivity. For example, the common electrode CAT can be made of any one of silver (Ag), molybdenum (Mo), titanium (Ti), tantalum (Ta), aluminum (Al), and copper (Cu), or any alloy thereof.

[0092] Encapsulation layer 440 may be deposited on light-emitting element layer 330. Encapsulation layer 440 may have a structure in which a first inorganic layer PA1, an organic layer PCL, and a second inorganic layer PA2 may be stacked sequentially. The first inorganic layer PA1 may be deposited on a common electrode CAT. The organic layer PCL may be deposited on the first inorganic layer PA1. The second inorganic layer PA2 may be deposited on the organic layer PCL.

[0093] Even if not shown in the figures, the encapsulation layer 440 may include a moisture-absorbing adhesive material. Alternatively, the adhesive material may be disposed as a weir structure at the outermost periphery of the substrate 110. Furthermore, an encapsulation substrate made of a metal plate or glass plate may be attached to the substrate 110 using an adhesive material.

[0094] A light-emitting diode (OLE) can be formed in the light-emitting region EA of pixel P. Furthermore, a virtual light-emitting diode (DLE) can be formed in the virtual light-emitting region DEA within the non-light-emitting region NEA. In the light-emitting region EA, which is the first region, light generated from the OLE can pass through the substrate 110 and be emitted to the outside. However, in the virtual light-emitting region DEA, which is the second region, light generated from the virtual light-emitting diode DLE corresponding to the light-shielding layer LS can be blocked by the light-shielding layer LS, preventing it from being emitted to the outside.

[0095] A virtual light-emitting diode (DLE) can be disposed between a first light-emitting diode and a second light-emitting diode located to the left of the first light-emitting diode. When the second light-emitting diode is operated, lateral leakage current can flow to the virtual light-emitting diode DLE through a first charge generation layer CG1, a second charge generation layer CG2, and a third charge generation layer CG3. When the virtual light-emitting diode DLE is operating, the leakage current can cause the virtual light-emitting diode DLE to emit light brighter than its original brightness. Even though light is emitted from the virtual light-emitting diode DLE, this light is not emitted to the outside due to the light shielding layer LS, so the light from the virtual light-emitting diode DLE, which can emit high-brightness light, is not perceived by the user.

[0096] In the light-emitting display device according to the present invention, when a virtual light-emitting diode (DLE) or a virtual pixel electrode (DNO) is not included, the first light-emitting diode (OLE) may emit light brighter than its original brightness due to the lateral leakage current of the second light-emitting diode located to the left of the first light-emitting diode. Therefore, the first light-emitting diode (OLE) may not provide normal brightness, and thus the image information may be distorted. However, the light-emitting display device according to the present invention includes a virtual light-emitting diode (DLE) between two adjacent pixels P or includes a virtual pixel electrode (DNO) at at least one side of the pixel electrode (ANO). The virtual light-emitting diode (DLE) can absorb the lateral leakage current generated at the adjacent pixel P and emit light by consuming the leakage current, so the lateral leakage current does not affect the light-emitting diode (OLE). Therefore, the problem of the brightness of pixel P becoming abnormally high due to leakage current can be prevented.

[0097] <Second Implementation Method>

[0098] In the following text, reference will be made to Figure 4 and Figure 5 The detailed structure of the light-emitting display device according to the second embodiment will be described. Figure 4 This is an enlarged plan view showing the structure of pixels provided in a light-emitting display device according to a second embodiment of the present invention. Figure 5 It is along Figure 4 The enlarged cross-sectional view taken by line II-II' in the figure is used to illustrate the structure of the light-emitting display device according to the second embodiment of the present invention.

[0099] The light-emitting display device according to the second embodiment may have a structure very similar to that of the first embodiment. The difference may lie in the structure in which the virtual pixel electrode (DNO) is connected to the driving element. In the following description, detailed descriptions of the same elements as in the first embodiment may be omitted or may be briefly described. Figure 4 and Figure 5 For elements shown but not described, please refer to the description of the first embodiment. Furthermore, various modified structures can be applied in the same or similar manner as described in the first embodiment.

[0100] Reference Figure 4 According to a second embodiment of the present invention, a light-emitting display device may include a plurality of pixels P. A pixel P may include a light-emitting area EA and a non-light-emitting area NEA. The light-emitting area EA may be an area used to provide light and display image information. The non-light-emitting area NEA may be an area surrounding the light-emitting area EA that does not display image information.

[0101] Scan lines SL can extend along a first direction (X-axis) and be arranged at regular intervals along a second direction (Y-axis) intersecting the first direction (X-axis). Data lines DL can extend along the second direction (Y-axis) and be arranged at regular intervals along the first direction (X-axis). Drive current lines VDD can be disposed on the substrate 110 parallel to the data lines DL.

[0102] Pixel P may include: a driving element connected to a scan line SL, a data line DL, and a drive current line VDD; and a light-emitting element connected to the driving element. Specifically, pixel P may be defined by the scan line SL, the data line DL, and the drive current line VDD surrounding pixel P. A pixel P of a light-emitting display device may include a switching thin-film transistor ST, a driving thin-film transistor DT, a light-emitting diode OLE, a capacitor Cst, and a virtual light-emitting diode DLE.

[0103] The switching thin-film transistor ST can be positioned between the data line DL and the scan line SL. The driving thin-film transistor DT can be positioned between the drive current line VDD and the light-emitting diode OLE. The light-emitting diode OLE can be connected to the driving thin-film transistor DT. The light-emitting diode OLE can be configured to correspond to the light-emitting area EA.

[0104] A virtual light-emitting diode (DLE) can be connected to a light-emitting diode (OLE). For example, the virtual pixel electrode (DNO) of the virtual light-emitting diode (DLE) can be formed by extending the pixel electrode (ANO) of the light-emitting diode (OLE) into the non-light-emitting region (NEA). In other words, the pixel electrode (ANO) can extend into the non-light-emitting region (NEA), so the extended portion of the pixel electrode (ANO) can be the virtual pixel electrode (DNO).

[0105] Reference Figure 5 A cross-sectional structure of the light-emitting display device according to the second embodiment is described. (Refer to...) Figure 5 In the cross-sectional structure of the light-emitting display device according to the second embodiment, a substrate 110, a driving element layer 220, a light-emitting element layer 330 and an encapsulation layer 440 are stacked sequentially.

[0106] An optical shielding layer LS, a data line DL, and a drive current line VDD can be formed on the substrate 110. A buffer layer BUF can be deposited on the optical shielding layer LS, the data line DL, and the drive current line VDD to cover the entire surface of the substrate 110. A switching thin-film transistor ST, a driving thin-film transistor DT, and a capacitor Cst can be formed on the buffer layer BUF.

[0107] A passivation layer PAS can be deposited on the driving elements, including scan lines SL, data lines DL, drive current lines VDD, switching thin-film transistors ST, and driving thin-film transistors DT, to cover the entire surface of the substrate 110. A color filter CF can be deposited on the passivation layer PAS.

[0108] The light-emitting element layer 330 may be deposited on the color filter CF. The light-emitting element layer 330 may include a planarization layer PL, an OLE light-emitting diode, and a dummy light-emitting diode DLE. The planarization layer PL on the color filter CF may be deposited to cover the entire surface of the substrate 110.

[0109] An OLE (Optical Light Emitting Diode) may include a pixel electrode (ANO), an emissive layer (EL), and a common electrode (CAT). A DLE (Virtual Light Emitting Diode) may include a virtual pixel electrode (DNO), an emissive layer (EL), and a common electrode (CAT). A pixel contact hole (PH) may be formed at the passivation layer (PAS), the color filter (CF), and the planarization layer (PL) to expose a portion of the source electrode (DS) of the driving thin-film transistor (DT).

[0110] Pixel electrode ANO and virtual pixel electrode DNO can be formed on the planarization layer PL. Pixel electrode ANO can be connected to the source DS of the driving thin-film transistor DT via pixel contact hole PH. Virtual pixel electrode DNO can be connected to the source DS of the driving thin-film transistor DT via pixel contact hole PH. Pixel electrode ANO can be configured to correspond to the light-emitting region EA. Virtual pixel electrode DNO can be arranged such that pixel electrode ANO extends to the virtual light-emitting region DEA. That is, pixel electrode ANO and virtual pixel electrode DNO can be formed into a thin layer. In the case of bottom-emitting type, pixel electrode ANO and virtual pixel electrode DNO can be made of transparent conductive material. Here, virtual pixel electrode DNO can overlap with light shielding layer LS.

[0111] A dam BA can be formed on a pixel electrode ANO and a virtual pixel electrode DNO, both having a thin-layer shape. Therefore, the dam BA defines a light-emitting area EA and a virtual light-emitting area DEA. The light-emitting area EA corresponds to the middle portion of the pixel electrode ANO, and the non-light-emitting area NEA corresponds to the middle portion of the virtual pixel electrode DNO. In other words, the connection between the pixel electrode ANO and the virtual pixel electrode DNO can be covered by the dam BA, allowing the dam BA to distinguish or separate the light-emitting area EA from the virtual light-emitting area DEA.

[0112] The light-emitting layer EL can be deposited on the surfaces of the pixel electrode ANO, the virtual pixel electrode DNO, and the embankment BA. The light-emitting layer EL can be deposited on the substrate 110 to cover all pixels P and has a continuous one-sheet shape on the entire surface of the substrate 110.

[0113] The light-emitting layer EL can have a structure in which a hole functional layer HFL, an organic light-emitting layer, and an electron functional layer EFL are stacked sequentially. The organic light-emitting layer can have a structure in which a first light-emitting layer E1, a first charge-generating layer CG1, a second light-emitting layer E2, a second charge-generating layer CG2, a third light-emitting layer E3, a third charge-generating layer CG3, and a fourth light-emitting layer E4 are stacked sequentially.

[0114] A common electrode CAT can be deposited on the light-emitting layer EL. The common electrode CAT can be deposited to cover all pixels P disposed on the substrate 110, and can have a monolithic shape of continuous deposition to cover the entire surface of the substrate 110. For bottom-emitting types, the common electrode CAT can include a metallic material with excellent light reflectivity.

[0115] The encapsulation layer 440 may be deposited on the light-emitting element layer 330. The encapsulation layer 440 may have a structure in which a first inorganic layer PA1, an organic layer PCL, and a second inorganic layer PA2 may be stacked sequentially.

[0116] An OLED can be formed in the light-emitting area EA of pixel P. Furthermore, a virtual OLED (DLE) can be formed in the virtual light-emitting area DEA within the non-light-emitting area NEA. Light generated from the OLED can be emitted to the outside via substrate 110. However, light generated from the virtual OLED (DLE) can be blocked by the light-shielding layer LS, preventing the light from being emitted to the outside.

[0117] A virtual light-emitting diode (DLE) can be disposed between a first light-emitting diode and a second light-emitting diode located to the left of the first light-emitting diode. When the second light-emitting diode is operating, lateral leakage current can flow to the virtual light-emitting diode DLE through a first charge generation layer CG1, a second charge generation layer CG2, and a third charge generation layer CG3. When the virtual light-emitting diode DLE is operating, the leakage current can cause the virtual light-emitting diode DLE to emit light brighter than its original brightness. Even though light is emitted from the virtual light-emitting diode DLE, this light is not emitted to the outside due to the light shielding layer LS, so the light from the virtual light-emitting diode DLE, which can emit high-brightness light, is not perceived by the user.

[0118] The virtual light-emitting diode (DLE) absorbs the lateral leakage current generated at adjacent pixels P and emits light by consuming the leakage current, thus the lateral leakage current does not affect the light-emitting diode (OLE). Therefore, the problem of abnormal distortion of the brightness of pixel P due to leakage current can be prevented.

[0119] <Third Implementation Method>

[0120] The following will refer to Figure 6 and Figure 7 The detailed structure of the light-emitting display device according to the third embodiment is described below. Figure 6 This is an enlarged plan view showing the structure of three pixels arranged sequentially in a light-emitting display device according to a third embodiment of the present invention. Figure 7 It is along Figure 6 The enlarged cross-sectional view taken by line III-III' in the figure is used to illustrate the structure of the light-emitting display device according to the third embodiment of the present invention.

[0121] In the first and second embodiments, the structure of one pixel P among a plurality of pixels P arranged on the substrate 110 was explained. Therefore, all pixels P arranged on the substrate 110 may have the same structure.

[0122] In the case where a unit pixel UP includes a white pixel WP, the white pixel WP may be most affected by lateral leakage current, which may lead to distortion in brightness presentation. In the third and fourth embodiments, by placing virtual light-emitting diodes (DLEs) on both sides of the white pixel WP, a structure is proposed to prevent the light-emitting diodes of the white pixel WP from being affected by lateral leakage current.

[0123] The light-emitting display device according to the third embodiment may have a structure very similar to that of the first embodiment. In the following description, detailed descriptions of elements identical to those in the first embodiment may be omitted or briefly summarized. For Figure 6 and Figure 7 For elements shown but not described, please refer to the description of the first embodiment.

[0124] like Figure 1 As shown, a unit pixel UP can be formed by arranging a red pixel RP, a green pixel GP, a blue pixel BP, and a white pixel WP on the substrate 110. In the third embodiment, the white pixel WP will be described in detail. Figure 6 As shown, blue pixel BP, white pixel WP, and red pixel RP can be continuously arranged on the surface of substrate 110. Green pixel GP can be disposed next to red pixel RP, but is not mentioned in the figure. However, the present invention is not limited thereto, and red pixel RP, white pixel WP, and green pixel GP can be continuously arranged on the surface of substrate 110.

[0125] The white pixel WP may include an emitting area EA and a non-emitting area NEA. Each of the blue pixel BP and the red pixel RP may include an emitting area EA and a non-emitting area NEA. The emitting area EA may be the area used to provide light and display image information. The non-emitting area NEA may be the area surrounding the emitting area EA that does not display image information.

[0126] Scan lines SL can extend along a first direction (X-axis) and be arranged at regular intervals along a second direction (Y-axis) intersecting the first direction (X-axis). Data lines DL can extend along the second direction (Y-axis) and be arranged at regular intervals along the first direction (X-axis). Drive current lines VDD can be disposed on the substrate 110 parallel to the data lines DL.

[0127] Each of the blue pixel BP, white pixel WP, and red pixel RP may include: a driving element connected to the scan line SL, data line DL, and drive current line VDD; and a light-emitting element connected to the driving element. Each of the blue pixel BP, white pixel WP, and red pixel RP may be defined as being surrounded by the scan line SL, data line DL, and drive current line VDD. Each of the blue pixel BP and red pixel RP may include a switching thin-film transistor ST, a driving thin-film transistor DT, a light-emitting diode OLE, and a capacitor Cst.

[0128] The white pixel WP may include a switching thin-film transistor ST, a driving thin-film transistor DT, a light-emitting diode OLE, a capacitor Cst, a first virtual light-emitting diode DLE1, and a second virtual light-emitting diode DLE2. The first virtual light-emitting diode DLE1 may be disposed between the white pixel WP and the blue pixel BP. The second virtual light-emitting diode DLE2 may be disposed between the white pixel WP and the red pixel RP.

[0129] The following description pertains to the white pixel WP. The switching thin-film transistor ST of the white pixel WP can be positioned between the data line DL and the scan line SL. The driving thin-film transistor DT of the white pixel WP can be positioned between the drive current line VDD and the light-emitting diode OLE. The light-emitting diode OLE of the white pixel WP can be connected to the driving thin-film transistor DT. The light-emitting diode OLE can be configured to correspond to the light-emitting area EA.

[0130] The first virtual LED DLE1 can be connected to the source SS of the switching thin-film transistor ST in the white pixel WP or to the data line DL. For example, the first virtual pixel electrode DN1 of the first virtual LED DLE1 can be separated from the pixel electrode ANO of the LED OLE in the white pixel WP. The second virtual LED DLE2 can be connected to the LED OLE in the white pixel WP. For example, the second virtual pixel electrode DN2 of the second virtual LED DLE2 can be formed by extending the pixel electrode ANO to the non-light-emitting area NEA located to its right.

[0131] In addition, it will refer to Figure 7 The cross-sectional structure of the light-emitting display device according to the third embodiment is described below. (Refer to...) Figure 7 In the cross-sectional structure of the light-emitting display device according to the third embodiment, a substrate 110, a driving element layer 220, a light-emitting element layer 330 and an encapsulation layer 440 are stacked sequentially.

[0132] An optical shielding layer LS, a data line DL, and a drive current line VDD can be formed on the substrate 110. A buffer layer BUF can be deposited on the optical shielding layer LS, the data line DL, and the drive current line VDD to cover the entire surface of the substrate 110. A switching thin-film transistor ST, a driving thin-film transistor DT, and a capacitor Cst can be formed on the buffer layer BUF.

[0133] A passivation layer PAS can be deposited on the driving elements, including scan lines SL, data lines DL, drive current lines VDD, switching thin-film transistors ST, and driving thin-film transistors DT, to cover the entire surface of the substrate 110. A color filter CF can be deposited on the passivation layer PAS. Blue pixels BP may include a blue color filter CF(B), and red pixels RP may include a red color filter CF(R). White pixels WP may include a transparent color filter CF(W). In some cases, white pixels WP may not have a color filter.

[0134] The light-emitting element layer 330 may be deposited on the color filter CF. The light-emitting element layer 330 may include a planarization layer PL, a light-emitting diode OLE, a first dummy light-emitting diode DLE1, and a second dummy light-emitting diode DLE2. The planarization layer PL on the color filter CF may be deposited to cover the entire surface of the substrate 110.

[0135] A light-emitting diode (OLE) may include a pixel electrode ANO, an emissive layer EL, and a common electrode CAT. A first virtual light-emitting diode (DLE1) may include a first virtual pixel electrode DN1, an emissive layer EL, and a common electrode CAT. A second virtual light-emitting diode (DLE2) may include a second virtual pixel electrode DN2, an emissive layer EL, and a common electrode CAT. A pixel contact hole PH may be formed at the passivation layer PAS, the white color filter CF(W), and the planarization layer PL to expose a portion of the source DS of the driving thin-film transistor DT. Furthermore, a virtual contact hole DH may be formed at the passivation layer PAS, the white color filter CF(W), and the planarization layer PL to expose a portion of the source SS of the switching thin-film transistor ST.

[0136] Pixel electrode ANO, first virtual pixel electrode DN1, and second virtual pixel electrode DN2 can be formed on the planarization layer PL. First virtual pixel electrode DN1 and second virtual pixel electrode DN2 can completely overlap with the light shielding layer LS. Pixel electrode ANO can be connected to the source DS of the driving thin-film transistor DT via pixel contact hole PH. Pixel electrode ANO can be configured to correspond to the light-emitting region EA.

[0137] The first virtual pixel electrode DN1 can be separated from the pixel electrode ANO and can be located in the non-light-emitting area NEA to the left of the pixel electrode ANO. The first virtual pixel electrode DN1 can be connected to either the data line DL or the switching thin-film transistor ST. The first virtual pixel electrode DN1 can be connected to the source SS of the switching thin-film transistor ST via a virtual contact hole DH. The second virtual pixel electrode DN2 can be formed by extending the pixel electrode ANO to the non-light-emitting area NEA to the right of the pixel electrode ANO. The second virtual pixel electrode DN2 can extend from the pixel electrode ANO to the second virtual light-emitting area DEA2. That is, the pixel electrode ANO and the second virtual pixel electrode DN2 can be formed into a thin layer. In the case of bottom-emitting type, the pixel electrode ANO, the first virtual pixel electrode DN1 and the second virtual pixel electrode DN2 can be made of a transparent conductive material.

[0138] A dam portion BA can be formed on pixel electrode ANO, first virtual pixel electrode DN1, and second virtual pixel electrode DN2, thus defining a light-emitting area EA, a first virtual light-emitting area DEA1, and a second virtual light-emitting area DEA2. The dam portion BA can be configured to define the light-emitting area EA corresponding to the middle portion of pixel electrode ANO and the first virtual light-emitting area DEA1 corresponding to the middle portion of the first virtual pixel electrode DN1. Furthermore, the dam portion BA can be configured to define the second virtual light-emitting area DEA2 corresponding to the middle portion of the second virtual pixel electrode DN2.

[0139] By covering the periphery of pixel electrode ANO, first virtual pixel electrode DN1, and second virtual pixel electrode DN2, the embankment BA defines the light-emitting area EA, the first virtual light-emitting area DEA1, and the second virtual light-emitting area DEA2. By covering the connection portion between pixel electrode ANO and the second virtual pixel electrode DN2, the embankment BA disposed between pixel electrode ANO and the second virtual pixel electrode DN2 can distinguish or separate the second virtual light-emitting area DEA2 from the light-emitting area EA.

[0140] The light-emitting layer EL can be deposited on the surfaces of the pixel electrode ANO, the first virtual pixel electrode DN1, the second virtual pixel electrode DN2, and the embankment BA. The light-emitting layer EL can be deposited on the substrate 110 to cover all pixels P including the blue pixel BP, the white pixel WP, and the red pixel RP, and has a continuous monolithic shape on the entire surface of the substrate 110.

[0141] Although not shown in the diagram, it is similar to Figure 3 The light-emitting layer EL can have a structure in which a hole functional layer HFL, an organic light-emitting layer, and an electron functional layer EFL are stacked sequentially. The organic light-emitting layer can have a structure in which a first light-emitting layer E1, a first charge-generating layer CG1, a second light-emitting layer E2, a second charge-generating layer CG2, a third light-emitting layer E3, a third charge-generating layer CG3, and a fourth light-emitting layer E4 are stacked sequentially.

[0142] A common electrode CAT can be deposited on the light-emitting layer EL. The common electrode CAT can be deposited to cover all pixels P disposed on the substrate 110, and can have a monolithic shape of continuous deposition to cover the entire surface of the substrate 110. For bottom-emitting types, the common electrode CAT can include a metallic material with excellent light reflectivity.

[0143] The encapsulation layer 440 may be deposited on the light-emitting element layer 330. The encapsulation layer 440 may have a structure in which a first inorganic layer PA1, an organic layer PCL, and a second inorganic layer PA2 may be stacked sequentially.

[0144] An OLED can be formed in the light-emitting area EA of the white pixel WP. Furthermore, in the non-light-emitting area NEA, a first virtual OLED DLE1 can be formed at the first virtual light-emitting area DEA1, and a second virtual OLED DLE2 can be formed at the second virtual light-emitting area DEA1. Light generated from the OLED can be emitted to the outside via the substrate 110. However, light generated from the first virtual OLED DLE1 and the second virtual OLED DLE2 can be blocked by the light-shielding layer LS, preventing the light from being emitted to the outside.

[0145] When the LED in the blue pixel BP operates, lateral leakage current accumulates at the first virtual LED DLE1 through the emitting layer EL. When the LED OLE in the white pixel WP operates, the first virtual LED DLE1 can operate simultaneously. Then, due to the accumulated lateral leakage current, the first virtual LED DLE1 can emit light brighter than its original brightness. Similarly, when the LED in the red pixel RP operates, lateral leakage current accumulates at the second virtual LED DLE2 through the emitting layer EL. When the LED OLE in the white pixel WP operates, the second virtual LED DLE2 can operate simultaneously. Then, due to the accumulated lateral leakage current, the second virtual LED DLE2 can emit light brighter than its original brightness. The light generated from the first virtual LED DLE1 and the second virtual LED DLE2 is blocked by the light shielding layer LS, preventing light from being emitted to the outside. Therefore, the light emitted by the first virtual LED DLE1 and the second virtual LED DLE2, which can emit light with a brightness higher than the set brightness of the LED OLE in the white pixel WP, will not be perceived by the user.

[0146] Since the first virtual LED DLE1 can consume the lateral leakage current transmitted from the blue pixel BP to the white pixel WP, and the second virtual LED DLE2 can consume the lateral leakage current transmitted from the red pixel RP to the white pixel WP, the lateral leakage current does not affect the LED OLE of the white pixel WP.

[0147] <Fourth Implementation Method>

[0148] The following will refer to Figure 8 and Figure 9 The detailed structure of the light-emitting display device according to the fourth embodiment will be described. Figure 8 This is an enlarged plan view showing the structure of three pixels arranged sequentially in a light-emitting display device according to a fourth embodiment of the present invention. Figure 9 It is along Figure 8 The enlarged cross-sectional view taken along line IV-IV' is used to illustrate the structure of the light-emitting display device according to the fourth embodiment of the present invention.

[0149] The light-emitting display device according to the fourth embodiment may have a structure very similar to that of the third embodiment. The difference may lie in the manner in which the first virtual pixel electrode DN1 is connected to the driving element. In the following description, detailed descriptions of the same elements as in the first embodiment will not be repeated or will be briefly described.

[0150] Reference Figure 8 Blue pixel BP, white pixel WP, and red pixel RP can be continuously arranged on the surface of substrate 110. Green pixel GP can be located on one side of red pixel RP.

[0151] Each of the blue pixel BP, white pixel WP, and red pixel RP may include: a driving element connected to the scan line SL, data line DL, and drive current line VDD; and a light-emitting element connected to the driving element. Each of the blue pixel BP and red pixel RP may include a switching thin-film transistor ST, a driving thin-film transistor DT, a light-emitting diode OLE, and a capacitor Cst.

[0152] The white pixel WP may include a switching thin-film transistor ST, a driving thin-film transistor DT, a light-emitting diode OLE, a capacitor Cst, a first virtual light-emitting diode DLE1, and a second virtual light-emitting diode DLE2. The first virtual light-emitting diode DLE1 may be disposed between the white pixel WP and the blue pixel BP. The second virtual light-emitting diode DLE2 may be disposed between the white pixel WP and the red pixel RP.

[0153] The first virtual LED DLE1 and the second virtual LED DLE2 can be connected to the LED OLE of the white pixel WP. For example, the first virtual pixel electrode DN1 of the first virtual LED DLE1 can be formed by extending the pixel electrode ANO of the LED OLE to the non-light-emitting area NEA located to its left. Similarly, the second virtual pixel electrode DN2 of the second virtual LED DLE2 can be formed by extending the pixel electrode ANO of the LED OLE to the non-light-emitting area NEA located to its right.

[0154] In addition, refer to Figure 9 A cross-sectional structure of the light-emitting display device according to the fourth embodiment is described. (Refer to...) Figure 9 In the cross-sectional structure of the light-emitting display device according to the fourth embodiment, a substrate 110, a driving element layer 220, a light-emitting element layer 330 and an encapsulation layer 440 are stacked sequentially.

[0155] An optical shielding layer LS, a data line DL, and a drive current line VDD can be formed on the substrate 110. A buffer layer BUF can be deposited on the optical shielding layer LS, the data line DL, and the drive current line VDD to cover the entire surface of the substrate 110. A switching thin-film transistor ST, a driving thin-film transistor DT, and a capacitor Cst can be formed on the buffer layer BUF.

[0156] A passivation layer PAS can be deposited on driving elements including scan lines SL, data lines DL, drive current lines VDD, switching thin-film transistors ST, and driving thin-film transistors DT to cover the entire surface of substrate 110. On the passivation layer PAS, blue pixel BP may include a blue color filter CF(B), and red pixel RP may include a red color filter CF(R). White pixel WP may include a transparent color filter CF(W).

[0157] The light-emitting element layer 330 may be deposited on the color filter CF. The light-emitting element layer 330 may include a planarization layer PL, a light-emitting diode (OLE), a first virtual light-emitting diode (DLE1), and a second virtual light-emitting diode (DLE2). The light-emitting diode OLE may include a pixel electrode DN1, a light-emitting layer EL, and a common electrode CAT. The first virtual light-emitting diode DLE1 may include a first virtual pixel electrode DN1, a light-emitting layer EL, and a common electrode CAT. The second virtual light-emitting diode DLE2 may include a second virtual pixel electrode DN2, a light-emitting layer EL, and a common electrode CAT.

[0158] Pixel electrode ANO, first virtual pixel electrode DN1, and second virtual pixel electrode DN2 can be formed on planarization layer PL. First virtual pixel electrode DN1 and second virtual pixel electrode DN2 can completely overlap with light shielding layer LS.

[0159] The first virtual pixel electrode DN1 can be formed by extending the pixel electrode ANO to the non-light-emitting area NEA located to the left of the pixel electrode ANO. The first virtual pixel electrode DN1 can extend from the pixel electrode ANO to the first virtual light-emitting area DEA1. The second virtual pixel electrode DN2 can be formed by extending the pixel electrode ANO to the non-light-emitting area NEA located to the right of the pixel electrode ANO. The second virtual pixel electrode DN2 can extend from the pixel electrode ANO to the second virtual light-emitting area DEA2. That is, the pixel electrode ANO, the first virtual pixel electrode DN1, and the second virtual pixel electrode DN2 can be formed into a thin layer. The first virtual pixel electrode DN1 can be connected to the source DS of the driving thin-film transistor DT via the pixel contact hole PH.

[0160] A dam BA can be formed on the pixel electrode ANO, the first virtual pixel electrode DN1, and the second virtual pixel electrode DN2, thus defining the light-emitting area EA, the first virtual light-emitting area DEA1, and the second virtual light-emitting area DEA2. By covering the periphery of the pixel electrode ANO, the first virtual pixel electrode DN1, and the second virtual pixel electrode DN2, the dam BA can define the light-emitting area EA, the first virtual light-emitting area DEA1, and the second virtual light-emitting area DEA2. Furthermore, by covering the connection portion between the pixel electrode ANO and the first virtual pixel electrode DN1, the dam BA provided between the pixel electrode ANO and the first virtual pixel electrode DN1 can separate or isolate the first virtual light-emitting area DEA1 from the light-emitting area EA. Similarly, by covering the connection portion between the pixel electrode ANO and the second virtual pixel electrode DN2, the dam BA provided between the pixel electrode ANO and the second virtual pixel electrode DN2 can separate or isolate the second virtual light-emitting area DEA2 from the light-emitting area EA.

[0161] The light-emitting layer EL can be deposited on the surfaces of the pixel electrode ANO, the first virtual pixel electrode DN1, the second virtual pixel electrode DN2, and the embankment BA. A common electrode CAT can be deposited on the light-emitting layer EL. Each of the light-emitting layer EL and the common electrode CAT can be deposited to cover all pixels P on the surface of the substrate 110 and has a continuous monolithic layer across the entire surface of the substrate 110. An encapsulation layer 440 can be deposited on the light-emitting element layer 330.

[0162] An OLED can be formed in the light-emitting region EA of pixel P. Furthermore, in the non-light-emitting region NEA, a first virtual OLED DLE1 can be formed at the first virtual light-emitting region DEA1, and a second virtual OLED DLE2 can be formed at the second virtual light-emitting region DEA1. Light generated from the OLED can be emitted to the outside via the substrate 110. However, light generated from the first virtual OLED DLE1 and the second virtual OLED DLE2 can be blocked by the light-shielding layer LS, preventing the light from being emitted to the outside.

[0163] Since the first virtual LED DLE1 can consume the lateral leakage current transmitted from the blue pixel BP to the white pixel WP, and the second virtual LED DLE2 can consume the lateral leakage current transmitted from the red pixel RP to the white pixel WP, the lateral leakage current does not affect the LED OLE of the white pixel WP.

[0164] In the embodiments described above with reference to the accompanying drawings, the description pertains to a bottom-emitting type structure, wherein a color filter CF may be disposed between the light-emitting diode OLE and the substrate 110. However, an important feature of the present invention is not limited to the bottom-emitting type. For example, the features of the present invention can be applied to a top-emitting type, wherein the color filter CF is disposed above the light-emitting diode OLE. For example, the color filter CF may be disposed on the encapsulation layer 440. As another example, a glass substrate may be used as the encapsulation substrate, and the glass substrate may be bonded to the substrate 110 having the light-emitting diode OLE. In this case, the color filter CF may be disposed below the glass encapsulation substrate.

[0165] Furthermore, in the above embodiments, the light-emitting layer EL can be described as having a structure in which a first light-emitting layer E1, a second light-emitting layer E2, a third light-emitting layer E3, and a fourth light-emitting layer E4 are stacked sequentially. However, the present invention is not limited thereto. Three or two light-emitting layers may be stacked, or more than four light-emitting layers may be stacked. Each of the stacked light-emitting layers (i.e., the four light-emitting layers E1, E2, E3, and E4) may contain an organic light-emitting material that emits any one of red, green, and blue light. At least two of the four light-emitting layers E1, E2, E3, and E4 may contain an organic light-emitting material that produces blue light.

[0166] In the above embodiments, the description pertains to a thin-film transistor having a top gate structure (where the gate is positioned on top of the semiconductor layer and a gate insulating layer is present between the gate and the semiconductor layer). However, the invention is not limited thereto. A thin-film transistor may include a bottom gate structure, where the gate is located below the semiconductor layer. In other aspects, a thin-film transistor may include a dual-gate structure, where the two gates are respectively disposed above and below the semiconductor layer.

[0167] The features, structures, effects, etc., described in the above exemplary embodiments of the present invention are included in at least one exemplary embodiment of the present invention, and are not necessarily limited to one exemplary embodiment. Furthermore, the features, structures, effects, etc., explained in at least one exemplary embodiment can be implemented by those skilled in the art in combination or modification with respect to other exemplary embodiments. Therefore, such combinations and modifications should be interpreted as being included within the scope of the present invention.

[0168] It will be apparent to those skilled in the art that various substitutions, modifications, and variations can be made within the scope of this invention without departing from its spirit and scope. Therefore, embodiments of the invention are intended to cover various substitutions, modifications, and variations that fall within the scope of the appended claims and their equivalents. These and other changes can be made to the embodiments based on the detailed description above. Generally, the terminology used in the appended claims should not be construed as limiting the claims to the specific exemplary embodiments disclosed in the specification and claims, but should be interpreted as covering all possible embodiments within all equivalents of these claims. Therefore, the claims are not limited to the specific description.

Claims

1. A light-emitting display device, comprising: Multiple pixels on the substrate; The driving element layer on the substrate; A pixel electrode is disposed on the driving element layer in each pixel; A virtual pixel electrode is disposed on at least one side of the pixel electrode; A dam, wherein the dam defines a light-emitting area at the pixel electrode and a virtual light-emitting area at the virtual pixel electrode; A light-emitting layer is continuously deposited on the pixel electrode, the virtual pixel electrode, and the embankment; The common electrode on the light-emitting layer; as well as A light-shielding layer that overlaps with the virtual pixel electrode but does not overlap with the pixel electrode. The pixel electrode and the virtual pixel electrode are connected to the driving element disposed in the driving element layer.

2. The light-emitting display device according to claim 1, further comprising: A color filter is disposed between the driving element layer and the pixel electrode; as well as The planarization layer located between the color filter and the pixel electrode, The light shielding layer is disposed between the substrate and the driving element layer.

3. The light-emitting display device according to claim 1, wherein the driving element layer comprises: Data cable; Drive current lines parallel to the data lines; Scan lines that intersect the data lines and the drive current lines; A switching thin-film transistor located between the data line and the scan line; as well as The driving thin-film transistor is located between the switching thin-film transistor and the driving current line. The pixel electrode is connected to the driving thin-film transistor. The virtual pixel electrode is connected to any one of the data line, the switching thin-film transistor, and the driving thin-film transistor. A compensation light-emitting diode is provided corresponding to the light shielding layer.

4. The light-emitting display device according to claim 3, wherein the virtual pixel electrode is separate from the pixel electrode and connected to the source of the switching thin-film transistor. The embankment covers the periphery of the pixel electrode and the virtual pixel electrode.

5. The light-emitting display device according to claim 3, wherein the virtual pixel electrode is disposed at the virtual light-emitting area by extending from the pixel electrode. The embankment covers the periphery of the pixel electrode and the virtual pixel electrode, and is disposed between the pixel electrode and the virtual pixel electrode.

6. The light-emitting display device according to claim 1, wherein the plurality of pixels comprises blue pixels, white pixels, and red pixels arranged in sequence. The virtual pixel electrode of the white pixel includes: A first virtual pixel electrode is disposed in a first virtual light-emitting area between the white pixel and the blue pixel; as well as The second virtual pixel electrode is disposed in the second virtual light-emitting area between the white pixel and the red pixel.

7. The light-emitting display device according to claim 6, wherein the driving element layer comprises: In each of the plurality of pixels, there are data lines, drive current lines parallel to the data lines, and scan lines intersecting with the data lines and the drive circuit lines; A switching thin-film transistor located between the data line and the scan line; as well as The driving thin-film transistor is located between the switching thin-film transistor and the driving current line. The pixel electrode of the white pixel is connected to the driving thin-film transistor. The first and second virtual pixel electrodes of the white pixel are connected to any one of the data line, the switching thin-film transistor, and the driving thin-film transistor.

8. The light-emitting display device according to claim 7, wherein the first virtual pixel electrode is located in the first virtual light-emitting area and connected to either the data line or the switching thin-film transistor. The second virtual pixel electrode extends from the pixel electrode to the second virtual light-emitting area. The embankment covers the periphery of the pixel electrode, the first virtual pixel electrode, and the second virtual pixel electrode in the white pixel, and is disposed between the pixel electrode and the second virtual pixel electrode of the white pixel.

9. The light-emitting display device according to claim 7, wherein the first virtual pixel electrode extends from the pixel electrode to the first virtual light-emitting area. The second virtual pixel electrode extends from the pixel electrode to the second virtual light-emitting area. The embankment covers the periphery of the pixel electrode, the first virtual pixel electrode, and the second virtual pixel electrode, and is disposed between the pixel electrode and the first virtual pixel electrode, and between the pixel electrode and the second virtual pixel electrode.

10. The light-emitting display device according to claim 1, wherein the light-emitting layer comprises: A first light-emitting layer on the pixel electrode, the virtual pixel electrode, and the embankment; A first charge generation layer on the first light-emitting layer; A second light-emitting layer on the first charge generation layer; A second charge generation layer on the second light-emitting layer; A third light-emitting layer on the second charge generation layer; The third charge generation layer on the third light-emitting layer; as well as A fourth light-emitting layer on the third charge-generating layer.

11. The light-emitting display device according to claim 10, wherein the pixel electrode comprises: Hole functional layer on the pixel electrode, the virtual pixel electrode, and the embankment, and below the first light-emitting layer; as well as An electronic functional layer between the fourth light-emitting layer and the common electrode.

12. The light-emitting display device according to claim 11, wherein the first light-emitting layer provides red light. The second light-emitting layer provides the first blue light. The third light-emitting layer provides green light. The fourth luminescent layer provides a second blue light.

13. The light-emitting display device according to claim 1, wherein the light-emitting region is a first region, in which light provided from the light-emitting layer is emitted to the outside through the substrate. The virtual light-emitting area is a second area in which light supplied from the light-emitting layer is blocked by the light-shielding layer and not emitted to the outside.

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