Display device

Abstract

A display device includes a first substrate including a first display area and a first non-display area outside the first display area, a second substrate on an upper portion of the first substrate and including a second display area and a second non-display area, a plurality of first pads disposed within the first non-display area, a plurality of touch electrodes disposed within the second display area under the second substrate, a plurality of bridge electrodes disposed within the second display area under the second substrate, and a plurality of second pads disposed within the second non-display area under the second substrate. The plurality of first pads are disposed at one side portion of the first substrate, and the plurality of second pads are disposed at another side portion of the second substrate which does not overlap the one side portion of the first substrate.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2025-0057449, filed with the Korean Intellectual Property Office on April 30, 2025, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device, and more specifically, to a display device including a touch sensing unit. Background Technology

[0004] In the field of display devices that visualize electrical information signals, research is underway to develop performance characteristics such as thinness, lightweight, and low power consumption for various display devices. Representative display devices include liquid crystal displays (LCDs), field emission displays (FEDs), electrowetting displays (EWDs), and organic light-emitting displays (OLEDs).

[0005] To provide users with a wider range of functions, a display device has been developed that recognizes user touches on the display panel and provides touch functionality for performing input processing based on the recognized touches. The touch-recognition-capable display device includes multiple touch electrodes disposed on or embedded in the display panel, and the presence or absence of a user's touch on the display panel and the touch coordinates can be detected by driving the touch electrodes. Thus, in the case of a touch-recognition-capable display device, a packaged substrate with touch sensing units can be disposed on the display panel to prevent moisture penetration or oxygen inflow into the display panel. When the display panel and the packaged substrate are bonded, a method is needed to effectively set the touch pads while preventing damage to the touch pads on which signals for operating the touch sensing units are applied. Summary of the Invention

[0006] One objective of this disclosure is to provide a display device in which a flexible film can be effectively attached to a touch pad disposed on a packaging substrate without damaging the structure of the connection between the display substrate and the packaging substrate.

[0007] Another objective of this disclosure is to provide a display device that can effectively reduce the resistance of touch pads and touch routing lines disposed on a package substrate.

[0008] Another objective of this disclosure is to provide a display device that facilitates the inspection of touch pads attached from the bottom of the package substrate, alignment marks of the flexible film, and indentation of the adhesive layer.

[0009] The purpose of this disclosure is not limited to the above-mentioned purposes, and other purposes not mentioned above will be clearly understood by those skilled in the art from the description below.

[0010] According to one embodiment of this disclosure, a display device includes: a first substrate, the first substrate including a first display area having a plurality of sub-pixels and a first non-display area located outside the first display area; a second substrate, the second substrate being above the first substrate and opposite to the first substrate, and including a second display area corresponding to the first display area and a second non-display area located outside the second display area; a plurality of first pads, the plurality of first pads being disposed within the first non-display area of ​​the first substrate; a plurality of touch electrodes, the plurality of touch electrodes being disposed below the second substrate within the second display area; a plurality of bridging electrodes, the plurality of bridging electrodes being disposed below the second substrate within the second display area, the plurality of bridging electrodes and the plurality of touch electrodes being disposed on different layers and electrically connected to a portion of the plurality of touch electrodes; and a plurality of second pads, the plurality of second pads being disposed below the second substrate within the second non-display area and electrically connected to each of the plurality of touch electrodes, the plurality of first pads being disposed on one side of the first substrate, and the plurality of second pads being disposed on another side of the second substrate that does not overlap with one side of the first substrate.

[0011] A display device according to another exemplary embodiment of the present disclosure includes: a first substrate, the first substrate including a display area having a plurality of light-emitting elements disposed thereon and a non-display area located outside the display area; a second substrate, the second substrate being opposite to the first substrate from above; a filling layer disposed between the first substrate and the second substrate; at least one dam disposed between the first substrate and the second substrate to surround the outer surface of the filling layer thereby limiting the filling layer; a plurality of first touch electrodes disposed below the second substrate in a first region corresponding to the display area and extending along a first direction; and a plurality of second touch electrodes. The touch electrode extends along a second direction intersecting the first direction; a plurality of bridging electrodes are disposed under the second substrate in a first region, disposed on a different layer from the plurality of first touch electrodes and the plurality of second touch electrodes, and electrically connected to a portion of the plurality of second touch electrodes; a plurality of touch routing lines extend from the first region and are disposed in a second region that at least partially overlaps with the non-display region; a plurality of touch pads extend from the second region and are disposed on a side of the second substrate in a third region that does not overlap with the non-display region; and a second flexible film is electrically connected to the plurality of touch pads at the lower part of the second substrate.

[0012] Further details of the embodiments are included in the detailed description and the accompanying drawings.

[0013] An exemplary embodiment of the present disclosure provides a display device comprising non-overlapping sides of a display substrate and a packaging substrate facing each other, a signal pad and a first flexible film attached to a non-display area of ​​the non-overlapping side of the display substrate, and a touch pad and a second flexible film that can be attached to a non-display area of ​​the non-overlapping side of the packaging substrate, such that they can be easily attached even when the display substrate and packaging substrate facing each other are joined, without damaging each of the signal pad, touch pad and flexible film.

[0014] In a display device according to an exemplary embodiment of the present disclosure, a touch sensing unit is disposed on a package substrate, and touch pads and touch routing lines are implemented using touch electrodes and bridging electrodes of the touch sensing unit to reduce the resistance of each of the touch pads and touch routing lines, and the touch pads and flexible film are easily attached to the underside of the package substrate.

[0015] In the display device according to an embodiment of the present disclosure, a color filter and a black matrix are disposed on a packaging substrate, and the black matrix is ​​disposed on one side of the packaging substrate from the outermost portion of the packaging substrate to a position spaced inward from the outermost portion of the packaging substrate, such that when the touch pads and the flexible film are attached to the lower part of the packaging substrate, the alignment marks used to align the touch pads and the flexible film can be easily inspected, and the imprints of the adhesive layer for electrically bonding the touch pads and the flexible film can also be easily inspected.

[0016] The effects of this disclosure are not limited to those illustrated above, and many more effects are included in this disclosure. Attached Figure Description

[0017] The above and other aspects, features, and advantages of this disclosure will become clearer from the detailed embodiments described below in conjunction with the accompanying drawings, in which: Figure 1 This is a schematic exploded perspective view of a display device according to an exemplary embodiment of the present disclosure.

[0018] Figure 2 This is a plan view of a display device according to an exemplary embodiment of the present disclosure, seen from the top of the packaging substrate.

[0019] Figure 3 This is a plan view of a display device according to an exemplary embodiment of the present disclosure, seen from the bottom of the packaging substrate.

[0020] Figure 4 It is along Figure 2 An example of a cross-sectional view taken by the I-I' line.

[0021] Figure 5 It is along Figure 2 Another example of a cross-sectional view taken by the I-I' line.

[0022] Figure 6 It is along Figure 2 An example of a cross-sectional view taken from line II-II'.

[0023] Figure 7 It is along Figure 2 Another example of a cross-sectional view taken from line II-II'.

[0024] Figure 8 It is along Figure 3 An example of a cross-sectional view taken from line III-III'.

[0025] Figure 9 It is along Figure 3 Another example of a cross-sectional view taken from line III-III'.

[0026] Figure 10 It is along Figure 3 An example of a cross-sectional view taken from the IV-IV' line.

[0027] Figure 11 It is along Figure 3 Another example of a cross-sectional view taken from the IV-IV' line. Detailed Implementation

[0028] The advantages and features of this disclosure, as well as methods for implementing these advantages and features, will become clear from the exemplary embodiments described in detail below and the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided by way of example only so that those skilled in the art can fully understand the disclosure and scope of this disclosure.

[0029] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings used to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Furthermore, in the following description of this disclosure, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural form.

[0030] Even without explicit explanation, components are interpreted as including the normal tolerance range.

[0031] When using terms such as “on top of,” “above,” “below,” and “beside,” to describe the positional relationship between two parts, one or more parts may be located between the two parts, unless these terms are used with the terms “closely” or “directly.”

[0032] When one element or layer is placed "on" another element or layer, another layer or element can be directly inserted on or between that other element.

[0033] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component mentioned below can be a second component under the technical concept of this disclosure.

[0034] Throughout this disclosure, similar reference numerals generally denote similar elements.

[0035] For ease of description, the size and thickness of each component shown in the accompanying drawings are illustrated, and this disclosure is not limited to the size and thickness of the components shown.

[0036] Features of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, and may be technically associated and operable in various ways, and the embodiments may be implemented independently of each other or in relation to each other.

[0037] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0038] Figure 1 This is a schematic exploded perspective view of a display device according to an exemplary embodiment of the present disclosure.

[0039] Figure 2 This is a plan view of a display device according to an exemplary embodiment of the present disclosure, seen from the top of the packaging substrate.

[0040] Figure 3 This is a plan view of a display device according to an exemplary embodiment of the present disclosure, seen from the bottom of the packaging substrate.

[0041] Let's refer to each other. Figures 1 to 3A display device 100 according to an exemplary embodiment of the present disclosure includes a first substrate 110, a second substrate 150 having a surface opposite to the first substrate 110, and a third substrate 180 having a surface opposite to another surface of the second substrate 150. A plurality of sub-pixels SP are disposed on a surface of the first substrate 110 facing the second substrate 150. A plurality of touch electrodes TE are disposed on a surface of the second substrate 150 facing the first substrate 110. In one embodiment of the present disclosure, the second substrate 150 is described as being disposed on the first substrate 110, and the third substrate 180 is disposed on the second substrate 150. For example, the first substrate 110, the second substrate 150, and the third substrate 180 may be relative to each other. Figure 1 The z-axis shown is arranged sequentially. In one embodiment of this disclosure, the third substrate 180 may be referred to as the cover member 180.

[0042] The first substrate 110 is a component for supporting various parts included in the display device 100, and may be made of a transparent insulating material (e.g., glass or resin). Furthermore, the first substrate 110 may comprise a polymer or plastic, or may be made of a flexible material. In one embodiment of this disclosure, the first substrate 110 may be referred to as a "display substrate".

[0043] The first substrate 110 includes a display area DA (hereinafter referred to as the "first display area") on which a plurality of sub-pixels SP for implementing an image are disposed, and a non-display area NA1 located outside the first display area DA (hereinafter referred to as the "first non-display area"). The first non-display area NA1 of the first substrate 110 may be an area where the plurality of sub-pixels SP are not disposed, that is, an area where no image is displayed, and may be an area extending from the first display area DA.

[0044] Multiple gate lines GL and multiple data lines DL are arranged to intersect each other on the first substrate 110, and multiple sub-pixels SP are defined at the intersections between the multiple gate lines GL and the data lines DL. Within the first display area DA of the first substrate 110, multiple sub-pixels SP constituting each of the multiple pixels and pixel driving circuitry for driving the multiple sub-pixels SP can be disposed. For example, the pixel driving circuitry may include a driving transistor DT, a switching transistor ST, and a capacitor Cst. The driving transistor DT can operate such that a driving current flows between a high-potential power line VDD and a low-potential power line VSS according to a data voltage stored in the capacitor Cst. The light-emitting element 120 can operate to emit light according to the driving current generated by the driving transistor DT. The switching transistor ST can perform a switching operation such that a data signal supplied through the data line DL is stored as a data voltage in the capacitor Cst in response to a gate signal supplied through the gate line GL. Above, the pixel driving circuitry for each sub-pixel SP has been described by way of example in a 2T (transistor) 1C (capacitor) structure configuration including a driving transistor, a switching transistor, and a capacitor. As another example, the sub-pixel SP may also include a compensation circuitry 10. The compensation circuit 10 is a circuit used to compensate the threshold voltage of the driving transistor. For example, when the compensation circuit is added to the pixel driving circuit, the compensation circuit can have various structures such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, 7T2C, etc.

[0045] A display device 100 according to an exemplary embodiment of the present disclosure may include an image processing unit that outputs a data signal supplied from an external source and a drive signal including at least one of a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal. The display device 100 may also include a timing controller that receives the drive signal and the data signal from the image processing unit, and outputs a gate timing control signal for controlling the operating timing of a gate driver and a data timing control signal for controlling the operating timing of the data signal and the data driver based on the drive signal. The display device 100 may also include a data driver that processes the data signal supplied from the timing controller in response to the data timing control signal supplied from the timing controller, and outputs the data signal through multiple data lines DL. The display device 100 may also include a gate driver that outputs a gate signal through a gate line GL while simultaneously outputting a gate signal in response to the timing control signal.

[0046] Within the first non-display area NA1 of the first substrate 110, signal link lines LL and multiple signal pads may be provided, which are electrically connected to multiple sub-pixels SP disposed within the first display area DA and transmit various signals and power supplies for driving the sub-pixels SP. Driving circuits, such as gate drivers and data drivers, are also electrically connected to the signal pads. In this case, the driving units and driving circuits, such as gate drivers and data drivers, may be implemented by one or more integrated circuits (ICs), and may be implemented by chip-on-glass (COG), chip-on-film (COF), or tape-on-carrier (TCP) type. Furthermore, within the first non-display area NA1 of the first substrate 110, the gate driving circuit included in the gate driver may be configured as a gate-in-panel (GIP). A display device 100 according to an exemplary embodiment of this disclosure may include a COF-type flexible film 137 on which driving integrated circuits, such as gate drivers and data drivers, are mounted. Furthermore, the display device 100 may include a circuit board 139 on which multiple circuits implemented by multiple driving chips, such as timing controllers, are mounted. The circuit board 139 can be a printed circuit board (PCB) or a flexible printed circuit board (FPCB) and can be attached to the flexible film 137 for electrical connection to the flexible film 137.

[0047] On the other hand, since the light-emitting element 120 of each of the plurality of sub-pixels SP disposed in the first display area DA of the first substrate 110 is easily affected by external moisture or oxygen, the filler layer (hereinafter referred to as...) Figures 4 to 11 (shown as "140") and at least one dam section (as described below) Figures 4 to 11 The first substrate 110 is provided with a filling layer 140 and a dam 145, and the second substrate 150 is configured to cover the filling layer 140 and the dam 145, thereby sealing the plurality of light-emitting elements 120 on the first substrate 110. For example, the second substrate 150 may be made of a transparent insulating material (e.g., glass or resin). In one embodiment of this disclosure, the second substrate 150 may be referred to as a "sealing substrate".

[0048] refer to Figure 3 A touch sensing unit TS, comprising multiple touch electrodes TE1 and TE2 and multiple bridging electrodes BE, is disposed on one surface of the second substrate 150. In this case, the touch sensing unit TS is disposed on the lower surface of the second substrate 150 (i.e., the surface of the second substrate 150 facing the first substrate 110) within a display area (hereinafter referred to as the "second display area") corresponding to the first display area DA of the first substrate 110. The touch sensing unit TS includes a first direction (i.e., Figure 3 Multiple first touch electrodes TE1 extending along the x-axis direction, and along a second direction intersecting the first direction (i.e., along the x-axis direction), and along the second direction intersecting the first direction. Figure 3A plurality of second touch electrodes TE2 extend along the y-axis and are disposed on the same layer as a plurality of first touch electrodes TE1. Each of the plurality of first touch electrodes TE1 and the plurality of second touch electrodes TE2 may include a plurality of unit electrodes. For example, each of the first touch electrodes TE1 and the second touch electrodes TE2 may include a plurality of unit electrodes patterned in a grid shape. Figure 3 The unit electrodes of the first touch electrode TE1 and the second touch electrode TE2, formed by a diamond-shaped grid pattern, are shown to be in a continuous shape. However, this disclosure is not limited thereto. The unit electrodes can have various shapes such as triangles, squares, diamonds, or polygons. In this case, the grid pattern of the unit electrodes of the first touch electrode TE1 and the second touch electrode TE2 can be implemented respectively by touch electrode lines surrounding openings corresponding to the light-emitting areas of the sub-pixel SP. These touch electrode lines are portions corresponding to the substantial touch electrodes and are portions on which touch driving signals or touch sensing signals are applied. Furthermore, the touch sensing unit TS includes bridging electrodes that electrically connect the unit electrodes of each of the first touch electrode TE1 and the second touch electrode TE2. (Reference) Figure 3 The bridging electrode connecting the unit electrode of the first touch electrode TE1 is disposed on the same layer as the first touch electrode TE1, while the bridging electrode BE connecting the unit electrode of the second touch electrode TE2 can be disposed on a different layer from the second touch electrode TE2. In this case, the bridging electrode connecting the unit electrode of the first touch electrode TE1 can be integrally implemented by extending from the unit electrode of the first touch electrode TE1. Each of the plurality of first touch electrodes TE1, the plurality of second touch electrodes TE2, and the plurality of bridging electrodes BE can be formed of at least any one of a metal including titanium (Ti), aluminum (Al), molybdenum (Mo), molybdenum titanium (MoTi), copper (Cu), and tantalum (Ta), and can be formed of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO), but is not limited thereto.

[0049] Light emitted from the display device 100 can pass through a plurality of first touch electrodes TE1 and a plurality of second touch electrodes TE2 made of transparent conductive material and be emitted to the outside. This disclosure is not limited thereto; light emitted from the display device 100 can also be emitted to the outside through a plurality of openings included in the plurality of first touch electrodes TE1 and the plurality of second touch electrodes TE2.

[0050] The display device 100 according to an exemplary embodiment of the present disclosure can sense touch using a touch sensing method based on mutual capacitance (which is a capacitance-based touch sensing method). For example, a plurality of first touch electrodes TE1 can be touch driving electrodes, and a plurality of second touch electrodes TE2 can be touch sensing electrodes. However, the present disclosure is not limited thereto. The plurality of first touch electrodes TE1 can be touch sensing electrodes, and the plurality of second touch electrodes TE2 can be touch driving electrodes. Furthermore, the display device 100 according to an exemplary embodiment of the present disclosure can sense touch using a touch sensing method based on self-capacitance.

[0051] The second substrate 150 includes a non-display area NA2 (hereinafter referred to as the "second non-display area") that serves as the outer region of the second display area. The second non-display area NA2 is an area where no touch sensing unit TS is disposed, and it may be an area extending from the second display area. Multiple touch routing lines TRLs electrically connected to multiple first touch electrodes TE1 and multiple second touch electrodes TE2, multiple touch pads electrically connected to the multiple touch routing lines TRLs, and touch driving circuitry electrically connected to the touch pads may be disposed below the second substrate 150 within the second non-display area NA2. For example, the multiple touch routing lines TRLs may be formed of a low-resistance metal material or a transparent conductive material such as ITO or IZO. For example, when the multiple touch routing lines TRLs are made of a low-resistance metal material, the resistance is reduced, and the RC delay can be reduced.

[0052] To provide touch sensing functionality, the display device 100 according to an exemplary embodiment of the present disclosure may include a touch sensing circuit that supplies touch driving signals to a touch sensing unit TS and detects touch sensing signals from the touch sensing unit TS to sense the presence or absence of a user touch and the touch position (or coordinates). For example, the touch sensing circuit may include a touch driving circuit and a touch controller. The touch driving circuit supplies touch driving signals to the touch sensing unit TS and detects touch sensing signals by a user touch from the touch sensing unit TS. The touch controller senses the presence or absence of a user touch and / or the touch position based on the touch sensing information detected by the touch driving circuit. In some cases, the touch driving circuit and the touch controller may be implemented as separate components or integrated into one component. The display device 100 according to an exemplary embodiment of the present disclosure may include a COF-type flexible film 157 on which an integrated circuit such as a touch driving circuit is mounted. Furthermore, the display device 100 according to an exemplary embodiment of the present disclosure may include a circuit board 159 on which multiple circuits implemented by multiple driver chips such as a touch controller are mounted. The circuit board 159 can be a printed circuit board (PCB) or a flexible printed circuit board (FPCB) and can be attached to the flexible film 157 for electrical connection to the flexible film 157.

[0053] On the other hand, such as Figure 3 As shown, an electrostatic discharge (ESD) circuit for discharging static electricity entering from the outside can be disposed within the second non-display area NA2 of the second substrate 150. For example, the ESD circuit can be disposed between the outermost touch route line TRL of a plurality of touch route lines TRL and the outermost portion of the second substrate 150. Furthermore, the ESD circuit is disposed around the second display area of ​​the second substrate 150 and can be connected to the ground terminal of an integrated circuit whose ends are mounted on the flexible film 157. For example, the ESD circuit can be implemented by one or more transistors, and the transistors constituting the ESD circuit can include electrodes disposed on the same layer as the touch electrodes TE1 and TE2 and the bridging electrode BE, respectively, and made of the same material.

[0054] In the following text, reference will be made to Figure 4 and Figure 5 The structure of the display area DA of a display device 100 according to an exemplary embodiment of the present disclosure is described in detail. Apart from the arrangement positions of the plurality of color filters CF', Figure 5 The structure of the display area DA shown is similar to Figure 4 The structures of the display areas DA shown are basically the same, so redundant descriptions will be omitted.

[0055] Figure 4 It is along Figure 2 An example of a cross-sectional view taken by the I-I' line.

[0056] Figure 5 It is along Figure 2 Another example of a cross-sectional view taken by the I-I' line.

[0057] refer to Figure 4 The first substrate 110 may include substrate 110a, substrate 110b, and interlayer insulating film 110c. The interlayer insulating film 110c may be disposed between substrate 110a and substrate 110b. For example, substrate 110a and substrate 110b may be polyimide (PI) substrates, and the interlayer insulating film 110c may be made of silicon nitride (SiN). x ) or silicon oxide (SiO) x The first substrate 110 is formed from a single layer or multiple layers thereof. As described above, the first substrate 110 is composed of a substrate 110a, a substrate 110b and an interlayer insulating film 110c, thereby effectively preventing moisture penetration.

[0058] A first multi-buffer layer 111a may be disposed on the first substrate 110, and a first active buffer layer 111b may be disposed on the first multi-buffer layer 111a. The first multi-buffer layer 111a and the first active buffer layer 111b can delay the diffusion of moisture or oxygen introduced into the first substrate 110; for example, they may contain silicon nitride (SiN). x ) and silicon oxide (SiO) x At least one of the following.

[0059] A first insulating layer 112a is disposed on the first active buffer layer 111b. For example, the first insulating layer 112a may be made of silicon nitride (SiN). x ) or silicon oxide (SiO) x It consists of a single layer or multiple layers.

[0060] The first barrier layer BSM1 and the first capacitor electrode C1 of the capacitor Cst are disposed on the first insulating layer 112a. The first barrier layer BSM1 may be a metal film that serves to block light, preventing light incident from outside the display device from irradiating the semiconductor layer and causing semiconductor layer degradation. For example, the area of ​​the barrier layer may be larger than the area of ​​the active layer of the thin-film transistor, but is not limited thereto. In addition, the barrier layer can prevent the introduction of charge from the first substrate 110. Figure 4 The diagram shows a first barrier layer BSM1 disposed on the first insulating layer 112a. However, the location of the first barrier layer BSM1 is not limited to this. For example, the first barrier layer BSM1 may be a metal film disposed below the stacked structure of the sub-pixel. The first barrier layer BSM1 may be disposed between the first active buffer layer 111b and the first insulating layer 112a, between the first multiple buffer layer 111a and the first active buffer layer 111b, or between the first multiple buffer layer 111a and the first substrate 110.

[0061] The first capacitor electrode C1 and the first barrier layer BSM1 can be disposed on the same layer and can be formed of the same material. For example, the first capacitor electrode C1 can be formed of a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni) and neodymium (Nd) or their alloys.

[0062] A first interlayer insulating layer 113a is disposed on the first insulating layer 112a, and simultaneously covers the first barrier layer BSM1 and the first capacitor electrode C1. For example, the first interlayer insulating layer 113a can be made of silicon nitride (SiN). x ) or silicon oxide (SiO) x ( ) in a single-layer or multi-layer configuration.

[0063] The second capacitor electrode C2 of capacitor Cst is disposed on the first interlayer insulating layer 113a. The second capacitor electrode C2 can be configured to overlap with the first capacitor electrode C1. Furthermore, the second capacitor electrode C2 can be formed of the same material as the first capacitor electrode C1. Alternatively, the second capacitor electrode C2 can be formed of a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or their alloys.

[0064] Thus, the first capacitor electrode C1 and the second capacitor electrode C2 are disposed on the first insulating layer 112a and overlap each other to form a capacitor Cst. The capacitor Cst includes two corresponding electrodes and a dielectric disposed between them. For example, the first interlayer insulating layer 113a can be used as the dielectric between the first capacitor electrode C1 and the second capacitor electrode C2.

[0065] A second multi-buffer layer 114a is disposed on the first interlayer insulating layer 113a, and a second active buffer layer 114b is disposed on the second multi-buffer layer 114a. Furthermore, a second barrier layer BSM2 is disposed between the second multi-buffer layer 114a and the second active buffer layer 114b.

[0066] The second multi-buffer layer 114a may be formed of the same material as the first multi-buffer layer 111a, but is not limited thereto. The second active buffer layer 114b may be formed of the same material as the first active buffer layer 111b, but is not limited thereto. The second barrier layer BSM2 performs substantially the same function as the first barrier layer BSM1, and may be formed of the same material, but is not limited thereto.

[0067] The first transistor TR1 and the second transistor TR2 are disposed on the second active buffer layer 114b. For example, the first transistor TR1 can be a switching transistor and the second transistor TR2 can be a driving transistor, but are not limited thereto. Based on the structure and driving characteristics of the display device 100 and the structure and type of thin-film transistors, the first transistor TR1 can be a driving transistor and the second transistor TR2 can be designed as a switching transistor.

[0068] The first transistor TR1 includes a first active layer A1, a first gate G1, a first source, and a first drain D1. Furthermore, the second transistor TR2 includes a second active layer A2, a second gate G2, a second source S2, and a second drain D2.

[0069] Each of the first thin-film transistor TR1 and the second thin-film transistor TR2 in the exemplary configuration of the display device 100 according to this disclosure may use oxide semiconductor as the active layer. For example, all transistors in the pixel driving circuit included in each of the plurality of sub-pixels of the display device 100 may use oxide semiconductor as the active layer. Transistors using oxide semiconductor as the active layer have excellent leakage current blocking effect and relatively low manufacturing cost compared to transistors using polysilicon as the active layer. Therefore, power consumption and manufacturing cost can be reduced. However, this disclosure is not limited thereto, and only a portion of the transistors of the sub-pixels of the display device 100 may use oxide semiconductor as the active layer. For example, at least a portion of the pixel driving circuit of the display device 100 may include transistors using polysilicon as the active layer as driving transistors or switching transistors, which are relatively easier to ensure reliability, operate relatively faster, and can have higher reliability compared to transistors using oxide semiconductor.

[0070] The first active layer A1 of the first thin-film transistor TR1 and the second active layer A2 of the second thin-film transistor TR2 can be configured to be spaced apart from each other on the second active buffer layer 114b. For example, each of the first active layer A1 and the second active layer A2 can be made of various metal oxides such as indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), or indium gallium oxide (IGO), but is not limited thereto. As described above, when the first active layer A1 and the second active layer A2 are implemented by an oxide semiconductor material, the first active layer A1 and the second active layer A2 can include an intrinsic channel region that is undoped of impurities, and a source region and a drain region that are doped with impurities to become conductive.

[0071] The second insulating layer 112b can be disposed on the second active buffer layer 114b, simultaneously covering the first active layer A1 and the second active layer A2. The second insulating layer 112b can be a gate insulating film, for example, it can be made of silicon oxide (SiO2). x ), silicon nitride (SiN) x (or its bilayer film formation.)

[0072] The first gate G1 of the first thin-film transistor TR1 and the second gate G2 of the second thin-film transistor TR2 can be configured to be spaced apart from each other on the second insulating layer 112b. In this case, the first gate G1 is disposed on the second insulating layer 112b to overlap with the first active layer A1, and the second gate G2 is disposed on the second insulating layer 112b to overlap with the second active layer A2.

[0073] The first gate G1 and the second gate G2 are disposed on the same layer and can be formed of the same material. For example, the first gate G1 and the second gate G2 can be formed of conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof, but are not limited thereto. Furthermore, at least one of the first barrier layer BSM1, the second barrier layer BSM2, the first capacitor electrode C1, and the second capacitor electrode C2 described above can be made of the same material as the first gate G1 and the second gate G2.

[0074] The second interlayer insulating layer 113b is disposed on the second insulating layer 112b, and simultaneously covers the first gate G1 and the second gate G2. For example, the second interlayer insulating layer 113b can be made of silicon nitride (SiN). x ) or silicon oxide (SiO) x It consists of a single layer or multiple layers.

[0075] The first source and first drain D1 of the first transistor TR1, and the second source S2 and second drain D2 of the second transistor TR2 are disposed on the second interlayer insulating layer 113b. Each of the first source, first drain D1, second source S2, and second drain D2 can be formed of a single layer or multiple layers of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof, but is not limited thereto. On the other hand, Figure 4 A cross-sectional view is shown, depicting a portion of a subpixel region cut along one direction (i.e., I-I'). Therefore, in Figure 4 The first source of the first transistor TR1 is omitted, but the first source of the first transistor TR1 is disposed on the second interlayer insulating layer 113b and electrically connected to the source region of the first active layer A1. This can be achieved along the... Figure 2 This was confirmed in the cross-section of sub-pixels cut in different directions of the I-I' direction.

[0076] The portion of the first active layer A1 that overlaps with the first gate G1 is a channel region. One of the first source and the first drain D1 is connected to one side of the channel region in the first active layer A1, and the other is connected to the other side of the channel region in the first active layer A1. In this case, the first source can be connected to one side of the first active layer A1 (i.e., the source region) through contact holes provided in the second insulating layer 112b and the second interlayer insulating layer 113b, and the first drain D1 can be connected to the other side of the first active layer A1 (i.e., the drain region) through contact holes CH3 provided in the second insulating layer 112b and the second interlayer insulating layer 113b. In the second active layer A2, the portion that overlaps with the second gate G2 is a channel region. Either the second source S2 or the second drain D2 is connected to one side of the channel region in the second active layer A2, and the other is connected to the other side of the channel region in the second active layer A2. In this configuration, the second source electrode S2 can be connected to one side (i.e., the source region) of the second active layer A2 via contact holes CH7 provided in the second insulating layer 112b and the second interlayer insulating layer 113b, and the second drain electrode D2 can be connected to the other side (i.e., the drain region) of the second active layer A2 via contact holes CH8 provided in the second insulating layer 112b and the second interlayer insulating layer 113b. Furthermore, a metal pattern disposed on the same layer as the second source electrode S2 and connected to or extending from the second source electrode S2 can be electrically connected to the second barrier layer BSM2 via contact holes CH6 provided in the second insulating layer 112b, the second interlayer insulating layer 113b, and the second active buffer layer 114b.

[0077] Multiple metal patterns are respectively disposed at positions on the second interlayer insulating layer 113b that are different from the first source, first drain D1, second source S2, and second drain D2. The multiple metal patterns include a first metal pattern SD1, a second metal pattern SD2, and a third metal pattern SD3. Furthermore, the multiple metal patterns may also include a fourth metal pattern, and... Figure 4In the diagram, a fourth metal pattern is shown as an example extending integrally from one end of the second source S2. The first metal pattern SD1 can be electrically connected to the first gate G1 of the first thin-film transistor TR1 via a contact hole CH2 provided in the second interlayer insulating layer 113b. For example, the first metal pattern SD1 can be a signal line that applies a gate signal applied through the gate line GL to the first gate G1. Furthermore, the first metal pattern SD1 can be electrically connected to the first barrier layer BSM1 via contact holes CH1 provided in the second interlayer insulating layer 113b, the second insulating layer 112b, the second active buffer layer 114b, the second multi-buffer layer 114a, and the first interlayer insulating layer 113a. The second metal pattern SD2 can be electrically connected to the first capacitor electrode C1 via contact holes CH4 provided in the second interlayer insulating layer 113b, the second insulating layer 112b, the second active buffer layer 114b, the second multi-buffer layer 114a, and the first interlayer insulating layer 113a. Furthermore, the third metal pattern SD3 can be electrically connected to the second capacitor electrode C2 via contact holes CH5 disposed in the second interlayer insulating layer 113b, the second insulating layer 112b, the second active buffer layer 114b, and the second multi-buffer layer 114a. Each of the second metal pattern SD2 and the third metal pattern SD3 can be a signal pattern that electrically connects either the first capacitor electrode C1 or the second capacitor electrode C2 of capacitor Cst to the source of the thin-film transistor and the other to the drain. The connection relationship between capacitor Cst and the driving transistor or switching transistor can be varied depending on the driving method of the pixel driving circuit and the type of thin-film transistor.

[0078] A first planarization layer 115a and a second planarization layer 115b are sequentially disposed on the second interlayer insulating layer 113b. At this time, a first connection electrode CE can be disposed on the first planarization layer 115a, and the second planarization layer 115b can be disposed on the first connection electrode CE. The first connection electrode CE can be connected to the second drain electrode D2 through a contact hole provided in the first planarization layer 115a. However, depending on the type of thin-film transistor, the first connection electrode CE can be connected to the second source electrode S2. The first planarization layer 115a and the second planarization layer 115b can be organic films used to planarize and protect the upper parts of multiple transistors. For example, the first planarization layer 115a and the second planarization layer 115b can be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The first connection electrode CE can be used to electrically connect the thin-film transistor and the first electrode 121 of the light-emitting element 120. For example, the first connection electrode CE can be formed of a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or their alloys, but is not limited thereto. The first connection electrode CE can be formed of the same material as the source and drain of the thin-film transistor.

[0079] The light-emitting element 120 is disposed on the second planarization layer 115b. In addition, the embankment 116 defining the light-emitting area of ​​a plurality of sub-pixels SP is disposed on the second planarization layer 115b.

[0080] The light-emitting element 120 includes an anode 121, a light-emitting layer 122, and a cathode 123. (Reference) Figure 4For example, the embankment 116 may include an opening that exposes a portion of the anode 121 of the light-emitting element 120 by opening a portion corresponding to the light-emitting area of ​​the sub-pixel SP. Specifically, the anode 121 of the light-emitting element 120 is disposed on the second planarization layer 115b. The anode 121 may be formed of a metallic material and is connected to the first connection electrode CE through a contact hole provided in the second planarization layer 115b. Therefore, the anode 121 may be electrically connected to the second thin-film transistor TR2. For example, the display device 100 according to an exemplary embodiment of the present disclosure may be implemented as a top-emitting type display device in which light emitted from the light-emitting element 120 is emitted onto the upper part of the first substrate 110. In this case, the anode 121 may also include a transparent conductive film and a reflective film located on the transparent conductive film. For example, the transparent conductive film may be formed of a transparent conductive oxide such as ITO or IZO, and the reflective film may be formed of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof. A dam 116 is disposed on the second planarization layer 115b, covering both ends of the anode 121, and a portion of the anode 121 can be exposed through an opening in the dam 116. For example, the dam 116 can be formed of an inorganic or organic insulating material, but is not limited thereto. A light-emitting layer 122 of the light-emitting element 120 is disposed at and around the opening in the dam 116. Therefore, the light-emitting layer 122 can be disposed on the anode 121 exposed through the opening in the dam 116. For example, the light-emitting layer 122 can include multiple organic films. Here, the light-emitting layer 122 can be made of an electroluminescent film and an inorganic light-emitting layer.

[0081] A cathode 123 is disposed on the light-emitting layer 122 of the light-emitting element 120. The cathode 123 is used to supply electrons to the light-emitting layer 122 and can be formed of a metallic material such as magnesium (Mg) or silver-magnesium, which is a conductive material with a low work function, but is not limited thereto. For example, in the top-emitting display device 100, the cathode 123 may comprise indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), and tin oxide (TO) based transparent conductive oxides.

[0082] On the other hand, the second substrate 150 is disposed above the first substrate 110. For example... Figure 4As shown, a filler layer 140, bonding the first substrate 110 and the second substrate 150, is disposed between the first substrate 110 and the second substrate 150. The filler layer 140 is disposed at least within the first display area and the second display area. Specifically, the filler layer 140 is disposed on the light-emitting element 120 disposed on the first substrate 110 to prevent moisture and oxygen from penetrating into the light-emitting element 120. The second substrate 150 covers and bonds the upper part of the filler layer 140 to seal the light-emitting element 120. For example, one surface of the filler layer 140 may contact the cathode 123 disposed on the first substrate 110, and the other surface may contact the second outer coating 154 disposed below the second substrate 150. A color filter CF and a touch sensing unit TS are disposed below the second substrate 150.

[0083] In the following description, the configuration of the components stacked in the direction from the lower surface of the second substrate 150 toward the first substrate 110 will be described sequentially. That is, in the following description of the components disposed on the second substrate 150, the expression "on" basically means that they are located below the second substrate 150 in the downward direction (i.e., in the direction toward the first substrate 110).

[0084] The black matrix BM is disposed on the lower surface of the second substrate 150 (i.e., the surface facing the first substrate 110). The black matrix BM includes a plurality of openings corresponding to the light-emitting areas of the plurality of sub-pixels SP, such that the openings of each of the first touch electrode TE1 and the second touch electrode TE2, the openings of the embankment 116, and the openings of the black matrix BM can overlap each other.

[0085] A first outer coating 151 is disposed on the lower surface of the second substrate 150 and simultaneously covers the black matrix BM. The first outer coating 151 may be an organic layer used for planarization and protection of the lower part of the black matrix BM.

[0086] Multiple first touch electrodes TE1 and multiple second touch electrodes TE2 are disposed on the lower surface of the first outer coating 151. Figure 4A cross-section of a portion of the second display area of ​​the second substrate 150 is shown. Therefore, only the touch electrode lines of the second touch electrode TE2 are shown. However, the touch electrode lines of the first touch electrode TE1 and the bridging electrodes connecting the unit electrodes of the first touch electrode TE1 can also be disposed on the same layer as the second touch electrode TE2. The touch electrode lines of each of the plurality of first touch electrodes TE1 and the plurality of second touch electrodes TE2 can be located below the black matrix BM disposed in the non-light-emitting area between sub-pixels SP. In this case, the width of the touch electrode lines of each of the first touch electrodes TE1 and the second touch electrodes TE2 can be equal to or less than the width between the openings of the black matrix BM. For example, the width of the touch electrode lines of the plurality of first touch electrodes TE1 can be equal to or less than the width between adjacent openings in the plurality of openings of the black matrix BM. Therefore, the plurality of first touch electrodes TE1 and the plurality of second touch electrodes TE2 can be disposed below the black matrix BM and can be invisible to the outside.

[0087] A touch interlayer insulating layer 152 is disposed on the lower surface of the first outer coating layer 151, simultaneously covering a plurality of first touch electrodes TE1 and a plurality of second touch electrodes TE2. Furthermore, a plurality of second bridging electrodes BE are disposed on the lower surface of the touch interlayer insulating layer 152. The bridging electrodes BE that electrically connect the unit electrodes of the second touch electrodes TE2 are insulated from the first touch electrodes TE1 and the bridging electrodes connecting the unit electrodes of the first touch electrodes TE1 by the touch interlayer insulating layer 152. For example, to prevent the first touch electrodes TE1 arranged along a first direction (i.e., the x-axis direction) and the plurality of second touch electrodes TE2 arranged along a second direction (i.e., the y-axis direction) from short-circuiting each other in areas where they intersect, the plurality of second touch electrodes TE2 extending along the second direction can be electrically connected by the bridging electrodes BE disposed on the lower film. In this case, contact holes for electrically connecting the second touch electrodes TE2 and the bridging electrodes BE can be formed in the touch interlayer insulating layer 152. Furthermore, the touch interlayer insulating layer 152 can be an inorganic film made of inorganic materials, but the constituent materials are not limited to this.

[0088] A passivation layer 153 is disposed on the lower surface of the inter-touch insulating layer 152 and covers the bridging electrode BE. The passivation layer 153 may be an inorganic layer used to protect multiple first touch electrodes TE1, multiple second touch electrodes TE2, and multiple bridging electrodes BE. For example, the passivation layer 153 may be made of silicon oxide (SiO2). x ), silicon nitride (SiN) x It is made of or in multiple layers.

[0089] Multiple color filters CF are disposed on the lower surface of passivation layer 153. The multiple color filters CF are configured to overlap with each luminous region of each of the multiple sub-pixels SP constituting a pixel. Therefore, the multiple color filters CF are disposed on different layers below the black matrix BM, and when viewed in a planar view, the black matrix BM is disposed between the multiple color filters CF. For example, when a pixel is implemented as a red sub-pixel, a green sub-pixel, and a blue sub-pixel, the multiple color filters CF may include a red color filter, a green color filter, and a blue color filter. The red color filter, green color filter, and blue color filter may be configured such that one color filter corresponds to each luminous region of the multiple sub-pixels to improve color reproducibility, but are not limited thereto.

[0090] On the other hand, Figure 4 The example described earlier, where multiple color filters (CFs) and a black matrix (BM) are placed on different layers, is illustrated. However, the placement of multiple color filters (CFs) is not limited to this. As another example, such as... Figure 5 As shown, multiple color filters CF' can be placed on the same layer as the black matrix BM. In this case, the black matrix BM can be placed on a plane between the multiple color filters CF', and a portion of the end of the black matrix BM and the color filters CF' can overlap.

[0091] refer to Figure 4 The second outer coating 154 is disposed on the lower surface of the passivation layer 153 and simultaneously covers multiple color filters CF. The second outer coating 154 may be an organic layer for planarizing and protecting the lower part of the multiple color filters CF. For example, the second outer coating 154 may be formed of organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0092] Due to the bonding of the second substrate 150 and the first substrate 110 having the above structure, the lower surface of the second outer coating 154 on the second substrate 150 can contact the upper surface of the filler layer 140, and a portion of the upper surface of the cathode 123 of the light-emitting element 120 and the upper surface of the second planarization layer 115b on the first substrate 110 can contact the lower surface of the filler layer 140.

[0093] In the following description, the configuration of the components stacked on the upper surface of the second substrate 150 (i.e., the surface opposite to the surface facing the first substrate 110) will be described. That is, in the following description of the components disposed on the second substrate 150, the expression "on" basically means that they are located above the second substrate 150 in the upward direction (i.e., the direction opposite to the direction toward the first substrate 110).

[0094] A polarizing plate 160, an adhesive layer 170, and a cover member 180 are sequentially disposed on the upper surface of the second substrate 150. The polarizing plate 160 is a layer for polarizing incident light and, for example, may be a film with a predetermined degree of light transmittance, absorbing external light and its reflected light to prevent contrast reduction. The cover member 180 is disposed above the polarizing plate 160, and the adhesive layer 170 is disposed between the polarizing plate 160 and the cover member 180. An optically clear adhesive (OCA) can be used as the adhesive layer 170 to minimize or reduce the generation of air bubbles or foreign matter between the polarizing plate 160 and the cover member 180. The cover member 180 protects the display device 100 from external impacts, moisture, heat, etc. For example, the cover member 180 may be tempered glass with a high Young's modulus, but is not limited thereto.

[0095] In the following text, reference will be made to Figure 6 and Figure 7 The structure of the first non-display area NA1 of the first substrate 110 of the display device 100 according to an embodiment of the present disclosure is described in detail. Apart from the arrangement positions of the plurality of color filters CF', Figure 7 The structure of the first non-display area NA1 of the first substrate 110 shown is similar to... Figure 6 The structure of the first non-display area NA1 of the first substrate 110 shown is basically the same. Therefore, its repeated description will be omitted.

[0096] Figure 6 It is along Figure 2 An example of a cross-sectional view taken from line II-II'.

[0097] Figure 7 It is along Figure 2 Another example of a cross-sectional view taken from line II-II'.

[0098] refer to Figure 6 The signal link line LL is disposed on the second multi-buffer layer 114a. The signal link line LL electrically connects the sub-pixel SP and the signal pad 136. The signal link line LL and the second blocking layer BSM2 disposed within the first display area DA can be disposed on the same layer and can be formed of the same material, but are not limited thereto. For example, the signal link line LL and the first blocking layer BSM1 disposed within the first display area DA can be disposed on the same layer and can be formed of the same material.

[0099] A second active buffer layer 114b is disposed on the second multi-buffer layer 114a and covers the signal link line LL. The second active buffer layer 114b may include contact holes that expose a portion of the signal link line LL, allowing the signal pad 136 to be electrically connected to the signal link line LL.

[0100] The second insulating layer 112b and the second interlayer insulating layer 113b are sequentially disposed on the second active buffer layer 114b, and each of the second insulating layer 112b and the second interlayer insulating layer 113b may include a contact hole that exposes a portion of the signal link line LL, so that the signal pad 136 can be electrically connected to the signal link line LL.

[0101] A common line 135 for supplying a low-potential power supply voltage, supplied via the low-potential power line VSS, to the cathode 123 of the light-emitting element 120 is disposed on the second interlayer insulating layer 113b. Figure 6 A cross-section of a portion of the first non-display area NA1 of the first substrate 110 is shown. Therefore, the connection between the low-potential power line VSS and the common line 135 is omitted, but the common line 135 is electrically connected to the low-potential power line VSS. Furthermore, the common line 135 is electrically connected to the end of the cathode 123 via the second connection electrode 125. The common line 135 is disposed on the same layer as the source and drain of the thin-film transistor disposed in the display area DA, and can be formed of the same material, but is not limited thereto. For example, the common line 135 and the gate of the thin-film transistor disposed in the display area DA can be disposed on the same layer and can be formed of the same material.

[0102] A first planarization layer 115a is disposed on the second interlayer insulating layer 113b and covers the common line 135. The first planarization layer 115a may include contact holes to allow the second connection electrode 125 to be electrically connected to the common line 135. The first planarization layer 115a extends from the first display area DA of the first substrate 110 and is only positioned at a predetermined distance inwardly spaced from the outermost portion of the first non-display area NA1 of the first substrate 110 to expose the outer peripheral portion of the second interlayer insulating layer 113b. A second planarization layer 115b is disposed on the first planarization layer 115a. The second planarization layer 115b may include contact holes to allow the second connection electrode 125 to be electrically connected to the common line 135. The second planarization layer 115b extends from the first display area DA of the first substrate 110 and is only positioned at a predetermined distance inwardly spaced from the outermost portion of the first non-display area NA1 of the first substrate 110 to expose the outer peripheral portion of the second interlayer insulating layer 113b.

[0103] The second connection electrode 125 is disposed on the second planarization layer 115b. The second connection electrode 125 is electrically connected to the common line 135 through contact holes formed in the first planarization layer 115a and the second planarization layer 115b, respectively. For example, the second connection electrode 125 and the anode 121 of the light-emitting element 120 disposed in the first display area DA of the first substrate 110 can be disposed on the same layer and can be made of the same material. One end of the second connection electrode 125 can be disposed below the embankment 116 disposed on the outermost side of the first display area DA of the first substrate 110, and the filling layer 140 can fill the second connection electrode 125 disposed in the contact holes formed in each of the first planarization layer 115a and the second planarization layer 115b. The other end of the second connection electrode 125 can also be covered by the filling layer 140. In this case, the filling layer 140 can be disposed on the second planarization layer 115b exposed outside the other end of the second connection electrode 125.

[0104] Furthermore, at least one dam 145 is disposed on the second planarization layer 115b to surround the outer surface of the filler layer 140, and at least one barrier structure 117 and 118 are disposed outside the dam 145 and within the first non-display area NA1 of the first substrate 110. The dam 145 may be configured to contact the second planarization layer 115b and the second outer coating layer 154, respectively, to confine the filler layer 140 therein. The dam 145 may comprise a viscous material that can be applied by a dispensing process, has constant light transmittance, is curable, and allows for width management. The barrier structures 117 and 118 may be configured to be adjacent to the dam 145 from its outer periphery to prevent material from spilling out of the dam 145 during the application of the dam 145. For example, the barrier structures 117 and 118 may be disposed on the same layer as the dam 116 disposed within the first display area DA of the first substrate 110 and may be made of the same material.

[0105] Furthermore, signal pads 136 are disposed on the second interlayer insulating layer 113b. The signal pads 136 are disposed on the outer portions of the second interlayer insulating layer 113b exposed to the first planarization layer 115a and the second planarization layer 115b, allowing the signal pads 136 to be disposed on the outer portion of the first non-display area NA1 of the first substrate 110. The signal pads 136 are disposed on the same layer as the source and drain of the thin-film transistor disposed in the first display area DA, and can be formed of the same material. Furthermore, the signal pads 136 are disposed on the same layer as the gate of the thin-film transistor disposed in the first display area DA, and can be formed of the same material.

[0106] A first flexible film 137, on which driver integrated circuits such as gate drivers and data drivers are mounted, is attached to a signal pad 136 for electrical connection within a first non-display area NA1 on one side of the first substrate 110 (hereinafter referred to as the "first side"). Furthermore, one end of the first flexible film 137 is connected to the signal pad 136, and the other end is electrically connected to a first circuit board 139 on which multiple circuits implemented by multiple driver chips such as timing controllers are mounted. For example, one end of the signal pad 136, one end of the first flexible film 137, the other end of the first flexible film 137, and the circuit board 139 can be bonded via an adhesive layer containing conductive balls, such as an anisotropic conductive film (ACF).

[0107] At the same time, refer to Figure 2 and Figure 6 A side portion of the second substrate 150 corresponding to the first side portion on which signal pads 136 are provided on the first substrate 110 (hereinafter referred to as the "second side portion") is provided. No touch routing line (TRL) is provided in the second non-display area NA2, but an electrostatic discharge (ESD) circuit is provided instead. Specifically, on the second side portion of the second substrate 150, a black matrix BM extending from the second display area of ​​the second substrate 150, a first outer coating 151, a touch interlayer insulating layer 152, a passivation layer 153, and a second outer coating 154 are sequentially disposed on the lower surface of the second substrate 150 within the second non-display area NA2. Furthermore, an ESD circuit is provided on the second side portion of the second substrate 150, comprising a first layer TM1-1 disposed on the lower surface of the first outer coating 151 and a second layer TM2-1 disposed on the lower surface of the touch interlayer insulating layer 152. The ESD circuit may overlap with the black matrix BM. The first layer TM1-1 of the electrostatic discharge circuit ESD and the first touch electrode TE1 and the second touch electrode TE2 disposed in the second display area of ​​the second substrate 150 can be disposed on the same layer and can be formed of the same material. Furthermore, the second layer TM2-1 of the electrostatic discharge circuit ESD and the bridging electrode BE disposed in the second display area of ​​the second substrate 150 are disposed on the same layer and can be formed of the same material. For example, the first layer TM1-1 and the second layer TM2-1 of the electrostatic discharge circuit ESD overlap each other, but can be electrically connected in at least a portion of them. Figure 6 A cross-section of a portion of the second non-display area NA2 of the second substrate 150, corresponding to a portion of the first non-display area NA1 of the first substrate 110, is shown. Therefore, the portion where the first layer TM1-1 and the second layer TM2-1 of the electrostatic discharge circuit (ESD) are electrically connected to each other is omitted; however, the first layer TM1-1 and the second layer TM2-1 of the ESD circuit can be electrically connected through contact holes formed in the interlayer insulating layer 152 at least in a portion of the area. Therefore, the resistance of the ESD circuit can be reduced.

[0108] In addition, refer to Figure 4 and Figure 6 A color filter CF is disposed on the lower surface of the passivation layer 153 of the second substrate 150. In this case, the electrostatic discharge circuit ESD can be configured to be adjacent to the outermost edge of the first display area DA of the first substrate 110. For example, the electrostatic discharge circuit ESD can be configured such that at least a portion of the embankment 116 overlaps with the end of the color filter CF corresponding to the light-emitting element 120 disposed on the outermost edge of the first display area DA of the first substrate 110. On the other hand, in Figure 6 The example described earlier, where multiple color filters (CFs) and a black matrix (BM) are placed on different layers, is illustrated. However, the placement of multiple color filters (CFs) is not limited to this. As another example, such as... Figure 7 As shown, multiple color filters CF' can be disposed on the same layer as the black matrix BM. In this case, the black matrix BM can be disposed on a plane between the multiple color filters CF', and the electrostatic discharge circuit ESD can be configured to overlap with at least a portion of the ends of the color filters CF', the black matrix BM, and the embankment 116 corresponding to the light-emitting element disposed on the outermost side of the first display area DA of the first substrate 110.

[0109] refer to Figure 6 In the display device 100 according to an exemplary embodiment of the present disclosure, the outer portion of the first substrate 110 may protrude further outward from the first side of the first substrate 110 than the outermost portion of the second substrate 150. This allows the signal pads 136 and the first flexible film 137 disposed on the first substrate 110 to be attached to the area protruding further outward than the outermost portion of the second substrate 150. This facilitates easy attachment of the signal pads 136 and the first flexible film 137 while the first substrate 110 and the second substrate 150 are joined, and also prevents damage to the signal pads 136 and the first flexible film 137.

[0110] In the following text, see references Figure 8 and Figure 9 The structure of a second non-display area NA2 in another side of a second substrate 150 of a display device 100 according to an embodiment of the present disclosure will be described in detail below. This other side is referred to hereinafter as the "third side". The third side is a side of the second substrate 150 that does not overlap with the first side of the first substrate 110. For example, refer to Figure 2 The third side of the second substrate 150 and the first side of the first substrate 110 can face each other on a plane. Apart from the arrangement of the plurality of color filters CF', Figure 9 The structure of the second non-display area NA2 of the second substrate 150 shown is similar to... Figure 8The structure of the second non-display area NA2 of the second substrate 150 shown is basically the same. Therefore, its repeated description will be omitted.

[0111] Figure 8 It is along Figure 3 An example of a cross-sectional view taken from line III-III'.

[0112] Figure 9 It is along Figure 3 Another example of a cross-sectional view taken from line III-III'.

[0113] Let's refer to each other. Figure 2 , Figure 3 and Figure 8 On the third side of the second substrate 150, touch routing lines (TRL) and touch pads 155 are disposed below the second substrate 150 within a second non-display area NA2. Specifically, on the third side of the second substrate 150, a black matrix BM extending from the second display area of ​​the second substrate, a first outer coating 151, a touch interlayer insulating layer 152, a passivation layer 153, and a second outer coating 154 are sequentially disposed within the second non-display area NA2 on the lower surface of the second substrate 150. At this time, the touch routing lines (TRL), including a first layer TM1-2 disposed on the lower surface of the first outer coating 151 and a second layer TM2-2 disposed on the lower surface of the touch interlayer insulating layer 152, are disposed below the second substrate 150 within the second non-display area NA2. The first layer TM1-2 of the touch routing lines (TRL) and the first touch electrodes TE1 and TE2 disposed within the second display area of ​​the second substrate 150 can be disposed on the same layer and can be formed of the same material. Furthermore, the second layer TM2-2 of the touch routing line TRL and the bridging electrode BE disposed in the second display area of ​​the second substrate 150 can be disposed on the same layer and can be formed of the same material. At least a portion of the touch routing line TRL can overlap with the black matrix BM. For example, the first layer TM1-2 and the second layer TM2-2 of the touch routing line TRL overlap each other, but can be electrically connected in at least a portion. The interlayer insulating layer 152 may include contact holes to electrically connect the first layer TM1-2 and the second layer TM2-2 of the touch routing line TRL. Therefore, the resistance of the touch routing line TRL can be reduced, and the electrical connection between the touch pad 155 and the second flexible film 157 disposed under the second substrate 150 can be facilitated.

[0114] Touch pad 155 is disposed below the second substrate 150 within the second non-display area NA2 and on the outer portion of the second non-display area NA2. Touch pad 155, the second layer TM2-2 of the touch routing line TRL, and the bridging electrode BE disposed within the second display area of ​​the second substrate 150 can be disposed on the same layer and can be formed of the same material. For example, touch pad 155 can be integrally implemented with the second layer TM2-2 of the touch routing line TRL. In this case, touch pad 155 can extend from one end of the second layer TM2-2 of the touch routing line TRL.

[0115] A passivation layer 153 is disposed on the lower surface of the interlayer insulating layer 152, simultaneously covering the second layer TM2-2 of the touch routing line (TRL) and the touch pad 155. A color filter CF is disposed on the lower surface of the passivation layer 153. Furthermore, a second outer coating layer 154 is disposed on the lower surface of the passivation layer 153, simultaneously covering the color filter CF. Figure 8 The example described earlier, where the color filter CF and the black matrix BM are set on different layers, has already been presented. However, the placement of the color filter CF is not limited to this; as another example, such as... Figure 9 As shown, the color filter CF' can be disposed on the same layer as the black matrix BM. In this case, the touch routing line TRL can be configured to overlap with the end of the color filter CF', the black matrix BM, and the portion of the embankment 116 corresponding to the light-emitting element disposed on the outermost side of the first display area DA of the first substrate 110.

[0116] refer to Figure 8 Below the second non-display area NA2 on the third side of the second substrate 150, a second flexible film 157, on which an integrated circuit such as a touch driving circuit is mounted, is attached to the touch pad 155 for electrical connection. Furthermore, one end of the second flexible film 157 is connected to the touch pad 155, and the other end is attached to and electrically connected to a second circuit board 159 on which multiple circuits implemented by multiple driver chips such as a touch controller are mounted. For example, one end of the touch pad 155, one end of the second flexible film 157, the other end of the second flexible film 157, and the second circuit board 159 can be bonded by an adhesive layer containing conductive balls, such as an anisotropic conductive film (ACF). On the third side of the second substrate 150, each of the passivation layer 153 and the second outer coating layer 154 may include a contact hole that exposes at least a portion of the touch pad 155, allowing the touch pad 155 to be electrically connected to the second flexible film 157.

[0117] refer to Figure 8In the display device 100 according to an exemplary embodiment of the present disclosure, the outer portion of the second substrate 150 may protrude further outward from the third side of the second substrate 150 than the outermost portion of the first substrate 110. As described above, a touch pad 155 and a second flexible film 157 disposed below the second substrate 150 in a region protruding further outward from the outermost portion of the first substrate 110 can be attached, such that the touch pad 155 and the second flexible film 157 can be easily attached when the first substrate 110 and the second substrate 150 are joined, and damage to the touch pad 155 and the second flexible film 157 can also be prevented.

[0118] In addition, refer to Figure 8 On the third side of the second substrate 150, the black matrix BM can extend from the second display area of ​​the second substrate 150 and can be positioned only at a predetermined distance inward from the outermost portion of the second substrate 150. Therefore, when the second flexible film 157 is attached to the underside of the second substrate 150, alignment marks for alignment or positioning between the touch pad 155 and the second flexible film 157 can be easily identified, and imprints of the anisotropic conductive film (ACF) can also be easily identified.

[0119] On the other hand, let's refer to each other. Figure 6 and Figure 8 On the other side of the first substrate 110 corresponding to the third side of the second substrate 150, the signal link line LL and the signal pad 136 are not disposed within the first non-display area NA1 of the first substrate 110. Therefore, the first flexible film 137 and the first circuit board 139 are not attached to the other side of the first substrate 110. Apart from structural differences, Figure 8 The structure of the first non-display area NA1 on the other side of the first substrate 110 shown is similar to... Figure 6 The structure of the first non-display area NA1 on the first side of the first substrate 110 shown is basically the same, so redundant descriptions will be omitted.

[0120] In the following text, reference will be made to Figure 10 and Figure 11 The structure of the second non-display area NA2 in another side portion (hereinafter referred to as the "fourth side portion") of the side portion of the second substrate 150 of the display device 110, which does not overlap with the first side portion of the first substrate 110 and the third side portion of the second substrate 150, is described in detail according to an embodiment of the present disclosure. For example, see also... Figure 2 and Figure 3In a plane, the third side of the second substrate 150 and the first side of the first substrate 110 face each other along the y-axis, and in a plane, the fourth side of the second substrate 150 can refer to the side in the direction intersecting the third side of the second substrate 150 and the first side of the first substrate 110 along the x-axis. Apart from the arrangement of the plurality of color filters CF', Figure 11 The structure of the second non-display area NA2 of the second substrate 150 shown is similar to... Figure 10 The structure of the second non-display area NA2 of the second substrate 150 shown is basically the same, so redundant descriptions will be omitted.

[0121] Figure 10 It is along Figure 3 An example of a cross-sectional view taken from the IV-IV' line.

[0122] Figure 11 It is along Figure 3 Another example of a cross-sectional view taken from the IV-IV' line.

[0123] Let's refer to each other. Figure 8 and Figure 10 On the other side of the first substrate 110, corresponding to the fourth side of the second substrate 150, a data line DL and a gate driving circuit GIP are disposed within a first non-display area NA1 of the first substrate 110. In this case, the data line DL is disposed on a second insulating layer 112b, and the gate driving circuit GIP is disposed on a second interlayer insulating layer 113b. The data line DL disposed within the first non-display area NA1 of the first substrate 110 is electrically connected to a plurality of sub-pixels SP disposed within a first display area DA of the first substrate 110. For example, it can be disposed on the same layer as the first barrier layer BSM1 disposed within the first display area DA of the first substrate 110 and made of the same material. Furthermore, the gate driving circuit GIP disposed within the first non-display area NA1 of the first substrate 110 can be implemented by one or more thin-film transistors. For example, the gate driving circuit GIP and the active layer, gate, source, and drain of the thin-film transistor disposed within the first display area DA of the first substrate 110 can be disposed on the same layer and can be formed of the same material, but are not limited thereto. Figure 10 A cross-sectional view is shown of a portion of the non-display area of ​​the first substrate 110 and the second substrate 150 cut in one direction (i.e., IV-IV'). Therefore, in Figure 10 In this design, the remaining components, except for the metal patterned GIP, corresponding to the source or drain as part of the components used to implement the gate drive circuit GIP, are omitted. However, the gate drive circuit GIP still includes an active layer and a gate. Furthermore, the active layer of the gate drive circuit GIP can be implemented using oxide semiconductors. Aside from structural differences, Figure 10The structure of the first non-display area NA1 on the other side of the first substrate 110 (i.e., corresponding to the fourth side of the second substrate 150) is similar to... Figure 8 The structure of the first non-display area NA1 on the other side of the first substrate 110 described herein is basically the same, so redundant descriptions will be omitted.

[0124] Let's refer to each other. Figure 2 , Figure 3 , Figure 8 and Figure 10 On the fourth side of the second substrate 150, touch routing lines (TRL) and electrostatic discharge (ESD) circuits are disposed below the second substrate 150 within a second non-display area NA2. Specifically, on the fourth side of the second substrate 150, a black matrix BM extending from the second display area of ​​the second substrate, a first outer coating 151, a touch interlayer insulating layer 152, a passivation layer 153, and a second outer coating 154 are sequentially disposed within the second non-display area NA2 on the lower surface of the second substrate 150. At this time, the touch routing lines (TRL), including a first layer TM1-2 disposed on the lower surface of the first outer coating 151 and a second layer TM2-2 disposed on the lower surface of the touch interlayer insulating layer 152, are disposed below the second substrate 150 within the second non-display area NA2. Furthermore, the electrostatic discharge (ESD) circuit, including a first layer TM1-1 disposed on the lower surface of the first outer coating 151 and a second layer TM2-1 disposed on the lower surface of the touch interlayer insulating layer 152, is disposed below the second substrate 150 within the second non-display area NA2.

[0125] refer to Figure 3 and Figure 10 On the fourth side of the second substrate 150, multiple touch routing lines (TRLs), including a first layer TM1-2 and a second layer TM2-2, are disposed within the second non-display area NA2 of the second substrate 150, so as to be adjacent to the second display area of ​​the second substrate 150. Furthermore, on the fourth side of the second substrate 150, an electrostatic discharge (ESD) circuit, including a first layer TM1-1 and a second layer TM2-1, is disposed between the outermost touch routing line TRL and the outermost portion of the second substrate 150, and the ESD circuit can be configured to be adjacent to the outermost touch routing line TRL. In this case, at least a portion of the inner touch routing line TRL, which is positioned closest to the second display area of ​​the second substrate 150, can overlap with the black matrix BM. Furthermore, refer to... Figure 10 On the fourth side of the second substrate 150, a color filter CF is disposed on the lower surface of the passivation layer 153, and a second outer coating 154 is disposed on the lower surface of the passivation layer 153, while covering the color filter CF. Figure 10An example is shown where the color filter CF and the black matrix BM are set on different layers. However, the placement of the color filter CF is not limited to this. As another example, such as Figure 11 As shown, the color filter CF' can be disposed on the same layer as the black matrix BM. In this case, the inner touch route line TRL, which is set to be closest to the second display area of ​​the second substrate 150, can be configured to overlap with the end of the color filter CF', the black matrix BM, and the portion of the embankment 116 corresponding to the light-emitting element disposed on the outermost side of the first display area DA of the first substrate 110. Furthermore, refer to... Figure 10 On the fourth side of the second substrate 150, in the display device 100 according to an exemplary embodiment of the present disclosure, the outermost portion of the second substrate 150 and the outermost portion of the first substrate 110 may be on the same horizontal plane.

[0126] In addition to the structural differences mentioned above, Figure 10 The structure in the second non-display area NA2 on the fourth side of the second substrate 150 shown is similar to... Figure 8 The structure of the second non-display area NA2 on the third side of the second substrate 150 described herein is basically the same, so redundant descriptions will be omitted.

[0127] As described above, the display device 100 according to an exemplary embodiment of the present disclosure includes sides (hereinafter referred to as "non-overlapping sides") of a display substrate 110 and an encapsulation substrate 150 facing each other. Signal pads 136 and a first flexible film 137 can be attached to the non-display area of ​​the non-overlapping side of the display substrate 110, and touch pads 155 and a second flexible film 157 can be attached to the non-display area of ​​the non-overlapping side of the encapsulation substrate 150. Therefore, even when the display substrate 110 and the encapsulation substrate 150 are joined together, they can be easily attached without damaging the pads and the flexible film.

[0128] Furthermore, in the display device 100 according to an exemplary embodiment of the present disclosure, a touch sensing unit TS and color filters CF and CF' are disposed on a packaging substrate 150. The touch pad 155 can be implemented as a layer on the same layer as the touch electrodes TE1 and TE2 of the touch sensing unit TS and the bridging electrode BE, which are disposed on different layers from the touch electrodes TE1 and TE2, and made of the same material. Therefore, the resistance of the touch pad 155 can be reduced, and the touch pad 155 and the second flexible film 157 can be easily attached.

[0129] Exemplary embodiments of this disclosure may also be described as follows: According to one embodiment of this disclosure, a display device includes: a first substrate, the first substrate including a first display area having a plurality of sub-pixels and a first non-display area located outside the first display area; a second substrate, the second substrate being above the first substrate and opposite to the first substrate, and including a second display area corresponding to the first display area and a second non-display area located outside the second display area; a plurality of first pads, the plurality of first pads being disposed within the first non-display area of ​​the first substrate; a plurality of touch electrodes, the plurality of touch electrodes being disposed below the second substrate within the second display area; a plurality of bridging electrodes, the plurality of bridging electrodes being disposed below the second substrate within the second display area, the plurality of bridging electrodes and the plurality of touch electrodes being disposed on different layers and electrically connected to a portion of the plurality of touch electrodes; and a plurality of second pads, the plurality of second pads being disposed below the second substrate within the second non-display area and electrically connected to each of the plurality of touch electrodes, wherein the plurality of first pads are disposed on one side of the first substrate, and the plurality of second pads are disposed on another side of the second substrate that does not overlap with one side of the first substrate.

[0130] According to another aspect of this disclosure, the display device may further include: a first flexible film, the first flexible film being on a plurality of first pads on one side of a first substrate and electrically connected to the plurality of first pads; and a second flexible film, the second flexible film being under a plurality of second pads on the other side of a second substrate and electrically connected to the plurality of second pads.

[0131] According to another aspect of this disclosure, the display device may further include: a black matrix disposed on the lower surface of a second substrate and not overlapping with the light-emitting area of ​​a light-emitting element included in each of a plurality of sub-pixels; a first outer coating disposed under the second substrate and covering the black matrix; a touch interlayer insulating layer disposed under the first outer coating; a passivation layer disposed under the touch interlayer insulating layer; and a second outer coating disposed under the passivation layer. In this case, a plurality of touch electrodes may be disposed on the lower surface of the first outer coating, and a plurality of bridging electrodes may be disposed on the lower surface of the touch interlayer insulating layer.

[0132] According to another aspect of this disclosure, the display device may further include a plurality of touch routing lines disposed in a second non-display area of ​​the second substrate and electrically connected to a plurality of touch electrodes and a plurality of second pads. In this case, the plurality of touch routing lines may include a first layer disposed on the same layer as the plurality of touch electrodes, and a second layer disposed on the same layer as the plurality of bridging electrodes and electrically connected to the first layer.

[0133] According to another aspect of this disclosure, one end of the second flexible film is electrically connected to a plurality of second pads, and a portion of that end of the second flexible film may be disposed under the second outer coating.

[0134] According to another aspect of this disclosure, a plurality of second pads may extend from one end of the second layer of a plurality of touch routing lines.

[0135] According to another aspect of this disclosure, the display device may further include a plurality of color filters disposed on the lower surface of the passivation layer below the second substrate and configured to overlap with the light-emitting areas of a plurality of sub-pixels.

[0136] According to another aspect of this disclosure, the display device may further include a plurality of color filters disposed on the same layer as the black matrix below the second substrate and configured to overlap with the light-emitting areas of a plurality of sub-pixels.

[0137] According to another aspect of this disclosure, the black matrix can be positioned on another side of the second substrate at a predetermined distance from the outermost portion of the second substrate.

[0138] According to another aspect of this disclosure, a second non-display area on another side of the second substrate may protrude further outward than the outermost periphery of the first substrate.

[0139] According to another aspect of this disclosure, on one side of the first substrate, the first non-display area may protrude further outward than the outermost edge of the second substrate.

[0140] According to another aspect of this disclosure, the display device may further include: a barrier layer disposed on the upper part of a first substrate within a first display area; a thin-film transistor disposed on the barrier layer within the first display area of ​​the first substrate, and including an active layer, a gate, a source, and a drain; and a plurality of signal connection lines disposed on one side of the first substrate within a first non-display area, and electrically connecting a plurality of sub-pixels and a plurality of first pads. In this case, the light-emitting element may include a first electrode disposed on the thin-film transistor, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer, and the plurality of first pads are disposed on the same layer as one of the gate, source, and drain and contain the same material, and the plurality of signal connection lines are disposed on the same layer as the barrier layer and contain the same material.

[0141] According to another aspect of this disclosure, a display device includes: a thin-film transistor (TFT) disposed on an upper portion of a first substrate within a first display region, comprising an active layer, a gate, a source, and a drain, and electrically connected to a light-emitting element; a planarization layer disposed on the TFT; a dam portion disposed on the planarization layer and having an opening corresponding to the light-emitting region; a filling layer disposed between a first substrate and a second substrate, at least on the first display region and the second display region; a dam portion disposed between the first substrate and the second substrate, surrounding the outer surface of the filling layer between the first substrate and the second substrate; and at least one blocking structure disposed within a first non-display region of the first substrate and configured to be adjacent to the dam portion on the outside of the dam portion, wherein the at least one blocking structure and the dam portion are disposed on the same layer and formed of the same material.

[0142] A display device according to another exemplary embodiment of the present disclosure includes: a first substrate, the first substrate including a display area having a plurality of light-emitting elements disposed thereon and a non-display area located outside the display area; a second substrate, the second substrate being opposite to the first substrate from above; a filling layer disposed between the first substrate and the second substrate; at least one dam disposed between the first substrate and the second substrate to surround the outer surface of the filling layer thereby limiting the filling layer; a plurality of first touch electrodes disposed below the second substrate in a first region corresponding to the display area and extending along a first direction; and a plurality of second touch electrodes. The touch electrode extends along a second direction intersecting the first direction; a plurality of bridging electrodes are disposed under the second substrate in a first region, disposed on a different layer from the plurality of first touch electrodes and the plurality of second touch electrodes, and electrically connected to a portion of the plurality of second touch electrodes; a plurality of touch routing lines extend from the first region and are disposed in a second region that at least partially overlaps with the non-display region; a plurality of touch pads extend from the second region and are disposed on a side of the second substrate in a third region that does not overlap with the non-display region; and a second flexible film is electrically connected to the plurality of touch pads at the lower part of the second substrate.

[0143] According to another aspect of this disclosure, the multiple touch routing lines may include a first layer disposed on the same layer as the multiple first touch electrodes and the multiple second touch electrodes, and a second layer disposed on the same layer as the multiple bridging electrodes and electrically connected to the first layer. In this case, the multiple touch pads may extend from one end of the second layer of the multiple touch routing lines.

[0144] According to another aspect of this disclosure, the display device may further include: a plurality of color filters disposed below the second substrate and configured to overlap with the light-emitting areas of a plurality of light-emitting elements; and a black matrix disposed below the second substrate and configured not to overlap with the light-emitting areas of the plurality of light-emitting elements. In this case, on one side of the second substrate, the black matrix may be positioned at a predetermined distance inwardly spaced from the outermost portion of the second substrate.

[0145] According to another aspect of this disclosure, a third region on one side of the second substrate may protrude further outward than the outermost part of the first substrate.

[0146] According to another aspect of this disclosure, the display device may further include: a plurality of signal pads disposed on a non-display area on the other side of the first substrate that does not overlap with one side of the second substrate; a plurality of signal link lines disposed on the other side of the first substrate in the non-display area and electrically connecting the plurality of signal pads and a plurality of sub-pixels respectively provided with a plurality of light-emitting elements; and a first flexible film electrically connected to the plurality of signal pads on the upper part of the first substrate.

[0147] According to another aspect of this disclosure, the non-display area on the other side of the first substrate may protrude further outward than the outermost periphery of the second substrate.

[0148] According to another aspect of this disclosure, multiple color filters and a black matrix can be set on the same layer.

[0149] According to another aspect of this disclosure, the display device may further include: a first outer coating layer disposed under a second substrate and covering a black matrix; a touch interlayer insulating layer disposed under the first outer coating layer; and a passivation layer disposed under the touch interlayer insulating layer, wherein a plurality of color filters are disposed on the lower surface of the passivation layer.

[0150] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied in various forms without departing from the technical concept of the present disclosure. Therefore, exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above embodiments are illustrative in all embodiments and do not limit the present disclosure. All technical concepts within the equivalent scope of the present disclosure should be interpreted as falling within the scope of the present disclosure.

Claims

1. A display device, comprising: A first substrate, the first substrate including a first display area having a plurality of sub-pixels and a first non-display area located outside the first display area; The second substrate is located above the first substrate and faces the first substrate, and includes a second display area corresponding to the first display area and a second non-display area located outside the second display area. A plurality of first pads are disposed within the first non-display area of ​​the first substrate; Multiple touch electrodes are disposed below the second substrate within the second display area; Multiple bridging electrodes are disposed below the second substrate within the second display area. The multiple bridging electrodes and the multiple touch electrodes are disposed on different layers and are electrically connected to a portion of the multiple touch electrodes. as well as A plurality of second pads are disposed below the second substrate within the second non-display area and are electrically connected to each of the plurality of touch electrodes. The plurality of first pads are disposed on one side of the first substrate, and The plurality of second pads are disposed on another side of the second substrate that does not overlap with one side of the first substrate.

2. The display device according to claim 1, further comprising: A first flexible film is located on one side of the first substrate on the plurality of first pads and is electrically connected to the plurality of first pads; as well as A second flexible film is located on the other side of the second substrate under the plurality of second pads and electrically connected to the plurality of second pads.

3. The display device according to claim 2, further comprising: A black matrix is ​​disposed on the lower surface of the second substrate and does not overlap with the light-emitting area of ​​the light-emitting element included in each of the plurality of sub-pixels; A first outer coating is disposed beneath the second substrate and covers the black matrix; An interlayer insulating layer is disposed below the first outer coating layer; A passivation layer is disposed beneath the interlayer insulating layer of the touch layer; as well as The second outer coating is disposed below the passivation layer. The plurality of touch electrodes are disposed on the lower surface of the first outer coating, and The plurality of bridging electrodes are disposed on the lower surface of the interlayer insulating layer of the touch layer.

4. The display device according to claim 3, further comprising: Multiple touch routing lines are disposed within the second non-display area of ​​the second substrate and electrically connect the multiple touch electrodes and the multiple second pads. The multiple touch routing lines include: A first layer, wherein the first layer and the plurality of touch electrodes are disposed on the same layer; and The second layer is disposed on the same layer as the plurality of bridging electrodes and is electrically connected to the first layer.

5. The display device according to claim 4, wherein, One end of the second flexible film is electrically connected to the plurality of second pads, and a portion of the one end of the second flexible film is disposed on the underside of the second outer coating.

6. The display device according to claim 4, wherein, The plurality of second pads extend from one end of the second layer of the plurality of touch routing lines.

7. The display device according to claim 3, further comprising: Multiple color filters are disposed on the lower surface of the passivation layer below the second substrate and are configured to overlap with the light-emitting regions of the multiple sub-pixels.

8. The display device according to claim 3, further comprising: Multiple color filters are disposed on the same layer as the black matrix below the second substrate and are configured to overlap with the light-emitting areas of the multiple sub-pixels.

9. The display device according to claim 3, wherein, The black matrix is ​​positioned on the other side of the second substrate at a predetermined distance from the outermost portion of the second substrate.

10. The display device according to claim 2, wherein, The second non-display area on the other side of the second substrate protrudes further outward than the outermost periphery of the first substrate.

11. The display device according to claim 2, wherein, The first non-display area on one side of the first substrate protrudes further outward than the outermost periphery of the second substrate.

12. The display device according to claim 11, further comprising: A barrier layer is disposed on the upper part of the first substrate within the first display area; A thin-film transistor, wherein the thin-film transistor is disposed on the barrier layer in the first display area of ​​the first substrate, and includes an active layer, a gate, a source, and a drain; as well as Multiple signal link lines are disposed on one side of the first substrate within the first non-display area and electrically connect the multiple sub-pixels and the multiple first pads. The light-emitting element includes a first electrode disposed on the thin-film transistor, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer. The plurality of first pads are disposed on the same layer as one of the gate, the source, and the drain and contain the same material, and The multiple signal link lines are disposed on the same layer as the blocking layer and contain the same material.

13. The display device according to claim 3, further comprising: A thin-film transistor, disposed above the first substrate in the first display area, includes an active layer, a gate, a source, and a drain, and is electrically connected to the light-emitting element; A planarization layer is disposed on the thin-film transistor; A dam portion, which is disposed on the planarization layer and has an opening portion corresponding to the light-emitting area; A filling layer is disposed at least between the first substrate and the second substrate within the first display area and the second display area; A dam portion, wherein the dam portion is configured to surround the outer surface of the filler layer between the first substrate and the second substrate; as well as At least one blocking structure is disposed within the first non-display area of ​​the first substrate and is configured to be adjacent to the dam on the outside of the dam. The at least one barrier structure is disposed on the same layer as the embankment and is formed of the same material.

14. A display device, comprising: A first substrate, the first substrate including a display area provided with a plurality of light-emitting elements and a non-display area located outside the display area; The second substrate is located above the first substrate and is opposite to the first substrate. A filler layer is disposed between the first substrate and the second substrate; At least one dam is disposed between the first substrate and the second substrate to surround the outer surface of the filler layer and thereby restrict the filler layer; A plurality of first touch electrodes are disposed below the second substrate in a first region corresponding to the display area and extend along a first direction; A plurality of second touch electrodes, the plurality of second touch electrodes extending along a second direction intersecting the first direction; Multiple bridging electrodes are disposed in the first region below the second substrate, on a different layer from the multiple first touch electrodes and the multiple second touch electrodes, and are electrically connected to a portion of the multiple second touch electrodes; Multiple touch routing lines extend from the first area and are disposed in a second area that at least partially overlaps with the non-display area; Multiple touch pads extend from the second region and are disposed on one side of the second substrate in a third region that does not overlap with the non-display region; as well as A second flexible film is electrically connected to the plurality of touch pads at the lower part of the second substrate.

15. The display device according to claim 14, wherein, The multiple touch routing lines include: A first layer, wherein the first layer is disposed on the same layer as the plurality of first touch electrodes and the plurality of second touch electrodes; and The second layer, which is disposed on the same layer as the plurality of bridging electrodes and electrically connected to the first layer, and The plurality of touch pads extend from one end of the second layer of the plurality of touch routing lines.

16. The display device according to claim 14, further comprising: Multiple color filters are disposed below the second substrate and are configured to overlap with the light-emitting areas of the multiple light-emitting elements; as well as A black matrix is ​​disposed below the second substrate and is configured not to overlap with the light-emitting areas of the plurality of light-emitting elements. Wherein, on one side of the second substrate, the black matrix is ​​positioned at a predetermined distance inwardly spaced from the outermost portion of the second substrate.

17. The display device according to claim 14, wherein, On one side of the second substrate, the third region protrudes further outward than the outermost periphery of the first substrate.

18. The display device according to claim 14, further comprising: Multiple signal pads are disposed on another side of the first substrate that does not overlap with one side of the second substrate in the non-display area; Multiple signal link lines are disposed on the other side of the first substrate in the non-display area and electrically connect the multiple signal pads and the multiple sub-pixels respectively provided with the multiple light-emitting elements; as well as A first flexible film is electrically connected to the plurality of signal pads on the upper part of the first substrate.

19. The display device according to claim 18, wherein, The non-display area on the other side of the first substrate protrudes further outward than the outermost periphery of the second substrate.

20. The display device according to claim 16, wherein, The multiple color filters are arranged on the same layer as the black matrix.

21. The display device according to claim 16, further comprising: A first outer coating is disposed beneath the second substrate and covers the black matrix; An interlayer insulating layer is disposed below the first outer coating layer; as well as A passivation layer is disposed beneath the interlayer insulating layer of the touch layer. The plurality of color filters are disposed on the lower surface of the passivation layer.

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