Glass substrate with electrically conductive function and method of manufacturing
Patent Information
- Application Number
- CN202610903031.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-07-23
- Filing Date
- 2026-06-23
- Publication Date
- 2026-10-30
AI Technical Summary
但实际操作中,玻璃孔壁的低表面与不均质结构易产生空隙或裂缝,造成金属化不均匀及附着力不足,进而导致镀层厚度不均、脱层或空洞、空隙等缺陷
[0006]因此,为有效解决上述的问题,本发明的一目的,是在于提供一种能够于玻璃基板形成稳定垂直导通孔的制造方法,克服非导电孔壁处理困难、提升镀层附着力与填实品质,适用于高频、高密度电子封装。
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Figure CN123022252A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a glass substrate and a method for manufacturing it, and more particularly to a glass substrate with conductive properties and a method for manufacturing it. Background Technology
[0002] Driven by high-frequency computing and advanced communication technologies, the packaging design of electronic components is gradually trending towards high-density and high-efficiency architectures. Glass substrates, due to their excellent insulation, high flatness, and low coefficient of thermal expansion, are gradually replacing traditional organic or silicon materials in the packaging field, becoming an important medium for achieving multilayer interconnects. However, glass itself is a non-conductive material and lacks natural structures suitable for vertical conduction, making it unable to directly support high-speed signal transmission and vertical electrical interconnects.
[0003] In terms of processing technology, common methods currently include laser drilling, etching, and Computerized Numerical Control (CNC) technology for forming vias or blind vias on glass substrates. However, while these holes provide vertical channels, their walls are non-conductive, requiring additional surface modification treatments, such as applying a catalyst layer, to provide reactivity for subsequent deposition. In practice, however, the low surface area and heterogeneous structure of the glass hole walls easily generate voids or cracks, resulting in uneven metallization and insufficient adhesion, which in turn leads to defects such as uneven coating thickness, delamination, or voids and gaps.
[0004] Furthermore, when the hole depth is large or the structure is complex, metal plating is difficult to effectively fill the entire hole, leading to increased resistance, signal distortion, and decreased reliability in the vertical conduction path. In addition, the need to perform multiple surface treatments and plating steps in an interleaved manner results in instability in the overall process integration and repeatability, further limiting its technological scalability in large-area packaging.
[0005] In view of the above limitations, this invention addresses the technical bottlenecks in the fabrication of vias and metallization filling in glass substrates by proposing an integrated process that is both continuous and manufacturable. This method can establish stable conductive paths in the glass substrate, effectively improving coating adhesion and via filling quality, thereby enhancing the reliability and process consistency of its application in high-density electronic packaging. Summary of the Invention
[0006] Therefore, in order to effectively solve the above problems, one objective of the present invention is to provide a manufacturing method that can form stable vertical vias on a glass substrate, overcome the difficulty of non-conductive hole wall treatment, improve coating adhesion and filling quality, and is suitable for high-frequency, high-density electronic packaging.
[0007] Another objective of this invention is to provide a conductive glass substrate that overcomes the shortcomings of the prior art and is different from traditional glass substrates.
[0008] To achieve the above objectives, the present invention discloses a method for manufacturing a glass substrate with conductive function, comprising the following steps: providing a glass substrate and drilling holes in a body of the glass substrate to form a plurality of holes; applying a metal ion catalyst solution to the inner walls of the plurality of holes to form a first intermediate layer with metal catalyst properties; performing chemical treatment on the inner walls of the plurality of holes to deposit a conductive second intermediate layer on the first intermediate layer, so that the first intermediate layer and the second intermediate layer constitute a double intermediate layer, thereby converting the originally insulating hole walls of the glass substrate into a conductive structure; before electroplating and filling the holes, forming a surface conductive layer on a first surface and a second surface of the body of the glass substrate by physical vapor deposition (PVD), chemical vapor deposition (CVD), or ion plating, the surface conductive layer having a first surface layer portion and a second surface layer portion. The first surface layer is formed on the first surface and / or the second surface of the body, and the second surface layer extends from the first surface layer into the opening of each hole to form a conductive contact with the second intermediate layer that at least partially overlaps with it, thereby forming a continuous conductive path from the first surface of the body through the second intermediate layer in the hole to the second surface; the glass substrate having the second intermediate layer and the surface conductive layer is subjected to electroplating to fill the holes, thereby forming a solid-filled metal conductive layer in the plurality of holes, and then the metal conductive layer is connected with the surface conductive layer and the second intermediate layer to form an integrated interconnect structure; and after the metal conductive layer is formed, a post-processing including heat treatment or annealing is performed to reduce internal stress and enhance the bonding force between the metal conductive layer and the body, wherein the temperature of the heat treatment or annealing step is between 150°C and 300°C.
[0009] The multiple holes are through holes or blind holes formed by laser ablation, laser etching combined with laser etching or computer numerical control (CNC) precision drilling technology, and the depth-to-diameter ratio of the multiple holes is between 2:1 and 20:1.
[0010] The first intermediate layer is formed within the plurality of pores by applying copper, nickel, palladium, gold or silver ions through immersion, coating or printing.
[0011] The second interposer is deposited on the first interposer by chemical electroless plating, utilizing a catalytic effect and a chemical reaction.
[0012] The material of the conductive layer on the surface is selected from the group consisting of copper, nickel, gold or silver.
[0013] The conductive layer on the surface is either fully covered or patterned and distributed on the first surface, the second surface, and the area inside the opening of each hole.
[0014] In this process, current is introduced through the second intermediate layer, causing copper, nickel, gold, or silver metal to fill the multiple holes, so that the conductive metal layer fully fills the entire multiple holes.
[0015] The post-processing scheme performed after electroplating and filling the holes also includes a mechanical grinding and polishing or chemical mechanical polishing step after the holes are completely filled with a metal conductive layer, in order to remove excess metal and ensure the flatness of the glass substrate surface, with a surface roughness (Ra) of less than 10 nm.
[0016] The manufacturing method of the conductive glass substrate of the present invention can transform the non-conductive glass hole wall into a conductive layer, improve the hole filling success rate, and reduce the through-hole resistance after metal filling, which is beneficial for high-speed signal transmission. The process is highly flexible, and the application method and metal type can be selected according to the needs. It is also suitable for applications in fields such as artificial intelligence (AI), 5G / 6G or high-performance packaging.
[0017] The present invention also discloses a conductive glass substrate, comprising: a body having a plurality of holes; a first intermediate layer formed on the inner wall of the plurality of holes by a metal ion catalyst solution to form a metal catalyst layer; a second intermediate layer formed on the first intermediate layer by chemical treatment to form a conductive metal layer; and a surface conductive layer having a first surface portion disposed on the surface of the body, and a second surface portion extending from the first surface portion and corresponding to at least partially overlapping and contacting the second intermediate layer within the openings of the plurality of holes, thereby forming a conductive layer extending from the first surface of the body through the second intermediate layer within the holes to... The second surface has a continuous conductive path; and a metal conductive layer is solidly filled in the plurality of holes by electroplating and bonding with the second intermediate layer and the second surface layer to form a solid conductive filling structure, thereby making the metal conductive layer, the surface conductive layer and the second intermediate layer an integrated interconnect structure; wherein, the glass substrate is subjected to heat treatment or annealing at 150°C to 300°C after electroplating to eliminate the internal stress of the solid phase interface and enhance the bonding force between the metal conductive layer and the substrate, and the plurality of holes are through holes or blind holes, and the depth-to-diameter ratio of the plurality of holes is between 2:1 and 20:1. Attached Figure Description
[0018] Figure 1 This is a flowchart illustrating a preferred embodiment of the manufacturing method of a conductive glass panel according to the present invention; the text within this flowchart is for illustrative purposes only.
[0019] Figure 2AThis is a perspective view of the glass substrate of the present invention;
[0020] Figure 2B This is a side cross-sectional view of the glass substrate of the present invention;
[0021] Figure 3A A three-dimensional view of the holes in the glass substrate to which the first interlayer is coated;
[0022] Figure 3B This is a side cross-sectional view of the glass substrate with the first interlayer coated on it.
[0023] Figure 4A A three-dimensional view of depositing a second interposer layer on the inner wall of a hole in a glass substrate;
[0024] Figure 4B A side cross-sectional view of a second interposer deposited on the inner wall of a hole in a glass substrate;
[0025] Figure 5A A perspective view of the formation of a surface metal layer on the first and second surfaces of a glass substrate;
[0026] Figure 5B A side cross-sectional view showing the formation of a surface metal layer on the first and second surfaces of a glass substrate;
[0027] Figure 6A A three-dimensional view of forming a metallic conductive layer within holes in a glass substrate; and
[0028] Figure 6B This is a side cross-sectional view of a metal conductive layer formed within a hole in a glass substrate.
[0029] Explanation of reference numerals in the attached drawings: S101~S105 - Steps; 2 - Glass substrate; 20 - Body; 20A - First surface; 20B - Second surface; 202 - Hole; 204 - First interposer layer; 206 - Second interposer layer; 208 - Surface metal layer; 210 - Conductive metal layer; 208A - First surface layer; 208B - Second surface layer. Detailed Implementation
[0030] The above-mentioned objectives of the present invention and its structural and functional characteristics will be described with reference to the preferred embodiments shown in the accompanying drawings.
[0031] The present invention is a method for manufacturing a glass panel with conductive function, which involves establishing a vertical conductive channel in an insulating glass substrate to meet the needs of high-density electronic packaging.
[0032] Figure 1 This is a flowchart illustrating a preferred embodiment of the manufacturing method of a conductive glass panel according to the present invention. Figure 2A This is a perspective view of the glass substrate of the present invention. Figure 2BThis is a side cross-sectional view of the glass substrate of the present invention, as shown below. Figure 1 , Figure 2A and Figure 2B As shown, firstly, in step S101, a glass substrate 2 is provided. The body 20 of the glass substrate 2 has a first surface 20A and a second surface 20B, and holes are drilled in the body 20 of the glass substrate 2 to form a plurality of holes 202. This step can employ laser ablation, a combination of laser etching and laser etching, or computerized numerical control (CNC) precision drilling technology. The plurality of holes 202 penetrate the first and second surfaces 20A and 20B, or partially penetrate the first surface 20A (or the second surface 20B), to form through-hole or blind via structures in the body 20 of the glass substrate 2. These holes 202 penetrate vertically into the body 20 of the glass substrate 2, and the depth-to-diameter ratio is appropriately designed as needed, for example, between 2:1 and 20:1, to facilitate subsequent metal plating deposition and filling. The holes 202 can be arranged as single holes, arrayed holes, or patterned structures according to application requirements to match the design configuration of electrical interconnects, and are not limited thereto. In this invention, a through hole is used as an example for illustration.
[0033] Figure 3A This is a three-dimensional view of the holes in the glass substrate where the first interlayer is coated. Figure 3B The figure shows a side cross-sectional view of the first interposer layer coated on the glass substrate. Next, in step S102, after the formation of the hole 202, a metal ion catalyst solution is applied to the inner wall of the hole 202 to perform surface catalytic treatment and form a first interposer layer 204, which may also be called a metal catalyst layer. This first interposer layer 204 can be applied by immersion, coating, or printing, and can be composed of copper, nickel, palladium, gold, or silver ions. The first interposer layer 204 is formed on the inner wall of the hole 202, providing the necessary reactive surface so that the non-conductive glass substrate 2 can cooperate with the subsequent chemical deposition of the metal plating layer, further improving the adhesion of the inner wall surface of the hole 202.
[0034] Furthermore, the inner wall of the hole 202 (e.g., a through hole or a blind hole) can also be activated by performing an internal surface activation treatment, which can be achieved through chemical modification or plasma treatment. This makes the inner wall of the hole chemically reactive and can also provide an effective catalyst for the deposition of metal coatings, enhancing the adhesion between the subsequent metal and the glass material in the hole. This achieves the same adhesion effect as the modified inner wall surface of the hole 202 described above.
[0035] Figure 4A A three-dimensional view of the deposition of a second interposer layer on the inner wall of a hole in a glass substrate. Figure 4BAs shown in the figure, a side cross-sectional view of the deposition of a second interposer layer on the inner wall of a hole in a glass substrate is presented. After the formation of the first interposer layer 204 is completed, in step S103, a chemical electroless plating process is performed on the inner wall of the hole 202. This step utilizes the aforementioned catalytic effect (i.e., the first interposer layer 204) to deposit the second interposer layer 206 directly on the first interposer layer 204 via a chemical reaction without the need for an external current. The second interposer layer 206 can also be referred to as a metal material layer, and can be made of materials such as copper, nickel, gold, or silver to form a continuous conductive plating layer or a conductive metal layer. The second interposer layer 206 is a thin and uniform layer covering the first interposer layer 204 already formed on the inner wall of the hole 202, transforming the originally insulating inner wall of the hole 202 of the glass substrate 2 into a structure with initial conductivity, providing initial conductive conduction for the subsequent metal plating filling operation within the hole 202. In this invention, to ensure the quality and electrical reliability of the second interposer 206, it is necessary to precisely control the reaction time, temperature and plating solution concentration.
[0036] Figure 5A This is a perspective view of the surface metal layer formed on the first and second surfaces of a glass substrate. Figure 5B As shown in the figure, after the second intermediary layer 206 is formed within the hole 202, in step S104, a surface conductive layer 208 is formed on the first surface 20A and / or the second surface 20B of the body 20 of the glass substrate 2. This surface conductive layer 208 can also be made of the aforementioned metal material and is formed by printing, coating, or by physical vapor deposition (PVD), chemical vapor deposition (CVD), or ion plating. The surface conductive layer 208 can completely cover or be patterned on the first surface 20A and / or the second surface 20B, and partially or completely overlaps with the second intermediary layer 206 adjacent to the hole 202 to construct a complete conductive path, facilitating the uniform distribution and introduction of subsequent metal plating current into the hole 202. That is, the surface conductive layer 208 has a first surface layer portion 208A and a second surface layer portion 208B. The first surface layer portion 208A is disposed on the first surface 20A and / or the second surface 20B of the body 20. The second surface layer portion 208B extends from the first surface layer portion 208A onto the second intermediate layer 206 corresponding to a portion of the opening of the plurality of holes 202 and forms at least a partial overlap contact (e.g., Figure 6B (As shown in the enlarged view), this surface conductive layer 208 serves as the basis for subsequent metal electroplating steps, ensuring that current can be effectively conducted into the hole 202.
[0037] Figure 6A This is a three-dimensional view of forming a conductive metal layer within the holes of a glass substrate. Figure 6BAs shown in the figure, a side cross-sectional view is taken to form a metal conductive layer inside the holes of the glass substrate. Finally, in step S105, an electroplating process is performed to fill the holes in the glass substrate 2 body 20, which already has the surface conductive layer 208 and the second intermediate layer 206. Current is introduced through the surface conductive layer 208 and the second intermediate layer 206 to fill the holes 202 with metals such as copper, nickel, gold, or silver, so that the metal conductive layer 210 fully fills the entire hole 202 and can be combined with the second intermediate layer 206 and the second surface layer 208B to form a solid conductive filling structure. In other words, during the electroplating filling process, the aforementioned metal is gradually deposited and thickened to fill the upper and lower surfaces of the glass substrate 2 body 20, which already has the second interposer 206, and the inner wall surface of the opening of the hole 202. That is, all surfaces are thickened simultaneously, at least ensuring that the metal conductive layer 210 forming a solid filling structure within the hole 202 can be firmly bonded and electrically connected to the surface conductive layer 208 and other plating layers (such as the second interposer 206 and the first interposer 204). The vertical metal columnar structure formed by the solid filling of the hole 202 has excellent conductivity and mechanical stability, which helps to reduce signal transmission loss during subsequent use and enhance packaging reliability.
[0038] This process method can be used to construct conductive structures for high-precision, low-defect-rate, and highly integrated glass substrates, providing manufacturing consistency and meeting the technical requirements for miniaturized and high-frequency packaging of electronic components.
[0039] Still refer to Figures 2A-6A and Figures 2B-6B As shown in the figure, the body 20 of the conductive glass substrate includes multiple holes 202, a first interposer 204, a second interposer 206, a surface metal layer 208, and a metal conductive layer 210. The glass substrate 2 is a glass substrate with insulation and high flatness, providing mechanical strength and basic support for the overall structure. Multiple holes 202 are provided in the body 20 of the glass substrate 2. The holes 202 can be through-holes or partially through-hole blind structures to provide vertical electrical channels. The inner wall of the holes 202 is formed with a first interposer 204. This first interposer 204 is formed by applying a catalyst solution containing metal ions such as copper, nickel, palladium, gold, or silver, and processing it through printing or coating methods. Therefore, it can also be called a metal catalyst layer. Its purpose is to improve the reactivity and plating conductivity of the glass hole walls, providing a chemically active substrate required for subsequent metal deposition.
[0040] A second interposer 206 is further stacked on the first interposer 204. This second interposer 206 is deposited by chemical electroless plating. The plating material used for the second interposer 206 includes copper, nickel, gold, or silver. Through an autocatalytic reaction, the metal is uniformly attached to the inner wall surface of the hole 202, forming the conductive structure of the second interposer 206. The second interposer 206 can also be called a metal material layer. The first surface 20A and the second surface 20B of the body 20 of the glass substrate 2 each have a surface metal layer 208. The surface metal layer 208 is formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), ion plating, or printing, forming a fully or partially patterned conductive coating. It is interconnected with the second interposer 206 at the opening of the hole 202 to form an electrical connection, thereby forming a continuous conductive path.
[0041] The holes 202 of the integral glass substrate 2 have a second interposer 206 inside, followed by metal filling to form a metal conductive layer 210. This metal conductive layer 210 is a vertical conductive structure formed by electroplating, where metal (such as copper, nickel, gold, or silver) fully fills the hole space. The metal conductive layer 210, combined with the aforementioned plating layers (such as the surface conductive layer 208 and the second interposer 206), forms a complete interconnect path, possessing low impedance and high signal integrity, suitable for multilayer interconnection requirements in electronic packaging.
[0042] The manufacturing method further includes a post-processing step. In some embodiments of this invention, the post-processing step includes a grinding or chemical-mechanical polishing (CMP) step and a heat treatment or annealing step, however, it includes, but is not limited to, these steps. The aforementioned grinding or chemical-mechanical polishing (CMP, e.g., pressure 2-3 psi) step is performed after the hole 202 has been completely filled with the metal conductive layer 210, to remove excess metal (e.g., metal on the first and second surfaces 20A, 20B of the glass substrate 2), ensuring the surface flatness of the glass substrate 2 (e.g., approximately Ra < 10 nm), facilitating the subsequent mounting of various components such as chips and circuit boards on the surface as needed, thereby achieving the multilayer interconnection requirements in electronic packaging.
[0043] The aforementioned heat treatment or annealing steps are performed after the formation of the conductive metal layer 210 to enhance the bonding force between the conductive metal layer and the body. The heat treatment temperature is between 150°C and 300°C. For example, the final annealing operation is performed at 200°C for approximately 30 minutes, which can reduce internal stress and improve bonding reliability and conductivity.
[0044] Through the above manufacturing method, the present invention provides a glass substrate with conductive function. Please refer to [link to previous document]. Figures 6A to 6B As shown, the glass substrate 2 comprises: A body 20 having a first surface 20A, a second surface 20B, and a plurality of holes 202 penetrating the first surface 20A and / or the second surface 20B; a first intermediate layer 204 formed on the inner wall surface of the plurality of holes 202 by a metal ion catalyst solution; a second intermediate layer 206 formed on the first intermediate layer 204 by chemical treatment; a surface conductive layer 208 having a first surface portion 208A disposed on the surface of the body 20 (i.e., the first surface 20A and the second surface 20B), and a second surface portion 208B extending from the first surface portion 208A and corresponding to a portion of the second intermediate layer 206 within the opening of the plurality of holes 202 and at least partially overlapping and contacting it; and a metal conductive layer 210 solidly filling the plurality of holes 202 by electroplating, and combined with the second surface portion of the surface conductive layer 208 and the second intermediate layer 206 to form an integrated interconnect structure.
[0045] Therefore, the superior features of the present invention are briefly described as follows:
[0046] 1. High reliability: Uniform metallization reduces defects in holes (such as voids, cracks, non-uniformity, delamination, etc.), improving interconnect reliability.
[0047] 2. High conductivity: Metal (e.g., copper) plating or conductive material filling ensures low resistance, making it suitable for high-performance applications.
[0048] 3. Process flexibility: Supports multiple apertures and aspect ratios to adapt to different packaging requirements.
[0049] 4. Signal Transmission Efficiency and Thermal Management: Hole metallization provides a low-loss vertical interconnect structure suitable for 5G / 6G high-frequency modules. The excellent thermal stability of the glass substrate, combined with metallization interconnect technology, enhances the heat dissipation capability of AI chip packaging, meeting the requirements of high frequency and high density.
[0050] 5. Miniaturized overall structure: The glass substrate uses a hole-filling technology with high-density interconnect structure design to meet the needs of miniaturized electronic products.
[0051] The present invention has been described in detail above. However, the above description is only a preferred embodiment of the present invention and should not be construed as limiting the scope of the present invention. All equivalent variations and modifications made in accordance with the claims of the present invention should still fall within the scope of the present invention.
Claims
1. A method for manufacturing a glass substrate with conductive properties, characterized in that, Include: A glass substrate is provided, and a plurality of holes are formed by drilling in a body of the glass substrate; A metal ion catalyst solution is applied to the inner wall of the plurality of holes to form a first intermediate layer with a metal catalyst. Chemical treatment is performed on the inner walls of the multiple holes to deposit a conductive second intermediate layer on the first intermediate layer, so that the first intermediate layer and the second intermediate layer form a double intermediate layer, thereby converting the originally insulating hole walls of the glass substrate into a conductive structure. Before the electroplating filling process, a surface conductive layer having a first surface layer and a second surface layer is formed on a first surface and a second surface of the body of the glass substrate by physical vapor deposition, chemical vapor deposition or ion plating. The first surface layer is formed on the first surface and / or the second surface of the body, and the second surface layer is a conductive contact that extends from the first surface layer to the second intermediate layer inside the hole, at least partially overlapping with the second intermediate layer, thereby forming a continuous conductive path from the first surface of the body through the second intermediate layer inside the hole to the second surface. The glass substrate, which already has the second intermediate layer and the surface conductive layer, is subjected to electroplating to fill the holes, so that a solid-filled metal conductive layer is formed in the multiple holes, thereby forming an integrated interconnect structure that connects the metal conductive layer, the surface conductive layer and the second intermediate layer. as well as After the metal conductive layer is formed, a post-treatment including heat treatment or annealing is performed to reduce internal stress and enhance the bonding force between the metal conductive layer and the body, wherein the temperature of the heat treatment or annealing step is between 150°C and 300°C.
2. The manufacturing method as described in claim 1, characterized in that, These multiple holes are through-hole or blind hole structures formed by laser ablation, laser etching combined with laser etching, or computer numerical control precision drilling technology. The depth-to-diameter ratio of these multiple holes is between 2:1 and 20:
1.
3. The manufacturing method as described in claim 1, characterized in that, The first intermediate layer is formed within the multiple pores by applying copper, nickel, palladium, gold, or silver ions through soaking, coating, or printing.
4. The manufacturing method as described in claim 1, characterized in that, The second interposer is deposited on the first interposer by chemical electroless plating, utilizing a catalytic effect and a chemical reaction.
5. The manufacturing method as described in claim 1, characterized in that, The material of the conductive layer on the surface is selected from the group consisting of copper, nickel, gold, or silver.
6. The manufacturing method as described in claim 1, characterized in that, The conductive layer on the surface is either fully covered or patterned and distributed on the first surface, the second surface, and the area inside the opening of each hole.
7. The manufacturing method as described in claim 1, characterized in that, Current is introduced through the second intermediary layer, causing copper, nickel, gold or silver metal to fill the multiple holes, so that the metal conductive layer fully fills the entire multiple holes.
8. The manufacturing method as described in claim 1, characterized in that, The post-processing scheme performed after electroplating and filling the holes also includes a mechanical grinding and polishing or chemical mechanical polishing step after the holes are completely filled with a metal conductive layer, in order to remove excess metal and ensure the flatness of the glass substrate surface, with a surface roughness of less than 10nm.
9. A glass substrate with conductive function manufactured using the manufacturing method as described in claim 1, characterized in that, Include: A body having multiple holes that penetrate or partially penetrate the body; A first intermediate layer is a metal catalyst layer formed on the inner wall of the plurality of pores by a metal ion catalyst solution; A second interlayer is formed on the first interlayer by chemical treatment. The second interlayer is a conductive metal layer formed by chemical deposition. A surface conductive layer is pre-formed on the first and second surfaces of the body before electroplating to fill holes. The surface conductive layer has a first surface layer portion and a second surface layer portion. The first surface layer portion is formed on the first surface and / or the second surface of the body. The second surface layer portion extends from the first surface layer portion and at least partially overlaps and contacts the second intermediate layer inside the opening of the plurality of holes to form a continuous conductive path from the first surface of the body through the second intermediate layer inside the hole to the second surface. as well as A metal conductive layer is solidly filled into the plurality of holes by electroplating and is combined with the second intermediate layer and the second surface layer to form a solid conductive filling structure, thereby combining the metal conductive layer with the surface conductive layer and the second intermediate layer to form an integrated interconnect structure. The glass substrate undergoes heat treatment or annealing at 150°C to 300°C after electroplating to eliminate internal stress at the solid-phase interface and enhance the bonding force between the metal conductive layer and the substrate. The multiple holes are either through holes or blind holes, and the depth-to-diameter ratio of the multiple holes is between 2:1 and 20:1.
