A power module package structure and a manufacturing method thereof

Abstract

The application relates to a power semiconductor packaging technology and discloses a power module packaging structure and a manufacturing method thereof, which comprises a lead frame, a semiconductor device, a copper clamp structure and a plastic package body; the lead frame comprises a plurality of metal base islands and a plurality of pins; the semiconductor device is arranged on the front surface of the lead frame and is welded on the metal base island through solder, and comprises a plurality of MOS chips, an NTC thermistor and a current sampling resistor; the copper clamp structure is arranged on the front surface of the MOS chip and is used for electrically connecting the MOS chip with corresponding pins of the lead frame or adjacent chips; the plastic package body is arranged on the front surface of the lead frame and is used for covering the semiconductor device and is provided with a through hole for the pins of the lead frame to extend out; wherein the back surface of the lead frame is used for heat dissipation, the pins of the lead frame are gull-wing pins, and the gull-wing pins have a groove structure on the side surface after extending out of the plastic package body. The application can improve the integration and heat dissipation efficiency of the power module.

Description

Technical Field

[0001] This application relates to the field of power semiconductor packaging technology, and in particular to a power module packaging structure and its manufacturing method. Background Technology

[0002] As power electronic devices rapidly evolve towards miniaturization and high power density, semiconductor packaging is gradually evolving from traditional single-tube packaging to module packaging in order to effectively save PCB board space.

[0003] Currently, the mainstream power devices in the industry are still mainly in DFN (Dual In-line Flat No-leads) single-tube packages. This type of package structure involves a single MOS chip soldered to a lead frame. The front electrode of the chip is electrically connected to the pins through bonding wires or simple metal connectors. The entire device is encapsulated and protected with plastic, exposing only the bottom of the frame and the outside of the pins. The heat dissipation of the device relies entirely on the adhesion between the bottom and the PCB board. Circuit connections also need to be expanded by combining multiple devices through the PCB board.

[0004] While existing solutions attempt to develop multi-chip integrated power module packages, they simply integrate multiple MOS chips onto the same lead frame, still adhering to the design approach of single-transistor packaging. These solutions face numerous technical bottlenecks in practical applications, failing to meet the demands for high integration, high reliability, and high performance: First, low integration density, with each MOS chip individually packaged, requiring multiple chips to be combined to achieve complex topologies; second, high parasitic inductance introduced by PCB layout, easily causing oscillations and high voltage spikes; third, low heat dissipation efficiency through the PCB; fourth, inability to monitor chip temperature in real time, posing a risk of overheating and burnout; and fifth, the need to add additional current sampling resistors on the PCB to monitor current magnitude, resulting in high overall complexity in PCB routing design.

[0005] In response to the aforementioned technologies, a systematic optimization scheme is needed for packaging structure, interconnection method, heat dissipation design and functional integration. Summary of the Invention

[0006] To address the aforementioned technical problems, this application provides a power module packaging structure and its manufacturing method.

[0007] Firstly, the power module packaging structure provided in this application adopts the following technical solution: A power module packaging structure includes a lead frame, semiconductor devices, a copper clip structure, and a molding compound. The lead frame includes multiple metal islands and multiple pins. The semiconductor devices are disposed on the front side of the lead frame and soldered to the metal islands, including multiple MOS chips, at least one NTC thermistor, and at least one current sampling resistor. The multiple MOS chips form a power topology loop, the NTC thermistor is used to detect the internal temperature of the module, and the current sampling resistor is connected in series in the power topology loop. The copper clip structure is disposed on the front side of the MOS chips and is used to electrically connect the MOS chips to the corresponding pins of the lead frame or adjacent chips. The molding compound is disposed on the front side of the lead frame and is used to cover the semiconductor devices, and has through holes for the lead frame pins to extend out. The back side of the lead frame is used for heat dissipation, and the pins of the lead frame are gull-wing pins, with groove structures on the sides of the gull-wing pins after extending out of the molding compound.

[0008] By adopting the above technical solutions, multiple MOS chips, NTC thermistors, and current sampling resistors are integrated into the same package, improving integration and reducing PCB footprint. The copper clip structure replaces traditional bonding wires, reducing parasitic inductance and conduction losses, and suppressing voltage spikes and oscillations. The front-side components of the lead frame work in conjunction with the back-side heat dissipation structure to improve heat dissipation efficiency. The NTC thermistor and current sampling resistor enable real-time temperature and current monitoring, reducing the risk of chip overheating and burnout. The gull-wing pin groove structure meets automotive-grade AOI inspection requirements, simplifying the overall PCB routing design.

[0009] Optionally, the gull-wing leads are bent toward the front of the molded body from the outside, and the grooved surface of the gull-wing leads is provided with a tin-plated layer to form wettable side edges.

[0010] By adopting the above technical solutions, the pin bending design ensures that the heat dissipation surface faces upwards during surface mounting, and the heat dissipation effect can be further optimized in conjunction with the top heat dissipation structure; the groove structure retains tin plating to form wettable side edges, which can ensure accurate identification of soldering quality during AOI inspection and meet automotive-grade reliability requirements.

[0011] Optionally, the multiple metal base islands include a first metal base island, a second metal base island, and a third metal base island; the second metal base island is located in the middle of the lead frame and forms the source bus; the first metal base island is located on both sides of the second metal base island and is used to carry multiple MOS chips and drain leads; the third metal base island is located at the end of the lead frame and is used for the power lead-out of the module's negative terminal.

[0012] By adopting the above technical solutions, the partitioned design of the metal base island can achieve functional differentiation layout. The source and busbars are concentrated to carry the main current, which can optimize the current path and reduce parasitic parameters. The reasonable layout ensures that the drain and negative leads do not interfere with each other, thus improving the stability of the module's electrical performance.

[0013] Optionally, the copper clip structure includes a source copper clip and a gate copper clip; the source copper clip connects to the source region of the MOS chip to carry the main power current and conduct heat, and the gate copper clip connects the gate region of the MOS chip to the corresponding gate pin.

[0014] By adopting the above technical solutions, the source copper clip combines current transmission and heat dissipation functions, improving the current carrying capacity and heat conduction efficiency of the main power circuit; the gate copper clip realizes the transmission of gate signals, ensuring the reliability of MOS chip switching control.

[0015] Optionally, the source copper clip includes a first copper clip and a second copper clip. The multiple MOS chips are divided into an upper bridge arm group and a lower bridge arm group. Each MOS chip in the upper bridge arm group is connected to the corresponding MOS chip in the lower bridge arm group, and each includes a gate, a source, and a drain. The source of the MOS chip in the upper bridge arm group and the drain of the MOS chip in the lower bridge arm group are connected through the first copper clip. The source of the MOS chip in the lower bridge arm group is connected to the second metal base island through the second copper clip.

[0016] By adopting the above technical solution, the source copper clip realizes the accurate connection of the upper and lower bridge arm MOS chips and the source bus, and constructs a complete full-bridge topology circuit; the bus design can shorten the current path, further reduce parasitic inductance and loss, and improve the module switching performance.

[0017] Optionally, a current sampling resistor is connected across the second and third metal base islands and in series between the source bus and the negative terminal of the lower bridge arm assembly.

[0018] By adopting the above technical solution, the current sampling resistor is connected in series with the key node of the main power circuit, which can accurately collect the circuit current. There is no need to set an additional sampling resistor on the PCB, which reduces the PCB board area and simplifies the circuit design.

[0019] Optionally, the MOS chip in the upper bridge arm group is a four-terminal device, and also includes a drive source. The copper clip structure also includes a drive source copper clip, and the drive source is led out through the drive source copper clip.

[0020] By adopting the above technical solution, the driving source of the four-terminal MOS chip is independently brought out, which can avoid mutual interference between the driving circuit and the main power circuit, improve the stability and reliability of the driving signal, and optimize the switching characteristics of the chip.

[0021] Optionally, the NTC thermistor is positioned between adjacent MOS chips in the lower bridge arm group and connected to a pair of independent temperature signal pins. The NTC thermistor and the current sampling resistor are separated by a first metal base island.

[0022] By adopting the above technical solution, the NTC thermistor is placed close to the MOS chip, resulting in more accurate temperature detection. The independent pins ensure interference-free transmission of the temperature signal. The spacing design between the NTC thermistor and the current sampling resistor reduces mutual interference and ensures the stable implementation of their respective functions.

[0023] Optionally, the semiconductor device is soldered onto the lead frame using solder. The lead frame is made of copper or a copper alloy, and a silver plating layer or a nickel plating layer is partially disposed on the surface of the lead frame.

[0024] By adopting the above technical solutions, the lead frame made of copper or copper alloy has excellent electrical and thermal conductivity; local silver or nickel plating can improve welding reliability and oxidation resistance, and extend the service life of the module.

[0025] Secondly, the manufacturing method of the power module packaging structure provided in this application adopts the following technical solution: A method for manufacturing a power module package structure, applied to the power module package structure described in any of the first aspects, includes the following steps: S1, providing a lead frame and printing solder; S2, mounting multiple MOS chips, NTC thermistors, and current sampling resistors to preset positions on the front side of the lead frame; S3, printing solder on the surface of the MOS chips and placing copper clip structures; S4, performing reflow soldering to form electrical and mechanical connections; S5, performing molding to form a molded body; S6, electroplating and trimming the leads, and forming groove structures on the sides of the leads during the trimming process.

[0026] By adopting the above technical solutions, a standardized and mass-producible manufacturing process adapted to all-in-one power module packaging is provided. The steps are clear and controllable, with strong compatibility with traditional power semiconductor packaging processes, making it easy to achieve industrialization. The reflow soldering process ensures reliable electrical and mechanical connections between multiple MOS chips, NTC thermistors, current sampling resistors and lead frames, as well as between copper clips and MOS chips, guaranteeing the stability of the module's electrical performance. The side groove structure is formed simultaneously in the lead cutting and forming process, eliminating the need for additional processing steps, improving production efficiency, and ensuring the consistency of the groove structure formation. This lays the technological foundation for subsequent lead tin plating and the formation of wettable side edges, meeting automotive-grade AOI inspection requirements.

[0027] In summary, this application includes at least one of the following beneficial technical effects: 1. High integration and reasonable layout: It integrates multiple MOS chips, NTC thermistors and current sampling resistors to build a complete power topology, which reduces the PCB board area and routing complexity, reduces parasitic inductance and improves electrical performance. 2. Excellent heat dissipation and reliability: It adopts a copper clip structure and a double-sided heat dissipation design to improve heat conduction efficiency. The gull-wing pins meet the requirements of automotive AOI inspection, and the plating treatment enhances the oxidation resistance and can extend the service life. 3. It has comprehensive functions and strong adaptability, enabling real-time monitoring of temperature and current, reducing the risk of chip overheating and overcurrent, supporting four-terminal MOS chip driving, and adapting to various power electronic application scenarios such as motor driving, meeting the requirements of high power density. Attached Figure Description

[0028] Figure 1 This is a cross-sectional schematic diagram of the power module packaging structure provided in the embodiments of this application; Figure 2 This is a top view schematic diagram of the power module packaging structure provided in the embodiments of this application; Figure 3 This is a front view of the lead frame provided in an embodiment of this application; Figure 4 This is a device layout diagram of the semiconductor device provided in the embodiments of this application; Figure 5 This is a flowchart of the manufacturing method of the power module packaging structure provided in the embodiments of this application.

[0029] Explanation of reference numerals in the attached figures: 10. Lead frame; 11. Gull-wing pin; 12. First metal base island; 13. Second metal base island; 14. Third metal base island; 15. Low-current metal base island; 20. Semiconductor device; 21. MOS chip; 22. NTC thermistor; 23. Current sampling resistor; 30. Copper clip structure; 31. Source copper clip; 311. First copper clip; 322. Second copper clip; 32. Gate copper clip; 33. Drive source copper clip; 40. Molded enclosure; 50. Solder. Detailed Implementation

[0030] The following is in conjunction with the appendix Figure 1-5 This application will be described in further detail.

[0031] This application discloses a power module packaging structure, referring to... Figures 1 to 3 The power module package structure includes a lead frame 10, a semiconductor device 20, a copper clip structure 30, and a molding compound 40; the lead frame 10 includes multiple metal base islands and multiple pins; the semiconductor device 20 is disposed on the front side of the lead frame 10. Figure 1The semiconductor device 20 is soldered to a metal substrate island via solder 50. It includes multiple MOS chips 21, at least one NTC thermistor 22, and at least one current sampling resistor 23. The multiple MOS chips 21 form a power topology loop. The NTC thermistor 22 is used to detect the internal temperature of the module, and the current sampling resistor 23 is connected in series in the power topology loop. A copper clip structure 30 is disposed on the front side of the MOS chips 21 to electrically connect the MOS chips 21 to the corresponding pins of the lead frame 10 or adjacent chips. A molding compound 40 is disposed on the front side of the lead frame 10 to cover the semiconductor device 20 and has through holes for the pins of the lead frame 10 to extend out. The back side of the lead frame 10 is used for heat dissipation. The pins of the lead frame 10 are gull-wing pins 11, and the gull-wing pins 11 have a groove structure on their side after extending out of the molding compound 40.

[0032] Specifically, the metal base island, serving as the mounting carrier for the semiconductor device 20, is made of a high thermal conductivity metal material. It provides a stable mounting reference for the MOS chip 21, NTC thermistor 22, and current sampling resistor 23, and also quickly conducts heat generated during device operation, laying the foundation for subsequent heat dissipation. The solder 50 uses highly conductive and thermally conductive solder or conductive adhesive to ensure reliable electrical connections between the semiconductor device 20 and the metal base island, preventing overheating or malfunctions caused by poor contact. Multiple MOS chips 21 can be flexibly configured according to actual power requirements. For example, four or six MOS chips 21 can be used to form a full-bridge topology circuit to achieve power conversion and control. One or more NTC thermistors 22 can be placed close to the MOS chip 21, capturing real-time temperature changes during chip operation. When the temperature exceeds a preset threshold, a timely feedback signal is provided and a protection mechanism is triggered to prevent chip damage due to overheating. One or more current sampling resistors 23 can be connected in series at the input or output of the power topology circuit, collecting the operating current in the circuit, facilitating subsequent circuit monitoring and control of the power module's operating status. The copper clip structure 30 is made of a single-piece stamped copper sheet. Its thickness and width can be designed according to the current, for example, by increasing it by 0.1mm-0.5mm. Compared with traditional bonding wires, the copper clip has a larger conductive cross-sectional area and lower resistance, which not only reduces conduction losses but also reduces parasitic inductance, suppresses voltage spikes and oscillations generated during module operation, and improves the module's operational stability. The molding compound 40 is made of high-temperature resistant and aging-resistant epoxy resin material, completely encapsulating all semiconductor devices 20 and the copper clip structure 30, providing dustproof, moisture-proof, and breakdown-proof protection. At the same time, its through-holes cooperate with the gull-wing pins 11 to ensure that the pins can extend smoothly and connect to the external PCB board. The groove structure design of the gull-wing pins 11 is designed to meet the requirements of automotive-grade AOI (Automated Optical Inspection), facilitating the inspection equipment to quickly identify the soldering status of the pins and reducing faults such as cold solder joints and missing solder joints. At the same time, the groove structure can also enhance the bonding force between the pins and the PCB board pads, simplifying the PCB board routing layout.

[0033] Understandably, this application integrates multiple MOS chips 21, NTC thermistors 22, and current sampling resistors 23 into the same package, improving integration and reducing PCB footprint. The copper clip structure 30 replaces traditional bonding wires, reducing parasitic inductance and conduction losses, and suppressing voltage spikes and oscillations. The lead frame 10, with its front-side components and rear-side heat dissipation structure, improves heat dissipation efficiency. The NTC thermistors 22 and current sampling resistors 23 enable real-time temperature and current monitoring, reducing the risk of chip overheating and burnout. The recessed structure of the gull-wing pins 11 meets automotive-grade AOI inspection requirements, simplifying the overall PCB routing design.

[0034] In one embodiment, the gull-wing pin 11 is bent toward the front of the molding compound 40 on the outside of the molding compound 40, and the groove structure surface on the side of the gull-wing pin 11 is provided with a tin-plated layer to form a wettable side edge.

[0035] Specifically, the three-dimensional welding contact surface formed by the side grooves, combined with the tin-plated layer covering the surface (not shown in the figure), not only enhances solder wettability by relying on the wettable side edges, ensuring the welding fit between the pins and the PCB board pads, but also uses the three-dimensional structure of the grooves to limit and fill the solder, further enhancing welding stability. At the same time, it provides a clearly identifiable welding area for AOI inspection, helping to accurately judge the welding quality. In addition, the design of the gull-wing pins 11 bending towards the front of the molding compound 40 not only adapts to the PCB board surface mount requirements, but more importantly, it guides the heat dissipation surface of the lead frame 10 to the back side opposite to the PCB board. Unlike the traditional single mode that relies solely on the PCB board for heat dissipation, the back side of the lead frame 10 can be directly attached to external heat dissipation structures (such as heat sinks, cooling pads, etc.) to achieve heat dissipation. At the same time, the bending design also reserves space for subsequent top heat dissipation structure, which can further optimize the overall heat dissipation performance. Together with the optimization of the welding structure, it can improve the automotive-grade reliability of the module.

[0036] Understandably, this application uses a pin bending design to ensure that the heat dissipation surface faces upwards during surface mounting, which, combined with the top heat dissipation structure, can further optimize the heat dissipation effect; the groove structure retains tin plating to form wettable side edges, which can ensure accurate identification of soldering quality during AOI inspection and meet automotive-grade reliability requirements.

[0037] In one embodiment, the plurality of metal base islands include a first metal base island 12, a second metal base island 13, and a third metal base island 14; the second metal base island 13 is located in the middle of the lead frame 10 and forms the source bus; the first metal base island 12 is located on both sides of the second metal base island 13 and is used to carry multiple MOS chips 21 and drain leads; the third metal base island 14 is located at the end of the lead frame 10 and is used for the power lead-out of the module negative terminal.

[0038] Reference Figure 3The metal base islands on the front of the lead frame 10 are arranged asymmetrically, forming a long strip shape to fit the internal space of the plastic package 40. The second metal base island 13, located in the middle, is distributed longitudinally (Y direction) along the long strip space. One end is T-shaped, and the other end is horizontally led out to the right. Its longitudinal main area serves as the source bus, used to concentrate and conduct the main current. Its surface has a reserved area for connection with the copper clip structure 30, facilitating electrical connection with the MOS chip 21. Its T-shaped lateral distribution structure serves as a metal support structure, leading out from one end of the lead frame 10 (+Y direction). The other end of the horizontal lead structure (+X and -Y directions) includes a source lead (relatively thick pin) and a signal test lead (relatively thin pin). On the left and right sides of the two metal base islands 13, there are first metal base islands 12 of different preset shapes. Two first metal base islands 12 of different areas are located on the left side (-X direction), and three first metal base islands 12 of basically the same size are located on the right side (X direction). Each metal island has a soldering area on its surface to support the MOS chip 21. The first metal base islands 12 also have reserved drain leads (relatively thick pins) for outputting drain signals. The third metal base island 14 is independently located at one end of the lead frame 10 (-X and -Y directions), with a size similar to the first metal base islands 12. It also has reserved power leads (relatively thick pins) and signal test leads (relatively thin pins) for the module's negative terminal. In addition, several small-current metal base islands 15 for small-current paths are also provided on the lead frame 10 for connecting small-current pins (such as the chip's drive control pins), as shown in the figure. Figure 1 and Figure 3 Each metal base island is separated by an insulating region to ensure electrical isolation, while the back of each metal base island can quickly conduct the heat generated by the semiconductor device 20 during operation.

[0039] Understandably, the partitioned design of the metal base island allows for differentiated functional layouts. The concentrated source and busbars carry the main current, which optimizes the current path and reduces parasitic parameters. The reasonable layout ensures that the drain and negative leads do not interfere with each other, thus improving the stability of the module's electrical performance.

[0040] In one embodiment, the copper clip structure 30 includes a source copper clip 31 and a gate copper clip 32; the source copper clip 31 is connected to the source region (upper surface of the chip +Z direction) of the MOS chip 21 through solder 50, and is used to carry the main power current and conduct heat; the gate copper clip 32 is connected to the gate region of the MOS chip 21 and the corresponding gate pin.

[0041] Reference Figure 1 , Figure 3 and Figure 4 ,in Figure 4The area within the dashed box represents the internal space of the molding compound 40. The cross-sectional view at AA' in the figure is similar to... Figure 1 Correspondingly, in one embodiment, the source copper clip 31 includes a first copper clip 311 and a second copper clip 322, and is provided with 6 MOS chips 21. The 6 MOS chips 21 are divided into two groups according to their functions, with 3 chips in each group corresponding to the upper and lower arms of the power topology circuit, respectively, to realize the conversion and control of electrical energy. The 3 MOS chips 21 in the upper arm group are all fixed on the first metal base island 12 on the left side of the lead frame 10, and the 3 MOS chips 21 in the lower arm group are all fixed on the first metal base island 12 on the right side. The two groups of chips are distributed left and right. The 6 MOS chips 21 each include a gate, a source, and a drain. The source of the MOS chip 21 in the upper arm group and the drain of the MOS chip 21 in the lower arm group are connected through the first copper clip 311, and the source of the MOS chip 21 in the lower arm group is connected to the second metal base island 13 through the second copper clip 322. The current sampling resistor 23 is connected across the second metal base island 13 and the third metal base island 14, and is connected in series between the source bus of the lower bridge arm group and the negative terminal of the module.

[0042] Understandably, the source copper clip 31 enables accurate connection of the upper and lower bridge arm MOS chips 21 and source bus, constructing a complete full-bridge topology circuit. The bus design can shorten the current path, further reduce parasitic inductance and loss, and improve the module switching performance. The current sampling resistor 23 is connected in series at the key node of the main power circuit, which can accurately collect the circuit current without the need to set an additional sampling resistor on the PCB, reducing the PCB board area and simplifying the circuit design.

[0043] Reference Figure 4 In one embodiment, the MOS chip 21 of the upper bridge arm group is a four-terminal device, and the MOS chip 21 of the upper bridge arm group is a three-terminal device. In addition to the gate, source and drain, the MOS chip 21 of the upper bridge arm group also includes a driving source. The copper clip structure 30 also includes a driving source copper clip 33, and the driving source is led out through the driving source copper clip 33.

[0044] Specifically, the upper bridge arm MOS chip 21, as a key control terminal of the power topology, directly affects the chip's switching characteristics and the overall module performance due to the stability of its drive signal. Adding an independent drive source, led out through a dedicated drive source copper clip 33, isolates the drive circuit from the main power circuit. The large current in the main power circuit generates strong electromagnetic interference. If the drive source and main power source share the same lead-out path, interference signals will intrude into the drive circuit, causing drive signal distortion and delay, affecting the turn-on and turn-off timing of the MOS chip 21, and even causing module failure. The independent drive source copper clip 33 provides a dedicated conduction path for the drive signal, preventing interference from the main power circuit. The lower bridge arm MOS chip 21, on the other hand, does not require complex drive isolation and can meet operational requirements using a conventional three-terminal structure (gate, source, drain). This differentiated design ensures the drive stability of the upper bridge arm while simplifying the lower bridge arm structure and controlling costs, achieving a balance between performance and cost.

[0045] Understandably, the independent lead-out of the drive source of the four-terminal MOS chip 21 can avoid mutual interference between the drive circuit and the main power circuit, improve the stability and reliability of the drive signal, and optimize the chip's switching characteristics.

[0046] Reference Figure 4 In one embodiment, the NTC thermistor 22 is disposed between adjacent MOS chips 21 in the lower bridge arm group and connected to a pair of independent temperature signal pins; the NTC thermistor 22 and the current sampling resistor 23 are spaced apart by the first metal base island 12.

[0047] Specifically, the NTC thermistor 22 can be placed between adjacent MOS chips 21 in the upper bridge arm or between adjacent MOS chips 21 in the lower bridge arm. In this embodiment, placing it in the lower bridge arm can make reasonable use of the layout space, while taking into account the rationality of detection and the optimization of the overall structure. The MOS chips 21 in the lower bridge arm are three-terminal devices. Compared with the four-terminal MOS chips 21 in the upper bridge arm (which require additional space to be reserved for the connection of the drive source copper clip 33), the layout space between adjacent MOS chips 21 in the lower bridge arm is more abundant. Placing the NTC thermistor 22 here does not require additional redundant space inside the module. It can make full use of the existing gaps, prevent device interference caused by space congestion, and also simplify the routing layout of the copper clip and pins, optimizing the integration. Furthermore, both the lower arm MOS chip 21 and the upper arm MOS chip 21 are the main heat-generating devices in the power topology. Placing the NTC between adjacent MOS chips in the lower arm allows for close proximity to the heat source, enabling accurate temperature detection while balancing space utilization and detection performance. Connecting to an independent temperature signal pin isolates the temperature detection signal from the main power circuit and drive circuit, preventing electromagnetic interference from other circuits and ensuring accurate temperature data transmission. Simultaneously, both the NTC thermistor 22 and the current sampling resistor 23 are sensitive devices; the former is responsible for temperature detection, and the latter for current sampling. Separated by the first metal base island 12, the structure of the metal base island reduces signal interference and heat conduction between the two, preventing heat or electromagnetic signals generated by one from affecting the detection accuracy of the other, ensuring stable operation of both.

[0048] Understandably, the NTC thermistor 22 is positioned close to the MOS chip 21 for more accurate temperature detection, and its independent pins ensure interference-free transmission of the temperature signal. The spacing design between it and the current sampling resistor 23 reduces mutual interference and ensures the stable implementation of their respective functions.

[0049] In one embodiment, the semiconductor device 20 is soldered to the lead frame 10 by solder 50. The lead frame 10 is made of copper or a copper alloy, and a silver plating layer or a nickel plating layer is partially disposed on the surface of the lead frame 10.

[0050] Specifically, the local silver or nickel plating layers are mainly applied to the areas on the lead frame 10 where it is soldered to the semiconductor device 20. These include the soldering areas on the metal substrate island that support the MOS chip 21, the NTC thermistor 22, and the current sampling resistor 23, as well as the areas where the copper clips connect to the lead frame 10. Soldering with solder 50 enables the semiconductor device 20 to form a reliable connection with low contact resistance and high thermal conductivity with the lead frame 10. The copper or copper alloy material ensures excellent electrical conductivity and heat dissipation. Local silver or nickel plating improves solder wettability, enhances soldering strength, and prevents oxidation and corrosion of the copper substrate, ensuring long-term stability and extending the module's lifespan.

[0051] Reference Figure 5 This application also provides a method for manufacturing a power module packaging structure, applicable to the power module packaging structure in any of the above embodiments, comprising the following steps: S1. Provide lead frame 10 and print solder (50). S2. Mount multiple MOS chips 21, NTC thermistors 22, and current sampling resistors 23 to the preset positions on the front side of the lead frame 10. S3. Print (50) on the surface of MOS chip 21 and place copper clip structure 30; S4. Perform reflow soldering to form electrical and mechanical connections; S5. Perform plastic sealing to form a sealed body 40; S6. Electroplating and bead cutting are performed on the pins, and a groove structure is formed on the side of the pins during the bead cutting process.

[0052] Specifically, the lead frame 10 provided in step S1 is a pre-stamped copper or copper alloy frame, comprising a first metal base island 12, a second metal base island 13, a third metal base island 14, a low-current metal base island 15, and corresponding pin structures. Solder 50 is printed on the metal base islands and corresponding chip areas to provide a conductive bonding medium for subsequent device mounting and soldering. In step S2, the MOS chip 21, NTC thermistor 22, and current sampling resistor 23 are mounted to the preset positions of the corresponding metal base islands according to the layout requirements. The MOS chips 21 of the upper and lower bridge arms are mounted in separate areas. The NTC thermistor 22 is arranged between adjacent MOS chips 21 of the lower bridge arm. The current sampling resistor 23 and the NTC thermistor 22 are spaced apart to achieve pre-positioning of the devices. In step S3, solder 50 is printed again on the corresponding areas of the source and gate of the MOS chip 21, and the drive source copper clip 33, power copper clip, and other structures are placed at the corresponding electrode positions to form a pre-connection between the copper clips and the MOS chip 21 and the lead frame 10. Step S4 involves reflow soldering to melt and solidify the solder 50, achieving electrical connection and mechanical fixation between the chip and the metal substrate island, the copper clip and the chip, and the lead frame 10 in one step, ensuring connection strength and conductivity reliability. Step S5 uses epoxy resin or other molding materials to encapsulate the soldered components, covering the internal devices and the copper clip structure 30, allowing only the leads to protrude from the pre-set through holes. Step S6 performs surface electroplating on the leads protruding from the encapsulation body 40, and then processes the leads into a gull-wing shape through a lead-cutting and forming process. Simultaneously, a groove structure is pressed onto the side of the lead, achieving integrated shape processing and structural forming. The groove is formed by half-cutting or stamping, and the tin plating layer is formed by chemical plating or electroplating after lead cutting.

[0053] Understandably, by adopting the above method, a standardized and mass-producible manufacturing process adapted to all-in-one power module packaging is provided. The steps are clear and controllable, highly compatible with traditional power semiconductor packaging processes, and easy to achieve industrialization. The reflow soldering process ensures reliable electrical and mechanical connections between multiple MOS chips 21, NTC thermistors 22, current sampling resistors 23 and lead frames 10, as well as between copper clips and MOS chips 21, guaranteeing the stability of the module's electrical performance. The side groove structure is formed simultaneously in the lead cutting and forming process, eliminating the need for additional processing steps, improving production efficiency, and ensuring the consistency of the groove structure formation. This lays the technological foundation for subsequent lead tin plating and the formation of wettable side edges, meeting automotive-grade AOI inspection requirements.

[0054] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A power module packaging structure, characterized in that, include: A lead frame (10) comprising a plurality of metal base islands and a plurality of pins; A semiconductor device (20) is disposed on the front side of the lead frame (10) and soldered to the metal base island by solder (50). It includes multiple MOS chips (21), at least one NTC thermistor (22), and at least one current sampling resistor (23). The multiple MOS chips (21) form a power topology circuit, the NTC thermistor (22) is used to detect the internal temperature of the module, and the current sampling resistor (23) is connected in series in the power topology circuit. A copper clip structure (30) is disposed on the front side of the MOS chip (21) for electrically connecting the MOS chip (21) to the corresponding pins of the lead frame (10) or adjacent chips. A molding compound (40) is disposed on the front side of the lead frame (10) for covering the semiconductor device (20) and has through holes for the leads of the lead frame (10) to extend out. The back of the lead frame (10) is used for heat dissipation. The pins of the lead frame (10) are gull-wing pins (11), and the gull-wing pins (11) have a groove structure on the side after extending out of the encapsulation body (40).

2. The power module packaging structure according to claim 1, characterized in that, The gull-wing pin (11) is bent toward the front of the encapsulation body (40) from the outside. The groove structure surface on the side of the gull-wing pin (11) is provided with a tin-plated layer to form a wettable side edge.

3. The power module packaging structure according to claim 1, characterized in that, The plurality of metal base islands include a first metal base island (12), a second metal base island (13), and a third metal base island (14); the second metal base island (13) is located in the middle of the lead frame (10) and forms a source bus; the first metal base island (12) is located on both sides of the second metal base island (13) and is used to carry the plurality of MOS chips (21) and drain leads; the third metal base island (14) is located at the end of the lead frame (10) and is used for the power lead-out of the module negative electrode.

4. The power module packaging structure according to claim 3, characterized in that, The copper clip structure (30) includes a source copper clip (31) and a gate copper clip (32); the source copper clip (31) is connected to the source region of the MOS chip (21) and is used to carry the main power current and conduct heat; the gate copper clip (32) is connected to the gate region of the MOS chip (21) and the corresponding gate pin.

5. The power module packaging structure according to claim 4, characterized in that, The source copper clip (31) includes a first copper clip (311) and a second copper clip (322). The multiple MOS chips (21) are divided into an upper bridge arm group and a lower bridge arm group. Each MOS chip (21) in the upper bridge arm group is connected to the corresponding MOS chip (21) in the lower bridge arm group, and each includes a gate, a source and a drain. The source of the MOS chip (21) in the upper bridge arm group and the drain of the MOS chip (21) in the lower bridge arm group are connected through the first copper clip (311). The source of the MOS chip (21) in the lower bridge arm group is connected to the second metal base island (13) through the second copper clip (322).

6. The power module packaging structure according to claim 5, characterized in that, The current sampling resistor (23) is connected across the second metal base island (13) and the third metal base island (14), and is connected in series between the source bus and the negative terminal of the lower bridge arm assembly.

7. The power module packaging structure according to claim 5, characterized in that, The MOS chip (21) of the upper bridge arm group is a four-terminal device and also includes a driving source. The copper clip structure (30) also includes a driving source copper clip (33), and the driving source is led out through the driving source copper clip (33).

8. The power module packaging structure according to claim 5, characterized in that, The NTC thermistor (22) is disposed between adjacent MOS chips (21) in the lower bridge arm group and connected to a pair of independent temperature signal pins; the NTC thermistor (22) and the current sampling resistor (23) are spaced apart by the first metal base island (12).

9. The power module packaging structure according to claim 1, characterized in that, The semiconductor device (20) is soldered to the lead frame (10) by solder (50). The material of the lead frame (10) includes copper or copper alloy, and the surface of the lead frame (10) is partially provided with a silver plating layer or a nickel plating layer.

10. A method for manufacturing a power module packaging structure, applied to the power module packaging structure as described in any one of claims 1-9, characterized in that, Includes the following steps: S1. Provide lead frame (10) and print solder (50); S2. Mount multiple MOS chips (21), NTC thermistors (22), and current sampling resistors (23) to the preset positions on the front of the lead frame (10); S3. Print solder (50) on the surface of the MOS chip (21) and place copper clip structure (30). S4. Perform reflow soldering to form electrical and mechanical connections; S5. Perform plastic sealing to form a plastic seal (40). S6. Electroplating and bead cutting are performed on the pins, and a groove structure is formed on the side of the pins during the bead cutting process.

Images