High-voltage superfast rectifier tube

CN123022261APending Publication Date: 2026-10-30SICHUAN SHUNXIN SEMICONDUCTOR TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202611171655.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-04
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

[0002]当前商用SF系列超快速整流管为行业通用贴片整流器件,其重复峰值反向崩溃电压最高仅能做到600V~800V,无法满足电力直流输电、医疗高压影像设备、激光器、轨道交通牵引电源等1000V以上高压设备的使用需求

Benefits of technology

本发明通过第一二极管芯片、第二二极管芯片两颗600V~700V芯片串联,整体耐压提升至1200V~1400V,反向恢复时间控制在35ns以内,填补现有SF系列最高仅600~800V耐压的产品空白,适配1000V以上各类高压设备。

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Abstract

This invention provides a high-voltage ultrafast rectifier for use in the field of rectifier diodes, comprising a package housing, a lead frame, a first diode chip, a second diode chip, and a Zener voltage regulator chip; the first and second diode chips have a withstand voltage of 600 to 700 volts, and the overall withstand voltage after being connected in series can reach 1200 to 1400 volts, with an ultrafast recovery time controlled within 35 nanoseconds; relying on the reverse breakdown characteristics of the Zener diode, the device can automatically switch between three rectification modes: low-voltage single diode, high-frequency fast recovery, and high-voltage series. This invention abandons traditional wire bonding, eliminates the hidden danger of high-voltage electric field concentration, and improves long-term reliability; it uses only passive bare dies, resulting in a more flexible package layout and lower mass production costs, solving the defect of existing SF series rectifier diodes with a withstand voltage of less than 800 volts, and is suitable for miniaturized equipment at the kilovolt level in medical, rail transportation, and high-voltage power supplies.
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Description

Technical Field

[0001] This application relates to the field of rectifier tubes, and in particular to a high-voltage ultra-fast rectifier tube. Background Technology

[0002] Currently, commercially available SF series ultrafast rectifier diodes are industry-standard surface-mount rectifier devices, and their repetitive peak reverse breakdown voltage can only reach a maximum of 600V to 800V, which cannot meet the usage requirements of high-voltage equipment above 1000V, such as DC power transmission, medical high-voltage imaging equipment, lasers, and rail transit traction power supplies.

[0003] The existing SF series products only have a single rectifier die inside, and the function is limited; the few dual-chip series SOT-23 rectifier devices on the market use the traditional wire bonding interconnection structure, and can only rely on external PCB wiring to manually switch the working mode. They cannot adaptively switch between high and low voltage rectification conditions according to the reverse voltage of the circuit.

[0004] Therefore, a high-voltage ultra-fast rectifier tube is proposed to solve the above problems. Summary of the Invention

[0005] The purpose of this application is to provide a high-voltage ultra-fast rectifier tube, which is designed to meet the current high voltage requirements of 600-800V and cannot be adapted to kilovolt-level high voltage scenarios. Compared with the existing technology, it includes a package housing, a lead frame, a first diode chip, a second diode chip, and a Zener voltage regulator chip. The package housing is of SOT-23 specification, and the lead frame is housed inside the package housing; the lead frame is provided with a first power base island, a second power base island and an independent intermediate inner pin segment that are mutually insulated and separated; the package housing extends outward to form a first pin, a second pin and a third pin, the first power base island is electrically connected to the first pin, the second power base island is electrically connected to the third pin, and the intermediate inner pin segment is electrically connected to the second pin; The cathode electrode on the back of the first diode chip is fixed to the first power base island by a conductive adhesive layer. The front of the first diode chip is provided with an anode pad. The anode pad is made of metal bumps and directly interconnected with the middle inner pin segment by reflow soldering. The second diode chip and the Zener voltage regulator chip are jointly mounted flat on the second power base island; the cathode electrode on the back of the second diode chip is connected to the second power base island, and metal bumps are prepared on the anode pad on the front of the second diode chip and reflow soldered to the middle inner lead segment; The back cathode of the Zener voltage regulator chip is connected to the second power base island at the same potential. The front anode pad of the Zener voltage regulator chip is provided with metal bumps and is connected backflow to the front anode pad of the second diode chip, so that the Zener voltage regulator chip is connected in reverse parallel across the two ends of the second diode chip. The first pin is the device's total input terminal, the third pin is the device's total output terminal, and the second pin forms the middle tap terminal of the series node. Relying on the reverse breakdown characteristics of the Zener voltage regulator chip and the combination of the three sets of pins in pairs, three adaptive working modes are realized: low-voltage single-tube ordinary rectification, high-frequency single-tube ultra-fast rectification, and high-voltage dual-tube series rectification.

[0006] Furthermore, the first diode chip is a high-voltage ordinary rectifier silicon die, i.e., an STD chip, with a single repetitive peak reverse withstand voltage of 600V to 700V; the second diode chip is a high-voltage ultra-fast recovery silicon die, i.e., a SKY chip, with a single repetitive peak reverse withstand voltage of 600V to 700V and a reverse recovery time of no more than 35ns; when the two are connected in series and superimposed, the overall withstand voltage of the device reaches 1200V to 1400V.

[0007] Furthermore, the metal bumps are copper pillar bumps or tin bumps; the conductive adhesive layer is a conductive silver paste layer, and the thickness of the conductive silver paste layer is controlled between 0.015mm and 0.02mm, simultaneously realizing the conductive connection, mechanical fixation, and heat conduction of the back electrode of the chip.

[0008] Furthermore, the first power base island and the second power base island of the lead frame are separated from each other, and the space between the two power base islands is filled with high CTI tracking-resistant epoxy molding compound to form an insulating isolation layer, which meets the long-term high voltage insulation requirements of 1200V to 1400V; the package shell is integrally injection molded from the same high CTI epoxy molding compound.

[0009] Furthermore, the Zener voltage regulator chip is a small-signal silicon voltage regulator die, and the reverse breakdown voltage of the Zener voltage regulator chip is 1200V~1400V. When the reverse voltage between the first pin and the third pin is lower than the breakdown voltage, the Zener voltage regulator chip is reverse cut off, and only the first diode chip participates in rectification independently. When the reverse voltage is higher than the breakdown voltage, the Zener voltage regulator chip is reverse broken down and turned on, and the first diode chip and the second diode chip are connected in series and participate in high-voltage rectification synchronously.

[0010] Furthermore, the three adaptive operating modes of the device are as follows: When the first pin and the second pin are externally connected and conducting, only the first diode chip is working, realizing low-voltage, low-loss ordinary rectification. When the second and third pins are externally connected and conducting, only the second diode chip is put into operation, utilizing its ≤35ns reverse recovery characteristic to achieve high-frequency ultra-fast rectification; When the first and third pins are externally connected, the single-chip operation or dual-chip series operation is automatically switched according to the high or low reverse voltage of the circuit to achieve 1200V~1400V high voltage adaptive rectification.

[0011] Furthermore, the device's electrical parameters meet the following requirements: rated average forward rectified current 5A, 8.3ms single half-wave peak surge current 125A, forward voltage drop under rated operating conditions not exceeding 1.90V; reverse leakage current I at 25℃ rated blocking voltage. R ≤5μA, device operating junction temperature range -55℃ to +150℃.

[0012] Furthermore, the first diode chip, the second diode chip, and the Zener voltage regulator chip are all arranged in a single layer; the minimum isolation distance between the edge of each chip and the adjacent metal structure is ≥0.12mm.

[0013] Compared to existing technologies, the advantages of this application are: This invention uses two 600V-700V chips connected in series, a first diode chip and a second diode chip, to increase the overall withstand voltage to 1200V-1400V, and control the reverse recovery time to within 35ns. It fills the gap in the existing SF series products with a maximum withstand voltage of only 600-800V, and is suitable for various high voltage equipment above 1000V.

[0014] All components adopt a metal bump recirculation interconnect structure, eliminating the traditional suspended lead bonding structure and eradicating defects such as lead electric field concentration and cross insulation. The lead frame is set with independent first power base islands and second power base islands, combined with an insulating isolation layer and a high CTI plastic encapsulation material for the package. It can withstand long-term aging at 1400V without leakage current breakdown, greatly improving high-voltage reliability. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of this application; Figure 2 This is a schematic diagram of the exploded structure of this application; Figure 3 This is a schematic diagram of the overall structure of the lead frame proposed in this application; Figure 4 This is an exploded structural diagram of the lead frame proposed in this application; Figure 5 This is a circuit diagram of this application.

[0016] Explanation of the labels in the diagram: 1. Package housing; 11. First pin; 12. Second pin; 13. Third pin; 2. First diode chip; 3. Second diode chip; 4. Zener voltage regulator chip; 5. Metal bumps; 6. Lead frame; 61. First power base island; 62. Second power base island; 63. Middle inner lead segment; 64. Insulating layer. Detailed Implementation

[0017] The embodiments will be described clearly and completely with reference to the accompanying drawings. All other embodiments obtained by those skilled in the art based on the embodiments in this application without creative effort are within the scope of protection of this application.

[0018] Example: This invention provides a high-voltage ultrafast rectifier tube; please refer to [link / reference]. Figure 1 - Figure 5 The external support structure of this application is a package housing 1. The package housing 1 adopts the standard SOT-23 external dimensions: the total length of the package housing 1 is 2.90mm to 3.04mm, the total width of the package housing 1 is 1.30mm to 1.40mm, and the overall plastic encapsulation thickness of the package housing 1 is 1.00mm to 1.10mm. The outer side of the package housing 1 is integrally formed with a first pin 11, a second pin 12, and a third pin 13. The first pin 11, the second pin 12, and the third pin 13 are standard surface mount pins that can be directly matched with SOT-23 specification PCB pads.

[0019] The lead frame 6 is housed in the internal cavity of the package housing 1. The lead frame 6 is integrally stamped from a copper alloy material with a thickness of 0.15mm. The lead frame 6 is divided into three metal structures that are physically isolated from each other and completely electrically insulated, namely the first power base island 61, the second power base island 62, and the middle inner lead segment 63. The first power base island 61 of the lead frame 6 is integrally connected to the first pin 11 on the outside of the package housing 1, the second power base island 62 of the lead frame 6 is integrally connected to the third pin 13 on the outside of the package housing 1, and the middle inner pin segment 63 of the lead frame 6 is integrally connected to the second pin 12 on the outside of the package housing 1.

[0020] A 0.18mm isolation gap is reserved between the first power base island 61 and the second power base island 62 of the lead frame 6. The gap is filled with a high CTI-resistant epoxy molding compound to form an insulating isolation layer 64. The CTI value of the insulating isolation layer 64 is not less than 600V, and it can withstand 1400V DC high voltage for a long time without surface leakage or tracking defects.

[0021] The total net planar area inside the lead frame 6 for mounting semiconductor chips is 1.05 mm²; the first diode chip 2, the second diode chip 3, and the Zener voltage regulator chip 4 are all laid out in a single layer without any chip stacking structure; the minimum straight-line distance between the chip edge of each of the first diode chip 2, the second diode chip 3, and the Zener voltage regulator chip 4 and any metal structure of the lead frame 6 is uniformly controlled at 0.15 mm, which is greater than the minimum insulation distance of 0.12 mm specified in the claims, thus completely eliminating defects such as plastic encapsulation voids and local electric field concentration.

[0022] The mounting and interconnection structure of the first diode chip 2: The first diode chip 2 is an STD high-voltage ordinary rectified silicon die with a single repetitive peak reverse withstand voltage of 650V; the overall length and width of the first diode chip 2 are 0.54mm × 0.54mm, and the silicon substrate thickness is 0.12mm; a cathode electrode is set on the back of the first diode chip 2, and the back cathode electrode of the first diode chip 2 is completely mounted and fixed to the first power base island 61 of the lead frame 6 through a conductive adhesive layer with a thickness of 0.018mm, so as to achieve permanent electrical connection between the cathode electrode of the first diode chip 2, the first power base island 61, and the first pin 11. The front side of the first diode chip 2 is provided with an anode aluminum pad. Metal bumps 5 are prepared on the surface of the anode aluminum pad on the front side of the first diode chip 2. The metal bumps 5 are tin bumps with a thickness of 20μm. The metal bumps 5 are directly pressed and attached to the middle inner pin segment 63 of the lead frame 6 by a 260℃ reflow soldering process, so as to realize the electrical interconnection between the anode of the first diode chip 2 and the middle inner pin segment 63 and the second pin 12. This interconnection structure has no floating lead bonding wires throughout the entire process.

[0023] The second diode chip 3 is a SKY high-voltage ultra-fast recovery silicon die with a single-chip repetitive peak reverse withstand voltage of 650V and a measured reverse recovery time t. rr =30ns; The overall dimensions of the second diode chip 3 are 0.54mm × 0.54mm, and the silicon substrate thickness is 0.12mm; A cathode electrode is set on the back of the second diode chip 3, and the cathode electrode on the back of the second diode chip 3 is completely mounted on the second power base island 62 of the lead frame 6. The cathode electrode of the second diode chip 3 is at the same potential as the second power base island 62 and the third pin 13. An anode aluminum pad is set on the front of the second diode chip 3, and a metal bump 5 is prepared on the surface of the anode aluminum pad on the front of the second diode chip 3. The metal bump 5 is a tin bump; The metal bump 5 is reflow soldered to the middle inner pin segment 63 of the lead frame 6 to realize the electrical connection between the anode of the second diode chip 3 and the middle inner pin segment 63 and the second pin 12.

[0024] The Zener voltage regulator chip 4 is a small-signal silicon voltage regulator die with a reverse breakdown voltage of 600V. The overall dimensions of the Zener voltage regulator chip 4 are 0.24mm × 0.24mm, and the silicon substrate thickness is 0.10mm. The Zener voltage regulator chip 4 and the second diode chip 3 are co-mounted side-by-side on the second power base island 62 of the lead frame 6. A cathode electrode is located on the back of the Zener voltage regulator chip 4, and the back cathode electrode of the Zener voltage regulator chip 4 is attached to the second power base island 62. The cathode of the Zener voltage regulator chip 4 shares the same potential as the cathode of the second diode chip 3 and its third pin 13. An anode aluminum pad is located on the front of the Zener voltage regulator chip 4. Metal bumps 5 are fabricated on the front anode aluminum pad of the Zener voltage regulator chip 4 and directly reflow soldered to the front anode aluminum pad of the second diode chip 3, so that the Zener voltage regulator chip 4 is completely reverse-parallel connected across the two ends of the second diode chip 3.

[0025] The molding process of this application includes the following steps: S1. The lead frame 6 is integrally stamped and pre-treated with nickel plating on the metal surface; S2. Apply conductive adhesive layer to the surface of the first power base island 61 and the second power base island 62, and then attach the first diode chip 2, the second diode chip 3, and the Zener voltage regulator chip 4 in sequence. Then, cure the conductive adhesive layer at high temperature. S3. Prepare metal bumps 5 on the front anode pads of the first diode chip 2, the second diode chip 3, and the Zener voltage regulator chip 4. Complete the reflow soldering of the metal bumps 5 with the middle inner lead segment 63 and the anode pad of the second diode chip 3 to achieve leadless interconnection of the entire chip. S4. The high CTI-resistant epoxy molding compound with the same specifications as the insulating isolation layer 64 is used for high-temperature injection molding of the integrated packaging shell 1. The epoxy molding compound completely fills the isolation gap between the first power base island 61 and the second power base island 62, and all gaps between each chip and the lead frame 6, eliminating air voids inside the packaging shell 1. S5. The lead wire cutting process removes excess connecting ribs from the lead frame 6, and electroplats pure tin onto the first pin 11, the second pin 12, and the third pin 13, and then bends the pins into shape. S6. Perform electrical sorting, high and low temperature aging, and withstand voltage reliability tests on the finished high voltage ultra-fast rectifier tubes to screen qualified finished products.

[0026] The first diode chip 2 and the second diode chip 3 of this application have a single repetitive peak reverse withstand voltage of 650V. When the two are connected in series, the overall device has a repetitive peak reverse withstand voltage of 1300V, a DC blocking voltage of 1300V, and a rated root mean square voltage of 910V. Current parameters: Rated average forward rectified current 5A, 8.3ms single half-wave peak surge current 125A; Forward voltage drop parameter: The maximum instantaneous forward voltage drop under a 5A rated operating current is not higher than 1.90V; Reverse leakage current parameter: Reverse leakage current I at rated blocking voltage 25℃ R =3.2μA≤5μA, reverse leakage current I at 125℃ high temperature environment R =42μA≤50μA; Dynamic electrical parameters: reverse recovery time t rr =30ns≤35ns, typical junction capacitance CJ=30pF Thermal and temperature parameters: Typical thermal resistance R θ JA=30℃ / W, the device's operating junction temperature range and storage temperature range are both -55℃ to +150℃.

[0027] This application has the following working modes: Mode 1: Low-voltage, low-loss ordinary rectification mode. The external circuit connects the first pin 11 and the second pin 12 to each other. Under this condition, only the first diode chip 2 is connected to the power circuit, while the second diode chip 3 and the Zener voltage regulator chip 4 do not participate in conduction. The conduction loss is low, which is suitable for low-voltage DC rectification scenarios.

[0028] Mode 2: High-frequency ultra-fast rectification mode. The external circuit connects the second pin 12 and the third pin 13 to each other. In this mode, only the second diode chip 3 works independently. High-frequency rectification is achieved by relying on the reverse recovery characteristic of the second diode chip 3, which is less than or equal to 35ns. The Zener regulator chip 4 is connected in parallel across the two ends of the second diode chip 3. There is no reverse breakdown during the forward conduction phase, so it does not interfere with the high-frequency rectification performance.

[0029] Mode 3: 1200V~1400V High Voltage Adaptive Rectification Mode. The external circuit connects pin 11 and pin 13 to each other, resulting in two voltage operating states: When the reverse voltage of the circuit is lower than the breakdown threshold of the Zener regulator chip 4500V~700V, the Zener regulator chip 4 is reverse cut off and in a high-resistance isolation state, and only the first diode chip 2 independently undertakes the rectification work, resulting in lower conduction loss under light load and high voltage conditions. When the reverse voltage of the circuit is higher than the breakdown threshold of the Zener voltage regulator chip 4500V~700V: the Zener voltage regulator chip 4 breaks down and conducts in reverse, the second diode chip 3 is simultaneously connected to the power circuit, the first diode chip 2 and the second diode chip 3 are connected in series to divide the voltage, and the overall withstand voltage of the device reaches 1200V~1400V; the entire process relies solely on the passive characteristics of the Zener voltage regulator chip 4 to automatically switch the operating conditions without the need for external control circuit intervention.

[0030] The highest repetitive peak reverse withstand voltage of the existing SF series ultrafast rectifier diodes is only 600-800V. In this embodiment, the first diode chip 2 and the second diode chip 3 are connected in series to achieve an overall withstand voltage of 1300V, which meets the requirements of high voltage equipment above 1000V. This application employs a high-voltage insulation structure consisting of a lead frame 6 for dual-power base island isolation, metal bumps 5 for leadless interconnection, and an insulating isolation layer 64. It can maintain a high voltage resistance without leakage breakdown failure for an extended period at 1400V. Traditional wire-bonded series devices have a high-voltage failure rate exceeding 90% under the same testing conditions. A single package housing 1, lead frame 6, first diode chip 2, second diode chip 3, and Zener voltage regulator chip 4 can simultaneously achieve three types of rectification functions, eliminating the need for power supply and drive wiring, thus improving packaging yield and significantly reducing material and packaging / testing costs. Relying on the breakdown characteristics of the Zener voltage regulator chip 4, it passively and automatically switches operating conditions without external control signals. Through the series connection of two 600-700V chips (first diode chip 2 and second diode chip 3), the overall withstand voltage is increased to 1200V-1400V, with a reverse recovery time controlled within 35ns. This fills the gap in existing SF series products with a maximum withstand voltage of only 600V-800V, and is compatible with various high-voltage equipment above 1000V.

[0031] The above description is merely the best implementation method adopted in light of current practical needs, but the scope of protection of this application is not limited thereto.

Claims

1. A high-voltage ultrafast rectifier tube, characterized in that, Includes a package housing (1), a lead frame (6), a first diode chip (2), a second diode chip (3), and a Zener voltage regulator chip (4). The package housing (1) is of SOT-23 specification, and the lead frame (6) is housed inside the package housing (1); the lead frame (6) is provided with a first power base island (61), a second power base island (62) and an independent intermediate inner pin segment (63) that are mutually insulated and separated; the package housing (1) extends outward to form a first pin (11), a second pin (12) and a third pin (13), the first power base island (61) is electrically connected to the first pin (11), the second power base island (62) is electrically connected to the third pin (13), and the intermediate inner pin segment (63) is electrically connected to the second pin (12); The cathode electrode on the back of the first diode chip (2) is fixed to the first power base island (61) by a conductive adhesive layer. The front of the first diode chip (2) is provided with an anode pad. The anode pad is made of metal bumps (5) and directly interconnected with the middle inner pin segment (63) by reflow soldering. The second diode chip (3) and the Zener voltage regulator chip (4) are jointly mounted on the second power base island (62); the cathode electrode on the back of the second diode chip (3) is connected to the second power base island (62), and the metal bump (5) is prepared on the anode pad on the front of the second diode chip (3) and reflow soldered to the middle inner lead segment (63). The back cathode of the Zener voltage regulator chip (4) is connected to the second power base island (62) at the same potential. The front anode pad of the Zener voltage regulator chip (4) is provided with metal bumps (5) and is connected back to the front anode pad of the second diode chip (3), so that the Zener voltage regulator chip (4) is connected in reverse parallel across the two ends of the second diode chip (3). The first pin (11) is the device's total input terminal, the third pin (13) is the device's total output terminal, and the second pin (12) forms the intermediate tap terminal of the series node. Relying on the reverse breakdown characteristics of the Zener voltage regulator chip (4) and the combination of the three sets of pins in pairs, three adaptive working modes are realized: low-voltage single tube ordinary rectification, high-frequency single tube ultra-fast rectification, and high-voltage dual tube series rectification.

2. The high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The first diode chip (2) is a high-voltage ordinary rectifier silicon die, i.e., STD chip, with a single repetitive peak reverse withstand voltage of 600V to 700V; the second diode chip (3) is a high-voltage ultra-fast recovery silicon die, i.e., SKY chip, with a single repetitive peak reverse withstand voltage of 600V to 700V and a reverse recovery time of no more than 35ns; after the two are connected in series and superimposed, the overall withstand voltage of the device reaches 1200V to 1400V.

3. A high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The metal bump (5) is a copper pillar bump or a tin bump; the conductive adhesive layer is a conductive silver paste layer, and the thickness of the conductive silver paste layer is controlled between 0.015mm and 0.02mm, so as to simultaneously realize the conductive connection and mechanical fixation of the back electrode of the chip and the heat conduction.

4. A high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The first power base island (61) and the second power base island (62) of the lead frame (6) are separated from each other. The two power base islands are filled with high CTI tracking-resistant epoxy molding compound to form an insulating isolation layer (64) to meet the long-term high voltage insulation requirements of 1200V to 1400V. The encapsulation shell (1) is integrally injection molded from the same high CTI epoxy molding compound.

5. A high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The Zener voltage regulator chip (4) is a small-signal silicon voltage regulator die. The reverse breakdown voltage of the Zener voltage regulator chip (4) is 500V~700V. When the reverse voltage between the first pin (11) and the third pin (13) is lower than the breakdown voltage, the Zener voltage regulator chip (4) is reverse cut off, and only the first diode chip (2) participates in rectification independently. When the reverse voltage is higher than the breakdown voltage, the Zener voltage regulator chip (4) is reverse broken down and turned on, and the first diode chip (2) and the second diode chip (3) are connected in series and participate in high voltage rectification synchronously.

6. A high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The three adaptive operating modes of the device are as follows: When the first pin (11) and the second pin (12) are externally connected, only the first diode chip (2) is put into operation to achieve low-voltage, low-loss ordinary rectification; When the second pin (12) and the third pin (13) are externally connected, only the second diode chip (3) is put into operation, and its reverse recovery characteristic of ≤35ns is used to realize high-frequency ultra-fast rectification; When the first pin (11) and the third pin (13) are connected to the external circuit, the single chip can be switched to work or the two chips can be connected in series according to the high or low reverse voltage of the circuit, so as to realize the 1200V~1400V high voltage adaptive rectification.

7. A high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The device's electrical parameters meet the following requirements: rated average forward rectified current 5A, 8.3ms single half-wave peak surge current 125A, forward voltage drop under rated operating conditions not exceeding 1.90V; reverse leakage current I at rated blocking voltage 25℃. R ≤5μA, device operating junction temperature range -55℃ to +150℃.

8. A high-voltage ultrafast rectifier tube according to claim 1, characterized in that, The first diode chip (2), the second diode chip (3), and the Zener voltage regulator chip (4) are all laid out in a single layer; the minimum isolation distance between the edge of each chip and the adjacent metal structure is ≥0.12mm.