2.5d package structure and method for manufacturing 2.5d package structure

Abstract

Embodiments of the present application provide a 2.5D packaging structure and a preparation method thereof, and relate to the field of chip packaging. A first chip is attached to a heavy wiring layer, and a stepped groove is arranged on the side of the first chip away from the heavy wiring layer. The stepped groove extends to the edge of the chip, and a transduction groove is arranged on the bottom wall. A second chip is attached to the heavy wiring layer, and the front surface of the second chip is provided with a transduction area which extends to the stepped groove and covers the transduction groove, wherein the transduction area corresponds to the transduction groove, thereby forming a transduction cavity. A plastic encapsulation layer is arranged on the heavy wiring layer and covers the first chip and the second chip. Compared with the prior art, the embodiments of the present application reduce the planar area and the stacking height, thereby improving the system integration and reducing the packaging volume without increasing the planar area. In addition, the stability of the cavity structure is improved, and the service life of the device is improved.

Description

Technical Field

[0001] This invention relates to the field of chip packaging, and more specifically, to a 2.5D packaging structure and a method for preparing the 2.5D packaging structure. Background Technology

[0002] Chiplet technology employs a novel design approach, packaging small chips with different functions together to form a heterogeneous integrated chip package structure. As chip input / output density increases and the number of chips / devices integrated into a single package significantly increases, and 2.5D packaging technology, as a multi-chip packaging solution, improves its performance through multi-layer wiring processes, it typically requires multiple redistribution layers to connect the functional pads and ground pads on the chip to the outside.

[0003] Conventional chiplet packaging technology typically employs either flat or stacked packaging. Flat packaging usually uses spaced distribution, which requires a significant increase in planar area, while stacked packaging typically uses sequential stacking, which increases the stacking height. Neither of these methods is conducive to miniaturization of packaged products and makes it difficult to improve system integration.

[0004] Meanwhile, for chips with transducer regions (such as filters, resonators, sensors, etc.), a certain space is usually required at the bottom as a cavity. In traditional technology, cavities are usually formed by dispensing adhesive or coating, which results in a large difference between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the adhesive layer. Shear stress and peel stress are easily generated at the interface, which can easily lead to cavity failure and reduce the service life of the device. Summary of the Invention

[0005] The purpose of this invention is to provide a 2.5D packaging structure and a method for preparing the 2.5D packaging structure, which can reduce the packaging volume, improve system integration, and at the same time improve the stability of the cavity structure and extend the service life of the device.

[0006] In a first aspect, the present invention provides a 2.5D packaging structure, comprising: Rewire layer; A first chip is mounted on the redistribution layer and electrically connected to the redistribution layer. A stepped groove is provided on the side of the first chip away from the redistribution layer. The stepped groove extends to the edge of the first chip, and a transducer groove is provided on the bottom wall of the stepped groove. The second chip is mounted on the redistribution layer and electrically connected to the redistribution layer. The front side of the second chip faces the redistribution layer and is provided with a transducer area. The front side of the second chip extends to the stepped groove and covers the transducer groove. The transducer area corresponds to the transducer groove. A molding layer is disposed on the redistribution layer and covers the first chip and the second chip.

[0007] In an optional embodiment, the portion of the second chip extending into the stepped groove is spaced apart from the sidewall of the stepped groove to form a flow channel gap, and the molding layer fills the flow channel gap.

[0008] In an optional implementation, the depth of the stepped groove is greater than or equal to the thickness of the second chip.

[0009] In an optional embodiment, the back side of the first chip is attached to the redistribution layer, and the front side of the first chip is also provided with chip pads. The stepped groove is provided on the front side of the first chip and is spaced apart from the chip pads. The chip pads are also provided with first connection lines. The redistribution layer is provided with first connection pads. The first connection pads are located on the side of the first chip away from the second chip, and the first connection lines are connected to the first connection pads.

[0010] In an optional embodiment, the front side of the second chip is further provided with a first conductive bump, the first conductive bump being spaced apart from the transducer region, and a second connection pad being provided on the redistribution layer, the second connection pad being spaced apart from the first chip, and the first conductive bump being connected to the second connection pad.

[0011] In an optional embodiment, the back side of the first chip is attached to the redistribution layer, the stepped groove is disposed on the front side of the first chip, and the back side of the first chip is also provided with a receiving groove. The redistribution layer covers the receiving groove, and an antenna layer is also disposed in the receiving groove. The antenna layer is electrically connected to the redistribution layer.

[0012] In an optional embodiment, the receiving groove is provided corresponding to the stepped groove and is also provided corresponding to the transducer groove portion.

[0013] In an optional embodiment, the receiving groove is offset from the stepped groove.

[0014] In an optional embodiment, the 2.5D package structure further includes a third chip, which is stacked on the second chip and electrically connected to the redistribution layer, and the molding compound covers the third chip.

[0015] In an optional embodiment, the front side of the third chip is attached to the back side of the second chip, and the front side of the third chip is further provided with a second conductive protrusion. The redistribution layer is further provided with a third connection pad, and the second conductive protrusion is connected to the third connection pad.

[0016] In an optional embodiment, the first chip is further provided with electrostatic conductive pillars, which are disposed around the transducer groove.

[0017] In an optional embodiment, each of the electrostatic conductive pillars penetrates the first chip and extends to the bottom wall of the stepped groove, with a portion of the electrostatic conductive pillars extending into the flow channel gap.

[0018] In an optional embodiment, the electrostatic conductive post extending to the channel gap is further provided with a second connecting line, and a grounding pad is further provided on the redistribution layer. The second connecting line is connected to the grounding pad, and the molding compound covers the second connecting line.

[0019] In an optional embodiment, each of the electrostatic conductive pillars penetrates the first chip, wherein a portion of the electrostatic conductive pillars extends to the bottom wall of the stepped groove, and another portion of the electrostatic conductive pillars extends to the front side of the first chip and is spaced apart from the stepped groove.

[0020] In an optional embodiment, the electrostatic conductive post spaced apart from the stepped groove is further provided with a second connecting line, and a grounding pad is further provided on the redundancy layer. The second connecting line is connected to the grounding pad, and the plastic encapsulation layer covers the second connecting line.

[0021] In an optional implementation, the front side of the third chip extends and adheres to the front side of the first chip, covering the channel gap.

[0022] In an optional embodiment, the bottom wall of the stepped groove is further provided with a plurality of reinforcing grooves, all of which are located within the flow channel gap.

[0023] In an optional embodiment, the receiving groove corresponds to both the flow channel gap and the transducer groove.

[0024] Secondly, the present invention provides a method for fabricating a 2.5D packaging structure, used to fabricate the 2.5D packaging structure as described in the foregoing embodiments, the method comprising: Provide a vehicle; A redistribution layer is formed on the vehicle; A first chip is mounted on the redistribution layer, wherein the first chip is electrically connected to the redistribution layer, and a stepped groove is provided on the side of the first chip away from the redistribution layer, the stepped groove extends to the edge of the first chip, and a transducer groove is also provided on the bottom wall of the stepped groove. A second chip is mounted on the redistribution layer, wherein the second chip is electrically connected to the redistribution layer, and the front side of the second chip faces the redistribution layer and is provided with a transducer area, and the front side of the second chip extends to the stepped groove and covers the transducer groove, wherein the transducer area corresponds to the transducer groove. A molding compound layer is formed on the redistribution layer, wherein the molding compound layer encapsulates the first chip and the second chip; The vehicle is stripped off.

[0025] In an optional implementation, prior to the step of mounting the first chip on the redistribution layer, the method further includes: A stepped groove is formed on the front side of the first chip; A transducer groove is formed on the bottom wall of the stepped groove.

[0026] The beneficial effects of the embodiments of the present invention include: The 2.5D packaging structure and its fabrication method provided in this invention involve mounting a first chip on a redistribution layer and forming a stepped groove on the side of the first chip away from the redistribution layer. This stepped groove extends to the edge of the chip and has a transducer groove on its bottom wall. A second chip is mounted on the redistribution layer, and a transducer region is formed on the front side of the second chip, extending to and covering the stepped groove. The transducer region corresponds to the transducer groove, thereby forming a transducer cavity. A molding compound is disposed on the redistribution layer and encapsulates both the first and second chips.

[0027] Compared to existing technologies, this invention utilizes stepped grooves to accommodate the second chip. This allows the second chip to be interlocked and stacked with the first chip, reducing the planar area occupied. Furthermore, it reduces the stacking height, thereby improving system integration and reducing package size without increasing the planar area, making it suitable for heterogeneous integration scenarios. In addition, by creating a transducer groove on the first chip and directly covering it with the second chip to form a transducer cavity, the traditional dispensing cavity structure is avoided. Since the cavity is formed directly using the chip itself, and both chips have similar or identical coefficients of thermal expansion, this reduces shear and peel stress at the interface, preventing interface / cavity failure, improving cavity structure stability, and extending device lifespan. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1A schematic diagram of the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 2 This is a schematic diagram of the structure corresponding to step S1 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 3 This is a schematic diagram of the structure corresponding to step S2 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 4 This is a schematic diagram of the structure corresponding to step S3 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 5 This is a schematic diagram of the structure corresponding to step S4 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 6 This is a schematic diagram of the structure corresponding to step S5 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 7 This is a schematic diagram of the structure corresponding to step S6 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 8 This is a schematic diagram of the structure corresponding to step S7 in the method for preparing the 2.5D packaging structure provided in the first embodiment of the present invention; Figure 9 A schematic diagram of the 2.5D packaging structure provided in the second embodiment of the present invention; Figure 10 A schematic diagram of another 2.5D packaging structure provided in the second embodiment of the present invention; Figure 11 A schematic diagram of the 2.5D packaging structure provided in the third embodiment of the present invention; Figure 12 This is a schematic diagram of the 2.5D packaging structure provided in the fourth embodiment of the present invention.

[0030] Icons: 100 - 2.5D package structure; 110 - Redistribution layer; 111 - First connection pad; 112 - Second connection pad; 113 - Third connection pad; 114 - Ground pad; 120 - First chip; 121 - Step groove; 122 - Transducer groove; 123 - Chip pad; 124 - First connection line; 130 - Second chip; 131 - Transducer region; 132 - Flow channel gap; 133 - First conductive protrusion; 134 - Reinforcement groove; 140 - Molding layer; 150 - Receiving groove; 151 - Antenna layer; 160 - Third chip; 161 - Second conductive protrusion; 162 - Second connection line; 170 - Electrostatic conductive post; 200 - Carrier. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0032] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0033] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0034] In the description of this invention, it should be noted that if terms such as "upper," "lower," "inner," or "outer" are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this invention is usually placed, they are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0035] Furthermore, the terms "first" and "second" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0036] It should be noted that, where there is no conflict, the features in the embodiments of the present invention can be combined with each other.

[0037] First Embodiment See Figure 1 This invention provides a 2.5D packaging structure 100, which can reduce the packaging volume, improve system integration, and at the same time improve the stability of the cavity structure and extend the service life of the device.

[0038] The 2.5D packaging structure 100 provided in this embodiment of the invention includes a redistribution layer 110, a first chip 120, a second chip 130, and a molding compound 140. The first chip 120 is mounted on and electrically connected to the redistribution layer 110. A stepped groove 121 is provided on the side of the first chip 120 away from the redistribution layer 110, extending to the edge of the first chip 120, and a transducer groove 122 is provided on the bottom wall of the stepped groove 121. The second chip 130 is mounted on and electrically connected to the redistribution layer 110. The front side of the second chip 130 faces the redistribution layer 110 and is provided with a transducer region 131. The front side of the second chip 130 extends to the stepped groove 121 and covers the transducer groove 122, and the transducer region 131 corresponds to the transducer groove 122. The molding compound 140 is disposed on the redistribution layer 110 and covers the first chip 120 and the second chip 130.

[0039] It should be noted that, in this embodiment of the invention, the step groove 121 is used to accommodate the second chip 130. On the one hand, this allows the second chip 130 to be interlocked and stacked with the first chip 120, reducing the planar area occupied; on the other hand, it reduces the stacking height. Thus, without increasing the planar area, the system integration is improved and the package size is reduced, making it suitable for heterogeneous integration scenarios. In addition, by setting a transducer groove 122 on the first chip 120, the second chip 130 is directly covered by the transducer groove 122 to form a transducer cavity, avoiding the traditional dispensing cavity structure. Furthermore, the cavity is directly formed by the chip enclosure, and the thermal expansion coefficients of the two are the same or similar, which can reduce the shear stress and peel stress at the interface, prevent interface / cavity failure, improve the stability of the cavity structure, and extend the device lifespan.

[0040] It should be noted that the redistribution layer 110 in the embodiments of the present invention can be a multilayer wiring layer, and its specific fabrication process and structure can refer to existing multilayer wiring layers, which will not be described in detail here.

[0041] In this embodiment, the portion of the second chip 130 extending into the stepped groove 121 is spaced apart from the sidewall of the stepped groove 121, forming a flow channel gap 132, which is then filled by the molding compound 140. Specifically, since the stepped groove 121 extends to the edge sidewall of the first chip 120, the second chip 130 can directly extend into the stepped groove 121. By defining the mounting position of the second chip 130, a flow channel gap 132 is formed between the edge of the second chip 130 and the sidewall of the stepped groove 121. During the molding process, the molding compound can flow into this flow channel gap 132, thereby improving the fluidity of the molding compound, significantly improving the filling density, and preventing voids in the molding compound. Simultaneously, it enhances the bonding force between the molding compound 140, the first chip 120, and the second chip 130, thereby improving the overall stability of the packaging structure.

[0042] It should be noted that in this embodiment of the invention, the second chip 130 can completely cover the transducer groove 122, thereby forming a relatively closed transducer cavity below the transducer region 131. Both the first chip 120 and the second chip 130 can be silicon-based chips, and their thermal expansion coefficients are similar. Furthermore, the second chip 130 can be a SAW filter chip, and the transducer region 131 can be an IDT transducer region 131 (interdigital transducer). Of course, the second chip 130 can also be a resonator or a sensor. Alternatively, the transducer region 131 can also be an antenna structure, forming a transducer cavity through the lower transducer groove 122, thereby reducing the resonant frequency and increasing the bandwidth.

[0043] It is worth noting that the transducer groove 122 here can be formed by etching process. By controlling the etching depth and width, the size of the transducer groove 122 can be controlled, thereby achieving different cavity sizes. By increasing the volume of the transducer groove 122, the energy leakage and scattering of sound waves / electromagnetic waves can be reduced, and the resonance loss can be reduced.

[0044] In this embodiment, the depth of the stepped groove 121 is greater than or equal to the thickness of the second chip 130. Specifically, the groove depth of the stepped groove 121 is preferably the same as the thickness of the second chip 130, so that the back surface of the second chip 130 is flush with the surface of the first chip 120 away from the redistribution layer 110, improving the flatness of the chip surface and facilitating subsequent molding processes. At the same time, it can prevent the second chip 130 from protruding relative to the first chip 120, effectively reducing the overall stacking height and thus reducing the package height.

[0045] In this embodiment, the back side of the first chip 120 is attached to the redistribution layer 110, and the front side of the first chip 120 is also provided with chip pads 123. A stepped groove 121 is provided on the front side of the first chip 120 and is spaced apart from the chip pads 123. The chip pads 123 are also provided with first connecting lines 124. The redistribution layer 110 is provided with first connecting pads 111. The first connecting pads 111 are located on the side of the first chip 120 away from the second chip 130, and the first connecting lines 124 are connected to the first connecting pads 111.

[0046] Specifically, the first chip 120 is a front-mounted chip, with its back side bonded to the redistribution layer 110. A first connection line 124 is formed through a wire bonding process, which enables the electrical connection between the first chip 120 and the redistribution layer 110. Of course, in other preferred embodiments of the present invention, the first chip 120 can also be a flip-chip, with its front side bonded to the redistribution layer 110 and a stepped groove 121 disposed on the back side of the first chip 120.

[0047] In this embodiment, a first conductive protrusion 133 is further provided on the front side of the second chip 130. The first conductive protrusion 133 is spaced apart from the transducer region 131. A second connection pad 112 is provided on the redistribution layer 110. The second connection pad 112 is spaced apart from the first chip 120. The first conductive protrusion 133 is connected to the second connection pad 112. Specifically, the first conductive protrusion 133 protrudes downward and is soldered to the second connection pad 112. The second connection pad 112 is located on the side of the first chip 120 away from the first connection pad 111. There can be multiple first conductive protrusions 133, and multiple second connection pads 112 can also be provided on the redistribution layer 110. Multiple first conductive protrusions 133 are correspondingly soldered to multiple second connection pads 112 to realize the soldering and fixing of the second chip 130 and the electrical connection between it and the redistribution layer 110. The first conductive protrusion 133 can also support the second chip 130, so that the second chip 130 can be attached and fixed in the stepped groove 121 of the first chip 120.

[0048] This invention also provides a method for fabricating a 2.5D package structure 100, which is used to fabricate the 2.5D package structure 100 as described above. The method includes the following steps: S1: Provide one vehicle (200).

[0049] See also Figure 2 Specifically, a carrier 200 can be taken first, and an adhesive can be formed by spin coating using a coating machine. This adhesive is a bonding adhesive, which can be subsequently debonded to achieve the peeling of the carrier 200. The carrier 200 can be made of materials such as glass, silicon dioxide, or metal. The adhesive can be separated by irradiating it with UV light. Materials include epoxy resin, polyimide, benzocyclobutene, and other polymer composite materials.

[0050] S2100: A redistribution layer 110 is formed on the carrier 200.

[0051] See also Figure 3 Specifically, photoresist can be coated onto the adhesive surface again using a spin-coating process, then a photomask can be used to cover the photoresist, and an exposure and development process can be used to form patterned layer openings. Then, an electroplating process can be used to form the first metal wiring layer. Next, a dielectric material is coated, and a photolithography process is used to form patterned layer openings, followed by an electroplating process to form the second metal wiring layer. This process is repeated to form multiple metal wiring layers and multiple dielectric layers. Finally, a first connection pad 111 and a second connection pad 112 are formed on the redistribution layer 110. The redistribution layer 110 includes multiple metal wiring layers and multiple dielectric layers, and its specific fabrication process can refer to existing multi-layer redistribution processes.

[0052] S3: Mount the first chip 120 on the redistribution layer 110.

[0053] See also Figure 4 The first chip 120 is electrically connected to the redistribution layer 110, and a stepped groove 121 is provided on the side of the first chip 120 away from the redistribution layer 110. The stepped groove 121 extends to the edge of the first chip 120, and a transducer groove 122 is also provided on the bottom wall of the stepped groove 121.

[0054] Specifically, before mounting the first chip 120, it is necessary to prepare and form the first chip 120 in advance. First, a wafer with multiple first chips 120 is provided. Then, a protective film is applied to the wafer. The area that needs to be grooved is exposed by exposure and development. Then, a stepped groove 121 is formed on the front side of the first chip 120 by plasma dry etching. After removing the adhesive layer, the exposure and development grooving process is repeated. Then, a transducer groove 122 is formed on the bottom wall of the stepped groove 121. Finally, the wafer is cut into individual first chips 120.

[0055] In actual mounting, the first chip 120 can be a front-mounted chip. The back of the first chip 120 can be bonded and fixed to the redistribution layer 110 through an adhesive film layer. Then, the first connection line 124 is formed by wire bonding process to realize the electrical connection between the chip pad 123 on the front of the first chip 120 and the first connection pad 111.

[0056] S4: Attach the second chip 130 on the redistribution layer 110.

[0057] See also Figure 5 The second chip 130 is electrically connected to the redistribution layer 110, with its front side facing the redistribution layer 110 and having a transducer region 131. The front side of the second chip 130 extends to the stepped groove 121 and covers the transducer recess 122, with the transducer region 131 corresponding to the transducer recess 122. Specifically, during actual mounting, the first conductive protrusion 133 on the front side of the second chip 130 can be soldered to the second connecting pad 112 on the redistribution layer 110, while the second chip 130 is overlapped on the stepped groove 121 of the first chip 120, so that the front side of the second chip 130 extends to the stepped groove 121 and covers the transducer recess 122, with the transducer region 131 corresponding to the transducer recess 122.

[0058] S5: Form a molding layer 140 on the redistribution layer 110.

[0059] See also Figure 6 The molding compound 140 encapsulates the first chip 120 and the second chip 130. Specifically, the first chip 120 and the second chip 130 are molded and protected using a molding process to form a molded body.

[0060] S6: Stripping carrier 200.

[0061] See also Figure 7 Specifically, the carrier 200 can be peeled off by irradiating the back of the carrier 200 with UV light using a debonding method, thereby exposing the redistribution layer 110.

[0062] S7: Solder balls are formed on the surface of the redistribution layer 110 away from the molding layer 140.

[0063] See also Figure 8 Specifically, a dielectric layer can first be spin-coated onto the redistribution layer 110 to form a dielectric layer. Then, an opening is formed using a dry etching process. Next, a conductive metal pillar is formed within the opening using an electroplating process, and a metal layer (the material can be TI / TIWU, NI, etc.) is formed on the surface of the metal pillar. The metal layer improves the solderability of the solder balls. Finally, solder balls are formed by stencil printing or electroplating, and the solder ball material can be SnAg, SnAgCu, etc. A cutting process is then performed to form individual products.

[0064] In summary, the 2.5D packaging structure 100 and its fabrication method provided in this embodiment of the invention involve mounting a first chip 120 on a redistribution layer 110, and providing a stepped groove 121 on the side of the first chip 120 away from the redistribution layer 110. The stepped groove 121 extends to the edge of the chip and has a transducer groove 122 on its bottom wall. A second chip 130 is mounted on the redistribution layer 110, and a transducer region 131 is provided on the front side of the second chip 130, extending to the stepped groove 121 and covering the transducer groove 122. The transducer region 131 corresponds to the transducer groove 122, thereby forming a transducer cavity. A molding compound 140 is disposed on the redistribution layer 110 and encapsulates the first chip 120 and the second chip 130. Compared to existing technologies, this embodiment of the invention uses a stepped groove 121 to accommodate the second chip 130. This allows the second chip 130 to be interlocked and stacked with the first chip 120, reducing the planar area occupied. It also reduces the stacking height, thereby improving system integration and reducing package size without increasing the planar area, making it suitable for heterogeneous integration scenarios. Furthermore, by providing a transducer groove 122 on the first chip 120, the second chip 130 directly covers the transducer groove 122 to form a transducer cavity, avoiding the traditional dispensing cavity structure. Since the cavity is formed directly using the chip enclosure, the thermal expansion coefficients of the two chips are the same or similar, reducing shear stress and peel stress at the interface, preventing interface / cavity failure, improving cavity structure stability, and extending device lifespan.

[0065] Second Embodiment See Figure 9This embodiment of the invention provides a 2.5D packaging structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment. For the sake of brevity, any parts not mentioned in this embodiment can be referred to the corresponding content in the first embodiment.

[0066] In this embodiment, the back side of the first chip 120 is attached to the redistribution layer 110, the stepped groove 121 is disposed on the front side of the first chip 120, and the back side of the first chip 120 is also provided with a receiving groove 150. The redistribution layer 110 covers the receiving groove 150, and an antenna layer 151 is disposed in the receiving groove 150. The antenna layer 151 is electrically connected to the redistribution layer 110. Specifically, the antenna layer 151 is disposed on the redistribution layer 110, and the receiving groove 150 of the first chip 120 can cover the antenna layer 151. The receiving groove 150 can form a cavity structure, so that the receiving groove 150 and the transducer groove 122 can jointly serve as a cavity structure, which can play a signal amplification role. This allows the electromagnetic waves generated by the antenna layer 151 to be amplified in the cavity structure, thereby improving the signal transmission effect of the antenna. Furthermore, the transducer groove 122 can occupy a certain volume of dielectric material, so that when the signal propagates along the dielectric material, the dielectric loss can be reduced, the transmission path can be shortened, and the signal loss can be reduced.

[0067] It should be noted that the second chip 130 here can be a filter chip, which can be used to optimize impedance matching, isolate coupling paths and reduce nonlinear distortion by utilizing the performance of the filter (high suppression, no parasitic passband) to filter clutter and adjacent channel interference, while ensuring lossless transmission of the target signal and significantly improving the signal-to-noise ratio, receiving sensitivity and multi-band coexistence stability.

[0068] Furthermore, the receiving groove 150 is correspondingly arranged with the stepped groove 121 and partially corresponding with the transducer groove 122. Preferably, the receiving groove 150 and the stepped groove 121 completely overlap in the vertical direction, and the receiving groove 150 and the transducer groove 122 partially overlap in the vertical direction. The antenna layer 151 and the transducer area 131 of the second chip 130 can be misaligned to a certain extent, so that the transducer area 131 can avoid the antenna layer 151 and avoid mutual interference between the two.

[0069] See Figure 10 In other preferred embodiments of the invention, the receiving groove 150 and the stepped groove 121 are misaligned, so that the antenna layer 151 and the stepped groove 121 are misaligned. This design allows the antenna layer 151 to be kept away from the transducer region 131 and avoids mutual interference between the two.

[0070] The 2.5D packaging structure 100 provided in this embodiment of the invention enables the antenna function to be realized on the redistribution layer 110 by setting the antenna layer 151, and the cavity structure formed by the accommodating groove 150 and the transducer groove 122 can play a signal amplification role, so that the electromagnetic waves generated by the antenna layer 151 are amplified in the cavity structure, thereby improving the signal transmission effect of the antenna.

[0071] Third Embodiment See Figure 11 This invention provides a 2.5D packaging structure 100, whose basic structure, principle and technical effects are the same as those of the first or second embodiment. For the sake of brevity, any parts not mentioned in this embodiment can be referred to the corresponding content in the first or second embodiment.

[0072] In this embodiment, the 2.5D package structure 100 further includes a third chip 160, which is stacked on the second chip 130 and electrically connected to the redistribution layer 110. A molding compound 140 covers the third chip 160. The back side of the first chip 120 is attached to the redistribution layer 110, and a stepped groove 121 is provided on the front side of the first chip 120. A receiving groove 150 is also provided on the back side of the first chip 120. The redistribution layer 110 covers the receiving groove 150, and an antenna layer 151 is also provided in the receiving groove 150. The antenna layer 151 is electrically connected to the redistribution layer 110.

[0073] Specifically, the third chip 160 is stacked in a staggered manner with the second chip 130, and the front side of the third chip 160 is attached to the back side of the second chip 130. A second conductive protrusion 161 is also provided on the front side of the third chip 160, and a third connection pad 113 is provided on the redistribution layer 110. The second conductive protrusion 161 is connected to the third connection pad 113. In this arrangement, the third chip 160 is staggered and overlapped with the back side of the second chip 130, and is fixed to the third connection pad 113 by soldering the second conductive protrusion 161. This achieves a stacked arrangement of multiple chips, further increasing the chip stacking density.

[0074] Furthermore, the first chip 120 is also provided with electrostatic conductive pillars 170, which are disposed around the transducer groove 122. Specifically, the electrostatic conductive pillars 170 can be formed by TSV conductive via technology, with the receiving groove 150 corresponding to the stepped groove 121, and the electrostatic conductive pillars 170 located around the receiving groove 150 and the transducer groove 122.

[0075] It is worth noting that each electrostatic conductive pillar 170 penetrates the first chip 120 and extends to the bottom wall of the stepped groove 121, with some pillars extending to the channel gap 132. Specifically, the electrostatic conductive pillars 170 can also be bonded to the surface of the redistribution layer 110, serving as electrostatic discharge pillars to prevent breakdown in the bottom region. More importantly, the electrostatic conductive pillars 170 can be made of thermally conductive metal (e.g., copper pillars), which can improve the heat dissipation performance of the overall structure.

[0076] In this embodiment, the electrostatic conductive post 170 extending to the channel gap 132 is further provided with a second connecting line 162, and a grounding pad 114 is also provided on the redistribution layer 110. The second connecting line 162 is connected to the grounding pad 114, and the molding compound 140 covers the second connecting line 162. Specifically, the grounding pad 114 can be located on the side of the first connecting pad away from the first chip 120, and the second connecting line 162 can achieve electrostatic discharge, releasing the static electricity inside the redistribution layer 110 and the first chip 120 to the grounding pad 114.

[0077] It should be noted that both the electrostatic conductive post 170 and the second connecting line 162 are made of metal, which can also play a role in heat dissipation and improve the overall heat dissipation performance.

[0078] Fourth embodiment See Figure 12 This embodiment of the invention also provides a 2.5D packaging structure 100, whose basic structure, principle and technical effects are the same as those of the first and second embodiments. For the sake of brevity, any parts not mentioned in this embodiment can be referred to the corresponding content in the first or second embodiment.

[0079] In this embodiment, the 2.5D package structure 100 further includes a third chip 160, which is stacked on the second chip 130 and electrically connected to the redistribution layer 110. A molding compound 140 covers the third chip 160. The back side of the first chip 120 is attached to the redistribution layer 110, and a stepped groove 121 is provided on the front side of the first chip 120. A receiving groove 150 is also provided on the back side of the first chip 120. The redistribution layer 110 covers the receiving groove 150, and an antenna layer 151 is also provided in the receiving groove 150. The antenna layer 151 is electrically connected to the redistribution layer 110. The receiving groove 150 and the stepped groove 121 are correspondingly provided.

[0080] Furthermore, the first chip 120 is also provided with a plurality of electrostatic conductive pillars 170, which are arranged around the transducer groove 122. Each electrostatic conductive pillar 170 penetrates the first chip 120, with some pillars extending to the bottom wall of the stepped groove 121 and others extending to the front of the first chip 120 and spaced apart from the stepped groove 121. That is, some pillars 170 are located within the stepped groove 121, while others are offset from it.

[0081] In this embodiment, the electrostatic conductive post 170, which is spaced apart from the stepped groove 121, is also provided with a second connecting line 162. The redistribution layer 110 is also provided with a grounding pad 114. The second connecting line 162 is connected to the grounding pad 114 and surrounds the second chip 130. The molding compound 140 covers the second connecting line 162.

[0082] Furthermore, the front side of the third chip 160 extends and adheres to the front side of the first chip 120, covering the channel gap 132. Specifically, a cavity structure can be formed at the channel gap 132, thereby forming multiple cavity structures with the channel gap 132, the transducer groove 122, and the receiving groove 150, which further amplifies the signal, allowing the electromagnetic waves generated by the antenna layer 151 to be amplified in the cavity structure, thus improving the signal transmission effect of the antenna.

[0083] It should be noted that the receiving groove 150 corresponds to both the flow channel gap 132 and the transducer groove 122. Specifically, the receiving groove 150 is located below both the flow channel gap 132 and the transducer groove 122. Here, the flow channel gap 132 forms a cavity structure, which can further reduce the volume of dielectric material above the antenna layer 151, thereby further reducing signal attenuation and ensuring signal transmission performance.

[0084] In other preferred embodiments of the present invention, the bottom wall of the stepped groove 121 is further provided with a plurality of reinforcing grooves 134, all of which are located within the flow channel gap 132. By providing reinforcing grooves 134, the cavity volume of the flow channel gap 132 can be further increased. At the same time, the multiple reinforcing grooves 134 are spaced apart, which can further reduce signal attenuation and improve the amplification function of the cavity.

[0085] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A 2.5D packaging structure, characterized in that, include: Rewire layer; A first chip is mounted on the redistribution layer and electrically connected to the redistribution layer. A stepped groove is provided on the side of the first chip away from the redistribution layer. The stepped groove extends to the edge of the first chip, and a transducer groove is provided on the bottom wall of the stepped groove. The second chip is mounted on the redistribution layer and electrically connected to the redistribution layer. The front side of the second chip faces the redistribution layer and is provided with a transducer area. The front side of the second chip extends to the stepped groove and covers the transducer groove. The transducer area corresponds to the transducer groove. A molding layer is disposed on the redistribution layer and covers the first chip and the second chip.

2. The 2.5D packaging structure according to claim 1, characterized in that, The portion of the second chip extending into the stepped groove is spaced apart from the sidewall of the stepped groove, forming a flow channel gap, and the molding layer fills the flow channel gap.

3. The 2.5D packaging structure according to claim 2, characterized in that, The depth of the stepped groove is greater than or equal to the thickness of the second chip.

4. The 2.5D packaging structure according to claim 2, characterized in that, The back side of the first chip is attached to the redistribution layer, and the front side of the first chip is also provided with chip pads. The stepped groove is provided on the front side of the first chip and is spaced apart from the chip pads. The chip pads are also provided with first connection lines. The redistribution layer is provided with first connection pads. The first connection pads are located on the side of the first chip away from the second chip, and the first connection lines are connected to the first connection pads.

5. The 2.5D packaging structure according to claim 2, characterized in that, The front side of the second chip is also provided with a first conductive bump, which is spaced apart from the transducer region. The redistribution layer is provided with a second connection pad, which is spaced apart from the first chip. The first conductive bump is connected to the second connection pad.

6. The 2.5D packaging structure according to claim 2, characterized in that, The back side of the first chip is attached to the redistribution layer, the stepped groove is disposed on the front side of the first chip, and the back side of the first chip is also provided with a receiving groove. The redistribution layer covers the receiving groove, and an antenna layer is disposed in the receiving groove. The antenna layer is electrically connected to the redistribution layer.

7. The 2.5D packaging structure according to claim 6, characterized in that, The receiving groove is provided correspondingly to the stepped groove and is also provided correspondingly to the transducer groove portion.

8. The 2.5D packaging structure according to claim 6, characterized in that, The receiving groove is offset from the stepped groove.

9. The 2.5D packaging structure according to any one of claims 6-8, characterized in that, The 2.5D packaging structure also includes a third chip, which is stacked on the second chip and electrically connected to the redistribution layer, and the molding compound covers the third chip.

10. The 2.5D packaging structure according to claim 9, characterized in that, The front side of the third chip is attached to the back side of the second chip. The front side of the third chip is also provided with a second conductive protrusion. The redistribution layer is also provided with a third connection pad. The second conductive protrusion is connected to the third connection pad.

11. The 2.5D packaging structure according to claim 9, characterized in that, The first chip also includes electrostatic conductive pillars, which are disposed around the transducer groove.

12. The 2.5D packaging structure according to claim 11, characterized in that, Each of the electrostatic conductive pillars penetrates the first chip and extends to the bottom wall of the stepped groove, with a portion of the electrostatic conductive pillars extending into the flow channel gap.

13. The 2.5D packaging structure according to claim 12, characterized in that, The electrostatic conductive post extending into the channel gap is also provided with a second connecting line, and a grounding pad is also provided on the redistribution layer. The second connecting line is connected to the grounding pad, and the molding compound covers the second connecting line.

14. The 2.5D packaging structure according to claim 11, characterized in that, Each of the electrostatic conductive pillars penetrates the first chip, with a portion of the electrostatic conductive pillars extending to the bottom wall of the stepped groove, and another portion of the electrostatic conductive pillars extending to the front of the first chip and spaced apart from the stepped groove.

15. The 2.5D packaging structure according to claim 14, characterized in that, The electrostatic conductive pillars, which are spaced apart from the stepped grooves, are also provided with a second connecting line. The redistribution layer is also provided with a grounding pad. The second connecting line is connected to the grounding pad. The plastic encapsulation layer covers the second connecting line.

16. The 2.5D packaging structure according to claim 14, characterized in that, The front side of the third chip extends and adheres to the front side of the first chip, covering the channel gap.

17. The 2.5D packaging structure according to claim 16, characterized in that, The bottom wall of the stepped groove is also provided with a plurality of reinforcing grooves, all of which are located within the flow channel gap.

18. The 2.5D packaging structure according to claim 16, characterized in that, The receiving groove corresponds to both the flow channel gap and the transducer groove.

19. A method for fabricating a 2.5D packaging structure, used to fabricate the 2.5D packaging structure as described in claim 1, characterized in that, The method includes: Provide a vehicle; A redistribution layer is formed on the vehicle; A first chip is mounted on the redistribution layer, wherein the first chip is electrically connected to the redistribution layer, and a stepped groove is provided on the side of the first chip away from the redistribution layer, the stepped groove extends to the edge of the first chip, and a transducer groove is also provided on the bottom wall of the stepped groove. A second chip is mounted on the redistribution layer, wherein the second chip is electrically connected to the redistribution layer, and the front side of the second chip faces the redistribution layer and is provided with a transducer area, and the front side of the second chip extends to the stepped groove and covers the transducer groove, wherein the transducer area corresponds to the transducer groove. A molding compound layer is formed on the redistribution layer, wherein the molding compound layer covers the first chip and the second chip; The vehicle is stripped off.

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