Integrated compound semiconductor co-packaged optical device

CN123022986APending Publication Date: 2026-10-30II VI DELAWARE INC
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Patent Information

Application Number
CN202580010980.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-01-17
Filing Date
2025-01-21
Publication Date
2026-10-30

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Abstract

This disclosure describes an integrated compound semiconductor co-packaged optical (CCPO) device. The CCPO device has a photonic integrated circuit (PIC) and an electronic integrated circuit (EIC) mounted on a common packaging substrate. The PIC has a modulator array and a photodetector (PD) array fabricated in GaAs and / or InP. In some configurations, the PIC also has an amplifier array fabricated in GaAs and / or InP. The CCPO design reduces the loss and signal integrity problems that are typically present when the PIC and the EIC are on separate substrates.
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Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to U.S. Provisional Patent Application No. 63 / 625,639, filed January 26, 2024, entitled “Integrated Compound Semiconductor Co-packaged Optical Device,” which is incorporated herein by reference in its entirety. Background Technology

[0003] These limitations and disadvantages will become apparent to those skilled in the art by comparing them with certain aspects of the present method and system as illustrated in the remainder of this disclosure with reference to the accompanying drawings. Summary of the Invention

[0004] Systems and methods for producing integrated compound semiconductor co-packaged optics (CCPO or compound CPO) are provided, which are substantially as illustrated in at least one of the accompanying drawings and / or described in conjunction with at least one of the accompanying drawings, as set forth more fully in the claims. Attached Figure Description

[0005] Figure 1 A side view of an example CCPO PIC implemented in InP according to various exemplary embodiments of the present disclosure is illustrated.

[0006] Figure 2 A top view of an example CCPO PIC implemented in InP according to various exemplary embodiments of the present disclosure is shown.

[0007] Figure 3 A top view of an example CCPO PIC implemented in GaAs according to various exemplary embodiments of the present disclosure is shown. Detailed Implementation

[0008] The following discussion provides various examples of systems and methods for producing integrated compound semiconductor co-packaged optical devices. Such examples are non-limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are non-limiting.

[0009] The accompanying drawings illustrate the general construction method, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring this disclosure. Furthermore, elements in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to aid in understanding the examples discussed in this disclosure. The same reference numerals in different drawings denote the same elements.

[0010] The term "or" refers to any one or more items in a list connected by "or". For example, "x or y" means any one of the three elements in the set {(x), (y), (x, y)}. As another example, "x, y or z" means any one of the seven elements in the set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0011] The terms “comprising,” “including,” “including,” and / or “include” are “open-ended” terms and indicate the presence of the stated feature but do not exclude the presence or addition of one or more other features.

[0012] The terms “first,” “second,” etc., may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, for example, a first element discussed in this disclosure may be referred to as a second element without departing from the teachings of this disclosure.

[0013] Unless otherwise specified, the term "coupled" may be used to describe two elements that are in direct contact with each other, or to describe two elements that are indirectly connected by one or more other elements. For example, if element A is coupled to element B, then element A may be in direct contact with element B, or may be indirectly connected to element B by an intermediate element C. Similarly, the terms "on" or "above" may be used to describe two elements that are in direct contact with each other, or to describe two elements that are indirectly connected by one or more other elements.

[0014] The integrated compound semiconductor co-packaged optics (CCPO or compound CPO) disclosed herein is designed to transfer high-capacity electronic data traffic from electronic very large-scale integrated circuit (HSIC) devices to optical interconnects. The disclosed CCPO photonic integrated circuit (PIC) can be implemented on indium phosphide (InP) or gallium arsenide (GaAs) substrates, depending on the target operating wavelength and / or the length of the fiber optic link.

[0015] Figure 1 (100) illustrates a side view of an example CCPO PIC implemented in InP according to various exemplary embodiments of the present disclosure.

[0016] The CCPO device 100 can be co-packaged with an ASIC 107 (such as HSIC 107) at close range (e.g., on the millimeter scale) and housed in a single package assembly on a common package substrate 109 for mounting on a PCB 111. This design reduces signal loss and signal integrity issues typically associated with inter-substrate connections in the prior art, where the ASIC and optical components are housed on separate substrates.

[0017] Light can be coupled between the optical fiber and the CCPO PIC 100 via a passive optical component 105 in the CPO 101 using external free-space optics or waveguides. Optical coupling can involve polarization, rotation, multiplexing, routing, grating, and / or beam spreading. For example, the light source can be shared among multiple modulators. Embedded optical couplers 105 within the CPO 101 and tapered waveguide configurations can be employed to facilitate coupling. The light output from the CCPO 100 can be directed to a single optical fiber or an array of optical fibers carrying multiple wavelengths.

[0018] The CCPO 100 can integrate a configurable multi-channel (e.g., 2, 4, or 8 channels / channel) modulator / amplifier array and a photodetector (PD) array 103 on the same compound semiconductor substrate 109. These components may include electroabsorption modulators (EAM), Mach-Zehnder modulators (MZM), and various photodetectors such as PN detectors, PIN detectors, and avalanche photodiode detectors (APD).

[0019] When using a remote external laser, the CPO 101 can operate with no or minimal cooling because its modulator 103 is optimized for high-temperature operation. Cooling is only required for integrated laser solutions or when specific high-performance conditions (e.g., up to 105°C) necessitate it.

[0020] Amplification can be combined on the CPO side or on the remote CW laser source 113. An integrated semiconductor optical amplifier (SOA) can be integrated into the modulator / amplifier array and PD array 103 to increase the output power of the laser source for enhanced distribution.

[0021] Figure 2 (200) illustrates a top view of an example CCPO PIC implemented in InP according to various exemplary embodiments of the present disclosure. Figure 2 An uncooled InP modulator array 203 directly driven by an HSIC embedded serializer / deserializer (SerDes) 207 is shown. The receiver section may include an InP PD array 201. The modulator array 203 may be designed for a single wavelength or multiple wavelengths for wavelength division multiplexing (WDM) implementations.

[0022] Compared to silicon photonics, indium phosphide modulators offer superior bandwidth, signal quality, and reliability at high temperatures. While silicon photonics typically achieves speeds of 100 Gbps to 200 Gbps, InP can double that speed, providing a significant performance advantage.

[0023] The disclosed CCPO design replaces pluggable optics at the network edge, offering advantages such as increased bandwidth, reduced equalization requirements, high-speed operation, compact design, and better thermal management. Indium phosphide enables higher per-channel data transmission rates than vertical-cavity surface-emitting lasers (VCSELs), which are cost-effective and simple in certain applications.

[0024] The transimpedance amplifier (TIA) array 205 may include a matching electronic integrated circuit (EIC) with a driver array to enhance the electrical signal strength from the modulator 203 and PD 201 in the CCPO PIC 200.

[0025] Figure 3 (300) illustrates alternative CCPO PICs implemented in GaAs according to various exemplary embodiments of the present disclosure. GaAs modulator arrays 303 (such as EAM and MZM) are designed to be cost-effective and can operate at speeds slightly lower than InP-based designs. High-speed modulators may also include other materials such as lithium niobate (LiNbO3), silicon germanium (SiGe), perovskite BTO (BaTiO3), and LTO (La2Ti2O7). These arrays can be directly driven by HSIC's SerDes 207, thereby eliminating the need for an external light source. LEDs can also be directly modulated together with VCSELs.

[0026] The receiver portion of the CCPO PIC 300 may include a GaAs PD array 301. The detector array 301 and the modulator array 303 may be implemented on the same die or on separate dies. The GaAs PD array 301 may include a PIN detector and / or an avalanche photodiode (APD).

[0027] The TIA array 205 can be used to enhance the electrical signal strength of the received signal from the modulator 303 and PD 301 in the CCPO PIC 300.

[0028] Figures 1 to 3 Variations in the position and / or size of each box are also envisioned and disclosed herein.

[0029] By co-integrating components on a single substrate, the disclosed CCPO reduces signal loss, increases speed, and enhances energy efficiency. Smaller compound devices consume less power, withstand higher temperatures, and achieve higher speeds by being positioned closer to the ASIC. This design supports high-capacity data transfers from GPUs, CPUs, TPUs, or memory, meeting the demands of hyperscale data centers.

[0030] While this method and / or system has been described with reference to certain embodiments, those skilled in the art will understand that various changes can be made and equivalents can be substituted without departing from the scope of this method and / or system. Furthermore, many modifications can be made to adapt particular situations or materials to the teachings of this disclosure without departing from its scope. Therefore, it is intended that this method and / or system be limited to the specific embodiments disclosed, but rather that this method and / or system encompass all embodiments falling within the scope of the appended claims.

Claims

1. A device, the device comprising: A photonic integrated circuit (PIC) and an electronic integrated circuit (EIC), wherein the photonic integrated circuit (PIC) and the electronic integrated circuit (EIC) are mounted on a common package substrate, wherein the PIC includes: Modulator array; Photodetector (PD) array; An amplifier array, configured to enhance the signal strength from the modulator array and / or the PD array; and One or more passive optical components are configured to transmit optical signals between the PIC and the optical fiber.

2. The device of claim 1, wherein the modulator array comprises an electroabsorption modulator (EAM) and / or a Mach-Zehnder modulator (MZM).

3. The device of claim 1, wherein the one or more passive optical components are configured for polarization, rotation, multiplexing, routing, grating and / or beam spreading.

4. The device of claim 1, wherein the modulator array is fabricated using indium phosphide (InP) and gallium arsenide (GaAs).

5. The device of claim 1, wherein the PD array is fabricated using indium phosphide (InP) and gallium arsenide (GaAs).

6. The device of claim 1, wherein the PIC is configured for 2, 4, or 8 channels.

7. The device of claim 1, wherein the PIC comprises an indium phosphide (InP) semiconductor optical amplifier (SOA).

8. The device of claim 1, wherein the device operates in an uncooled manner using a remote continuous wave (CW) laser source.

9. The device of claim 1, wherein the PIC is operable to use wavelength division multiplexing (WDM) to increase the output signal density.

10. The device of claim 1, wherein the EIC is a very large-scale integrated circuit (HSIC).

11. A device, the device comprising: A photonic integrated circuit (PIC) and a serializer / deserializer (SerDes), wherein the photonic integrated circuit (PIC) and the serializer / deserializer (SerDes) are mounted on a common package substrate, wherein the PIC includes: Modulator array; Photodetector (PD) array; An amplifier array, configured to enhance the signal strength from the modulator array and / or the PD array; and One or more passive optical components are configured to transmit optical signals between the PIC and the optical fiber.

12. The device of claim 11, wherein the modulator array comprises an electroabsorption modulator (EAM) and / or a Mach-Zehnder modulator (MZM).

13. The device of claim 11, wherein the one or more passive optical components are configured for polarization, rotation, multiplexing, routing, grating and / or beam spreading.

14. The device of claim 11, wherein the modulator array is fabricated in one of indium phosphide (InP) and gallium arsenide (GaAs).

15. The device of claim 11, wherein the PD array is fabricated using indium phosphide (InP) and gallium arsenide (GaAs).

16. The device of claim 11, wherein the PIC is configured for 2, 4, or 8 channels.

17. The device of claim 11, wherein the PIC comprises an indium phosphide (InP) semiconductor optical amplifier (SOA).

18. The device of claim 11, wherein the device operates in an uncooled manner using a remote continuous wave (CW) laser source.

19. The device of claim 11, wherein wavelength division multiplexing (WDM) is used to increase the output signal density.

20. The device of claim 11, wherein the SerDes is embedded in a very large-scale integrated circuit (HSIC).