Control system and control method

Abstract

A control system (100) has an influence determination circuit (13) and a control circuit (CPU (11) and system control circuit (14)). The influence determination circuit (13) determines an influence caused by a power supply recovery of an object circuit (2) connected to a power supply (VDD) and whether or not the influence is allowed at least in an operation of a prescribed circuit (1) connected to the power supply (VDD). In a case where the influence determination circuit (13) determines that the influence is not allowed, the control circuit changes an operation state of at least one of the prescribed circuit (1) and a circuit connected to the power supply (VDD) other than the object circuit (2) and the prescribed circuit (1).

Description

Technical Field

[0001] This disclosure relates to control systems and control methods. Background Technology

[0002] For example, Patent Document 1 discloses a semiconductor circuit comprising: a circuit connected to a power supply wiring; a determination unit for determining whether a voltage drop in the power supply wiring will affect the operation of the circuit; and a power supply voltage control unit for controlling the change of the power supply voltage value based on the determination result of the determination unit.

[0003] (Existing technical documents) (Patent Documents) Patent Document 1: Japanese Patent Application Publication No. 2021-166036 Summary of the Invention

[0004] The problem that the invention aims to solve However, the problem with the technology disclosed in Patent Document 1 is that the time required for the power supply to be restored to the target circuit is longer because it is necessary to wait for the change of the power supply voltage value to be completed when the power supply to the circuit (target circuit) is restored.

[0005] Therefore, this disclosure provides a control system that facilitates high-speed power restoration of the target circuit.

[0006] Methods for solving problems The control system disclosed herein comprises: an influence determination circuit that determines whether an influence caused by the restoration of power to a target circuit connected to a power source is permitted, at least in the operation of a predetermined circuit connected to the power source; and a control circuit that, if the influence determination circuit determines that the influence is not permitted, changes the operating state of at least one of the predetermined circuit and a circuit connected to the power source other than the target circuit and the predetermined circuit.

[0007] The control system disclosed herein includes: a control circuit that, when the power supply to the target circuit connected to the power supply is restored, changes the operating state of at least one of a predetermined circuit connected to the power supply and a circuit other than the target circuit and the predetermined circuit connected to the power supply.

[0008] In the control method disclosed herein, it is determined whether the effect caused by the power restoration of the target circuit connected to the power source is permitted, at least in the operation of a specified circuit connected to the power source. If it is determined that the effect is not permitted, the operating state of at least one of the specified circuit and the circuits connected to the power source other than the target circuit and the specified circuit is changed.

[0009] The effects of the invention The control system, etc., according to one aspect of this disclosure has the advantage of facilitating high-speed power restoration of the target circuit. Attached Figure Description

[0010] Figure 1 This is a block diagram showing an outline of the control system involved in Implementation 1.

[0011] Figure 2 This is a timing diagram illustrating an example of the operation of the control system involved in Implementation Method 1.

[0012] Figure 3 This is a diagram showing an example of the data referenced by the control system involved in Implementation 1.

[0013] Figure 4 This is a block diagram showing an outline of the control system involved in Embodiment 2.

[0014] Figure 5 This is a timing diagram illustrating an example of the operation of the control system involved in Implementation Method 2.

[0015] Figure 6 This is a diagram showing an example of the data referenced by the control system involved in Embodiment 2. Detailed Implementation

[0016] Hereinafter, embodiments 1 and 2 will be described in detail with reference to the accompanying drawings.

[0017] Furthermore, the embodiments 1 and 2 described below are general or specific examples. The numerical values, shapes, materials, constituent elements, the arrangement and connection of constituent elements, steps, and the order of steps shown in embodiments 1 and 2 below are merely examples and are not intended to limit this disclosure.

[0018] (Implementation Method 1) The control system described below is an example of Implementation 1.

[0019] <1. Composition> First, refer to Figure 1 The configuration of the control system 100 according to Embodiment 1 will be described. Figure 1 This is a block diagram illustrating the general outline of the control system 100 according to Embodiment 1. The control system 100 is a system for controlling a specified circuit 1 and a target circuit 2 connected to a power supply VDD, particularly a system for controlling the specified circuit 1 and the target circuit 2 when the power supply to the target circuit 2 is restored. In this embodiment, the control system 100 is used in the manufacturing process of semiconductor chips such as LSI (Large-Scale Integrated Circuit).

[0020] The power supply VDD supplies power voltage to both the specified circuit 1 and the target circuit 2. For example, the power supply VDD is generated by a voltage regulator connected to an external power source.

[0021] The specified circuit 1 is a circuit directly connected to the power supply VDD, that is, a circuit connected to the power supply VDD. In other words, the specified circuit 1 is a circuit that operates by being powered by the power supply VDD, at least during the period when the target circuit 2 is controlled. For example, the specified circuit 1 is mounted on a semiconductor chip.

[0022] The object circuit 2 is a circuit connected to the power supply VDD via a power switch, and is the circuit that is subject to power restoration. Here, power restoration means that by turning on the power switch connected to the object circuit 2, the object circuit 2 changes from a state disconnected from the power supply VDD to a state where it is supplied with power by the power supply VDD. For example, the object circuit 2 is mounted on a semiconductor chip.

[0023] In this embodiment, the target circuit 2 is at least one of the first circuit 21 and the second circuit 22.

[0024] The first circuit 21, for example, includes a processor such as a DSP (Digital Signal Processor), and is a circuit that performs data science processing such as AI (Artificial Intelligence) processing. Furthermore, the first circuit 21 is not limited to AI processing; it can be any circuit that performs the specified processing. The first circuit 21 is connected to the power supply VDD via a power switch 31. Therefore, when the power switch 31 is on, the first circuit 21 is in an energized state, supplied with power by the power supply VDD; when the power switch 31 is off, the first circuit 21 is in a de-energized state, disconnected from the power supply VDD. Moreover, in the energized state, the first circuit 21 switches between an operating state and a stopped state under the control of the system control circuit 14, described later.

[0025] The second circuit 22 is the same as the first circuit 21, and for example, it includes a processor such as a DSP, and is a circuit that performs processing for data science purposes such as AI processing. Furthermore, the second circuit 22 is not limited to AI processing; it can be any circuit that performs the specified processing. In addition, the second circuit 22 performs different processing than the first circuit 21. The second circuit 22 is connected to the power supply VDD via a power switch 32. Therefore, when the power switch 32 is on, the second circuit 22 is in a powered-on state, supplied with power by the power supply VDD; when the power switch 32 is off, the second circuit 22 is in a disconnected state, disconnected from the power supply VDD. Furthermore, in the powered-on state, the second circuit 22 switches between an operating state and a stopped state under the control of the system control circuit 14, described later.

[0026] exist Figure 1 In the diagram, the first circuit 21 is designated as "DSP1", and the second circuit 22 is designated as "DSP2". Furthermore, the target circuit 2 can be a single circuit, or any one or more of three or more circuits.

[0027] The specified circuit 1 includes a CPU (Central Processing Unit) 11, a prediction circuit 12, an influence determination circuit 13, a system control circuit 14, and a cutoff control circuit 15. Furthermore, the CPU 11, prediction circuit 12, influence determination circuit 13, and system control circuit 14 constitute the control system 100. In this embodiment, the CPU 11 and system control circuit 14 constitute the control circuit of the control system 100. Alternatively, the control system 100 may also include the cutoff control circuit 15 as a component.

[0028] CPU 11 is the main processor of circuit 1, and performs various processes, such as controlling the operation of target circuit 2, in cooperation with system control circuit 14. For example, CPU 11, in cooperation with system control circuit 14, performs the process of switching the first circuit 21 to either an active state or a stopped state. Furthermore, for example, CPU 11, in cooperation with system control circuit 14, performs the process of switching the second circuit 22 to either an active state or a stopped state.

[0029] Furthermore, for example, if the CPU 11 determines that power restoration of the target circuit 2 is required, it performs the process of notifying the prediction circuit 12 of the power restoration mode by sending a signal indicating the situation to the prediction circuit 12.

[0030] Furthermore, for example, the CPU 11 performs a process of notifying the influence determination circuit 13 of the current processing mode by sending a signal indicating the current processing mode to the influence determination circuit 13. Here, the processing mode refers to the state of the target circuit 2 and the state of the CPU 11. The state of the target circuit 2 is either "operating" or "stopped". The state of the CPU 11 is either "operating" or "operating at a low speed below the normal processing speed".

[0031] In addition, CPU11 can be constructed from, for example, an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).

[0032] The prediction circuit 12 performs a process to predict the voltage drop of power supply VDD caused by the power restoration of the target circuit 2. Here, the voltage drop of power supply VDD is caused by the generation of rush current noise, which is generated along with the rapid current generated when the target circuit 2 restores power and begins charging.

[0033] In this embodiment, the prediction circuit 12 has the following characteristics: Figure 3 The data shown in (b) is used to predict the voltage drop of power supply VDD caused by inrush current noise, corresponding to the type of power recovery. In this embodiment, the types of power recovery include: power recovery of only the first circuit 21, power recovery of only the second circuit 22, and power recovery of both the first circuit 21 and the second circuit 22. Furthermore, the prediction circuit 12 notifies the influence determination circuit 13 of the prediction result by sending a signal indicating the prediction result to the influence determination circuit 13.

[0034] The influence determination circuit 13 performs the following determination process: it determines whether the influence caused by the power restoration of the target circuit 2 connected to the power supply VDD is permissible at least during the operation of the specified circuit 1 connected to the power supply VDD. Here, permissible influence from the power restoration of the target circuit 2 during the operation of the specified circuit 1 means that even if the voltage of the power supply VDD decreases as the power supply of the target circuit 2 is restored, the internal voltage supplied to the specified circuit 1 will not fall below the lower operating limit voltage of the specified circuit 1. Furthermore, the lower operating limit voltage refers to the minimum voltage required for the specified circuit 1 to operate.

[0035] In this embodiment, the influence determination circuit 13 determines whether the aforementioned influence is permissible based on the prediction result of the prediction circuit 12. Furthermore, the influence determination circuit 13 determines whether the influence is permissible based on the operating state of circuit 1 (i.e., the current processing mode) defined when the power supply to the target circuit 2 is restored. Specifically, the influence determination circuit 13 has the following characteristics... Figure 3 The data shown in (d) is used to determine, for each processing mode, whether the internal voltage after the voltage drop predicted by the prediction circuit 12 is not lower than the operating lower limit voltage of the specified circuit 1. Furthermore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result by sending a signal indicating the determination result to the system control circuit 14.

[0036] The system control circuit 14, in cooperation with the CPU 11, performs processing to control the operation of the target circuit 2. In this embodiment, the system control circuit 14 switches the first circuit 21 to either a powered-on state or a powered-off state by sending a signal to the cut-off control circuit 15 instructing the power switch 31 to be turned on or off. Furthermore, the system control circuit 14 switches the second circuit 22 to either a powered-on state or a powered-off state by sending a signal to the cut-off control circuit 15 instructing the power switch 32 to be turned on or off. Additionally, the system control circuit 14 switches the first circuit 21 to either an operating state or a stopped state by sending a signal to the first circuit 21, which is in the powered-on state. Furthermore, the system control circuit 14 switches the second circuit 22 to either an operating state or a stopped state by sending a signal to the second circuit 22, which is in the powered-on state.

[0037] In this embodiment, the system control circuit 14, in cooperation with the CPU 11, performs a process to change the operating state of at least one of the specified circuit 1 and the circuit connected to the power supply VDD (hereinafter also referred to as "non-target circuit") other than the target circuit 2 and the specified circuit 1, when the influence determination circuit 13 determines that the above influence is not allowed.

[0038] Specifically, for example, when the target circuit 2 is the first circuit 21, the system control circuit 14 changes the operating state of at least one of the designated circuit 1 (here, the CPU 11) and the second circuit 22 (which is not the target circuit) to prevent the designated circuit 1 from being affected as described above (i.e., to ensure that the internal voltage does not fall below the lower operating limit voltage of the designated circuit 1). Furthermore, for example, when the target circuit 2 is the second circuit 22, the system control circuit 14 changes the operating state of at least one of the designated circuit 1 and the first circuit 21 (which is not the target circuit) to prevent the designated circuit 1 from being affected as described above. Furthermore, for example, when the target circuit 2 is both the first circuit 21 and the second circuit 22, the system control circuit 14 changes the operating state of the designated circuit 1 to prevent the designated circuit 1 from being affected as described above.

[0039] The cut-off control circuit 15 controls the power switches 31 and 32 based on signals from the system control circuit 14. Specifically, the cut-off control circuit 15 turns on power switch 31 when it receives a signal indicating that power switch 31 is on. Furthermore, the cut-off control circuit 15 turns off power switch 31 when it receives a signal indicating that power switch 31 is off. Similarly, the cut-off control circuit 15 turns on power switch 32 when it receives a signal indicating that power switch 32 is off.

[0040] <2. Action> Next, using Figure 2 and Figure 3 An example of the operation of the control system 100 according to Embodiment 1 will be described. Figure 2 This is a timing diagram illustrating an example of the operation of the control system 100 according to Embodiment 1. Figure 3 This is a diagram showing an example of the data referenced by the control system 100 according to Embodiment 1.

[0041] Figure 3 (a) is the data referenced by CPU11 and is data indicating the type of power restoration of object circuit 2. Figure 3 (b) is the data referenced by the prediction circuit 12, and is the predicted value of the voltage drop caused by the inrush current noise generated during power restoration. Figure 3 (c) is the data referenced by the decision circuit 13, and is data indicating the processing mode, in other words, data indicating the type of operation state of the specified circuit 1 (CPU 11 in this case) and the target circuit 2. Figure 3 (d) is the data referenced by the decision circuit 13, and is the data representing the internal voltage and the lower limit voltage of each processing mode.

[0042] <2-1. Example of the first action> First, a first example of the operation of the control system 100 will be explained. The first example of the operation is the operation when the first circuit 21 is restored to power, that is, the operation when the first circuit 21 is the target circuit 2.

[0043] When CPU11 determines that power restoration of the first circuit 21 is required, it notifies the prediction circuit 12 of the power restoration mode (step S101). Here, CPU11 refers to... Figure 3 The data shown in (a) indicates that "Power Recovery Mode 1" is notified to the prediction circuit 12 because only the first circuit 21 performs power recovery.

[0044] The prediction circuit 12 predicts the voltage drop of power supply VDD caused by the power recovery of the target circuit 2 based on the type of power recovery mode received from the CPU 11 (step S102). Here, the prediction circuit 12 refers to... Figure 3 The data shown in (b) is used to predict a voltage drop of 50mV in the power supply VDD in "Power Recovery Mode 1". Then, the prediction circuit 12 informs the influence determination circuit 13 of the prediction result, i.e., the voltage drop of the power supply VDD (step S103).

[0045] Furthermore, at this time, the CPU 11 notifies the influence determination circuit 13 of the current processing mode (step S104). Here, the CPU 11 refers to Figure 3 The data shown in (c) indicates that since the first circuit 21 is in a stopped state, the second circuit 22 is in an active state, and the CPU 11 is in an active state, the "processing mode 2" is notified to the influence determination circuit 13. In addition, step S104 can be executed before steps S102 and S103, or it can be executed simultaneously with steps S102 and S103.

[0046] The impact determination circuit 13 determines, based on the type of the current processing mode received from the CPU 11 and the amount of voltage drop of the power supply VDD received from the prediction circuit 12, whether the impact caused by the power restoration of the target circuit 2 is permissible in the operation of the specified circuit 1 (step S105). Here, the impact determination circuit 13 refers to... Figure 3 The data shown in (d) indicates that the internal voltage is 930mV because the current processing mode is "processing mode 2". Since the voltage drop of the power supply VDD is 50mV, the internal voltage after the voltage drop is 880 (=930-50)mV. The influence determination circuit 13 determines that this internal voltage is lower than the lower limit voltage of 900mV, therefore the influence is not allowed.

[0047] Furthermore, when the current processing mode is "Processing Mode 1", the internal voltage after the voltage drop is 930 (=980-50) mV. The influence determination circuit 13 determines that the internal voltage is not lower than 900mV, which is the lower limit voltage for operation, and thus determines that the influence is allowed. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "Processing Mode 1" (step S106).

[0048] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the specified circuit 1 and the non-target circuit (step S107). Here, the system control circuit 14 controls the second circuit 22, which is the non-target circuit, to switch to a stopped state, thereby transferring the current processing mode from "processing mode 2" to "processing mode 1". Afterwards, the system control circuit 14 notifies the cut-off control circuit 15 of an instruction to restore power to the target circuit 2 (here, the first circuit 21) (step S108).

[0049] Based on an instruction from the system control circuit 14, the cut-off control circuit 15 switches the target circuit 2 (here, the first circuit 21) to a powered-on state by turning on the power switch 31 (step S109). As a result, a surge current is generated due to charging the first circuit 21, and the surge current noise accompanying this surge current causes a drop in the power supply VDD voltage. However, since the CPU 11's processing mode has been changed to "processing mode 1," the internal voltage after the voltage drop will not fall below the lower operating limit voltage, and therefore will not affect the operation of the specified circuit 1.

[0050] Here, since the time required for the first circuit 21 to charge is pre-stored in the memory of the cut-off control circuit 15, when the time has elapsed after the power switch 31 is turned on, the cut-off control circuit 15 notifies the system control circuit 14 that charging is complete (step S110).

[0051] When the system control circuit 14 receives a notification from the cut-off control circuit 15 that charging is complete, it cooperates with the CPU 11 to switch the non-target circuit (here, the second circuit 22) from the stopped state to the operating state, thereby restoring the operating state of the non-target circuit to its original state (step S111). As a result, the CPU 11's processing mode is restored from "processing mode 1" to the original "processing mode 2". In other words, when a predetermined time has elapsed since the power supply to the target circuit 2 was restored, the control circuit (CPU 11 and system control circuit 14) restores the changed operating state to the previous operating state. Then, the system control circuit 14, in cooperation with the CPU 11, controls the target circuit 2 (here, the first circuit 21) from the stopped state to the operating state, thereby starting the target circuit 2 (step S112).

[0052] <2-2. Example of the second action> Next, a second example of the operation of the control system 100 will be described. The second example is the operation when the second circuit 22 is restored to power, that is, the operation when the second circuit 22 is the target circuit 2.

[0053] When CPU11 determines that power restoration of the second circuit 22 is required, it notifies the prediction circuit 12 of the power restoration mode (step S101). Here, CPU11 refers to... Figure 3 The data shown in (a) indicates that "Power Recovery Mode 2" is notified to the prediction circuit 12 because only the second circuit 22 performs power recovery.

[0054] The prediction circuit 12 predicts the voltage drop of power supply VDD caused by the power recovery of the target circuit 2 based on the type of power recovery mode received from the CPU 11 (step S102). Here, the prediction circuit 12 refers to... Figure 3The data shown in (b) is used to predict a voltage drop of 60mV in the power supply VDD in "Power Recovery Mode 2". Then, the prediction circuit 12 informs the influence determination circuit 13 of the prediction result, i.e., the amount of voltage drop in the power supply VDD (step S103).

[0055] Furthermore, at this time, the CPU 11 notifies the influence determination circuit 13 of the current processing mode (step S104). Here, the CPU 11 refers to Figure 3 The data shown in (c) indicates that since the first circuit 21 is in operation, the second circuit 22 is in a stopped state, and the CPU 11 is in operation, the "processing mode 3" is notified to the influence determination circuit 13. In addition, step S104 can be executed before steps S102 and S103, or it can be executed simultaneously with steps S102 and S103.

[0056] The impact determination circuit 13 determines, based on the type of the current processing mode received from the CPU 11 and the amount of voltage drop of the power supply VDD received from the prediction circuit 12, whether the impact caused by the power restoration of the target circuit 2 is permissible in the operation of the specified circuit 1 (step S105). Here, the impact determination circuit 13 refers to... Figure 3 The data shown in (d) indicates that the internal voltage is 940mV because the current processing mode is "processing mode 3". Since the voltage drop of power supply VDD is 60mV, the internal voltage after the voltage drop is 880 (=940-60)mV. The influence determination circuit 13 determines that this internal voltage is lower than the lower limit voltage of 900mV, therefore the influence is not allowed.

[0057] Furthermore, when the current processing mode is "Processing Mode 1", the internal voltage after the voltage drop is 920 (=980-60) mV. The influence determination circuit 13 determines that the internal voltage is not lower than 900mV, which is the lower limit voltage for operation, and thus determines that the influence is allowed. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "Processing Mode 1" (step S106).

[0058] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the designated circuit 1 and the non-target circuit (step S107). Here, the system control circuit 14 controls the first circuit 21, which is the non-target circuit, to switch to a stopped state, thereby transferring the current processing mode from "processing mode 3" to "processing mode 1". Afterwards, the system control circuit 14 notifies the cut-off control circuit 15 of an instruction to restore power to the target circuit 2 (here, the second circuit 22) (step S108).

[0059] Based on an instruction from the system control circuit 14, the cut-off control circuit 15 switches the target circuit 2 (here, the second circuit 22) to a powered-on state by turning on the power switch 32 (step S109). As a result, a surge current is generated due to charging the second circuit 22, and the surge current noise accompanying this surge current causes a drop in the power supply VDD voltage. However, since the CPU 11's processing mode has been changed to "processing mode 1," the internal voltage after the voltage drop will not fall below the lower operating limit voltage, and therefore will not affect the operation of the specified circuit 1.

[0060] Here, since the time required for the second circuit 22 to charge is pre-stored in the memory of the cut-off control circuit 15, when that time has elapsed after the power switch 32 is turned on, the cut-off control circuit 15 notifies the system control circuit 14 that charging is complete (step S110).

[0061] When the system control circuit 14 receives a notification from the cut-off control circuit 15 that charging is complete, it cooperates with the CPU 11 to switch the non-target circuit (here, the first circuit 21) which is in a stopped state to an operating state, thereby restoring the operating state of the non-target circuit to its original state (step S111). As a result, the CPU 11's processing mode is restored from "processing mode 1" to its original "processing mode 3". In other words, when a predetermined time has elapsed since the power supply to the target circuit 2 was restored, the control circuit (CPU 11 and system control circuit 14) restores the changed operating state to the operating state before the change. Then, the system control circuit 14, in cooperation with the CPU 11, controls the target circuit 2 (here, the second circuit 22) which is in a stopped state to an operating state, thereby starting the target circuit 2 (step S112).

[0062] <2-3. Example of the third action> Next, a third example of the operation of the control system 100 will be described. The third example is the operation when both the first circuit 21 and the second circuit 22 are restored to power, that is, the operation when both the first circuit 21 and the second circuit 22 are the target circuits 2.

[0063] When CPU11 determines that power restoration of the first circuit 21 and the second circuit 22 is required, it notifies the prediction circuit 12 of the power restoration mode (step S101). Here, CPU11 refers to Figure 3 The data shown in (a) indicates that "Power Recovery Mode 3" is notified to the prediction circuit 12 because only the second circuit 22 performs power recovery.

[0064] The prediction circuit 12 predicts the voltage drop of power supply VDD caused by the power recovery of the target circuit 2 based on the type of power recovery mode received from the CPU 11 (step S102). Here, the prediction circuit 12 refers to... Figure 3 The data shown in (b) is used to predict a voltage drop of 90mV in the power supply VDD in "Power Recovery Mode 3". Then, the prediction circuit 12 informs the influence determination circuit 13 of the prediction result, i.e., the voltage drop of the power supply VDD (step S103).

[0065] Furthermore, at this time, the CPU 11 notifies the influence determination circuit 13 of the current processing mode (step S104). Here, the CPU 11 refers to Figure 3 The data shown in (c) indicates that since the first circuit 21 is in a stopped state, the second circuit 22 is in a stopped state, and the CPU 11 is in an active state, the "processing mode 1" is notified to the influence determination circuit 13. In addition, step S104 can be executed before steps S102 and S103, or it can be executed simultaneously with steps S102 and S103.

[0066] The impact determination circuit 13 determines, based on the type of the current processing mode received from the CPU 11 and the amount of voltage drop of the power supply VDD received from the prediction circuit 12, whether the impact caused by the power restoration of the target circuit 2 is permissible in the operation of the specified circuit 1 (step S105). Here, the impact determination circuit 13 refers to... Figure 3 The data shown in (d) indicates that the internal voltage is 980mV because the current processing mode is "processing mode 1". Since the voltage drop of power supply VDD is 90mV, the internal voltage after the voltage drop is 890 (=980-90)mV. The influence determination circuit 13 determines that this is below the 900mV lower limit voltage for operation, therefore the influence is not allowed.

[0067] Furthermore, when the current processing mode is "processing mode 4", the internal voltage after the voltage drop is 910 (=1000-90) mV. The influence determination circuit 13 determines that the internal voltage is not lower than 900mV, which is the lower limit voltage for operation, and thus determines that the influence is allowed. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "processing mode 4" (step S106).

[0068] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the designated circuit 1 and the non-target circuit (step S107). Here, the system control circuit 14 controls the designated circuit 1 (here, the CPU 11) to switch to a low-speed operation state, thereby transferring the current processing mode from "processing mode 1" to "processing mode 4". In other words, the control circuit (CPU 11 and system control circuit 14) changes the operating speed of the designated circuit 1 (here, the CPU 11) according to the degree of voltage drop of the power supply VDD. Afterwards, the system control circuit 14 notifies the cut-off control circuit 15 of an instruction to restore power to the target circuits 2 (here, the first circuit 21 and the second circuit 22) (step S108).

[0069] Based on an instruction from the system control circuit 14, the cutoff control circuit 15 switches the target circuits 2 (here, the first circuit 21 and the second circuit 22) to a powered-on state by turning on the power switches 31 and 32 (step S109). As a result, a surge current is generated due to charging the first circuit 21 and the second circuit 22, and the surge current noise accompanying this surge current causes a drop in the power supply VDD voltage. However, since the CPU 11's processing mode has been changed to "processing mode 4," the internal voltage after the voltage drop will not fall below the lower operating limit voltage, and therefore will not affect the operation of the specified circuit 1.

[0070] Here, since the charging time required for the first circuit 21 and the second circuit 22 is pre-stored in the memory of the cut-off control circuit 15, when the corresponding time has elapsed after the power switches 31 and 32 are turned on, the cut-off control circuit 15 notifies the system control circuit 14 that charging is complete (step S110).

[0071] When the system control circuit 14 receives a notification from the cut-off control circuit 15 that charging is complete, it cooperates with the CPU 11 to switch the CPU 11 from a low-speed operation state to an operation state, thereby restoring the operation state of the CPU 11 to its original state (step S111). As a result, the processing mode of the CPU 11 is restored from "processing mode 4" to the original "processing mode 1". In other words, when a predetermined time has elapsed since the power supply to the target circuit 2 was restored, the control circuit (CPU 11 and system control circuit 14) restores the changed operation state to the previous operation state. Then, the system control circuit 14, in cooperation with the CPU 11, controls the target circuit 2 (here, the first circuit 21 and the second circuit 22) from a stopped state to an operation state, thereby starting the target circuit 2 (step S112).

[0072] <3. Advantages> The advantages of the control system 100 according to Embodiment 1 will be explained below. First, the problems existing in the technology disclosed in Patent Document 1 will be explained. The technology disclosed in Patent Document 1 avoids affecting the operation of the target circuit by controlling the change of the power supply voltage value when it is determined that a voltage drop in the power supply wiring will affect the operation of the target circuit. However, the problem existing in the technology disclosed in Patent Document 1 is that since the change of the power supply voltage value must be completed when the power supply to the target circuit is restored, the time required for power restoration will be longer.

[0073] In order to maximize the power reduction effect of switching the target circuit to the off state, it is effective to switch the target circuit to the off state at a high frequency for a long period of time. However, in the technology disclosed in Patent Document 1, as mentioned above, since the time required for the target circuit to restore power is longer, it is necessary to shorten the period during which the target circuit is in the off state and reduce the frequency of switching the target circuit to the off state, thus easily consuming unnecessary power.

[0074] In contrast, the control system 100 according to Embodiment 1 has the advantage that, since it avoids the impact of power restoration of the target circuit 2 on the specified circuit 1 by changing the operating state of the circuit rather than suppressing inrush current noise, it is not necessary to change the power supply voltage value as disclosed in Patent Document 1, thus making it easier to achieve high-speed power restoration of the target circuit 2. As a result, compared with the technology disclosed in Patent Document 1, the control system 100 according to Embodiment 1 has the advantage that it is not necessary to shorten the period during which the target circuit 2 is in the off state, nor is it necessary to reduce the frequency of switching the target circuit 2 to the off state, thus avoiding unnecessary power consumption.

[0075] Furthermore, as a method to prevent the power restoration of the target circuit 2 from affecting the designated circuit 1, a method of suppressing inrush current noise by turning on the power switches 31 and 32 in stages can also be considered. In contrast, in the control system 100 according to Embodiment 1, the impact of the power restoration of the target circuit 2 on the designated circuit 1 can be avoided without suppressing inrush current noise. Therefore, it is not necessary to turn on the power switches 31 and 32 in stages, thereby facilitating the high-speed power restoration of the target circuit 2.

[0076] Furthermore, in the control system 100 of Embodiment 1, although it takes a certain amount of time to restore the changed operating state to the original operating state, this time is shorter than the time required to change the power supply voltage value and the time required to turn on the power switches 31 and 32 in stages. Therefore, it has almost no impact on the high-speed power restoration of the target circuit 2.

[0077] (Implementation Method 2) The control system involved in Embodiment 2 will be described below.

[0078] <1. Composition> First, refer to Figure 4 The configuration of the control system 100A according to Embodiment 2 will be described. Figure 4 This is a block diagram illustrating the general outline of the control system 100A according to Embodiment 2. The control system 100A according to Embodiment 2 differs from the control system 100 according to Embodiment 1 in that the specified circuit 1 further includes a process monitor 16 and a voltage monitor 17. Hereinafter, descriptions of aspects common to the control system 100 according to Embodiment 1 will be appropriately omitted.

[0079] The process monitor 16 monitors the process corners in the semiconductor chip manufacturing process. Here, the process corner refers to the deviation in the electrical characteristics of the semiconductor chip caused by manufacturing deviations. Since the operating frequency of the process monitor 16 varies according to the process corner, the process corner is monitored by monitoring its operating frequency. In this embodiment, the process monitor 16 monitors whether the process corner is "Fast," "Typical," or "Slow." The monitoring results of the process monitor 16 are provided for reference by the prediction circuit 12 and the influence determination circuit 13.

[0080] Voltage monitor 17 monitors the internal voltage supplied from power supply VDD to designated circuit 1. The monitoring results of voltage monitor 17 are used as the measured value of the internal voltage for reference by influence determination circuit 13.

[0081] <2. Action> Next, using Figure 5 and Figure 6 An example of the operation of the control system 100A according to Embodiment 2 will be described. Figure 5 This is a timing diagram illustrating an example of the operation of the control system 100A according to Embodiment 2. Figure 6 This is a diagram showing an example of the data referenced by the control system 100A according to Embodiment 2.

[0082] Figure 6 (a) is the data referenced by CPU11 and is data indicating the type of power restoration of object circuit 2. Figure 6 (b) is the data referenced by the prediction circuit 12, and is the data representing the voltage drop caused by the inrush current noise generated during power recovery at each process corner. Figure 6 Only the data in "Power Recovery Mode 1" is shown in (b). Figure 6 (c) is the data referenced by the decision circuit 13, and is data indicating the type of processing mode. Figure 6 (d) is the data referenced by the decision circuit 13, and is the data representing the lower limit voltage of operation under each process. Figure 6 (e) is the data referenced by the decision circuit 13, and is an example of the measured value of the internal voltage obtained by the voltage monitor 17 under various processes. Additionally, in Figure 6 In (e), the diagrams of the measured values ​​of the internal voltage obtained by the voltage monitor 17 in "processing mode 3" and "processing mode 4" are omitted.

[0083] The following describes an example of the operation of the control system 100A when the first circuit 21 is the object circuit 2.

[0084] When CPU11 determines that power restoration of the first circuit 21 is required, it notifies the prediction circuit 12 of the power restoration mode (step S201). Here, CPU11 refers to... Figure 6 The data shown in (a) indicates that "Power Recovery Mode 1" is notified to the prediction circuit 12 because only the first circuit 21 performs power recovery.

[0085] The prediction circuit 12 reads the process corner by reading the monitoring results from the process monitor 16 (step S202). Then, the prediction circuit 12 predicts the voltage drop of power supply VDD caused by the power recovery of the target circuit 2 based on the process corner read from the process monitor 16 and the type of power recovery mode received from the CPU 11 (step S203). For example, the prediction circuit 12 refers to... Figure 6 The data shown in (b) predicts a 48mV voltage drop in power supply VDD during "Power Recovery Mode 1" when the process corner is "Typical". Furthermore, for example, when the process corner is "Fast", prediction circuit 12 predicts a 50mV voltage drop in power supply VDD during "Power Recovery Mode 1". Then, prediction circuit 12 notifies the influence determination circuit 13 of the prediction result, i.e., the amount of voltage drop in power supply VDD (step S204).

[0086] Furthermore, at this time, the CPU 11 notifies the influence determination circuit 13 of the current processing mode (step S205). Here, the CPU 11 refers to Figure 6 The data shown in (c) indicates that since the first circuit 21 is in a stopped state, the second circuit 22 is in an active state, and the CPU 11 is in an active state, the "processing mode 2" is notified to the influence determination circuit 13. In addition, step S205 can be executed before steps S202 to S204, or it can be executed simultaneously with steps S202 to S204.

[0087] The influence determination circuit 13 reads the process corner by reading the monitoring results from the process monitor 16 (step S206). Furthermore, the influence determination circuit 13 reads the measured value of the internal voltage by reading the monitoring results from the voltage monitor 17 (step S207). Additionally, the order of steps S206 and S207 can be reversed, or they can be performed simultaneously. Furthermore, steps S206 and S207 can also be performed before step S205.

[0088] Next, the influence determination circuit 13 determines whether the influence caused by the power restoration of the target circuit 2 is allowed in the operation of the specified circuit 1 based on the process corner read from the process monitor 16, the measured value of the internal voltage read from the voltage monitor 17, the type of the current processing mode received from the CPU 11, and the voltage drop of the power supply VDD received from the prediction circuit 12 (step S208).

[0089] First, the influence determination circuit 13 is referenced. Figure 6 Using the data shown in (d), the lower limit voltage of operation corresponding to the process corner is determined. For example, when the process corner is "typical", the influence determination circuit 13 determines that the lower limit voltage of operation is 890mV; when the process corner is "fast", the lower limit voltage of operation is determined to be 885mV.

[0090] Here, as Figure 6 As shown in (e), the measured value of the internal voltage varies depending on the current processing mode and process angle. For example, when the current processing mode is "Processing Mode 2" and the process angle is "Typical", the measured value of the internal voltage is 940mV. Furthermore, for example, when the current processing mode is "Processing Mode 2" and the process angle is "Fast", the measured value of the internal voltage is 930mV.

[0091] Thus, for example, in the case where the current processing mode is "processing mode 2" and the process corner is "typical", since the measured value of the internal voltage is 940mV and the voltage drop of the power supply VDD is 48mV, it can be concluded that the internal voltage after the voltage drop is 892 (=940-48)mV. The influence determination circuit 13 determines that the internal voltage is higher than 890mV, which is the lower limit voltage of operation, and thus determines that the influence is allowed.

[0092] On the other hand, for example, when the current processing mode is "Processing Mode 2" and the process corner is "Fast", since the measured value of the internal voltage is 930mV and the voltage drop of the power supply VDD is 50mV, it can be concluded that the internal voltage after the voltage drop is 880 (=930-50)mV. The influence determination circuit 13 determines that the internal voltage is lower than 885mV, which is the lower limit voltage for operation, that is, it determines that the influence is not allowed. Hereinafter, it will be explained assuming that the process corner is "Fast".

[0093] Here, with the current processing mode set to "Processing Mode 1", the internal voltage after the voltage drop is 930 (=980-50) mV. The influence determination circuit 13 determines that this internal voltage is not lower than 885mV, which serves as the lower limit voltage for operation, and therefore determines that the influence is permissible. Thus, the influence determination circuit 13 notifies the system control circuit 14 of the determination that the current processing mode needs to be changed to "Processing Mode 1" (step S209).

[0094] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the designated circuit 1 and the non-target circuit (step S210). Here, the system control circuit 14 controls the second circuit 22, which is the non-target circuit, to switch to a stopped state, thereby transferring the current processing mode from "processing mode 2" to "processing mode 1". Afterwards, the system control circuit 14 notifies the cut-off control circuit 15 of an instruction to restore power to the target circuit 2 (here, the first circuit 21) (step S211).

[0095] Based on an instruction from the system control circuit 14, the cut-off control circuit 15 switches the target circuit 2 (here, the first circuit 21) to a powered-on state by turning on the power switch 31 (step S212). As a result, a surge current is generated due to charging the first circuit 21, and the surge current noise accompanying this surge current causes a drop in the power supply VDD voltage. However, since the CPU 11's processing mode has been changed to "processing mode 1," the internal voltage after the voltage drop will not fall below the lower operating limit voltage, and therefore will not affect the operation of the specified circuit 1.

[0096] Here, since the time required for the first circuit 21 to charge is pre-stored in the memory of the cut-off control circuit 15, when the time has elapsed after the power switch 31 is turned on, the cut-off control circuit 15 notifies the system control circuit 14 that charging is complete (step S213).

[0097] When the system control circuit 14 receives a notification from the cut-off control circuit 15 that charging is complete, it cooperates with the CPU 11 to switch the non-target circuit (here, the second circuit 22) from the stopped state to the operating state, thereby restoring the operating state of the non-target circuit to its original state (step S214). As a result, the CPU 11's processing mode is restored from "processing mode 1" to the original "processing mode 2". In other words, after a predetermined time has elapsed since the power supply to the target circuit 2 was restored, the control circuit (CPU 11 and system control circuit 14) restores the changed operating state to the operating state before the change. Then, the system control circuit 14, in cooperation with the CPU 11, controls the target circuit 2 (here, the first circuit 21) from the stopped state to the operating state, thereby starting the target circuit 2 (step S215).

[0098] As described above, the advantage of the control system 100A according to Embodiment 2 is that, by further referring to the condition of the semiconductor chip manufacturing process and the measured value of the voltage supplied to the specified circuit 1, it is easy to determine with high accuracy whether the effect caused by the power restoration of the target circuit 2 is allowed in the operation of the specified circuit 1.

[0099] Furthermore, in Embodiment 2, the influence determination circuit 13 may also refer to at least one of the measured values ​​of the process corner and the internal voltage. In other words, the influence determination circuit 13 may also determine whether the influence caused by the power restoration of the target circuit 2 is permissible during the operation of the specified circuit 1 based on at least one of information related to the manufacturing process of the semiconductor chip and information related to the voltage supplied to the specified circuit 1.

[0100] (Other implementation methods) As described above, the control system involved in one or more embodiments of this disclosure has been described based on embodiments 1 and 2, but this disclosure is not limited to these embodiments 1 and 2. Various modifications that can be conceived by those skilled in the art to embodiments 1 and 2, as well as ways of constructing by combining the constituent elements of different embodiments, may also be included within the scope of one or more embodiments of this disclosure without departing from the spirit of this disclosure.

[0101] For example, in Embodiment 1, the control system 100 may consist only of a control circuit (CPU 11 and system control circuit 14). That is, the control system 100 may include a control circuit that is used to change the operating state of at least one of the specified circuit 1 connected to the power supply VDD and the circuits connected to the power supply VDD other than the specified circuit 2 when the power supply to the target circuit 2 connected to the power supply VDD is restored.

[0102] For example, this disclosure can be implemented not only as a control system, but also as a control method including steps (processes) performed by the constituent elements constituting the control system.

[0103] A control method is a method executed by the control system. For example... Figure 2 As shown, in the control method, it is determined whether the effect of power restoration of the target circuit 2 connected to the power supply VDD is allowed, at least in the operation of the specified circuit 1 connected to the power supply VDD (step S105). If it is determined that the above effect is not allowed, the operation state of at least one of the specified circuit 1 and the circuits connected to the power supply VDD other than the target circuit 2 and the specified circuit 1 is changed (step S107).

[0104] In addition, the control method may be, for example, the following method: when the power supply of the object circuit 2 connected to the power supply VDD is restored, the operating state of at least one of the designated circuit 1 connected to the power supply VDD and the circuits connected to the power supply VDD other than the object circuit 2 and the designated circuit 1 is changed.

[0105] For example, this disclosure can be implemented as a program for causing a computer (processor) to perform the steps included in a control method. There can be one or more processors. Furthermore, this disclosure can also be implemented as a non-transitory computer-readable recording medium such as a CD-ROM containing the program.

[0106] For example, in the case where this disclosure is implemented by a program (software), each step is executed by utilizing the computer's hardware resources such as the CPU, memory, and input / output circuits. That is, each step is executed by the CPU acquiring data from memory or input / output circuits and performing calculations, or by outputting the calculation results to memory or input / output circuits.

[0107] Furthermore, in embodiments 1 and 2, the components included in the control system can be constructed by dedicated hardware, or they can be implemented by executing software programs suitable for each component. Each component can also be implemented by a program execution unit such as a CPU or processor reading and executing software programs recorded on a recording medium such as a hard disk or semiconductor memory.

[0108] The functions of the control systems described in embodiments 1 and 2 are implemented, in whole or in part, as typical integrated circuits, i.e., LSIs. These functions can be fabricated on a single chip, or some or all of them can be fabricated on a single chip. Furthermore, integrated circuitry is not limited to LSIs; it can also be implemented by dedicated circuits or general-purpose processors. FPGAs that are programmable after LSI fabrication, or reconfigurable processors that allow for the connection or configuration of circuit units within the LSI, can also be utilized.

[0109] (Postscript) Based on the descriptions of embodiments 1 and 2 above, the following technology is disclosed.

[0110] (Technology 1) A control system comprising: An influence determination circuit determines whether the influence caused by the restoration of power to the object circuit connected to the power supply is permissible, at least during the operation of a specified circuit connected to said power supply; and The control circuit, when the influence determination circuit determines that the influence is not allowed, changes the operating state of at least one of the specified circuit and the circuit connected to the power supply other than the target circuit and the specified circuit.

[0111] Therefore, the advantage is that by changing the operating state of the circuit rather than suppressing the inrush current noise, the influence of the power restoration of the target circuit on the specified circuit can be avoided, thus making it easy to achieve high-speed power restoration of the target circuit.

[0112] (Technology 2) The control system as described in Technology 1, The control system further includes a prediction circuit that predicts the voltage drop of the power supply caused by the power supply recovery of the target circuit. The impact determination circuit determines whether the impact is permissible based on the prediction results of the prediction circuit.

[0113] Accordingly, the advantage is that, since the permissibility of the effect is determined based on the predicted degree of voltage drop in the power supply, it is easy to determine with high accuracy whether the effect is permissible in the operation of the specified circuit.

[0114] (Technology 3) The control system as described in Technology 2, The control circuit adjusts the operating speed of the specified circuit according to the degree of voltage drop of the power supply.

[0115] Therefore, the advantage is that it is easy to control the degree of change in the operating speed of the specified circuit to a minimum.

[0116] (Technology 4) The control system as described in any one of Technologies 1 to 3, The influence determination circuit determines whether the influence is permissible based on the operating state of the specified circuit when the power supply to the target circuit is restored.

[0117] Therefore, the advantage is that, since the operating state of the circuit is specified when the power supply to the target circuit is restored, it is sometimes not necessary to change the operating state of the target circuit, thus making it easier to reduce the impact on the application.

[0118] (Technology 5) The control system as described in any one of Technologies 1 to 4, When a predetermined time has elapsed since the power supply to the object circuit has been restored, the control circuit will restore the changed operating state to the operating state before the change.

[0119] Accordingly, the advantage is that, since the changed operating state is restored to the operating state before the change, the specified circuit and the object circuit can perform the originally predetermined operation.

[0120] (Technology 6) The control system as described in any one of Technologies 1 to 5, The object circuit is mounted on a semiconductor chip. The influence determination circuit determines whether the influence is permissible based on at least one of information related to the manufacturing process of the semiconductor chip and information related to the voltage supplied to the power source.

[0121] Accordingly, the advantage is that, by further referring to at least one of the conditions of the semiconductor chip manufacturing process and the measured value of the voltage supplied to the specified circuit, it is easy to determine with high accuracy whether the influence is permissible in the operation of the specified circuit.

[0122] (Technology 7) A control system comprising: The control circuit, when the power supply to the target circuit connected to the power supply is restored, changes the operating state of at least one of the specified circuit connected to the power supply and the circuits connected to the power supply other than the target circuit and the specified circuit.

[0123] Therefore, the advantage is that by changing the operating state of the circuit rather than suppressing the inrush current noise, the influence of the power restoration of the target circuit on the specified circuit can be avoided, thus making it easy to achieve high-speed power restoration of the target circuit.

[0124] (Technology 8) A control method, In the control method, Determine whether the effect of power restoration to the object circuit connected to the power source is permissible, at least within the operation of the specified circuit connected to said power source. If it is determined that the effect is not permissible, the operating state of at least one of the specified circuit and the circuits connected to the power supply other than the target circuit and the specified circuit shall be changed.

[0125] Therefore, the advantage is that by changing the operating state of the circuit rather than suppressing the inrush current noise, the influence of the power restoration of the target circuit on the specified circuit can be avoided, thus making it easy to achieve high-speed power restoration of the target circuit.

[0126] Industrial availability This disclosure can be applied, for example, to circuits used in semiconductor chip manufacturing processes.

[0127] Symbol Explanation 100, 100A control system 1. Specified circuit 11 CPU (Control Circuit) 12 Prediction Circuit 13 Influence Determination Circuit 14 System control circuit (control circuit) 15. Disconnect the control circuit. 16 Process Monitors 17. Voltage Monitor 2. Object Circuit 21 First Circuit 22 Second Circuit 31, 32 Power switches VDD power supply

Claims

1. A control system, comprising: An influence determination circuit determines whether the influence caused by the restoration of power to the object circuit connected to the power supply is permissible, at least during the operation of a specified circuit connected to said power supply; and The control circuit, when the influence determination circuit determines that the influence is not allowed, changes the operating state of at least one of the specified circuit and the circuit connected to the power supply other than the target circuit and the specified circuit.

2. The control system as described in claim 1, The control system further includes a prediction circuit that predicts the voltage drop of the power supply caused by the power supply recovery of the target circuit. The influence determination circuit determines whether the influence is permissible based on the prediction result of the prediction circuit.

3. The control system as described in claim 2, The control circuit adjusts the operating speed of the specified circuit according to the degree of voltage drop of the power supply.

4. The control system as described in any one of claims 1 to 3, The influence determination circuit determines whether the influence is permissible based on the operating state of the specified circuit when the power supply to the target circuit is restored.

5. The control system as described in any one of claims 1 to 4, When a predetermined time has elapsed since the power supply to the object circuit has been restored, the control circuit will restore the changed operating state to the operating state before the change.

6. The control system as described in any one of claims 1 to 5, The object circuit is mounted on a semiconductor chip. The influence determination circuit determines whether the influence is permissible based on at least one of information related to the manufacturing process of the semiconductor chip and information related to the voltage of the power supply.

7. A control system, comprising: The control circuit, when the power supply to the target circuit connected to the power supply is restored, changes the operating state of at least one of the specified circuit connected to the power supply and the circuits connected to the power supply other than the target circuit and the specified circuit.

8. A control method, wherein in the control method, Determine whether the effect of power restoration to the object circuit connected to the power source is permissible, at least within the operation of the specified circuit connected to said power source. If it is determined that the effect is not permissible, the operating state of at least one of the specified circuit and the circuits connected to the power supply other than the target circuit and the specified circuit shall be changed.

Images