Control apparatus, optical system, and lithographic apparatus

Abstract

The invention relates to a control device (100) for controlling at least one actuator (200) for actuating an optical element (310) in an optical system (300), the control device (100) comprising an amplifier (110) configured to receive a supply voltage (V1) provided at an input node (K1) and to provide a drive voltage (V2) for the actuator (200) at an output node (K2), wherein the amplifier (110) comprises a resistive voltage divider (R1, R2) with a first resistor (R1) and a second resistor (R2) for adjusting a gain of the amplifier (110) and a capacitive voltage divider (C1, C2) with a first capacitor (C1) and a second capacitor (C2), wherein the capacitive voltage divider (C1, C2) is connected in parallel to the resistive voltage divider (R1, R2).

Description

Technical Field

[0001] The present invention relates to a control device for controlling at least one actuator in an optical system, an optical system having such a control device, and a photolithography apparatus having such an optical system.

[0002] The contents of priority application DE 10 2024 202 944.0 are incorporated herein by reference in their entirety. Background Technology

[0003] Microlithography equipment is known to include actuable optical elements, such as microlens arrays or micromirror arrays. Microlithography is used to fabricate microstructured components, such as integrated circuits. The microlithography process is performed using lithography equipment that includes an illumination system and a projection system.

[0004] To achieve increasingly smaller structures in the fabrication of integrated circuits, EUV lithography equipment using light with wavelengths ranging from 0.1 nm to 30 nm, particularly 13.5 nm, is currently under development. Since most materials absorb light at this wavelength, such EUV lithography equipment requires the use of reflective optical units, i.e., mirrors, instead of the refractive optical units, i.e., lens elements, used previously.

[0005] Here, the image of a mask (mask plate) illuminated by an illumination system is projected onto a substrate (e.g., a silicon wafer) via a projection system. This substrate is coated with a photosensitive layer (photoresist) and arranged in the image plane of the projection system to transfer the mask structure onto the photosensitive coating of the substrate. Actuable optical elements can be used to improve the imaging of the mask on the substrate. For example, wavefront aberrations that cause magnification and / or blurred imaging during exposure can be compensated.

[0006] For example, MEMS actuators (MEMS; Microelectromechanical Systems) or PMN actuators (PMN; Lead Magnesium Niobate) can be used as actuators. PMN actuators are capable of path positioning in the submicron or subnanometer range. In this case, a DC voltage applied to an actuator having actuator elements stacked on top of each other subjects the actuator to a force that causes a specific linear expansion. The position set by means of a DC voltage (DC; Direct Current) may be adversely affected by external electromechanical crosstalk at the resonant point that would theoretically occur in a DC voltage-driven actuator. For example, MEMS mirrors and actuators suitable for driving these mirrors are described in DE 10 2016 213 025 A1.

[0007] For example, a control device including an amplifier (e.g., a Class A amplifier) ​​is used to control the actuator. Such a control device for controlling an actuator to actuate optical elements in an optical system is described, for example, in patent application DE 10 2023 206 070. DE 10 2023 206 070 describes a control device including an amplifier and a power supply device. The amplifier is configured to receive a supply voltage provided at an input node and provide a control voltage for the actuator at an output node. The power supply device is used to provide the supply voltage, is coupled to the input node, and includes a series connection couplingable between the input node and ground. The series connection includes a plurality of DC / DC converters for providing DC voltages, and a plurality of additional DC / DC converters that can be connected in series with the series connection for providing DC voltages. To adjust the gain of the amplifier, the amplifier includes a resistive voltage divider having a first resistor and a second resistor.

[0008] Resistive voltage dividers are typically implemented using passive resistive elements because these elements provide simple and linear scaling of the voltage level. Furthermore, integrated passive resistors with different materials, resistance values, and high-voltage capabilities are available. Depending on the application, transistor-based active resistors may also be a good choice. In systems with closed-loop control circuitry, the advantages of ratio and matching of integrated resistors should be utilized to achieve highly linear and accurate measurement of the amplifier output voltage level.

[0009] However, problems may arise, for example, if the quiescent current flowing through the resistors in the resistive voltage divider needs to be kept in the microamp range or below in order to achieve the lowest possible power consumption. Therefore, the resistance value of the resistors in the resistive voltage divider should be selected based on the high voltage level of the supply voltage, especially in the 10... 6 Within the range of ohms. However, these high-resistance resistors cause thermal noise in the resistive voltage divider. This problem is particularly evident when considering the following equations for the thermal noise spectral density and voltage noise density of a single passive resistor:

[0010]

[0011] Where k represents the Boltzmann constant (k = 1.38e-23 J / K) for room temperature T = 300 K, and R represents the equivalent resistance value.

[0012] Some examples of increased thermal noise at high-resistance resistors can be found in Table 1 below:

[0013]

[0014] Table 1

[0015] Furthermore, when resistors are used in the feedback path of an amplifier, their thermal noise can be amplified. For a non-inverting amplifier with a high-voltage operational amplifier controlled by a control voltage and a resistor divider comprising two series-connected resistors between the amplifier's output node and ground, the output noise at the amplifier's output node caused by the resistors can be approximated as follows:

[0016]

[0017] Among them, S n1 = 4KTR1 represents the noise spectral density of resistor R1, and A cl This represents the closed-loop gain of the non-inverting amplifier. Assuming the non-inverting amplifier is an ideal amplifier with infinite gain and zero output impedance, then the resistance value of resistor R1 and the voltage noise density V... nout The value can be estimated as follows:

[0018]

[0019] Table 2

[0020] Table 2 shows the gain A of 100 in the closed-loop control circuit of the amplifier. cl Thermal noise from amplified high-resistance resistors. Summary of the Invention

[0021] In this context, the problem to be solved by the present invention is to improve the control of actuators in optical systems in terms of reducing thermal noise.

[0022] According to a first aspect, a control device for controlling at least one actuator to actuate optical elements in an optical system is proposed. The control device includes an amplifier configured to receive a supply voltage provided at an input node and provide a drive voltage for the actuator at an output node, wherein the amplifier includes a resistive voltage divider having a first resistor and a second resistor for setting the amplifier gain, and a capacitive voltage divider having a first capacitor and a second capacitor, wherein the capacitive voltage divider is connected in parallel with the resistive voltage divider.

[0023] The amplifier is preferably configured to receive a supply voltage at the input node and use the quiescent current at the output node to provide an amplified drive voltage to the actuator. Specifically, the quiescent current is the current flowing through the amplifier even when it is not dynamically active. The quiescent current is used to set the operating point at the output node. The quiescent current can also be called the bias current.

[0024] The supply voltage is particularly high, and for example, in the range of 40 V to 200 V. As explained above, in order to achieve the lowest possible power consumption, the amplifier's quiescent current should preferably be kept in the microamp range or below. For this purpose, the resistance value of the resistors in the resistive voltage divider should be selected based on the high supply voltage, particularly around 10 V. 6 Within the range of ohms. As explained above, the high-ohm resistors of the resistive voltage divider generate thermal noise. This effect of thermal noise depends on the resistance value. In other words, the high supply voltage required to control the actuator used to actuate the optical elements requires a corresponding resistance value, thus amplifying the thermal noise. The proposed capacitive voltage divider connected in parallel with the resistive voltage divider in the amplifier advantageously reduces this thermal noise.

[0025]

[0026] Table 3

[0027] Table 3 shows the gain A of 100 in the closed-loop control circuit of the amplifier. cl The thermal noise of the amplified high-resistance resistor, of which 100A cl This can be obtained from equations 1 + R1 / R2 and 1 + C2 / C1. Resistor R2, not included in Table 3, can be obtained from equation A. cl = 100 = 1 + R1 / R2 can be calculated. Furthermore, capacitor C2, not included in Table 3, can be obtained using equation A. cl = 100 = 1 + C2 / C1 to calculate. A comparison between Table 3 and Table 2 shows that for frequencies above 1 Hz low-pass cutoff frequency, for every tenth octave increase, the voltage noise density V... nout Improved 10 times.

[0028] In addition, capacitive voltage dividers are also suitable for compensating for noise from other noise sources, such as 1 / f noise.

[0029] Especially at higher frequencies, capacitive voltage dividers with a first capacitor and a second capacitor dominate over resistive voltage dividers with a first resistor and a second resistor, thereby reducing the effects of ohmic loads, power supply fluctuations, and thermal noise.

[0030] Specifically, the actuator is a MEMS actuator, a capacitive actuator (e.g., a PMN actuator (PMN; lead magnesium niobate)), a PZT actuator (PZT; lead zirconate titanate), or a LiNbO3 (lithium niobate) actuator. In particular, the actuator is configured to actuate an optical element of an optical system. Examples of such optical elements include lens elements, mirrors, and adaptive mirrors.

[0031] The optical system is preferably a projection optics unit of a lithography apparatus or a projection exposure apparatus. However, the optical system can also be an illumination system. The projection exposure apparatus can be an EUV lithography apparatus. EUV stands for "Extreme Ultraviolet" and indicates that the wavelength of the working light is between 0.1 nm and 30 nm. The projection exposure apparatus can also be a DUV lithography apparatus. DUV stands for "Deep Ultraviolet" and indicates that the wavelength of the working light is between 30 nm and 250 nm.

[0032] According to one embodiment, the capacitance values ​​of the first and second capacitors in the capacitive voltage divider are matched with the resistance values ​​of the first and second resistors in the resistive voltage divider. This reduces the thermal noise of the resistors in the capacitive voltage divider, especially above a certain frequency. The determined frequency is preferably the pole frequency X, where X = 1 / (2*pi*R1*C1), for example, for... Figure 5 The circuit in the middle.

[0033] According to another embodiment, the corresponding resistor is in the form of an active resistor. According to another embodiment, the corresponding capacitor is in the form of an active capacitor. For example, such an active component is described in Malloberti 2003, “Analog Design for CMOS VLSI Systems”, page 197, 4.3 Voltage Divider.

[0034] Designing resistors and / or capacitors as active components has the advantage of requiring very little space, which is especially suitable for the optical systems of lithography equipment.

[0035] According to another embodiment, the corresponding resistors (R1, R2) are in the form of multilayer polysilicon resistors, or diode-connected transistors, duty cycle cyclic resistors, or dummy resistors. For example, dummy resistors are described in Djekic 2018, IEEE Journal SSCS, “A 0.1% THD, 1-MOhm to 1-GOhm Tunable, Temperature-Compensated Transimpedance Amplifier Using a Multi-Element Pseudo-Resistor”. Various types of duty cycle cyclic resistors are summarized in Livanelioglu 2022, IEEE SSC Letters, “A compact and PVT-Robust Segmented Duty-Cycled Resistor Realizing TOhm Impedances for Neural Recording Interface Circuits”.

[0036] According to another embodiment, the first capacitor of the capacitive voltage divider is in the form of an adjustable capacitor.

[0037] According to another embodiment, the second capacitor of the capacitive voltage divider is in the form of an adjustable capacitor.

[0038] If the gain performance of the closed-loop control circuit in the amplifier is adversely affected by parasitic capacitance, the adjustable capacitor can be adjusted to compensate for the parasitic capacitance.

[0039] According to another embodiment, the amplifier includes a voltage-controlled current source having an operational amplifier and a transistor controllable by a control voltage. In this case, the operational amplifier is connected to the control terminal of the transistor.

[0040] The transistor is particularly a field-effect transistor (FET), preferably a MOSFET. In this case, the control terminal of the transistor is in the form of a gate terminal.

[0041] According to another embodiment, the first resistor is connected between the input and output nodes of the amplifier, and the second resistor is connected between the transistor and ground. In this case, the first capacitor is connected in parallel with the first resistor between the input and output nodes of the amplifier, and the second capacitor is connected in parallel with the second resistor between the transistor and ground.

[0042] According to another embodiment, the transistor of the voltage-controlled current source is a field-effect transistor, whose gate terminal is connected to the output terminal of an operational amplifier, whose drain terminal is connected to the output node of the amplifier, and whose source terminal is connected to ground via a second resistor. The source terminal is also connected to the inverting input terminal of the operational amplifier via a feedback branch. The non-inverting input terminal of the operational amplifier is connected to the input node of a control device to receive a control voltage.

[0043] According to another embodiment, the amplifier includes a Class A amplifier having an operational amplifier and transistors controllable by a control voltage. In this case, a resistive voltage divider with a first resistor and a second resistor is connected between the amplifier's output node and ground. The center tap of the resistive voltage divider and the center tap of the capacitive voltage divider are connected to the non-inverting input of the operational amplifier via a feedback branch. The inverting input of the operational amplifier is connected to the input node of a control device to receive the control voltage. In this case, the first capacitor is connected in parallel with the first resistor between the amplifier's output node and the center tap, and the second capacitor is connected in parallel with the second resistor between the center tap and ground. The Class A amplifier advantageously exhibits only very small signal distortion, thus providing precise actuator control.

[0044] According to another embodiment, the transistor of the Class A amplifier is a field-effect transistor, whose gate terminal is connected to the output terminal of the operational amplifier, whose drain terminal is connected to the output node of the amplifier, and whose source terminal is connected to ground.

[0045] According to another embodiment, the amplifier is a non-inverting amplifier having a high-voltage operational amplifier controllable by a control voltage. In this case, the voltage supply terminal of the high-voltage operational amplifier is connected to a first node to receive the supply voltage, and a resistor divider having a first resistor and a second resistor is connected between the amplifier's output node and ground. The center tap of the resistor divider and the center tap of the capacitor divider are connected to the inverting input of the high-voltage operational amplifier via a feedback branch, wherein the non-inverting input of the high-voltage operational amplifier is connected to the input node of a control device to receive a control voltage, wherein the first capacitor is connected in parallel with the first resistor between the amplifier's output node and the center tap, and the second capacitor is connected in parallel with the second resistor between the center tap and ground. For example, the ADHV4702-1 operational amplifier can be used as the high-voltage operational amplifier. The high-voltage operational amplifier is particularly designed for a range of 40 V to 200 V.

[0046] According to another embodiment, the control device is configured to control a plurality of N actuators, wherein each actuator is configured to actuate an optical element assigned to it.

[0047] According to another embodiment, the amplifier is a Class AB amplifier. The Class AB amplifier is a suitable alternative to the Class A amplifier described above.

[0048] According to another embodiment, the amplifier is in the form of a switching amplifier, wherein a filter unit having at least one inductor is preferably connected between the actuator and the switching amplifier. The filter unit receives the drive voltage provided by the amplifier and provides a filtered drive voltage on the output side.

[0049] Specifically, the filtering unit forms a low-pass filter that smooths the driving voltage over time. Preferably, the filtered driving voltage corresponds to the average value of the driving voltage over time. Specifically, the filtering unit can be in the form of a multi-stage filter and includes both inductors and capacitors. Preferably, the filtering unit is configured to filter the amplified signal, i.e., the driving voltage, such that the residual AC component in the filtered driving voltage is less than 0.1% of the amplitude. The filtering unit can also be called a demodulator. The filtering unit is preferably at least in the form of a second-order filter. More preferably, the filtering unit is in the form of a higher-order filter, particularly a fourth-order filter. For example, a higher filter order can be achieved by cascading lower-order filters. In this case, the filtering unit is particularly in the form of a passive filter. The filtering unit, for example, has a cutoff frequency in the range of 1 kHz to 10 kHz. The slope of the filtering unit and the type of the filtering unit, particularly whether the filtering unit is implemented as a Butterworth filter, Chebyshev filter, Bessel filter, Sallen-key filter, or some other type of filter, are specifically selected for the corresponding application.

[0050] According to a second aspect, a control device for controlling at least one actuator to actuate optical elements in an optical system is proposed. The control device includes an amplifier configured to receive a supply voltage provided at an input node and provide a drive voltage for the actuator at an output node, wherein the amplifier includes a resistive voltage divider having a first resistor and a second resistor for setting the amplifier gain, and a capacitive voltage divider having a first capacitor and a second capacitor. In this configuration, the first capacitor is connected between the amplifier's output node and ground, and the second capacitor is connected in parallel with the second resistor.

[0051] According to one embodiment, the capacitance values ​​of the first and second capacitors in the capacitive voltage divider are matched with the resistance values ​​of the first and second resistors in the resistive voltage divider, thereby improving the power supply rejection ratio and gain accuracy of the first and second capacitors in the capacitive voltage divider.

[0052] According to another embodiment, the amplifier includes a voltage-controlled current source having an operational amplifier and a transistor controllable by a control voltage, wherein the operational amplifier is connected to a control terminal of the transistor.

[0053] According to another embodiment, the first resistor is connected between the input node and the output node of the amplifier, and the second resistor is connected between the transistor and ground.

[0054] According to another embodiment, the transistor of the voltage-controlled current source is a field-effect transistor, whose gate terminal is connected to the output terminal of the operational amplifier, whose drain terminal is connected to the output node of the amplifier, and whose source terminal is connected to ground via a second resistor and to the inverting input terminal of the operational amplifier via a feedback branch, wherein the non-inverting input terminal of the operational amplifier is connected to the input node of the control device to receive the control voltage.

[0055] According to a third aspect, an optical system having a plurality of actuable optical elements is proposed, wherein each of the plurality of actuable optical elements is assigned an actuator, and each actuator is assigned a control device for controlling the actuator according to a first aspect, any embodiment of the first aspect, a second aspect, or any embodiment of the second aspect.

[0056] The optical system specifically includes a micromirror array and / or a microlens array having multiple optical elements that can be independently actuated.

[0057] In an embodiment, an actuator group can be defined, wherein all actuators in the group are assigned to the same control device.

[0058] According to one embodiment, the optical system is in the form of an illumination optical unit or a projection optical unit of a photolithography apparatus.

[0059] According to another embodiment, the optical system includes a vacuum housing in which the actuable optical elements, distributed actuators, and control devices are arranged.

[0060] According to a fourth aspect, a photolithography apparatus is proposed, the photolithography apparatus comprising an optical system according to a third aspect or any embodiment of the third aspect.

[0061] The lithography equipment is, for example, an EUV lithography equipment with working light in the wavelength range of 0.1 nm to 30 nm, or a DUV lithography equipment with working light in the wavelength range of 30 nm to 250 nm.

[0062] In this context, "one" should not necessarily be construed as limited to exactly one element. Instead, multiple elements may be provided, such as two, three, or more. Any other numbers used herein should also not be construed as limited to exactly the stated number of elements. Rather, unless otherwise stated, numerical values ​​may deviate upwards and downwards.

[0063] Other possible implementations of the invention include combinations of features or embodiments not explicitly mentioned in the preceding or following descriptions of exemplary embodiments. In such cases, those skilled in the art will also add various aspects as improvements or additions to the corresponding basic form of the invention.

[0064] Other advantageous configurations and aspects of the invention are the subject of the dependent claims and exemplary embodiments of the invention described below. The invention is described in more detail below based on preferred embodiments and with reference to the accompanying drawings. Attached Figure Description

[0065] Figure 1 A schematic meridional cross-section is shown through a projection exposure apparatus used for EUV projection lithography;

[0066] Figure 2 A schematic diagram of one embodiment of the optical system is shown;

[0067] Figure 3 A schematic block diagram of a first embodiment of a control device for controlling an actuator to actuate optical elements in an optical system is shown;

[0068] Figure 4 A schematic block diagram of a second embodiment of a control device for controlling an actuator to actuate optical elements in an optical system is shown;

[0069] Figure 5 A schematic block diagram of a third embodiment of a control device for controlling an actuator to actuate optical elements of an optical system is shown;

[0070] Figure 6 A schematic block diagram of a fourth embodiment of a control device for controlling an actuator to actuate optical elements of an optical system is shown; and

[0071] Figure 7 A schematic block diagram of a fifth embodiment of a control device for controlling actuators to actuate optical elements in an optical system is shown. Detailed Implementation

[0072] Unless otherwise specified, identical or functionally equivalent elements in the accompanying drawings are given the same reference numerals. It should also be noted that the illustrations in the drawings are not necessarily drawn to scale.

[0073] Figure 1An embodiment of a projection exposure apparatus 1 (lithography apparatus), particularly an EUV lithography apparatus, is shown. One embodiment of the illumination system 2 of the projection exposure apparatus 1 includes an illumination optics unit 4, in addition to a light source or radiation source 3, for illuminating the object field 5 in the object plane 6. In an alternative embodiment, the light source 3 may also be configured as a module separate from the rest of the illumination system 2. In this case, the illumination system 2 does not include the light source 3.

[0074] The mask 7, arranged in the object field 5, is exposed. The mask 7 is held by a mask holder 8. The mask holder 8 can be displaced specifically along the scanning direction by means of a mask displacement driver 9.

[0075] To illustrate, Figure 1 A Cartesian coordinate system with x-direction x, y-direction y, and z-direction z is shown. The x-direction x extends inward perpendicular to the drawing plane. The y-direction y extends horizontally, and the z-direction z extends vertically. Figure 1 In the middle, the scanning direction extends along the y-direction. The z-direction extends perpendicular to the object plane.

[0076] The projection exposure apparatus 1 includes a projection optical unit 10. The projection optical unit 10 is used to image the object field 5 onto an image field 11 in an image plane 12. The image plane 12 extends parallel to the object plane 6. Alternatively, there may be an angle other than 0° between the object plane 6 and the image plane 12.

[0077] The structure on the mask 7 is imaged onto the photosensitive layer of the wafer 13, which is arranged in the image field 11 region of the image plane 12. The wafer 13 is held by a wafer holder 14. The wafer holder 14 can be displaced specifically along the y-direction by means of a wafer displacement driver 15. On the one hand, the displacement of the mask 7 by means of the mask displacement driver 9 and on the other hand, the displacement of the wafer 13 by means of the wafer displacement driver 15 can be synchronized with each other.

[0078] Light source 3 is an EUV radiation source. Light source 3 specifically emits EUV radiation 16, which is also referred to below as working radiation, illumination radiation, or illuminating light. Working radiation 16 specifically has a wavelength in the range of 5 nm to 30 nm. Light source 3 can be a plasma source, such as an LPP (laser-generated plasma) source or a GDPP (gas discharge-generated plasma) source. It can also be a synchrotron-based radiation source. Light source 3 can be a free-electron laser (FEL).

[0079] Illumination radiation 16 emitted from light source 3 is focused by light collector 17. Light collector 17 may be a light collector having one or more ellipsoidal and / or hyperboloidal reflective surfaces. Illumination radiation 16 may be incident on at least one reflective surface of light collector 17 at either grazing incidence (GI), i.e., an incident angle greater than 45°, or normal incidence (NI), i.e., an incident angle less than 45°. Light collector 17 may be structured and / or coated, on the one hand, to optimize its reflectivity to the radiation used, and on the other hand, to suppress stray light.

[0080] Downstream of the light collector 17, the illumination radiation 16 propagates through the intermediate focal point in the intermediate focal plane 18. The intermediate focal plane 18 can form a separation between the radiation source module with the light source 3 and the light collector 17 and the illumination optical unit 4.

[0081] The illumination optical unit 4 includes a deflecting mirror 19 and a first faceted mirror 20 arranged downstream of the deflecting mirror 19 in the optical path. The deflecting mirror 19 may be a planar deflecting mirror, or alternatively, a mirror having a beam influence effect beyond pure deflection. Alternatively or additionally, the deflecting mirror 19 may be implemented as a spectral filter that separates the wavelength of the illumination radiation 16 used light from stray light whose wavelength deviates from the used light wavelength. If the first faceted mirror 20 is arranged in a plane of the illumination optical unit 4 that is optically conjugate to the object plane 6 as a field plane, the first faceted mirror 20 is also referred to as a field faceted mirror. The first faceted mirror 20 includes a plurality of individual first facets 21, which may also be referred to as field facets. Figure 1 Only some of these first facets 21 are shown as examples.

[0082] The first facet 21 can be implemented as a macroscopic facet, particularly a rectangular facet or a facet with an arc-shaped edge profile or a partially circular edge profile. The first facet 21 can be implemented as a planar facet, or alternatively as a convex or concave facet.

[0083] For example, as known in DE 10 2008 009 600 A1, the first facet 21 itself can also be composed of multiple individual mirrors, particularly multiple micromirrors. The first facet mirror 20 can be implemented in particular as a microelectromechanical system (MEMS system). For details, see DE 10 2008 009 600 A1.

[0084] Between the light collector 17 and the deflector 19, the illumination radiation 16 propagates horizontally, that is, along the y-direction.

[0085] In the optical path of the illumination optical unit 4, the second faceted mirror 22 is arranged downstream of the first faceted mirror 20. If the second faceted mirror 22 is arranged in the pupil plane of the illumination optical unit 4, it is also called a pupil faceted mirror. The second faceted mirror 22 can also be arranged spaced apart from the pupil plane of the illumination optical unit 4. In this case, the combination of the first faceted mirror 20 and the second faceted mirror 22 is also called a specular reflector. Specular reflectors are known from US 2006 / 0132747 A1, EP 1 614 008 B1, and US 6,573,978.

[0086] The second faceted reflector 22 includes a plurality of second facets 23. In the case of a pupil faceted reflector, the second facets 23 are also referred to as pupil facets.

[0087] The second facet 23 can also be a macroscopic facet, for example, it can have circular, rectangular or hexagonal boundaries, or alternatively it can be a facet composed of micromirrors. See also DE 10 2008 009 600 A1 in this regard.

[0088] The second facet 23 may have a planar reflective surface, or alternatively, a convex or concave reflective surface.

[0089] Therefore, the illumination optical unit 4 forms a biplane system. This basic principle is also known as a compound eye integrator.

[0090] It may be advantageous to arrange the second faceted mirror 22 imprecisely in a plane that is optically conjugate to the pupil plane of the projection optics unit 10. In particular, the second faceted mirror 22 may be arranged at an angle relative to the pupil plane of the projection optics unit 10, as described, for example, in DE 10 2017 220 586 A1.

[0091] The second faceted mirror 22 images each of the first facets 21 onto the object field 5. The second faceted mirror 22 is the last beam-shaping mirror used for illumination radiation 16 in the optical path upstream of the object field 5, or in fact, the last mirror.

[0092] In another embodiment (not shown) of the illumination optics unit 4, a transmission optics unit, particularly helpful in imaging the first facet 21 into the object field 5, may be arranged in the optical path between the second facet mirror 22 and the object field 5. The transmission optics unit may have exactly one mirror, or alternatively, two or more mirrors arranged front and back in the optical path of the illumination optics unit 4. The transmission optics unit may specifically include one or two normal incident mirrors (NI mirrors) and / or one or two grazing incident mirrors (GI mirrors).

[0093] exist Figure 1In the embodiment shown, the illumination optical unit 4 has three mirrors downstream of the light collector 17, namely the deflecting mirror 19, the first faceted mirror 20, and the second faceted mirror 22.

[0094] In another embodiment of the illumination optical unit 4, the deflecting mirror 19 may be omitted. In this case, the illumination optical unit 4 may include two mirrors downstream of the light collector 17, namely the first faceted mirror 20 and the second faceted mirror 22.

[0095] Typically, imaging the first plane 21 onto the object plane 6 via the second plane 23 or using the second plane 23 and the transmission optical unit is only an approximate imaging.

[0096] The projection optical unit 10 includes a plurality of reflectors Mi, which are numbered sequentially according to their arrangement in the optical path of the projection exposure device 1.

[0097] exist Figure 1 In the example shown, the projection optics unit 10 includes six mirrors M1 to M6. Alternatives with four, eight, ten, twelve, or any other number of mirrors M1 are also possible. The projection optics unit 10 is a double-shielding optics unit. The penultimate mirror M5 and the last mirror M6 each have an aperture for illumination radiation 16. The projection optics unit 10 has an image-side numerical aperture greater than 0.5, which can also be greater than 0.6, and for example, 0.7 or 0.75.

[0098] The reflecting surface of mirror Mi can be realized as a freeform surface without an axis of rotational symmetry. Alternatively, the reflecting surface of mirror Mi can be designed as an aspherical surface whose shape has exactly one axis of rotational symmetry. Similar to the mirror of illumination optics unit 4, mirror Mi can have a highly reflective coating for illumination radiation 16. These coatings can be designed as multilayer coatings, specifically including alternating molybdenum and silicon layers.

[0099] The projection optical unit 10 has a large object-image offset in the y-direction y between the y-coordinate of the center of the object field 5 and the y-coordinate of the center of the image field 11. This object-image offset in the y-direction y can be approximately of the same order of magnitude as the z-distance between the object plane 6 and the image plane 12.

[0100] The projection optical unit 10 can be particularly deformable. Specifically, it has different imaging magnifications βx and βy in the x-direction and y-direction, respectively. The two imaging magnifications βx and βy of the projection optical unit 10 are preferably (βx, βy) = (+ / - 0.25, + / - 0.125). A positive imaging magnification β indicates imaging without image inversion. A negative sign for the imaging magnification β indicates imaging with image inversion.

[0101] Therefore, the projection optical unit 10 achieves a 4:1 size reduction in the x-direction, that is, in the direction perpendicular to the scanning direction.

[0102] The projection optical unit 10 achieves an 8:1 size reduction in the y-direction, i.e., the scanning direction.

[0103] Other imaging magnifications are also possible. Imaging magnifications with the same sign and the same absolute value in both the x and y directions are also possible, for example, with absolute values ​​of 0.125 or 0.25.

[0104] According to an embodiment of the projection optical unit 10, the number of intermediate image planes in the x-direction (x) and y-direction (y) of the optical path between the object field 5 and the image field 11 may be the same or different. Examples of projection optical units having different numbers of such intermediate images in the x-direction (x) and y-direction (y) are known from US 2018 / 0074303 A1.

[0105] In order to form a corresponding illumination channel for illuminating the object field 5, in each case, each second plane 23 is assigned exactly to one of the first planes 21. In particular, this allows illumination according to Köhler's principle to be produced. The far field is decomposed into multiple object fields 5 by means of the first plane 21. The first plane 21 produces multiple images with intermediate focal points on the second planes 23 respectively assigned to them.

[0106] To illuminate the object field 5, each first facet 21 is imaged onto the mask 7 via an assigned second facet 23, and the images are superimposed on each other. Specifically, the illumination of the object field 5 is made as uniform as possible. It preferably has a uniformity error of less than 2%. Field uniformity can be achieved by superimposing different illumination channels.

[0107] The illumination of the entrance pupil of the projection optical unit 10 can be geometrically defined by the arrangement of the second facet 23. The intensity distribution in the entrance pupil of the projection optical unit 10 can be set by selecting a subset of the illumination channels, specifically the second facet 23 that guides the light. This intensity distribution is also referred to as illumination setting or illumination pupil filling.

[0108] By redistributing the illumination channels, the same preferred pupil uniformity can also be achieved in the portion of the illumination pupil of the illumination optical unit 4 that is illuminated in a defined manner.

[0109] The following describes other aspects and details of the illumination of the object field 5, particularly the illumination of the entrance pupil of the projection optical unit 10.

[0110] The projection optical unit 10 may specifically include a concentric entrance pupil. This entrance pupil may be accessible or inaccessible.

[0111] Typically, the second faceted mirror 22 cannot accurately illuminate the entrance pupil of the projection optics unit 10. When the projection optics unit 10 images the center of the second faceted mirror 22 onto the wafer 13 in a telecentric manner, the aperture rays typically do not intersect at a single point. However, a region can be found where the spacing between paired, defined aperture rays becomes minimal. This region is the entrance pupil or the region conjugate to it in position space. In particular, this region exhibits finite curvature.

[0112] The projection optical unit 10 may have different entrance pupil positions and orientations for the tangential and sagittal optical paths. In this case, an imaging element, particularly an optical structural element of the transmission optical unit, should be placed between the second faceted reflector 22 and the mask 7. This optical element can be used to account for the different positions and orientations of the tangential and sagittal entrance pupils.

[0113] exist Figure 1 In the component arrangement of the illumination optical unit 4 shown, the second faceted mirror 22 is arranged in the region conjugate with the entrance pupil of the projection optical unit 10. The first faceted mirror 20 is arranged obliquely relative to the object plane 6. The first faceted mirror 20 is arranged obliquely relative to the arrangement plane defined by the deflecting mirror 19. The first faceted mirror 20 is arranged obliquely relative to the arrangement plane defined by the second faceted mirror 22.

[0114] Figure 2 A lithography apparatus or projection exposure apparatus 1 is shown (e.g.) Figure 1 A schematic diagram of one embodiment of the optical system 300 of the projection exposure apparatus shown. Furthermore, for example, Figure 2 The optical system 300 in the image can also be used in DUV lithography equipment.

[0115] Figure 2 The optical system 300 has a plurality of actuable optical elements 310. Here, the optical system 300 is implemented as a micromirror array, wherein the optical elements 310 are micromirrors. Each micromirror 310 can be actuated by means of an assigned actuator 200. For example, a corresponding micromirror 310 can be tilted about two axes and / or displaced along one, two, or three spatial axes by means of the assigned actuator 200. For clarity, only the top row of reference numerals for these elements is shown.

[0116] Control device 100 uses, for example, drive voltage V2 (see...) Figures 3 to 7 This controls the corresponding actuator 200. The position of the corresponding micromirror 310 is thus set. See also... Figures 3 to 7 Describe the control device 100.

[0117] Figure 3A schematic block diagram of a first embodiment of a control device 100 for controlling the actuator 200 to actuate the optical element 310 in the optical system 300 is shown. Figures 3 to 7 In the embodiments, actuator 200 is a capacitive actuator, and in these Figures 3 to 7 The middle part is shown as a capacitor.

[0118] according to Figure 3 The control device 100 includes an amplifier 110. The amplifier 110 may also be referred to as an amplification stage or amplification circuit. The amplifier 110 is preferably configured to receive a supply voltage V1 provided at the input node K1 and use the quiescent current I1 at the output node K2 to provide an amplified drive voltage V2 to the actuator 200.

[0119] In this configuration, amplifier 110 includes resistive voltage dividers R1 and R2 for setting the gain of amplifier 110. Resistive voltage dividers R1 and R2 include a first resistor R1 and a second resistor R2. Furthermore, amplifier 110 includes capacitive voltage dividers C1 and C2, each having a first capacitor C1 and a second capacitor C2. Capacitive voltage dividers C1 and C2 are connected in parallel with resistive voltage dividers R1 and R2.

[0120] Specifically, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 in the capacitive voltage divider C1 and C2 are matched with the resistance values ​​of the first resistor R1 and the second resistor R2 in the resistive voltage divider R1 and R2. This reduces the thermal noise of the resistors in the resistive voltage divider R1 and R2. For example, the corresponding resistors R1 and R2 can be in the form of active resistors. Alternatively, the corresponding resistors R1 and R2 can be in the form of multilayer polysilicon resistors, diode-connected transistors, or dummy resistors. The corresponding capacitors C1 and C2 can also be in the form of active capacitors.

[0121] According to Figure 3 In the first embodiment, amplifier 110 includes a voltage-controlled current source 120 having an operational amplifier 121 and a transistor 122 controllable by a control voltage V3. In this case, operational amplifier 121 is connected to the control terminal G of transistor 122.

[0122] like Figure 3 As shown, the first resistor R1 is connected between the input node K1 and the output node K2 of amplifier 110. The second resistor R2 is connected between transistor 122 and ground GND. The first transistor C1 is connected in parallel with the first resistor R1 between the input node K1 and the output node K2 of amplifier 110. The second capacitor C2 is connected in parallel with the second resistor R2 between transistor 122 and ground GND.

[0123] According to Figure 3 In a first exemplary embodiment, the transistor 122 of the voltage-controlled current source 120 is a field-effect transistor (FET). The gate terminal G of the FET 122 (as a control terminal) is connected to the output terminal of the operational amplifier 121. The drain terminal D of the FET 122 is connected to the output node K2 of the amplifier 110. The source terminal S of the FET 122 is connected to ground GND via a second resistor R2. Furthermore, the source terminal S is connected to the inverting input terminal of the operational amplifier 122 via a feedback branch 123. The non-inverting input terminal of the operational amplifier 121 is connected to the input node K3 of the control device 100 to receive the control voltage V3.

[0124] Figure 4 A schematic block diagram of a second embodiment of a control device 100 for controlling the actuator 200 to actuate the optical element 310 in the optical system 300 is shown. According to... Figure 4 In the second embodiment, amplifier 110 includes a Class A amplifier 130. Specifically, Figure 4 The amplifier 110 in the middle is in the form of a Class A amplifier 130. Figure 4 The Class A amplifier 130 has an operational amplifier 131 and a transistor 132 that can be controlled by a control voltage V3. Figure 4 Transistor 132 in the figure is in the form of a field-effect transistor (FET).

[0125] Figure 4 Resistor voltage dividers R1 and R2 are connected between the output node K2 of amplifier 110 and ground GND. Capacitor voltage dividers C1 and C2 are also connected between the output node K2 of amplifier 110 and ground GND. The center taps M of resistor voltage dividers R1 and R2 and the center taps of capacitor voltage dividers C1 and C2 are connected to each other and are further connected to the non-inverting input of operational amplifier 131 via feedback branch 133. The inverting input of operational amplifier 131 is connected to the input node K3 of control device 100 to receive control voltage V3. A first capacitor C1 is connected in parallel with the first resistor R1 between the output node K2 of amplifier 110 and the center tap M. A second capacitor C2 is connected in parallel with the second resistor R2 between the center tap M and ground GND. The gate terminal G of FET 132 is connected to the output terminal of operational amplifier 131. The drain terminal D of FET 132 is connected to the output node K2 of amplifier 110. The source terminal S of FET 132 is connected to ground GND.

[0126] Figure 5 A schematic block diagram of a third embodiment of a control device 100 for controlling the actuator 200 to actuate the optical element 310 in the optical system 300 is shown. According to... Figure 5In the third embodiment, amplifier 110 is a non-inverting amplifier having a high-voltage operational amplifier 140 controllable by a drive voltage V3. The voltage supply terminal of the high-voltage operational amplifier 140 is connected to the first node K1 of amplifier 110 to receive the supply voltage V1. Figure 5 A resistor divider R1 and R2, with a first resistor R1 and a second resistor R2, is connected between the output node K2 of amplifier 110 and ground GND. A capacitor divider C1 and C2 are also connected between the output node K2 of amplifier 110 and ground GND. Therefore, the capacitor divider C1 and C2 are connected in parallel with the resistor divider R1 and R2.

[0127] The center taps M of resistor dividers R1 and R2 and capacitor dividers C1 and C2 are connected to each other and connected to the inverting input of high-voltage operational amplifier 140 via feedback branch 141. The non-inverting input of high-voltage operational amplifier 140 is connected to input node K3 of control device 100 to receive control voltage V3. A first capacitor C1 is connected in parallel with the first resistor R1 between output node K2 of amplifier 110 and center tap M. A second capacitor C2 is connected in parallel with the second resistor R2 between center tap M and ground GND.

[0128] Figure 6 A schematic block diagram of a fourth embodiment of a control device 100 for controlling the actuator 200 to actuate the optical element 310 in the optical system 300 is shown. According to... Figure 6 The fourth embodiment is based on... Figure 5 The third embodiment, and the difference from the third embodiment is that, Figure 6 The second capacitor C2 is implemented as an adjustable capacitor. Figure 6 The other capacitor CP shown represents the parasitic capacitance. Details are described below.

[0129] The parasitic capacitance of the top plate of the second capacitor C2 and the parasitic capacitance of the bottom plate of the first capacitor C1 may affect the voltage division ratio or closed-loop gain. The entire parasitic capacitance can be modeled as a single capacitor CP with its terminal located at the center tap M. CP can be ignored as long as it is small compared to C2. If CP adversely affects the gain performance of the closed-loop control circuit, C2 can be adjusted to compensate for the following: Figure 6 The parasitic capacitance CP in the circuit.

[0130] Figure 7 A schematic block diagram of a fifth embodiment of a control device 100 for controlling the actuator 200 to actuate the optical element 310 in the optical system 300 is shown.

[0131] according to Figure 7The control device 100 includes an amplifier 110. The amplifier 110 may also be referred to as an amplification stage or amplification circuit. The amplifier 110 is preferably configured to receive a supply voltage V1 provided at the input node K1 and use the quiescent current I1 at the output node K2 to provide an amplified drive voltage V2 to the actuator 200.

[0132] In this configuration, amplifier 110 includes resistive voltage dividers R1 and R2 for setting the gain of amplifier 110. Resistive voltage dividers R1 and R2 include a first resistor R1 and a second resistor R2. Furthermore, amplifier 110 includes capacitive voltage dividers C1 and C2 having a first capacitor C1 and a second capacitor C2.

[0133] like Figure 7 As shown, the first capacitor C is connected between the output node K2 of the amplifier 110 and ground GND, and the second capacitor C2 is connected in parallel with the second resistor R2.

[0134] Specifically, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 in the capacitor dividers C1 and C2 are matched with the resistance values ​​of the first resistor R1 and the second resistor R2 in the resistor dividers R1 and R2, thereby improving the power supply rejection ratio and gain accuracy of the capacitor dividers C1 and C2.

[0135] For example, the corresponding resistors R1 and R2 can be in the form of active resistors. The corresponding capacitors C1 and C2 can also be in the form of active capacitors. For example, the corresponding resistors R1 and R2 can be in the form of multilayer polysilicon resistors or diode-connected transistors or dummy resistors.

[0136] According to Figure 7 In the first embodiment, amplifier 110 includes a voltage-controlled current source 150 having an operational amplifier 151 and a transistor 152 controllable by a control voltage V3. In this case, operational amplifier 151 is connected to the control terminal G of transistor 152. According to... Figure 7 In an exemplary embodiment, the transistor 152 of the voltage-controlled current source 150 is a field-effect transistor (FET). The gate terminal G of the FET 152 (as a control terminal) is connected to the output of the operational amplifier 151. The drain terminal D of the FET 152 is connected to the output node K2 of the amplifier 110. The source terminal S of the FET 152 is connected to ground GND via a second resistor R2. Furthermore, the source terminal S is connected to the inverting input of the operational amplifier 151 via a feedback branch 153. The non-inverting input of the operational amplifier 151 is connected to the input node K3 of the control device 100 to receive the control voltage V3. A second capacitor C2 is connected in parallel with the second resistor R2 between the transistor 152 and ground GND.

[0137] Although the invention has been described based on exemplary embodiments, it can be modified in various ways.

[0138] List of reference numerals

[0139] 1. Projection Exposure Equipment

[0140] 2 Lighting System

[0141] 3 light sources

[0142] 4 Illumination Optical Units

[0143] 5 objects

[0144] 6 object plane

[0145] 7 Masks

[0146] 8-mask holder

[0147] 9-mask displacement driver

[0148] 10 projection optical units

[0149] 11 Image Field

[0150] 12 Image Planes

[0151] 13 chips

[0152] 14-chip holder

[0153] 15-chip displacement driver

[0154] 16 Lighting Radiation

[0155] 17 light collector

[0156] 18 intermediate focal plane

[0157] 19 deflecting mirrors

[0158] 20 First facet mirror

[0159] 21 First facet

[0160] 22 Second facet mirror

[0161] 23 Second facet

[0162] 100 control device

[0163] 110 amplifier

[0164] 120V-controlled current source

[0165] 121 operational amplifier

[0166] 122 transistors

[0167] 123 Feedback Branch

[0168] Class 130A amplifier

[0169] 131 operational amplifier

[0170] 132 transistors

[0171] 133 feedback branch

[0172] 140 High Voltage Operational Amplifier

[0173] 141 feedback branch

[0174] 150V-controlled current source

[0175] 151 operational amplifier

[0176] 152 transistors

[0177] 153 Feedback Branch

[0178] 200 actuators

[0179] 300 optical system

[0180] 310 optical components

[0181] C1 First capacitor

[0182] C2 is the second capacitor.

[0183] CP parasitic capacitance

[0184] D-leaking extreme sub-particle

[0185] G gate terminal

[0186] GND ground potential

[0187] I1 static current

[0188] Input node of K1 amplifier

[0189] K2 amplifier output node

[0190] Input node of K3 control device

[0191] M center tap

[0192] M1 reflector

[0193] M2 reflector

[0194] M3 Reflector

[0195] M4 Reflector

[0196] M5 Reflector

[0197] M6 reflector

[0198] R1 is the first resistor.

[0199] R2, the second resistor

[0200] S source terminal

[0201] V1 power supply voltage

[0202] V2 drive voltage

[0203] V3 control voltage

Claims

1. A control device (100) for controlling at least one actuator (200) to actuate an optical element (310) in an optical system (300), said control device (100) comprising: An amplifier (110) is configured to receive a supply voltage (V1) provided at an input node (K1) and provide a drive voltage (V2) for the actuator (200) at an output node (K2), wherein the amplifier (110) includes: a resistor divider (R1, R2) having a first resistor (R1) and a second resistor (R2) for setting the gain of the amplifier (110); and a capacitor divider (C1, C2) having a first capacitor (C1) and a second capacitor (C2), wherein the capacitor divider (C1, C2) is connected in parallel with the resistor divider (R1, R2). Wherein, the capacitance values ​​of the first capacitor (C1) and the second capacitor (C2) in the capacitive voltage divider (C1, C2) are matched with the resistance values ​​of the first resistor (R1) and the second resistor (R2) in the resistive voltage divider (R1, R2), so that the first capacitor (C1) and the second capacitor (C2) in the capacitive voltage divider (C1, C2) reduce the thermal noise of the resistors in the resistive voltage divider (R1, R2).

2. The control device according to claim 1, in, The corresponding resistors (R1, R2) are in the form of active resistors, and / or the corresponding capacitors (C1, C2) are in the form of active capacitors.

3. The control device according to claim 1, in, The corresponding resistors (R1, R2) are in the form of multilayer polysilicon resistors or diode-connected transistors or pseudo-resistors.

4. The control device according to any one of claims 1 to 3, in, The first capacitor (C1) and / or the second capacitor (C2) in the capacitive voltage divider (C1, C2) are in the form of adjustable capacitors.

5. The control device according to any one of claims 1 to 4, in, The amplifier (110) includes a voltage-controlled current source (120) having an operational amplifier (121) and a transistor (122) that can be controlled by a control voltage (V3), wherein the operational amplifier (121) is connected to the control terminal (G) of the transistor (122).

6. The control device according to claim 5, in, The first resistor (R1) is connected between the input node (K1) and the output node (K2) of the amplifier (110), and the second resistor (R2) is connected between the transistor (122) and ground (GND). The first capacitor (C1) is connected in parallel with the first resistor (R1) between the input node (K1) and the output node (K2) of the amplifier (110), and the second capacitor (C2) is connected in parallel with the second resistor (R2) between the transistor (122) and ground (GND).

7. The control device according to claim 6, in, The transistor (122) of the voltage-controlled current source (120) is a field-effect transistor. The gate terminal (G) of the field-effect transistor is connected to the output terminal of the operational amplifier (121). The drain terminal (D) of the field-effect transistor is connected to the output node (K2) of the amplifier (110). The source terminal (S) of the field-effect transistor is connected to ground (GND) via the second resistor (R2) and to the inverting input terminal of the operational amplifier (121) via the feedback branch (123). The non-inverting input terminal of the operational amplifier (121) is connected to the input node (K3) of the control device (100) to receive the control voltage (V3).

8. The control device according to any one of claims 1 to 4, in, The amplifier (110) includes a Class A amplifier (130) having an operational amplifier (131) and a transistor (132) controllable by a control voltage (V3). A resistor divider (R1, R2) having a first resistor (R1) and a second resistor (R2) is connected between the output node (K2) of the amplifier (110) and ground (GND). The center tap (M) of the resistor divider (R1, R2) and the center tap of the capacitor divider (C1, C2) are connected via a feedback branch. (133) Connected to the non-inverting input of the operational amplifier (131), wherein the inverting input of the operational amplifier (131) is connected to the input node (K3) of the control device (100) to receive the control voltage (V3), wherein the first capacitor (C1) is connected in parallel with the first resistor (R1) between the output node (K2) of the amplifier (110) and the center tap (M), and the second capacitor (C2) is connected in parallel with the second resistor (R2) between the center tap (M) and ground (GND).

9. The control device according to claim 8, in, The transistor (132) of the Class A amplifier (130) is a field-effect transistor, the gate terminal (G) of the field-effect transistor is connected to the output terminal of the operational amplifier (131), the drain terminal (D) of the field-effect transistor is connected to the output node (K2) of the amplifier (110), and the source terminal (S) of the field-effect transistor is connected to ground (GND).

10. The control device according to any one of claims 1 to 4, in, The amplifier (110) is a non-inverting amplifier having a high-voltage operational amplifier (140) that can be controlled by a control voltage (V3), wherein the voltage supply terminal of the high-voltage operational amplifier (140) is connected to a first node (K1) to receive the supply voltage (V1). The resistor divider (R1, R2), which has the first resistor (R1) and the second resistor (R2), is connected between the output node (K2) of the amplifier (110) and ground (GND). The center tap (M) of the resistor divider (R1, R2) and the center tap of the capacitor divider (C1, C2) are connected to the inverting input of the high-voltage operational amplifier (140) via a feedback branch (141). The non-inverting input of the high-voltage operational amplifier (140) is connected to the input node (K3) of the control device (100) to receive the control voltage (V3). The first capacitor (C1) is connected in parallel with the first resistor (R1) between the output node (K2) of the amplifier (110) and the center tap (M), and the second capacitor (C2) is connected in parallel with the second resistor (R2) between the center tap (M) and ground (GND).

11. The control device according to any one of claims 1 to 10, in, The control device (100) is configured to control N actuators (200), wherein each actuator (200) is configured to actuate an optical element (310) assigned to the actuator (200).

12. The control device according to any one of claims 1 to 4, in, The amplifier (110) is implemented as a Class AB amplifier.

13. A control device (100) for controlling at least one actuator (200) to actuate an optical element (310) in an optical system (300), said control device (100) comprising: An amplifier (110) is configured to receive a supply voltage (V1) provided at an input node (K1) and provide a drive voltage (V2) for the actuator (200) at an output node (K2), wherein the amplifier (110) includes: a resistor divider (R1, R2) having a first resistor (R1) and a second resistor (R2) for setting the gain of the amplifier (110); and a capacitor divider (C1, C2) having a first capacitor (C1) and a second capacitor (C2). The first capacitor (C1) is connected between the output node (K2) of the amplifier (110) and ground (GND), and the second capacitor (C2) is connected in parallel with the second resistor (R2) between the transistor (122) and ground (GND). The amplifier (110) includes a voltage-controlled current source (150), which has an operational amplifier (151) and a transistor (152) that can be controlled by a control voltage (V3), wherein the operational amplifier (151) is connected to the control terminal (G) of the transistor (152).

14. The control device according to claim 13, in, The capacitance values ​​of the first capacitor (C1) and the second capacitor (C2) in the capacitive voltage divider (C1, C2) are matched with the resistance values ​​of the first resistor (R1) and the second resistor (R2) in the resistive voltage divider (R1, R2), thereby improving the power supply rejection ratio and gain accuracy of the first capacitor (C1, C2) and the second capacitor (C2) in the capacitive voltage divider (C1, C2).

15. The control device according to claim 13, in, The first resistor (R1) is connected between the input node (K1) and the output node (K2) of the amplifier (110), and the second resistor (R2) is connected between the transistor (152) and ground (GND).

16. The control device according to claim 15, in, The transistor (152) of the voltage-controlled current source (150) is a field-effect transistor. The gate terminal (G) of the field-effect transistor is connected to the output terminal of the operational amplifier (151). The drain terminal (D) of the field-effect transistor is connected to the output node (K2) of the amplifier (110). The source terminal (S) of the field-effect transistor is connected to ground (GND) via the second resistor (R2) and to the inverting input terminal of the operational amplifier (151) via the feedback branch (153). The non-inverting input terminal of the operational amplifier (151) is connected to the input node (K3) of the control device (100) to receive the control voltage (V3).

17. An optical system (300) having a plurality of actuable optical elements (310), wherein, Each of the plurality of actuable optical elements (310) is provided with an actuator (200), and each actuator (200) is provided with a control device (100) for controlling the actuator (200) according to any one of claims 1 to 16.

18. A photolithography apparatus (1) having an optical system (300) according to claim 17.

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