Method and apparatus for communication

Abstract

Embodiments of the present application provide methods and apparatuses for communication. In the present application, a scheme for mapping one codeword (CW) to multiple transmission layers is provided. The scheme considers a joint CW to modulation and layer mapping based on a reliability ordering of combinations of modulation bits and transmission layers. The basic idea is to map more important bits of the codeword to higher reliability positions based on both the bit position of the modulation symbol and the transmission layer. The reliability ordering of the combinations can be determined by using different methods based on a measured quantity associated with the combination or a preconfigured rule. The scheme provided in the present application improves system performance, thereby providing an efficient, robust and low-overhead joint codeword to modulation and layer mapping.

Description

Cross-references to related applications

[0001] This application claims priority to International Patent Application No. PCT / CN2024 / 084183, filed on March 27, 2024, entitled “METHOD AND APPARATUS FOR COMMUNICATIONS”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present invention relates to the field of wireless technology, and more specifically, to methods and apparatus for communication. Background Technology

[0003] In future wireless communication systems, Multiple Input Multiple Output (MIMO) systems can have transmitters and / or receivers equipped with a large number of antennas and support transmission across a large number of transport layers. Channel quality can vary significantly between different transport layers. One potential scheme for codeword (CW)-to-layer mapping is to map a single CW to each transport layer. This can maximize throughput while enabling accurate link adaptation. However, this scheme can significantly increase system overhead and is impractical, especially for a large number of transport layers. Overhead can include: hybrid automatic repeat request (HARQ) feedback overhead, HARQ process management overhead, signaling overhead, and channel state information (CSI) feedback overhead. Furthermore, code block (CB) lengths can vary considerably between layers, which can affect the performance of some short-length CBs and further complicate segmentation.

[0004] Therefore, the urgent technical problem to be solved is to achieve codeword-to-layer mapping in MIMO systems, especially in MIMO systems equipped with a large number of antennas supporting a large number of transmission layers, in order to improve system performance in many ways. Summary of the Invention

[0005] This application provides methods and apparatus for communication, offering an efficient, robust, and low-overhead solution for codeword-to-layer mapping in MIMO communication with a large number of transport layers.

[0006] According to a first aspect, a method for communication is provided, which can be applied to a terminal side, such as a terminal or a module, circuit, or chip within the terminal (e.g., a modem chip, also known as a baseband chip, or a system-on-chip (SoC) chip or system-in-package (SIP) chip including a modem core), responsible for communication functions in the terminal. The method can also be applied to a network side, such as a base station (BS) or a component within the BS (e.g., a circuit, chip, or chip system). The method may include: mapping a sequence of coded bits, comprising multiple coded bits, to modulation symbols and L transport layers based on a measurement or pre-configuration rule, wherein the measurement or pre-configuration rule is associated with a combination of bit positions of the transport layers and modulation symbols, and L is an integer greater than 1.

[0007] In the scheme provided in this application, the coded bit sequence is mapped to modulation symbols and multiple transport layers based on measurements or pre-configuration rules. The measurements or pre-configuration rules are associated with combinations of transport layers and bit positions. These measurements or pre-configuration rules can be used to measure the number of channels in the combination. Therefore, more important coded bits can be mapped to positions that are higher in both bit position and transport layer. This better protects the more important coded bits, resulting in better decoding performance. Furthermore, the provided scheme reduces the complexity of the mapping process and signaling.

[0008] In one implementation of the first aspect, L transport layers are associated with a codeword.

[0009] In one implementation of the first aspect, encoded bits with higher priority or lower indices are mapped to combinations with higher priority.

[0010] In one implementation of the first aspect, the mapping is based on: sorting the combinations according to measurements at each bit position of the modulation symbol, the measurements being determined based on the modulation scheme of each transport layer or transport layer group and the channel information of each transport layer or transport layer group. Each transport layer group includes one or more of L transport layer groups, and each transport layer is included in only one transport layer group.

[0011] In one implementation of the first aspect, the measurement for each bit position includes the mutual information (MI) for each bit position.

[0012] In this implementation, MI can be calculated to measure the combined reliability of the bit position of the modulation symbol and the transmission layer, which can provide the most accurate measurement of the reliability of the combination of the bit position of the modulation symbol and the transmission layer.

[0013] In one implementation of the first aspect, in the sorting, the first combination with a higher MI has a higher priority than the second combination with a lower MI.

[0014] In one implementation of the first aspect, the measurement for each bit position includes the intrinsic log-likelihood ratio (LLR) for each bit position.

[0015] This implementation provides a novel metric, the intrinsic LLR (ILLR), to measure the joint reliability of the modulation symbol's bit position and the transport layer. This is the most accurate and flexible measure for sequencing purposes. ILLR-based sequencing is very simple and low-complexity, facilitating the calculation of combined sequencing by the BS or UE.

[0016] In one implementation of the first aspect, the intrinsic LLR (ILLR) value of the modulation bit is the average of the absolute ILLR values ​​of all constellation points.

[0017] In one implementation of the first aspect, in the sorting, the first combination with a higher inherent LLR has a higher priority than the second combination with a lower inherent LLR.

[0018] In one implementation of the first aspect, the channel information for each first transport layer or each layer group includes one or more of the following: channel quality indicator (CQI); signal to reference plus noise ratio (SINR); or signal to noise ratio (SNR).

[0019] In one implementation of the first aspect, the mapping is based on: sorting the combinations according to pre-configuration rules and additional information, wherein the additional information includes pre-configuration information, default information, or channel state information (CSI) feedback from the terminal device.

[0020] In one implementation of the first aspect, the pre-configuration rules include: a first rule indicating that the priority of a bit position or bit position group of a modulation symbol is higher than the priority of a transport layer or transport layer group; or a second rule indicating that the priority of a transport layer or transport layer group is higher than the priority of a bit position or bit position group of a modulation symbol.

[0021] This implementation provides two pre-configured rules for determining the order of modulation bit positions and transport layer combinations. Since the order of combinations can be determined based on these pre-configured rules, the signaling between the BS and UE for negotiating the ordering rules is reduced. This implementation minimizes signaling overhead while still achieving most of the performance gains, and requires minimal feedback information.

[0022] In one implementation of the first aspect, the L transmission layers employ at least two modulation schemes.

[0023] In this implementation, the L transport layers mapped to a codeword use more than one modulation scheme, which makes its performance superior to that of traditional schemes that use the same modulation and coding scheme (MCS) for each codeword.

[0024] In one implementation of the first aspect, the mapping is based on: sorting the combinations according to pre-configured rules and additional information, the additional information including: ascending or descending order of L transport layer indices, representing the sorting of the channel quality of the L transport layers from highest to lowest; or ascending or descending order of Q transport layer group indices, representing the sorting of the channel quality of the Q transport layer groups from highest to lowest; where Q is the number of transport layer groups.

[0025] In one implementation of the first aspect, the mapping is based on: sorting the combinations according to pre-configured rules and additional information, the additional information including a first ranking of the channel quality of L transport layers or Q transport layer groups, where Q is the number of transport layer groups.

[0026] In one implementation of the first aspect, the mapping is based on: sorting the combinations according to pre-configured rules and additional information, the additional information including: the modulation scheme of each of the L transport layers or each of the Q transport layer groups, with the priority of the first transport layer or the first transport layer group using the first modulation scheme corresponding to a higher modulation order being higher than the priority of the second transport layer or the second transport layer group using the second modulation scheme corresponding to a lower modulation order.

[0027] In the above implementation methods, pre-configuration rules and additional information are used together to determine the order of combinations. For the BS or network, it makes sense to use simplified pre-configuration rules based on the limited information that the BS has or acquires, while performance can still significantly benefit from simplified pre-configuration rules.

[0028] In one implementation of the first aspect, the pre-configuration rule is the first rule; the order of the combinations is determined as follows: select one or more bit positions of the modulation symbol with the highest priority, and then select the corresponding transmission layer in order of highest to lowest channel quality of the transmission layer or transmission layer group; select one or more bit positions of the modulation symbol with the second highest priority, and then select the corresponding transmission layer in order of highest to lowest channel quality of the transmission layer or transmission layer group; ..., and so on; select one or more bit positions of the modulation symbol with the lowest priority, and then select the corresponding transmission layer in order of highest to lowest channel quality of the transmission layer or transmission layer group; wherein, if the modulation symbol of a certain transmission layer does not include one or more corresponding bit positions, then the transmission layer is skipped.

[0029] In the implementation of the first aspect, the pre-configuration rule is the second rule; the order of combination is determined as follows: starting from the transmission layer or transmission layer group with the highest channel quality to the transmission layer or transmission layer group with the lowest channel quality, the bit positions are selected from the first bit position to the last bit position carried by the modulation symbol of each transmission layer or transmission layer group in the L transmission layers.

[0030] In one implementation of the first aspect, the transport layers included in a transport layer group have the same priority.

[0031] In this implementation, the L transport layers associated with a codeword can be divided into several transport layer groups. For example, if some transport layers among the L transport layers have similar channel quality, these transport layers form a transport layer group. Of course, there are other ways to determine transport layer groups, which are described in the embodiments. This approach is important if the solution provided in this application is applied to scenarios with a large number of transport layers.

[0032] In one implementation of the first aspect, the ordering of the combinations is determined based on the joint reliability of the bit positions of the transport layer and the modulation symbols.

[0033] According to the second aspect, a communication device is described. This communication device has the functions of the first aspect. For example, the communication device includes corresponding modules, units, or components for performing the operations of the first aspect. These modules, units, or components can be implemented in software, in hardware, or a combination of software and hardware.

[0034] According to the third aspect, another communication device is described. This communication device includes one or more processors coupled to a memory. The memory is used to store some or all of a program or instructions necessary for implementing the functions of the first aspect. The one or more processors can execute the computer program or instructions, which, when executed, enable the communication device to implement the methods in any possible design or implementation of the first aspect.

[0035] In some embodiments, the communication device may further include a memory.

[0036] In some embodiments, the communication device may further include an interface circuit, through which the processor communicates with another device or component.

[0037] In some embodiments, the communication device may be a terminal, a module in the terminal, or a chip in the terminal responsible for communication functions, such as a modem chip (also known as a baseband chip) or a SoC chip or SIP chip that includes a modem module. In some embodiments, the communication device may be a network device, such as a base station (BS) or a component (e.g., a circuit, chip, or chip system) in the BS.

[0038] According to the fourth aspect, a computer-readable storage medium is described. This computer-readable storage medium stores computer-readable instructions that, when read and executed by a computer, enable the computer to perform any of the possible methods in the design of the first aspect.

[0039] According to the fifth aspect, a computer program product is described. When a computer reads and executes the computer program product, it enables the computer to perform any of the possible methods in the design of the first aspect.

[0040] According to a sixth aspect, this application provides a system including at least one of means in (or at) a UE of this application and / or means in (or at) a network device of this application.

[0041] According to the seventh aspect, this application provides a method performed by a system comprising at least one of means in (or at) the UE of this application and means in (or at) the network device of this application.

[0042] This application includes various embodiments, not only method embodiments but also other embodiments, such as apparatus embodiments and embodiments relating to non-transitory computer-readable storage media. Embodiments may be combined individually or in combination with the features disclosed herein. Attached Figure Description

[0043] One or more embodiments are described by way of example with reference to the accompanying drawings, which do not constitute a limitation on the embodiments. Elements having the same reference numerals in the drawings are shown as similar elements, and the drawings are not limited to scale, wherein: Figure 1 This is a schematic diagram of an application scenario provided in the embodiments of this application.

[0044] Figure 2 An example of a communication system is shown.

[0045] Figure 3 Another example of an electronic device (ED) and a base station is shown.

[0046] Figure 4 A schematic diagram of a unit or module in the device is shown.

[0047] Figure 5 An exemplary apparatus 410 provided by an implementation of this application is shown.

[0048] Figure 6 An example of a channel model for a MIMO system is shown.

[0049] Figure 7 An example of the process by which a base station acquires channel state information (CSI) is shown.

[0050] Figure 8 An example of the overall process of encoding, modulation, and layer mapping is shown.

[0051] Figure 9 An example of joint CW to modulation and layer mapping is shown, where all layers use the same modulation scheme.

[0052] Figure 10 An example of a joint CW-to-modulation and layer mapping scheme using per-layer modulation adaptation is shown.

[0053] Figure 11 An example of a sub-block interleaving process using modulation adaptation is shown.

[0054] Figure 12 An example of the process used for bit interleaving, modulation, and layer mapping is shown.

[0055] Figure 13 Examples of basic signaling and transmission procedures for DL ​​and UL transmissions are shown.

[0056] Figure 14 An example of a method for measuring the reliability of modulation bits is shown.

[0057] Figure 15The process of calculating the MI for each bit position provided in the embodiments of this application is illustrated.

[0058] Figure 16 This demonstrates how the minimum distance rule is used to find the closest [Illustrated Rank] when determining the modulation bit. and Examples of constellations.

[0059] Figure 17 An example of the results of ILLR versus the average SINR of the layer is shown.

[0060] Figure 18 An example of modulation and reliability ranking based on layer groups rather than individual layers is shown.

[0061] Figure 19 An example is shown of grouping two modulation bits with the same priority in the same level.

[0062] Figure 20 This is a schematic block diagram of a communication device provided in an embodiment of this application.

[0063] Figure 21 This is a schematic block diagram of a communication device provided in an embodiment of this application. Detailed Implementation

[0064] To gain a detailed understanding of the features and technical content of the embodiments of this application, the implementation methods of the embodiments of this application will be described in detail below with reference to the accompanying drawings. The drawings are for reference and illustration only and are not intended to limit the embodiments of this application. In the following technical description, many details are set forth to provide a thorough understanding of the disclosed embodiments for ease of explanation.

[0065] The technical solutions of this application can be applied to various communication systems, such as fifth-generation (5G) wireless communication systems, new radio (NR) wireless communication systems, and future communication systems.

[0066] To facilitate understanding of the embodiments of this application, Figures 1 to 3 The communication system shown is used as an example to describe in detail the communication system applicable to the embodiments of this application.

[0067] Figure 1 This is a schematic diagram illustrating an application scenario provided in an embodiment of this application. (Reference) Figure 1A simplified schematic diagram of a communication system is provided as an illustrative example and not a limitation. Communication system 100 includes a radio access network 120. Radio access network 120 may be a future radio access network or a traditional (e.g., 5G or 4G) radio access network. In radio access network 120, one or more electronic devices (EDs) 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h, 110i, 110j (generally referred to as 110) may be interconnected with each other or connected to one or more network nodes (170a, 170b, generally referred to as 170). Core network 130 may be part of the communication system and may depend on or be independent of the radio access technology used in communication system 100. Communication system 100 also includes a public switched telephone network (PSTN) 140, the Internet 150, and other networks 160.

[0068] Figure 2 An exemplary communication system 100 is illustrated. Typically, the communication system 100 enables multiple wireless or wired components to transmit data and other content. The purpose of the communication system 100 may be to provide content, such as voice, data, video, and / or text, via broadcast, multicast, unicast, etc. The communication system 100 can operate by sharing resources (e.g., carrier spectrum bandwidth) among its constituent components. The communication system 100 may include terrestrial communication systems and / or non-terrestrial communication systems. The communication system 100 can provide a wide range of communication services and applications (e.g., earth monitoring, remote sensing, passive sensing and positioning, navigation and tracking, autonomous delivery, and mobility). The communication system 100 can provide high availability and robustness through the joint operation of terrestrial and non-terrestrial communication systems. For example, integrating a non-terrestrial communication system (or components thereof) into a terrestrial communication system can enable a heterogeneous network comprising multiple layers. Compared to traditional communication networks, heterogeneous networks can achieve better overall performance through efficient multi-link joint operation, more flexible function sharing, and faster physical layer link switching between terrestrial and non-terrestrial networks.

[0069] Terrestrial communication systems and non-terrestrial communication systems can be considered subsystems of a communication system. Figure 1In the example shown, communication system 100 includes electronic devices (EDs) 110a, 110b, 110c, and 110d (commonly referred to as ED 110), radio access networks (RANs) 120a and 120b, a non-terrestrial communication network 120c, a core network 130, a public switched telephone network (PSTN) 140, the Internet 150, and other networks 160. RANs 120a and 120b include corresponding base stations (BSs) 170a and 170b, which are commonly referred to as terrestrial transmit and receive points (T-TRPs) 170a and 170b. The non-terrestrial communication network 120c includes access nodes 172, which are commonly referred to as non-terrestrial transmit and receive points (NT-TRPs) 172.

[0070] Alternatively or additionally, any ED 110 can be used to access, connect to, or communicate with any T-TRP 170a and 170b and NT-TRP 172, Internet 150, core network 130, PSTN 140, other network 160, or any combination thereof. In some examples, ED 110a can transmit uplink and / or downlink traffic with T-TRP 170a via terrestrial air interface 190a. In some examples, ED 110a, 110b, 110c, and 110d can also communicate directly with each other via one or more sidelink air interfaces 190b. In some examples, ED 110d can transmit uplink and / or downlink traffic with NT-TRP 172 via non-terrestrial air interface 190c.

[0071] Air interfaces 190a and 190b can use similar communication technologies, such as any suitable wireless access technology. For example, communication system 100 can implement one or more channel access methods in air interfaces 190a and 190b, such as code division multiple access (CDMA), space division multiple access (SDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), or single-carrier FDMA (SC-FDMA) (also known as discrete Fourier transform spread OFDMA (DFT-s-OFDMA)). Air interfaces 190a and 190b can use other higher-dimensional signal spaces, which may involve combinations of orthogonal and / or non-orthogonal dimensions.

[0072] The non-terrestrial air interface 190c enables communication between the ED 110d and one or more NT-TRP 172s via a wireless link (or simply a link). For some examples, the link is a dedicated connection for unicast transmission, a connection for broadcast transmission, or a connection between a group of ED 110s and one or more NT-TRP 172s for multicast transmission.

[0073] RANs 120a and 120b communicate with core network 130 to provide various services, such as voice, data, and other services, to EDs 110a, 110b, and 110c. RANs 120a and 120b and / or core network 130 may communicate directly or indirectly with one or more other RANs (not shown), which may (or may not) be directly served by core network 130 and may (or may not) employ the same radio access technology as RANs 120a, RAN 120b, or both. Core network 130 may also serve as a gateway access between (i) RANs 120a and 120b, or EDs 110a, 110b, and 110c, or both, and (ii) other networks (e.g., PSTN 140, Internet 150, and other networks 160). Furthermore, some or all of EDs 110a, 110b, and 110c may include the ability to communicate with different wireless networks via different radio links using different radio technologies and / or protocols. Instead of wireless communication (or other than wireless communication), ED 110a, 110b, and 110c can also communicate with service providers or exchanges (not shown) via wired communication channels and with the Internet 150. PSTN 140 may include a circuit-switched telephone network for providing plain old telephone service (POTS). The Internet 150 may include computer networks and / or subnets (internal networks) and include protocols such as Internet Protocol (IP), Transmission Control Protocol (TCP), and User Datagram Protocol (UDP). ED 110a, 110b, and 110c may be multimode devices capable of operating according to various wireless access technologies and include multiple transceivers required to support these technologies.

[0074] Furthermore, communication between different devices / apparatus in various implementations of the present invention can refer to direct communication (i.e., without requiring forwarding through another device / apparatus) or communication between different devices / apparatus via another device / apparatus (i.e., requiring forwarding through another device / apparatus). Alternatively, such communication may involve a functional unit within a device / apparatus using another functional unit within the device / apparatus to communicate with another device / apparatus. In other words, phrases such as "send (or transmit) information to..." (ED or base station) in the present invention can be understood as the destination endpoint of the information being the ED or base station, including directly or indirectly sending / transmitting information to the ED or base station. Similarly, phrases such as "receive information from..." (ED or base station) can be understood as the source endpoint of the information being the ED or base station, including directly or indirectly receiving information from the ED or base station. Between the source endpoint and the destination endpoint of the information, necessary processing can be performed on the information, such as, but not limited to, format conversion, digital-to-analog conversion, amplification, filtering, etc. However, the destination endpoint can understand valid information from the source endpoint. Similar understanding applies to other descriptions in this disclosure without repeating details already described. In this invention, the terms "send" and "transmit" can be used interchangeably in different implementations of this invention.

[0075] Figure 3 Another example of the ED 110 and base stations 170a, 170b, and / or 170c is shown. The ED 110 is used to connect people, things, machines, etc. The ED 110 can be widely used in various scenarios, including, for example, cellular communication, device-to-device (D2D), vehicle-to-everything (V2X), peer-to-peer (P2P), machine-to-machine (M2M), machine-type communication (MTC), Internet of Things (IoT), virtual reality (VR), augmented reality (AR), mixed reality (MR), metaverse, digital twins, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, smart cities, drones, robots, remote sensing, passive sensing, positioning, navigation and tracking, autonomous delivery, and mobility.

[0076] Each ED 110 represents any suitable end-user equipment used for wireless operation and may include (or be referred to as) devices such as: user equipment (UE), wireless transmit / receive unit (WTRU), mobile station, fixed or mobile subscriber unit, cellular phone, station (STA), machine-type communication (MTC) device, personal digital assistant (PDA), smartphone, laptop, computer, tablet, wireless sensor, consumer electronics device, smartbook, vehicle, automobile, truck, bus, train, or IoT device, wearable device (e.g., watch, glasses, head-mounted device, etc.), industrial equipment, or devices within the aforementioned devices (e.g., communication module, modem, or chip) or devices composed of the aforementioned devices, etc. Next-generation ED 110 may be referred to using other terms. Base stations 170a and 170b are T-TRPs and are referred to hereinafter as T-TRP170. Also... Figure 3 As shown, NT-TRP is referred to as NT-TRP 172 below. Each ED 110 connected to T-TRP 170 and / or NT-TRP 172 can be dynamically or semi-statically enabled (i.e., established, activated, or enabled), disabled (i.e., released, deactivated, or disabled), and / or configured in response to one or more of the following: connectivity availability and connectivity necessity.

[0077] ED 110 includes a transmitter 201 and a receiver 203 coupled to one or more antennas 204. Only one antenna 204 is shown in the figure to avoid congestion. Alternatively, one, some, or all of the antennas 204 may be a panel. For example, the transmitter 201 and receiver 203 may be integrated as a transceiver. The transceiver is used to modulate data or other content for transmission by at least one antenna 204 or a network interface controller (NIC). The transceiver is also used to demodulate data or other content received by at least one antenna 204. Each transceiver includes any suitable structure for generating signals for wireless or wired transmission and / or for processing signals received wirelessly or wiredly. Each antenna 204 includes any suitable structure for transmitting and / or receiving wireless or wired signals.

[0078] ED 110 includes at least one memory 208. Memory 208 stores instructions and data used, generated, or acquired by ED 110. For example, memory 208 may store software instructions or modules executed by one or more processing units (e.g., processor 210) for implementing some or all of the functions and / or embodiments described herein. Each memory 208 includes one or more of any suitable volatile and / or non-volatile storage and retrieval devices. Any suitable type of memory can be used, such as random access memory (RAM), read-only memory (ROM), hard disk, optical disk, subscriber identity module (SIM) card, memory stick, secure digital (SD) memory card, processor cache, etc.

[0079] ED 110 may also include one or more input / output devices (not shown) or interfaces (e.g. Figure 1 (Wired interface of Internet 150 in the network). Input / output devices or interfaces can interact with users or other devices in the network. Each input / output device or interface includes any suitable structure for providing or receiving information from the user and / or for communication on the network interface. For example, suitable structures include speakers, microphones, keypads, keyboards, displays, touchscreens, etc.

[0080] ED 110 includes a processor 210 for performing operations including: those related to preparing transmissions for uplink transmissions to NT-TRP 172 and / or T-TRP 170; those related to processing downlink transmissions received from NT-TRP 172 and / or T-TRP 170; and those related to processing sidelink transmissions to and from another ED 110. Processing operations related to preparing transmissions for uplink transmissions may include operations such as encoding, modulation, transmit beamforming, and generating symbols for transmission. Processing operations related to processing downlink transmissions may include operations such as receive beamforming, demodulating and decoding received symbols. According to an embodiment, receiver 203 may receive downlink transmissions (possibly using receive beamforming), and processor 210 may extract signaling from the downlink transmissions (e.g., by detecting and / or decoding signaling). Examples of signaling may be reference signals transmitted by NT-TRP 172 and / or T-TRP 170. In some embodiments, processor 210 performs transmit beamforming and / or receive beamforming based on beam direction indications (e.g., beamangle information (BAI)) received from T-TRP 170. In some embodiments, processor 210 may perform operations related to network access (e.g., initial access) and / or downlink synchronization, such as operations related to detecting synchronization sequences, decoding, and acquiring system information. In some embodiments, processor 210 may perform channel estimation using reference signals received from NT-TRP 172 and / or T-TRP 170.

[0081] Although not shown, processor 210 may form part of transmitter 201 and / or receiver 203. Although not shown, memory 208 may form part of processor 210.

[0082] The processing components of processor 210, transmitter 201, and receiver 203 may each be implemented by the same or different one or more processors, which execute instructions stored in memory (e.g., memory 208). Alternatively, some or all of the processing components of processor 210, transmitter 201, and receiver 203 may each be implemented using dedicated circuitry, such as a programmable field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), or hardware accelerators such as graphics processing unit (GPU) or artificial intelligence (AI) accelerators.

[0083] The T-TRP 170 may be known by other names in some implementations, such as base station, basetransceiver station (BTS), wireless base station, network node, network device, network-side device, transmit / receive node, base station, evolved NodeB (eNodeB or eNB), home eNodeB, next-generation NodeB (gNB), transmission point (TP), site controller, access point (AP) or wireless router, relay station, ground node, ground network device, ground base station, baseband unit (BBU), remote radio unit (RRU), active antenna unit (AAU), remote radio head (RRH), central unit (CU), distributed unit (DU), positioning node, etc. The T-TRP 170 can be a macro BS, pico BS, relay node, host node, or a combination thereof. T-TRP 170 may refer to the aforementioned equipment or a device within the aforementioned equipment (e.g., a communication module, modem, or chip).

[0084] In some embodiments, portions of T-TRP 170 may be distributed. For example, some modules of T-TRP 170 may be located remotely from the device housing the antenna 256 for T-TRP 170 and may be coupled to the device housing the antenna 256 via a communication link (not shown) (e.g., a common public radio interface, CPRI) sometimes referred to as a fronthaul. Therefore, in some embodiments, the term T-TRP 170 may also refer to modules on the network side that perform processing operations such as determining the location of ED 110, resource allocation (scheduling), message generation, and encoding / decoding, and are not necessarily part of the device housing the antenna 256 of T-TRP 170. These modules may also be coupled to other T-TRPs. In some embodiments, T-TRP 170 may actually be multiple T-TRPs that work together, for example, using coordinated multicast transmissions, to serve ED 110.

[0085] T-TRP 170 includes at least one transmitter 252 and at least one receiver 254 coupled to one or more antennas 256. Only one antenna 256 is shown in the figure to avoid congestion. Alternatively, one, some, or all of the antennas 256 may be a panel. The transmitter 252 and receiver 254 may be integrated as a transceiver. T-TRP 170 also includes a processor 260 for performing operations, including operations related to: preparing transmissions for downlink transmission to ED 110; processing uplink transmissions received from ED 110; preparing transmissions for backhaul transmission to NT-TRP 172; and processing transmissions received from NT-TRP 172 via backhaul. Processing operations related to preparing transmissions for downlink or backhaul transmission may include operations such as encoding, modulation, precoding (e.g., multiple input multiple output (MIMO) precoding), transmit beamforming, and generating symbols for transmission. Processing operations related to receiving transmissions in the uplink or via backhaul may include receive beamforming, demodulating received symbols, and decoding received symbols. Processor 260 may also perform operations related to network access (e.g., initial access) and / or downlink synchronization, such as generating the contents of a synchronization signal block (SSB), generating system information, etc. In some embodiments, processor 260 also generates beam direction indications, such as a BAI, which can be scheduled by scheduler 253 for transmission. Processor 260 performs other network-side processing operations described herein, such as determining the location of ED 110, determining where to deploy NT-TRP 172, etc. In some embodiments, processor 260 may generate signaling, for example, to configure one or more parameters of ED 110 and / or one or more parameters of NT-TRP 172. Any signaling generated by processor 260 is transmitted by transmitter 252. It should be noted that, as used herein, "signaling" may alternatively be referred to as control signaling. Signaling can be transmitted in physical layer control channels such as the physical downlink control channel (PDCCH). In this case, the signaling can be called dynamic signaling. Signaling transmitted in the downlink physical layer control channel is called downlink control information (DCI). Signaling transmitted in the uplink physical layer control channel is called uplink control information (UCI). Signaling transmitted in the sidelink physical layer control channel is called sidelink control information (SCI).Signaling can be included in higher-layer (e.g., above the physical layer) packets transmitted in the physical layer data channel, such as in the physical downlink shared channel (PDSCH). In this case, the signaling can be referred to as higher-layer signaling, static signaling, or semi-static signaling. Higher-layer signaling can also refer to radio resource control (RRC) protocol signaling or media access control-control element (MAC-CE) signaling.

[0086] Scheduler 253 may be coupled to processor 260. Scheduler 253 may be included within T-TRP 170 or operate separately from T-TRP 170. Scheduler 253 may schedule uplink, downlink, lateral link, and / or backhaul transmissions, including issuing scheduling authorizations and / or configuring schedule-free (e.g., “configured authorizations”) resources. T-TRP 170 also includes memory 258 for storing information and data. Memory 258 stores instructions and data used, generated, or acquired by T-TRP 170. For example, memory 258 may store software instructions or modules executed by processor 260 for implementing some or all of the functions and / or embodiments described herein.

[0087] Although not shown, processor 260 may form part of transmitter 252 and / or receiver 254. Furthermore, although not shown, processor 260 may implement scheduler 253. Although not shown, memory 258 may form part of processor 260.

[0088] The processing components of processor 260, scheduler 253, transmitter 252, and receiver 254 may each be implemented by the same or different one or more processors, which execute instructions stored in memory (e.g., memory 258). Alternatively, some or all of the processing components of processor 260, scheduler 253, transmitter 252, and receiver 254 may be implemented using dedicated circuitry such as programmable FPGAs, hardware accelerators (e.g., GPUs or AI accelerators), or ASICs.

[0089] Although the NT-TRP 172 is shown as an example of a drone only, it can be implemented in any suitable non-terrestrial form, such as satellites and high-altitude platforms, including international mobile communication base stations and unmanned aerial vehicles. Furthermore, the NT-TRP 172 may be referred to by other names in some implementations, such as a non-terrestrial node, a non-terrestrial network device, or a non-terrestrial base station. The NT-TRP 172 includes a transmitter 272 and a receiver 274 coupled to one or more antennas 280. Only one antenna 280 is shown in the figure to avoid congestion. Alternatively, one, some, or all of the antennas may be a panel. The transmitter 272 and receiver 274 may be integrated as a transceiver. The NT-TRP 172 also includes a processor 276 for performing operations, including operations related to: preparing transmissions for downlink transmissions to ED 110; processing uplink transmissions received from ED 110; preparing transmissions for backhaul transmissions to T-TRP 170; and processing transmissions received from T-TRP 170 via backhaul. Processing operations related to preparing a transmission for downlink or backhaul transmission may include operations such as encoding, modulation, precoding (e.g., MIMO precoding), transmit beamforming, and generating symbols for transmission. Processing operations related to processing transmissions received in the uplink or received via backhaul may include operations such as receive beamforming, demodulating received symbols, and decoding received symbols. In some embodiments, processor 276 performs transmit beamforming and / or receive beamforming based on beam direction information (e.g., BAI) received from T-TRP 170. In some embodiments, processor 276 may generate signaling, for example, to configure one or more parameters of ED 110. In some embodiments, NT-TRP 172 implements physical layer processing but does not implement higher-level functions such as medium access control (MAC) or radio link control (RLC) layer functions. Since this is only an example, more generally, NT-TRP 172 may implement higher-level functions in addition to physical layer processing.

[0090] The NT-TRP 172 also includes a memory 278 for storing information and data. Although not shown, a processor 276 may form part of the transmitter 272 and / or the receiver 274. Although not shown, the memory 278 may form part of the processor 276.

[0091] The processing components of processor 276, transmitter 272, and receiver 274 may each be implemented by the same or different one or more processors, which execute instructions stored in memory (e.g., memory 278). Alternatively, some or all of the processing components of processor 276, transmitter 272, and receiver 274 may be implemented using dedicated circuitry such as a programmable FPGA, hardware accelerator (e.g., GPU or AI accelerator), or ASIC. In some embodiments, NT-TRP 172 may actually be multiple NT-TRPs that work together, for example, through coordinated multicast transmissions, to serve ED 110.

[0092] T-TRP 170, NT-TRP 172 and / or ED 110 may include other components, but for clarity these components are omitted.

[0093] Figure 4 A schematic diagram of a unit or module in a device (e.g., in ED 110, T-TRP 170, or NT-TRP 172) is shown. According to... Figure 4 One or more steps of the methods provided in this embodiment can be performed by corresponding units or modules. For example, a signal can be transmitted by a transmitting unit or a transmitting module. A signal can be received by a receiving unit or a receiving module. A signal can be processed by a processing unit or a processing module. Other steps can be performed by an artificial intelligence (AI) or machine learning (ML) module. The corresponding units or modules can be implemented using hardware, one or more components or devices executing software, or a combination thereof. For example, one or more of the units or modules can be circuits such as integrated circuits. Examples of integrated circuits include programmable FPGAs, GPUs, or ASICs. For example, one or more of the units or modules can be logic, such as logical functions executed by circuits, a portion of an integrated circuit, or software instructions executed by a processor. It should be understood that if the above modules are implemented using software executed by a processor, etc., these modules can be retrieved by the processor, in whole or in part, individually or collectively, for processing, or in one or more instances as needed, and these modules themselves can include instructions for further deployment and instantiation.

[0094] Additional details regarding ED 110, T-TRP 170, and NT-TRP 172 are known to those skilled in the art. Therefore, for clarity, these details are omitted herein.

[0095] Channel coding is an indispensable module in communication systems. It encodes K source bits into N code bits to provide error correction capabilities against adverse channel conditions such as noise and interference. The code rate is R = K / N. In practice, the code rate R is chosen based on the channel quality.

[0096] Polar codes are codes that achieve capacity, and thus represent a major breakthrough in coding theory. When the code length approaches infinity, the synthesized channel (or sub-channel) is noise-free or purely noisy. Using noise-free sub-channels to transmit information has demonstrated that their proportions can achieve the channel capacity defined by Shannon. This channel polarization phenomenon occurs during successive cancellation (SC) or SC-based decoding, and its complexity is relatively low.

[0097] Low-density parity-check (LDPC) codes are near-capacity codes. LDPC codes are typically defined by a parity-check matrix, which contains far more 0s than 1s, thus exhibiting low density. Decoding performance can be improved by properly designing the positions of the 1s in the matrix. Although LDPC codes can be viewed as a type of random code, introducing structures can facilitate the hardware implementation of both the encoder and decoder. Quasi-cyclic structures are such structures that first define a small base graph (BG) and then perform "lifting" by replacing the 1s in the BG with cyclically shifted versions of the identity matrix.

[0098] Rate matching is performed after channel coding by puncturing / shortening or repeating some code bits. The goal is to obtain a code bit sequence of the required length for transmission over limited channel resources.

[0099] After channel coding and rate matching, a channel interleaver is applied by permuting code bits. The aim is to provide stable or excellent performance in higher-order modulation or fading channels.

[0100] Hybrid Automatic Repeat Request (HARQ) is a mechanism that provides reliable wireless transmission. It combines forward error correction (FEC) and automatic repeat request (ARQ). In HARQ, the initial transmission is an FEC codeword with CRC bits supporting error detection on the receiver side. If a decoding error is detected, the receiver sends a NACK signal back to the transmitter to notify of the error and request a retransmission. The retransmission bits can be selected directly from the initial transmission bits or incrementally generated code bits, which, together with the initial transmission bits, form a longer codeword. The former is called chase-combining HARQ (CC-HARQ), and the latter is called incremental-redundancy HARQ (IR-HARQ). Generally, IR-HARQ outperforms CC-HARQ due to the additional coding gain from incremental redundancy.

[0101] Low-density parity-check (LDPC) codes are a channel coding scheme very close to Shannon lines, offering advantages such as high performance and low complexity. Currently, LDPC has been adopted by 3GPP 5G New Radio (NR) and IEEE 802.11 systems as a data channel coding scheme.

[0102] LDPC codes are encoded using a parity check matrix. Widely used LDPC codes have a QC structure, where the shift value of each block is designed to avoid undesirable structures such as short cycles and to improve the code distance. Currently, the main decoding algorithms for LDPC codes are Min-Sum (MS) and Belief Propagation (BP). BP decoding performs better in terms of decoding performance, but it requires more information storage, has higher computational overhead, and is less suitable for hardware implementation. Therefore, offset MS and normalized MS decoding algorithms are used in practical communication systems. The actual implementation of LDPC codes is achieved by expanding the "1"s in the basic graph (BG) into a square matrix, which is a cyclically shifted version of the identity matrix. The BG of a QC-LDPC code can be defined as BG=(X,Y,F), where X corresponds to the variables, Y corresponds to the parity check equation, and F is its edge connection. The Tanner graph is obtained after QC boosting with an expansion factor Zc. That is, in a bipartite graph G=(V, C, E), where V is the variable node, C is the parity check node, and E is the connecting edge, the number of columns in the corresponding parity check matrix is ​​N=|V|=Zc|X|, the number of rows in the parity check matrix is ​​M=|C|=Zc|Y|, and the number of non-zero elements in the parity check matrix is ​​|E|=Z|F|.

[0103] The 5G data channel supports block lengths ranging from 1 to 8448. The standard describes two parity check matrices: BG1 and BG2. The same base map, raised by different lift sizes, can accommodate a wide range of different code rates and lengths. For this purpose, it is only necessary to store the list of lift sizes and shift values ​​in a lookup table, and perform rate matching and IR-HARQ based on the table.

[0104] In NR LDPC codes, the codeword before rate matching (called the mother codeword) typically consists of three disjoint parts: systematic bits, core parity bits, and extended parity bits. After rate matching, four different redundancy versions (RVs) are generated: RV0, RV1, RV2, and RV3. In the initial transmission, RV0 is usually chosen, where most of the systematic bits are included in the coded bit set. Simultaneously, depending on the effective code rate, some or all of the core parity bits and extended parity bits are included in RV0. Therefore, RV0 has the highest self-decoding capability of all RVs (i.e., RV0 can self-decode at the highest code rate). In retransmissions, the transmitter can choose RV1, RV2, or RV3. However, only RV3 is self-decoding; RV1 and RV2 are not self-decoding at high code rates. The main reason is that at some code rates, RV1 and RV2 may consist only of parity bits, leading to unsuccessful decoding by the receiver.

[0105] Multiple-input multiple-output (MIMO) technology enables antenna arrays with multiple antennas to perform enhanced signal transmission and reception, which can achieve higher data transmission rates. The aforementioned ED 110, T-TRP 170, and / or NT-TRP can use MIMO to communicate over physical layer radio resources. MIMO utilizes multiple antennas at the transmitting and / or receiving devices to transmit and / or receive data in the same physical layer resource block via multiple parallel radio signals. MIMO can involve beamforming of the parallel radio signals to achieve reliable multipath transmission of data in the resource block. MIMO can also involve binding parallel radio signals carrying different data, thereby effectively increasing the data rate of the data carried in the resource block.

[0106] In recent years, MIMO wireless communication systems (using the aforementioned T-TRP 170 and / or NT-TRP 172 configured with a large number of antennas) (e.g., referred to as massive MIMO) have received widespread attention from academia and industry. In massive MIMO systems, the T-TRP 170 and / or NT-TRP 172 are typically configured with more than ten antennas (e.g., 128 or 256 antennas) and serve dozens of ED 110s (e.g., 40 devices). Through the large number of antennas, the T-TRP 170 and / or NT-TRP 172 can increase the spatial degrees of freedom in wireless communication, improve data transmission rates, spectral efficiency, and power efficiency, and minimize or significantly eliminate inter-cell interference. Utilizing the spatial degrees of freedom provided by the large number of antennas, each cell's T-TRP 170 and / or NT-TRP 172 can simultaneously communicate with multiple ED 110s in the cell on the same frequency resource (i.e., on the same time-frequency resource), thereby greatly improving the system's spectral efficiency. Through the use of numerous antennas, the T-TRP 170 and / or NT-TRP 172 also provide each user with better spatial directivity in both uplink and downlink transmissions. This can further reduce transmission power at one or more of the T-TRP 170, NT-TRP 172, and ED 110, thereby improving the overall power efficiency of the system.

[0107] Figure 5An exemplary device 410 provided by an implementation of this application is illustrated. Device 410 may be a communication device or a device implemented within a communication device, such as ED 110 or TRP 170a, 170b, 172. For example, device 410 implemented in an ED may be an integrated circuit, which in some cases may be referred to as a chip, modem, modem chip, baseband chip, or baseband processor. In some implementations, one or more integrated circuits may be packaged as a system-on-a-chip, system-in-package, or multi-chip module. Device 410 may include one or more integrated circuits and other discrete components. In some implementations, device 410 may be a module within ED 110 or device 310. In some implementations, device 410 may be one of TRP 170a, TRP 170b, TRP 172 or a module within device 320.

[0108] In one example, the device 410 may include one or more processors 411 and interface circuitry 412. The device 410 may also include a memory 413. The one or more processors 411 are used to process signals and execute one or more communication protocols. The memory 413 is used to store at least a portion of corresponding computer program instructions and / or data. In one example, the one or more processors 411 execute the computer program instructions stored in the memory 413 to implement relevant operations (e.g., input, output, reception, and transmission) in the method embodiments disclosed herein. In some implementations, the memory 413 storing corresponding computer program instructions and / or data may mean that the memory 413 stores all corresponding computer program instructions and / or data to be executed by the one or more processors 411. In some implementations, the memory 413 storing corresponding computer program instructions and / or data may mean that the memory 413 stores a portion of the corresponding computer program instructions and / or data. For example, the portion of the corresponding computer program instructions and / or data may include computer program instructions and / or data that the one or more processors 411 currently need to execute. Therefore, memory 413 can store different portions of computer program instructions and / or data multiple times for one or more processors 411 to perform related operations in the method embodiments disclosed herein. Interface circuitry 412 serves as a communication interface for communication with other components. For example, interface circuitry 412 can transmit signals with another device or system (e.g., a radio frequency processing device or another processor). Signals may include or carry information as a payload, such as user data, control information, etc. Signals may also include or carry information useful to a receiver, but not necessarily as a payload, such as pilot signals or reference signals. Transmitting signals may include sending signals to another component or device. Additionally or alternatively, transmitting signals may include receiving signals from another component or device. Sending signals may include outputting signals to a component or device directly or indirectly coupled to interface circuitry 412. Receiving signals may include inputting or acquiring signals from a component or device directly or indirectly coupled to interface circuitry 412. Optionally, to reduce the load on one or more processors, baseband signal processing circuitry 414 may also be provided to process at least a portion of the baseband signals, including signal demodulation, modulation, encoding, decoding, etc.

[0109] In some scenarios, device 410 may be processor 210 (or 260) within device 310 (or 320), or in some scenarios, it may be included within processor 210 (or 260) within device 310 (or 320). Device 410 may be a baseband chip, or may include a baseband chip. In some implementations, device 410 may be independently packaged in a chip. In some implementations, device 310 (or 320) includes different types of chips. Device 410 may be packaged together with different types of chips as a processor chip (e.g., a SoC chip or a SIP chip). In some implementations, device 410 may be packaged together with some or all of the circuitry of a radio frequency processing system that may also be included in device 310 (or 320) as a chip.

[0110] MIMO technology can include: single-user MIMO (SU-MIMO), in which signals from multiple spatial layers are sent to the same ED; and multiple-user MIMO (MU-MIMO), in which signals from multiple spatial layers are sent to multiple EDs.

[0111] (1) Device system description A MIMO system may include receiving devices (e.g., ED 110 for downlink transmission, or T-TRP 170 or NT-TRP 172 for uplink transmission) connected to one or more receive (RX) antennas, and transmitting devices (e.g., T-TRP 170 or NT-TRP 172 for downlink transmission, or ED 110 for uplink transmission) connected to one or more transmit (TX) antennas. For example, multiple RX antennas may form an antenna array, wherein the multiple RX antennas are arranged in rows at equal intervals, which may be called a uniform linear array (ULA).

[0112] Figure 6 An example of a channel model for a MIMO system is shown. The transmitting unit is connected to four TX antennas (x1 to x4), and the receiving unit is connected to four RX antennas (y1 to y4). A transmission channel can be formed between each TX antenna and each RX antenna pair. For example, a signal transmitted via x1 can be received by y2 via channel h21. A signal transmitted via x3 can be received by y1 via channel h13.

[0113] An antenna port (or simply port) is a transmitting antenna identified by a receiving device, or a transmitting antenna that can be distinguished in the spatial domain. One antenna port can be configured for each virtual antenna, and each virtual antenna can be a weighted combination of multiple physical antennas. Each antenna port can correspond to a reference signal port.

[0114] (2) Reference signal and channel estimation In MIMO systems, channel estimation is required for the uplink or downlink channels to achieve system synchronization, channel information feedback, and data transmission. Channel estimation is the process of reconstructing or recovering the received signal to compensate for signal distortion caused by channel fading and noise. In channel estimation, the reference signal transmitted by the transmitting device can be used to track time-domain and / or frequency-domain changes in the channel to reconstruct or recover the received signal. The reference signal can also be called a pilot signal, reference sequence, etc. For ease of understanding, it will be referred to as a reference signal below. For example, reference signals include channel state information-reference signal (CSI-RS), sounding reference signal (SRS), and demodulation reference signal (DMRS).

[0115] CSI-RS is primarily used for downlink channel estimation corresponding to physical antenna ports. For example, a receiving device (UE) can perform channel estimation for each physical antenna port based on the CSI-RS transmitted by a transmitting device (base station) to feed back channel state information (CSI) based on the channel estimation results. CSI may include information such as channel quality indicator (CQI), precoding matrix indicator (PMI), layer indicator (LI), and rank indicator (RI). CSI is used to reconstruct or precode the downlink channel.

[0116] Figure 7 The process of a base station acquiring CSI is illustrated. (Reference) Figure 7 In some implementations, the process of a base station acquiring CSI may include: the base station sending a reference signal to the UE; the UE obtaining an estimated CSI value based on the received reference signal; the UE selecting a precoding vector from the codebook based on the estimated CSI value; the UE feeding back the index of the precoding vector to the base station; and the base station determining the reconstructed CSI value by referring to the index of the precoding vector. The reconstructed CSI value can be the closest CSI to the true CSI value that the base station can obtain.

[0117] In wireless communication systems, multiple antennas are widely used on the transmitter and / or receiver sides to improve reliability or throughput. This communication scheme is often referred to as multiple-input multiple-output (MIMO) communication. Multiple antennas on the transmitter and / or receiver sides can be used to obtain diversity gains against fading channels, or to achieve spatial multiplexing, i.e., to transmit multiple data streams in parallel through multiple layers on the same frequency resources to improve throughput.

[0118] When using spatial multiplexing schemes, transmission can occur on multiple transport layers. A transport layer (or simply layer) refers to the transmitted data stream. In the case of MIMO transmission, there are at least two transport layers, or more generally, L transport layers (where L is at least two). The L transport layers are mapped to N antennas or N antenna ports (which are fed to the corresponding transmission antennas (or antenna ports)) through a MIMO precoding matrix of size N×L. Typically, the number of transport layers (i.e., L, also called the transport rank or simply rank) is less than or equal to the number of antennas (i.e., N). In this invention, MIMO transmission has at least two transport layers, which can be referred to as MIMO layers.

[0119] In 5G New Radio (NR), a single transmission supports up to eight MIMO layers. For MIMO transmission in cellular systems, the transmitter first encodes the information data block into codewords (CWs), then the CWs are modulated and mapped to multiple MIMO layers, followed by precoding. This process is typically called CW-to-layer mapping. In NR, a single transmission supports a maximum of two CWs, each CW is mapped to a maximum of four layers, and each single-user transmission supports a maximum of eight layers.

[0120] In 6G and future wireless communications, terabits MIMO (T-MIMO) or massive MIMO (m-MIMO) may have transmitters and / or receivers equipped with a large number of antennas and support transmission across a large number of layers. The channel quality between different layers may vary significantly.

[0121] One potential approach to CW-to-layer mapping is to map a single CW to each transport layer. This can maximize throughput while allowing for accurate link adaptation. However, this approach can significantly increase system overhead and is impractical, especially for a large number of layers. Overhead can include HARQ feedback overhead, HARQ process management overhead, signaling overhead, and CSI feedback overhead. Furthermore, the CB lengths of different layers can vary considerably, which can impact the performance of some short CBs and further complicate segmentation.

[0122] This application aims to provide an efficient, robust, and low-overhead solution for CW-to-layer mapping in MIMO communication with a large number of layers.

[0123] Therefore, this application provides a scheme that uses a single CW mapping to multiple layers. These layers can have different channel qualities. The scheme considers a combined CW-to-QAM and layer mapping scheme. The basic idea is to map more important bits of the codeword during encoding to more reliable bits based on both the bit position of the modulation symbol and the layer index. This better protects the more important encoded bits, resulting in better decoding performance.

[0124] To improve the performance of this scheme, a ranking of the reliability (or achieved channel quality) of the combination of layer indices and modulation symbols is required. This invention provides different ranking methods, which can be based on reliability metrics calculated according to the channel quality and bit position of each layer.

[0125] Figure 8 An example of the overall process of encoding, modulation, and layer mapping is shown. (Reference) Figure 8 Transport block (TB) information can be segmented into multiple code blocks before encoding, and each code block is encoded and rate-matched separately. The rate-matched encoded bits can be concatenated into a single code bit stream as a codeword. If there is only one CB, the CB segmentation and concatenation process is unnecessary. Alternatively, if there are multiple CBs, each CB can be modulated and mapped to a layer separately. Optionally, a CRC can be appended to the TB and each CB, which is not shown in the figure. Optionally, the output encoded bit stream or codeword (CW) can be scrambled first. Then, the CW is modulated and mapped to one or more transport layers. The complex-valued vector after modulation and layer mapping is then pre-encoded through a multi-antenna precoding process, then resource-mapped and transmitted through multiple physical antennas. The rate-matching process can include bit selection, sub-block interleaving, and bit interleaving, as described in more detail in this invention. This process can be applied to uplink or downlink data transmission. In some scenarios, such as in the uplink, there may be transform precoding or DFT-based precoding processes used for transmission using DFT-OFDM, which are not shown in the figure.

[0126] The general process of combining CW to modulation and layer mapping is as follows: Step 0: Bit Selection. First, the information bits are encoded using an FEC code (e.g., an LDPC code). The output encoded bits are selected based on the redundancy version and the number of encoded bits required to obtain the encoded bit stream. This process is often called rate matching. During rate matching, bit selection can be performed first to select encoded bits based on the redundancy version. The bit selection process typically involves first writing the encoded bits into a circular buffer using the master code, and then determining the initial positions of the encoded bits from the redundancy version.

[0127] Step 1 (optional): Priority sorting of encoded bits: Arrange the encoded bits according to their priority / importance.

[0128] Step 2: Define the joint modulation bits and transport layer reliability level (e.g., if this modulation level exists). Given L bits, where all L layers use the same modulation scheme, then the total number of bits is P = (There are several reliability levels), where L is the number of layers mapped to a codeword. For simplicity, in the following embodiments, the reliability level may also be referred to as a level.

[0129] Alternatively, bits from modulation symbols with the same reliability can be grouped into the same layer. In some scenarios, multiple layers can be grouped into the same layer group and belong to the same reliability level.

[0130] A level can be viewed as a function of the transport layer (which can be represented by a transport layer index), or more generally, as a function of the combination of the transport layer and the bit positions of the modulation symbols (which can be represented by a combination of the transport layer index and the bit position index). Similarly, levels can also be represented by indices. For example, if a level is a function of the transport layer index, then there is a one-to-one mapping between the level index and the transport layer index. As another example, if a level is a function of the combination of the transport layer index and the bit position index, then there is a one-to-one mapping between the level index and the combination of the transport layer index and the bit position index. In some embodiments, the layer index can also be replaced by the layer group index, and / or the bit position index can also be replaced by the bit position group index. Therefore, a level can also be a function of the layer group index, or a function of a combination of the layer index / layer group index and the bit position index / bit position group index. In some embodiments, the coded bit sequence to be modulated and mapped to L transport layers can be divided into several subsequences or subblocks, each subsequence or subblock corresponding to a level. The coded bit sequence can be mapped to modulation symbols and L transport layers based on the correspondence between subsequences / subblocks and layers.

[0131] Step 3: Order the reliability levels based on the bit reliability of both the MIMO layer (i.e., the transport layer) and the modulation bits (also known as "ranking"). This invention provides more details on how to obtain the ordering (also known as "ranking"), which can also be called reliability ranking. Since the ranking is based on the transport layer and the modulation bits, it can also be called a ranking of the combination of bit positions of the transport layer and the modulation symbols.

[0132] Step 4: Based on reliability sorting, map the priority-sorted coded bit sequences (i.e., the sorted coded bit sequences) to the corresponding modulation symbols and transmission layers.

[0133] This can include the following steps: 1. Based on reliability prioritization, the original bit sequence is mapped to different combinations of bit positions in the transport layer and modulation symbols. This mapping ensures that earlier bits with lower indices in the priority-ordered coded bit sequence (and therefore more important bits) are mapped to higher reliability combinations of bit positions and transport layer.

[0134] 2. Modulate the bit sequence onto modulation symbols according to the modulation scheme and mapping used in each layer.

[0135] 3. Based on the mapping, the modulation symbols are assigned to the corresponding transport layers.

[0136] Figure 9 An example of joint CW to modulation and layer mapping is described, where all layers use the same modulation scheme. It is assumed that the reliability order (i.e., reliability ranking) of the combination of modulation bits and MIMO layers is given by L1 b(1), b(2)>L2, b(1) b(2)>L1, b(3) b(4)>L2, b(3) b(4)>L3, b(1) b(2)>L4 b(1) b(2)>L3, b(3) b(4)>L4, b(3) b(4), where L1, L2, L3, and L4 refer to layer 1, layer 2, layer 3, and layer 4, respectively, and the symbols b(1), b(2), ... represent the first and second bits of the bits carried by the modulation symbol, similar to that used in another example of the invention. and The same. As described above, b(1) and b(2) have the same reliability, so there is no need to sort them, or any sorting can be used between them for mapping purposes, as do b(3) and b(4).

[0137] After obtaining the reliability hierarchy, the priority-sorted coded bit sequence is mapped to modulation symbols and MIMO layers based on the reliability hierarchy. To implement the mapping scheme, one example is to first divide the priority-sorted coded bit sequence into P equal-sized sub-blocks, where P is the same as the number of reliability levels. This process can also be viewed as a bit interleaving process, where the bit sequence is written into multiple shorter vertical sequences, and these sequences are read horizontally for modulation and layer mapping. The P sub-blocks or vertical sequences are mapped to P reliability levels according to reliability order; that is, the most reliable level is mapped to the first vertical sequence or the first sub-block, which corresponds to the first or highest priority coded bits based on the priority sorting of the coded bit sequence.

[0138] After mapping the priority-coded bit sequence to the reliability level based on the combination of modulation bit positions and layers, the next step is to map the bit sequence to modulation symbols and MIMO layers. For modulation mapping, modulation symbols are selected horizontally in sequence by combining bits from the same MIMO layer. In this example, the modulation scheme of layer 1 is 16QAM, consisting of 4 bits. Therefore, the first modulation symbol to be assigned to layer 1 is formed by selecting 1 bit each from the sub-blocks or vertical sequences corresponding to the (L1, b(1)), (L1, b(2)), (L1, b(3)) and (L1, b(4)) levels (i.e., from the first, second, fifth, and sixth vertical sequences) to map the modulation symbol and further assign it to the first MIMO layer. Figure 8 In this process, different bits within the same modulation symbol are marked with the same shape, and the same shape is marked as mapped to the corresponding transport layer before precoding.

[0139] Figure 10 A more general example of a joint modulation and layer mapping scheme for using per-layer modulation adaptive CW mapping is shown. Figure 10 In this example, different modulation schemes (i.e., different modulation methods) are used in different layers during the modulation and layer mapping process. Each CW is mapped to four layers, meaning each CB of the CW is also mapped to four layers. Each layer may apply a different modulation scheme, which is adjusted based on the channel quality of each layer. In this example, layers 1 through 4 use 64QAM, 16QAM, 16QAM, and QPSK modulation schemes, corresponding to the modulation orders, respectively. It equals 6, 4, 4, 2.

[0140] For the joint mapping process, the priority-sorted coded bit sequence is first divided into P shorter sequences or sub-blocks of equal size. These shorter sequences can be called vertical sequences for visual matching with the graph. P is the same as the total number of reliability levels, determined by... Given. Therefore, in Figure 10The example shown has sixteen levels. Assume the reliability ordering of the combination of layer indices and bit positions is given by L1, b(1) b(2)>L2, b(1) b(2)>L3, b(1) b(2)>L4, b(1) b(2)>L1, b(3) b(4)>L2, b(3) b(4)>L3, b(3) b(4)>L1, b(5) b(6). Sixteen vertical sequences are mapped to sixteen reliability levels for different combinations of layer indices and bit positions, as shown in the figure for this example. Then, one bit is taken from each bit position corresponding to the same MIMO layer and mapped to modulation symbols, which are then assigned to the corresponding MIMO layer. In this example, with... , ... The first bit (6 bits in total) of the corresponding vertical sequence is mapped to a 64QAM modulation constellation through the modulation process, resulting in a complex value assigned to layer 1. The corresponding bit positions and modulation symbols mapped to layer 1 are shown as circles in the diagram. Similarly, the first bit (4 bits in total) of the vertical sequence corresponding to layer L2 is mapped to a 16QAM modulation constellation through the modulation process, resulting in a complex value assigned to layer 2. After mapping all the first bits to the modulation symbols corresponding to each MIMO layer, the complex value represents the first modulation symbol of each layer, forming a complex value vector whose dimension is equal to the number of layers. This vector is then multiplied by a precoding matrix through a precoding process for further processing and transmission. The second bit and subsequent bits of each reliability level undergo the same joint modulation and layer mapping process sequentially.

[0141] The following sections will describe some implementations of the joint CW to modulation and mapping process in more detail. Consider the steps already taken to obtain the priority-sorted sequence of coded bits through rate matching and an optional coded bit priority sorting process.

[0142] The remaining steps of the combined CW to modulation and mapping process may include: 1. Sub-block interweaving Figure 11 The modulation-adaptive sub-block interleaving process is illustrated. First, the input priority-sorted coded bit sequence is divided into equal or nearly equal parts. There are 16 sub-blocks. In this example, P=16. Each sub-block corresponds to a reliability level based on a specific combination of layer indices and modulation bit positions, according to joint modulation and layer reliability ordering, as shown in the figure. The ordering of the combinations in the example is given by (L1, b(1) b(2)>L2, b(1) b(2)>L3, b(1) b(2)>L4, b(1) b(2)>L1, b(3) b(4)>L2, b(3) b(4)>L3, b(3) b(4)>L1, b(5) b(6)). The sub-block interleaver is used to rearrange the sub-blocks so that the overall bit sequence is first ordered by layer, and then by the different bit positions of the modulation symbols of the MIMO layer. Basically, after the sub-block interleaver, the sequential arrangement of sub-blocks corresponds to (L1, b(1)) (L1 b(2)) (L1 b(3)) (L1 b(4)) (L1 b(5)) (L1 b(6)) (L2 b(1)) (L2 b(2)) (L2 b(3))(L2 b(4)) (L3 b(1)) (L3 b(2)) (L3 b(3)) (L3 b(4)) (L4 b(1)) (L4 b(2)), as follows. Figure 11 As shown.

[0143] 2. Bit interleaving Figure 12 This is an example of bit interleaving, modulation, and layer mapping processes. (Reference) Figure 12 After sub-block interleaving, a bit interleaving process is used to write the input sequence vertically and read the output bits horizontally. This process is as follows: Figure 12 The left part is shown.

[0144] It should be noted that vertical writing essentially divides the input bit sequence into P sub-blocks, and then horizontal reading involves sequentially extracting bits from each sub-block. For example, the first bit of each sub-block is extracted sequentially, then the second bit, and so on, until all bits of all sub-blocks have been extracted. The width of the horizontal extraction is P.

[0145] 3. Modulation mapping After bit interleaving, the bit sequence undergoes modulation. Modulation maps the modulation symbols of each layer in a polling manner. The output of the modulation mapping process is a sequence of complex values, each representing a modulation symbol. For example, for the first 16 bits, the first 6 bits are mapped to the first 64QAM symbol of layer 1, the next 4 bits to the first 16QAM symbol of layer 2, the next 4 bits to the first 16QAM symbol of layer 3, and the last 2 bits to the first QPSK symbol of layer 4. Then, for the next 16 bits, the first 6 bits are mapped to the second 64QAM symbol of layer 1, the next 4 bits to the second 16QAM symbol of layer 2, the next 4 bits to the second 16QAM symbol of layer 3, the last 2 bits to the second QPSK symbol of layer 4, and so on. This modulation mapping process is shown in the middle part of the figure.

[0146] 4. Layer mapping For L MIMO layers, each L consecutive modulation symbols (with L complex values) are mapped to the corresponding L layers. This is achieved by forming a complex value vector of dimension L from the L complex values ​​of the L modulation symbols. This complex value vector is transmitted as input to the MIMO precoder. The precoding matrices of length N are multiplied to produce a complex vector of length N, which is used for further resource mapping and transmission on the physical antenna. In this example, the 16 bits of the first symbol mapped to each layer become a complex symbol vector, which serves as the input vector for precoding. Similarly, each of the next 16 bits is mapped to a complex symbol vector, which serves as the input to the second precoder. This process involves polling the modulation symbols to different MIMO layers, but the modulation symbols can correspond to different modulation levels. Figure 12 The right side shows the layer mapping process for this example.

[0147] To further illustrate the process, a more detailed example of the joint CW to modulation and layer mapping process is given below.

[0148] This process can be applied to LDPC codes, polar codes, or other FEC codes. In the following text, for example, the rate matching process uses LDPC codes. It should be noted that some common coding, rate matching, modulation, scrambling, layer mapping, and other processes may not be elaborated upon further; please refer to [3GPP TS 28.212 V16.7.0], etc. The information bits of each code block are encoded using a master code to produce a sequence of coded bits. It consists of multiple coded bits and is a rate-matched input sequence.

[0149] 1. Rate matching process Rate matching of LDPC codes is defined based on coded blocks and can include bit selection, sub-block interleaving, and bit interleaving processes. The input bit sequence used for rate matching is... The output bit sequence after rate matching is represented as follows: .

[0150] 1.1. Bit Selection Encoded bit sequence Write length is The circular buffer is used for the first... Each coded block. For low buffer rate matching (LBRM)... The encoder output bit length is usually equal to the master code, and can be modified and determined. For details, please refer to section 5.4.2.1 of [3GPP TS 38.212V16.7.0].

[0151] The output bit sequence is selected from the input sequence based on the redundancy version. An example of this process can be found in [3GPP TS28.212 V16.7.0]. The output bit sequence for bit selection for each code block (CB) is determined by... Provided.

[0152] 1.2. Sub-block interleaving The bits input to the sub-block interleaver are coded bits. In the preceding description, this input sequence was also considered to be a priority-sorted input sequence. Encoded bits Classified as P There are several sub-blocks, among which... P This refers to the number of reliability levels. As described above, P It can be by Given, among which, This represents the number of transport layers to which the transport block is mapped. It should be noted that the sequence length E determined during bit selection may be divisible by P, therefore E / P can be an integer.

[0153] The bits output from the sub-block interleaver are represented as It is generated in the following way: for to

[0154] ; ; ; end for As mentioned above, This is a sub-block interleaving mode. P is the number of sub-blocks into which the first bit sequence is divided. E / P is the length of the first bit sequence, therefore E / P is the number of bits included in each sub-block or sub-sequence. It is a bit sub-block index, It is a bit The sub-block index. It is a sub-block within The bit index is equal to the equation Obtained sub-block within Bit index; Equation Input bit sequence sub-blocks in The bits are mapped to the output bit sequence. sub-blocks in The same bits. It should be noted that the above implementation is only one way to implement the sub-block interleaving process. For simplicity, other alternatives to achieve the same result are not described in detail here. Instead, for example, The inverse function of g is denoted as g( This can be defined as a sub-block interleaver. In this case, the input bit sequence can be... sub-blocks Mapped to the output bit sequence sub-block g( Instead of sub-blocks of the input bit sequence e, Mapped to the output bit sequence sub-blocks .

[0155] Sub-block interleaving mode The reliability ordering representing the layer, or the reliability ordering of a combination of bit positions of the transmission layer and modulation symbols, is called joint modulation and layer reliability ordering. It can be indicated by the network or BS, for example, in the DCI used to schedule transmissions; It can also be a fixed pattern, which can be described by lookup tables or functions; It can also be generated based on fixed rules.

[0156] To explain the sub-block interleaving mode The relationship between joint modulation and hierarchical reliability ordering is defined as: single-level index. It is a layer index. Functions; bits in modulation methods Bit position index ,layer The modulation order in is , making Therefore, it can be interpreted as, for the total P Each level, the level index starts from... =0 Start, corresponding to the first bit of the modulation symbol of the first layer, then... = 1, corresponding to the second bit of the modulation symbol in the first layer, ..., until... = This corresponds to the last bit of the modulation symbol in the first layer, then proceeds to the second layer, and so on, until... =P– 1 corresponds to the last bit of the modulation symbol in the last layer. It should be noted that the layer index... The bit position index j starts from 1 (i.e., one) to maintain consistency with the description in the previous example. However, it is also possible to define... j starts from 0, and the function is changed accordingly, for example, changed to Or more generally, from a pair of indexes and To a single index Any one-to-one mapping.

[0157] Now, if we arrange the levels from the most reliable to the least reliable... If the reliability is sorted, then the sub-block interleaving mode Indicates the level among all levels The sorting, that is, It is a hierarchy Its position in the sort. More specifically, if the reliability sort is determined by... Given, where, ( () is a sequence of hierarchical indexes ordered from highest to lowest reliability. ( ) is a hierarchical reliability function used for sorting purposes. ( The higher the level, the higher the rank. The higher the reliability, the more it can be defined as a specific function, but it may not be defined in some scenarios, as long as the hierarchical sorted sequence can be obtained. The hierarchical order can be represented by ) . Then, the sub-block interleaving mode. Depend on Give ( ),Right now, It is a hierarchy Position in the hierarchical sort sequence.

[0158] Now Figure 9 and Figure 10 The example shown illustrates the modulation order of layers 1 through 4, as described earlier for the example. They are 6, 4, 4 and 2 respectively. P =16 levels; the levels are sorted from most reliable to least reliable, by Given. This corresponds to a pair of level indices. l and bit index j The hierarchical order is as follows: (1, 1), (1,2), (2, 1), (2, 2), (3,1), (3, 2), (4, 1), (4, 2), (1, 3), (1, 4), (2, 3), (2, 4), (3, 3), (3, 4), (1, 5), (1, 6).

[0159] If using based A defined single-level index can retrieve the hierarchical sort sequence. ) = (0, 1, 6, 7, 10, 11, 14, 15, 2, 3, 8, 9, 12, 13, 4, 5). Then, based on Get the sub-block interleaving mode of the example. As shown in Table 1 below. On the other hand, if as described above... : g( The inverse function of ) is used to implement sub-block interleaving, then It is a hierarchy The ordering across all levels, i.e., g( The sequence is given by the hierarchical order, in this example, =(0, 1, 6, 7, 10, 11, 14, 15, 2, 3, 8, 9, 12, 13, 4, 5), =0, 1, …, 15, where, It is the position in the hierarchical sort sequence.

[0160] Table 1: Sub-block Interleaving Mode

[0161]

[0162] After sub-block interleaving, the bit sequence is in Figure 10 The center changes from left to right.

[0163] 1.3 Bit interleaving.

[0164] Based on the following, the bit sequence in the sub-block interleaver output Interleaved into bit sequences ,in, The number of levels or sub-blocks, such as by Among those given, It is the transport layer number to which the transport block is mapped.

[0165] for to

[0166] for to

[0167] ; end for end for This process corresponds to Figure 12 In the bit interleaving process, the input bit sequence after sub-block interleaving or sorting is written vertically and read horizontally, with a horizontal width equal to the number of levels, i.e., P. Equivalently, this can be achieved by writing the bit sequence horizontally and reading it vertically. This process prepares the bit sequence according to the modulation symbols, then the layers, for modulation and mapping.

[0168] 2. Code block splicing If there are multiple code blocks, the rate-matched outputs of the multiple code blocks can optionally be concatenated into a single coded bitstream via a code block concatenation process. Alternatively, each code block can be modulated and mapped to multiple transport layers separately. An example of a code block concatenation process is similar to Section 5.5 of [3GPP TS 38.212 V16.7.0].

[0169] 3. Physical uplink or downlink shared channel processing 3.1 Scrambling For each codeword, bit block (in, The number of bits in the codeword transmitted over the physical channel can be scrambled before modulation to obtain the codeword. scrambled bit blocks Bit blocks are obtained from the output of the coded bit sequence of a single or multiple code blocks after the code blocks described above are concatenated. Examples of optional scrambling procedures can be found in Section 6.3.1.1 of [3GPP TS 38.211 V17.0.0] for uplink data transmission and Section 7.3.1.1 of [3GPP TS 38.211 V17.0.0] for downlink data transmission.

[0170] 3.2 Modulation For each codeword The UE should assume that optional scrambling bit blocks are available. Modulation is performed sequentially and in a polling manner using the modulation scheme of each layer, thereby obtaining complex-valued modulation symbol blocks. .in other words, Each set of bits use L A set of modulation schemes is modulated sequentially, with modulation order being... Thus, correspondingly obtain L A set of complex-valued modulation symbols, ,in, L It's the number of floors. It is a layer l The modulation order.

[0171] Table 2: Examples of modulation methods

[0172] 3.3 Layer Mapping The UE should assume that the complex-valued modulation symbol of each codeword to be transmitted is mapped to one or more layers. The codeword is mapped to multiple transport layers according to the following.

[0173] For simplicity of symbolic representation, and to be consistent with hierarchical sorting symbolic representation, without loss of generality, we assume that the codewords of interest map to L layers with layer indices from 1 to L. In reality, codewords can map to L layers with other layer indices (e.g., layer indices from 0 to L–1), or there may be multiple codewords that can map to a total of more than L layers (e.g., layer indices from...). To L+ –1) L layers. These indexes should be mapped one-to-one sequentially to layer indices 1 to L used for sorting purposes.

[0174] The complex-valued modulation symbol of the codeword Should be mapped to layer superior( ),in, It is the number of layers to which the codeword is mapped. It is the number of modulation symbols per layer. / L, = .

[0175] Or more generally, if codewords are mapped to layer indices k to L+ –1, =0,1, …, = .

[0176] After layer mapping, vector blocks can be mapped to antenna ports, undergo multi-antenna precoding, and then resource mapping, including mapping to time and frequency resources for transmission.

[0177] Figure 13 The diagram illustrates the basic signaling and transmission processes for DL ​​(deep channel) transmission (left) and UL (low-level channel) transmission (right). In DL transmission, the BS can optionally transmit a reference signal (RS) for channel measurements, which may include CSI-RS, PT-RS, DMRS, etc. The UE can then optionally perform channel measurements, typically based on the reference signal (e.g., CSI-RS), and then send CSI feedback to the BS. The CSI feedback may include information that helps the BS perform joint CW-to-QAM and layer mapping. The BS then determines a reliability ordering of bit positions and transport layers based on the feedback and / or specific pre-configured rules, and then performs coding, modulation, and layer mapping, including the joint CW-to-QAM and layer mapping process, based on the determined ordering. The BS then transmits a DCI to schedule PDSCH (i.e., DL data) transmission. Additionally, the DCI may indicate the ordering of the combinations so that the UE understands the ordering used for the joint CW-to-QAM and layer mapping process. The UE then uses the information carried by the DCI to help decode the PDSCH.

[0178] In uplink transmission, the RS used for channel measurements can be optionally transmitted by the UE (e.g., via SRS). The BS can perform channel measurements and determine the ordering of combinations of bit positions of transport layer and modulation symbols based on channel information or specific pre-configured rules, or both. The BS can then send DCI to schedule PUSCH (i.e., UL data) transmission. Additionally, the DCI can indicate the ordering of the combinations so that the UE understands the ordering used for the joint CW-to-QAM and layer mapping process. The UE then performs coding, modulation, and layer mapping, including the joint CW-to-QAM and layer mapping process, and sends PUSCH to the BS based on the information in the DCI.

[0179] Information used to determine sorting To determine the ordering of the combination of modulation bits (also referring to the bit positions of modulation symbols) and transport layers, the network or BS can determine the ordering based on CSI feedback information. The ordering can be based on channel quality feedback for each layer, for example, on the signal-to-interference-plus-noise ratio (SINR), CQI, or any channel quality measurement for each layer in all layers mapped to the CW. The ordering can also be based on layer ordering feedback; examples for some specific pre-configured ordering rules are given in this invention. The ordering of the combinations can also be based on information about statistical models or statistical results (or statistical information) of L transport layers, where L is the number of transport layers mapped to a codeword. Optionally, some or all of the statistical results or parameters of the statistical models can come from the UE's CSI feedback. For example, in some embodiments, the ordering of the combination of modulation bits and transport layers can be based on the reliability of the combinations. In other words, the ordering can be a reliability ordering.

[0180] Various methods are provided to determine the order of combinations in the embodiments of this application. As described above, the BS or UE performs a process of CW to joint modulation and transport layer mapping based on the order of combinations, which can be referred to as the joint mapping process.

[0181] In one implementation, the order of the combinations can be determined based on measurements.

[0182] For example, if channel information for each layer or each layer group is available, the ordering can be determined based on a measurement or function used to measure the reliability of modulated bits with respect to the channel quality of a particular transport layer. It should be noted that in the embodiments of this application, "modulated bit" and "bit position of modulation symbol" are used interchangeably. In some embodiments, the channel information for a transport layer or transport layer group may include any of the following: CQI, SINR, SNR, reference signal received power (RSRP), or any other channel quality measurement, etc.

[0183] In this embodiment, L transport layers are mapped to one codeword. The L transport layers can be divided into Q transport layer groups, where Q is a positive integer. Each of the Q transport layer groups may include one or more transport layers from the L transport layers. If a transport layer group includes only one transport layer, then this transport layer group is more likely to be considered a single transport layer.

[0184] Two methods are described below: one is based on mutual information (MI) per bit position, and the other is based on a new measurement compared to existing technologies, namely the intrinsic LLR (ILLR) of bit positions provided in this application. Since each bit position is included in the modulation symbol of a specific transmission layer, this measurement is actually for a specific combination. In other words, the measurement for this combination can include either MI or ILLR.

[0185] Assuming the channel quality and corresponding modulation scheme of each transmission layer are known, the following criterion is provided for determining the joint modulated bit position and transmission layer order (i.e., the combined order).

[0186] Considering channel gain and noise The bit channel is the bit position of each modulated symbol on the channel (also called each modulated bit), and the received signal is generated by... Given. For simplicity, without loss of generality, we assume the channel gain. Normalization to 1 is also true for white Gaussian noise (AWGN) channels.

[0187] Figure 14 An example of a method for measuring the reliability of modulation bits is shown, wherein: =

[0188] To compare the reliability of different modulation bits with different modulation schemes in different transmission layers, i.e., to compare the reliability of different combinations, we can calculate the mutual information (MI) at each bit position or the MI of the bit channel.

[0189] Figure 15 The process of calculating the MI for each bit position provided in the embodiments of this application is illustrated.

[0190] refer to Figure 15 The bit channel MI can be calculated based on the probability distribution function (PDF) of the LLR, as shown below: =

[0191] Therefore, one approach to ranking the reliability of joint modulation bits and transport layer is to calculate the bit channel LLR for each bit position of the modulation symbol using the transport layer's SINR or SNR, and then rank them based on which bit position has a higher MI. Bit positions at a specific transport layer with a higher MI have higher reliability than bit positions at a specific transport layer with a relatively lower MI. In other words, when the BS or UE ranks different combinations, the first combination with a higher MI has a higher priority than the second combination with a lower MI.

[0192] However, neither LLR nor MI has a closed form and may require numerical calculations for each SNR point, which can be a complex task. Furthermore, for this purpose (i.e., for the purpose of performing modulation and layer mapping processes), highly accurate values ​​of the measurements are not required; therefore, we provide the following simplified criteria for ranking the reliability of the modulation bits.

[0193] First, we introduce the concept of constellation-specific LLR or intrinsic LLR (ILLR), because LLR is a function that depends on the actual received signal. The ILLR for a specific constellation point is defined as the LLR value when the received signal is at that specific constellation point. The ILLR for a specific constellation point can also be interpreted as the LLR value under specific input constellation conditions when the noise is relatively small compared to the channel.

[0194] The overall ILLR of the modulation bits, or the ILLR of the modulation bits only, is the average of all absolute ILLR values ​​for all possible constellation points. Alternatively, the ILLR of the modulation bits can also be interpreted as the absolute ILLR values ​​for all constellation points corresponding to a modulation bit of 0. Since the constellation point corresponding to a modulation bit of 0 and the constellation point corresponding to a modulation bit of 1 are symmetrical, and their corresponding absolute LLR values ​​are the same (the LLR values ​​may have different signs), both interpretations produce the same ILLR value. Therefore, the ILLR of a specific constellation point can be interpreted as the ILLR value of the input constellation under the specific constellation point condition. In the following example, without loss of generality, only the ILLR value of the constellation point corresponding to a modulation bit of 0 is calculated.

[0195] If the maximum logarithm approximation is used, then LLR can be expressed as

[0196] in, and These are input constellations, which respectively maximize the exponential terms in the numerator and denominator of the logarithmic function, belonging to... and This is equivalent to finding the constellation point closest to y, which belongs to... and .

[0197] Considering belongs to For the constellation, y = ,therefore:

[0198] It should be noted that, and It is symmetrical, so we only need to consider This is similar to the approximation of the bit error rate using the minimum distance rule.

[0199] Figure 16 This demonstrates how the minimum distance rule is used to find the closest [Illustrated Rank] when determining the modulation bit. and Examples of constellations. Without loss of generality, only the real components of the ILLR are considered in the calculations, along with the corresponding odd bits. This is because only the real components in the received signal are used to determine the first bit, and the second bit is symmetrical to the first bit, which should give the same reliability or ILLR value. For 16QAM, taking the first bit as an example, only the four constellations in one region of the QPSK decision region need to be considered, corresponding to... Figure 16 The constellations marked 0000, 0010, 0001, and 0011. First, consider... Figure 16 The ILLR value of the first bit of a specific constellation marked 0001. To calculate the ILLR value of this specific constellation (0001), assume the received signal... Located in the constellation (0001). It is the constellation closest to y, and its first bit corresponds to 0. Therefore, It is the same constellation (0001) as described above. It is the constellation closest to y, and its first bit corresponds to 1. Therefore, Located in the constellation marked 1001. Figure 16 This bit is shown , and Location. Then, the formula described earlier can be used. Calculate the ILLR value of the first bit under the input constellation condition 0001. The ILLR for each bit under other input constellation conditions can be calculated in a similar manner. Furthermore, assume that the unit value 1 is defined as... Figure 16 Calculate the phase noise variance using the real values ​​of the inner constellation shown. Average SNR with 16QAM The relationship between them.

[0200]

[0201] The ILLR results for each bit of a specific constellation are shown in Table 3 below. It should be noted that for 256QAM, for simplicity of notation representation, the specific modulation bits corresponding to the constellation are not shown in Table 3, and they are simply sorted according to ILLR from least reliable to most reliable. The ratio is the ratio of the number of constellations with the same conditional ILLR value to the total number of constellations for which an average ILLR is required for the modulation bits.

[0202] Table 3: ILLR under Average SNR

[0203] The overall ILLR for the first and second bits of 16QAM is given by averaging the ILLRs of the two constellations 0001 and 0011. For example, the average can be calculated using any SINR averaging method used in the physical layer abstraction via exponential effective SINR mapping (EESM). Some other examples of averaging methods include SINR averaging methods based on capacity or mutual information. An example of an EESM method for calculating effective SINR is given by the following formula:

[0204] In the above formula, K is the total number of SINR values ​​for which the average value is required. It is the k-th SINR of the average value, and It is a scaling factor determined empirically, which may depend on the modulation and coding scheme.

[0205] Therefore, the ILLR of the first bit (or the second bit, since they are equally reliable) of 16QAM is given by the EESM (or any other averaging method) of two different constellation-specific ILLRs, while the ILLR of the third bit (and the fourth bit) of 16QAM is equal to only one constellation-specific ILLR.

[0206] ILLR_b1= EESM (ILLR_b1|0001, ILLR_b1|0011) ILLR_b3 = EESM (ILLR_b3|0001) The overall ILLR for other bit positions in different QAM modulations can be obtained similarly.

[0207] Figure 17An example of the ILLR versus the average SINR of the layer is shown. It can be observed that there is a difference of approximately 18 dB between the most reliable bits (QPSK, bits 1 and 2) and the least reliable bits (256QAM, bits 7 and 8). For the same modulation, there is also a significant difference between the most reliable and least reliable bits (15 dB for 256QAM).

[0208] The ILLR value of each modulation bit is obtained as the average SNR. After the function, substitute the actual average SINR of each layer (obtained through feedback or other means) into the function. It also obtains the ILLR value of the combination of the modulation bits of the modulation symbol and the corresponding transmission layer. These ILLR values ​​are used to measure reliability and for sequencing purposes.

[0209] In another implementation, the BS can calculate the order of combinations based on feedback information from the UE (such as CQI, SINR, or any other channel quality metric for each layer or layer group), and then indicate the order of combinations to the UE for modulation and transport layer mapping. Alternatively, the UE can measure the CQI, SINR, or any other channel quality metric for each layer or layer group itself, calculate the order of combinations, and then report the order of combinations to the network or the BS.

[0210] In one possible implementation, after the BS or UE determines the order of the combinations, the BS or UE indicates the order of the combinations to the other side, which can be called the complete order indication method.

[0211] In some scenarios, the BS or UE can determine the order of the combination of transport layer index and bit position index based on pre-configured special rules, rather than a completely flexible ordering. These ordering methods can be defined for one of the following reasons: (1) Fully flexible sequencing may require a large amount of signaling overhead to indicate the sequencing used for CW to modulation and transport layer mapping processes, which may be undesirable.

[0212] (2) The BS or network may not have enough information to determine a fully flexible sorting. Therefore, it makes sense for the BS or network to use a simplified sorting rule based on the limited information the BS has, and performance can still benefit significantly from the simplified sorting rule.

[0213] Accordingly, due to the second reason mentioned above, after the BS determines the order of the combinations, the BS sends information for the UE to use in determining the order. The UE uses the received information and one or more special rules to finally determine the order of the combinations, and vice versa. Optionally, the special rules can be pre-configured, pre-defined, or indicated by signaling, etc.

[0214] Different methods can be used to sort the reliability levels of layers and modulation maps. Here are some examples of specific rules.

[0215] Rule 1: The position of the modulation bit is always considered first, followed by the transmission layer.

[0216] In this rule, the priority of bit positions in a modulation symbol is higher than the priority of the transport layer. Specifically, the sorting process can be as follows: The BS or UE first selects the first two bit positions, and then traverses all transport layers in order from the transport layer with the highest sorting / priority or highest channel quality to the transport layer with the lowest sorting / priority or lowest channel quality (e.g., L transport layers mapped to a codeword); then selects the next two bit positions, and then traverses all transport layers including the corresponding bit positions in order from the highest sorting / priority or highest channel quality to the lowest sorting / priority or lowest channel quality, ...; selects the last two bit positions, and traverses all transport layers including the last two bit positions in order from the highest sorting / priority or highest channel quality to the lowest sorting / priority or lowest channel quality. It should be noted that since the first and second bit positions of the modulation symbol are known to have the same reliability or priority, they are similarly considered together in the sorting. Furthermore, during the sorting process, when selecting two consecutive and adjacent bit positions from the highest reliability to the lowest reliability of the transport layers, if a transport layer does not include the corresponding bit position, that transport layer is skipped.

[0217] Rule 2: Layer quality is always considered first, followed by the bit position of the modulation symbol.

[0218] In this rule, the priority of the transport layer is higher than the priority of the bit positions of the modulation symbol. Specifically, the sorting process can be as follows: The BS or UE first selects the transport layer with the highest channel quality, and then traverses all bit positions from the first bit position to the last bit position based on the modulation scheme corresponding to that transport layer; then it selects the transport layer with the second highest channel quality, and traverses all bit positions sequentially from the first bit position to the last bit position based on the modulation scheme corresponding to that transport layer; ..., finally, it selects the transport layer with the lowest channel quality, and then traverses all bit positions from the first bit position to the last bit position based on the modulation scheme corresponding to that transport layer.

[0219] For Rule 1, assuming modulation adaptation, the average SNR of each modulation bit may be similar, therefore earlier bit positions in the modulation may be more important than later bit positions. More important bits in the codeword will be mapped to more reliable bit positions, which is an advantage of Rule 1.

[0220] The following text provides two examples from two different scenarios.

[0221] In the first scenario, it is assumed that the channel quality of each layer has been sorted in natural ascending (or descending) order of the layer index from the layer with the highest channel quality to the layer with the lowest channel quality. For example, a layer with higher channel quality corresponds to a lower layer index, and vice versa. This can be achieved through different mechanisms; for example, the BS or network can arrange the mapping from layers to antenna ports, and the mapping from antenna ports to physical antennas, such that the layer with the highest channel quality appears on the layer with the lowest index, and the columns of the precoder corresponding to each layer can also be arranged accordingly. It should be noted that in the following embodiments, an example representing the ascending order of the layer index from the highest to the lowest channel quality can be given; however, the descending order of the layer index can also be applied similarly.

[0222] In the first example, it is assumed that there is no layer-based modulation adaptation, meaning that all layers mapped to a CW use the same modulation scheme. There are a total of four layers: L0, L1, L2, and L3, where the corresponding layer indices are... The numbers are 0, 1, 2, and 3, respectively. All four layers use 16QAM modulation with a modulation order of 4, meaning each modulation symbol has 4 bits. Assume the layers are ordered in natural ascending order based on their layer indices: L0 > L1 > L2 > L3.

[0223] If rule 1, "bit position of modulation symbol first, transmission layer second," is used, then the reliability order (from highest to lowest reliability) of the combination (or pair) of bit position and layer index is given by (L0, b(1)), (L0, b(2)), (L1, b(1)), (L1, b(2)), (L2, b(1)), (L2, b(2)), (L3, b(1)), (L3, b(2)), (L0, b(3)), (L0, b(4)), (L1, b(3)), (L1, b(4)), (L2, b(3)), (L2, b(4)), (L3, b(3)), (L3, b(4)), where, b ( ) represents the first modulation symbol Bit, and symbolic representation ( The meanings of ) are the same, among which, It is the modulation order.

[0224] If rule 2, "transport layer priority, bit position of modulation symbol second", is used, the reliability order of the combination of bit position and layer index is given by (L0, b(1)), (L0, b(2)), (L0, b(3)), (L0, b(4)), (L1, b(1)), (L1, b(2)), (L1, b(3)), (L1, b(4)), (L2, b(1)), (L2, b(2)), (L2, b(3)), (L2, b(4)), (L3, b(1)), (L3, b(2)), (L3, b(3)), (L3, b(4)).

[0225] In the second example, layer-based modulation adaptation is used, meaning that different layers mapped to the same CW can use different modulation schemes. In this example, the modulation schemes for each layer are L0: 64QAM; L1: 16QAM; L2: 16QAM; L3: QPSK, where the modulation orders are 6, 4, 4, and 2, respectively.

[0226] If we use rule 1, which prioritizes the bit position of the modulation symbol over the transport layer, then the reliability order of the bit position and transport layer combination is given by (L0, b(1)), (L0, b(2)), (L1, b(1)), (L1, b(2)), (L2, b(1)), (L2, b(2)), (L3, b(1)), (L3, b(2)), (L0, b(3)), (L0, b(4)), (L1, b(3)), (L1, b(4)), (L2, b(3)), (L2, b(4)), (L0, b(5)), (L0, b(6)).

[0227] If rule 2, which prioritizes the transport layer and then the bit position, is used, the reliability order of the combination of bit position and layer index (i.e., transport layer) is (L0, b(1)), (L0, b(2)), (L0, b(3)), (L0, b(4)), (L0, b(5)), (L0, b(6)), (L1, b(1)), (L1, b(2)), (L1, b(3)), (L1, b(4)), (L2, b(1)), (L2, b(2)), (L2, b(3)), (L2, b(4)), (L3, b(1)), (L3, b(2)).

[0228] In the second scenario, the layer index is not sorted based on channel quality; that is, the order of the layer indexes does not imply any order of channel quality. In this case, the sorting rules may require some additional information, such as the order of the layer's channel quality. The order of the layer's channel quality can be obtained from channel measurements or CSI feedback.

[0229] If we use the first example above, that is, without using layer-based modulation adaptation, and all 4 layers use 16QAM modulation, and assume that the layer quality is ordered by L1>L2>L0>L3.

[0230] If rule 1, "bit position of modulation symbol first, then transport layer second", is used, the reliability order is given by (L1,b(1)), (L1, b(2)), (L2, b(1)), (L2, b(2)), (L0, b(1)), (L0, b(2)), (L3, b(1)), (L3, b(2)), (L1, b(3)), (L1, b(4)), (L2, b(3)), (L2, b(4)), (L0, b(3)), (L0, b(4)), (L3, b(3)), (L3, b(4)).

[0231] If rule 2, "transport layer priority, bit position of modulation symbol second", is used, the reliability order of the combination of bit position and layer index is given by (L1, b(1)), (L1, b(2)), (L1, b(3)), (L1, b(4)), (L2, b(1)), (L2, b(2)), (L2, b(3)), (L2, b(4)), (L0, b(1)), (L0, b(2)), (L0, b(3)), (L0, b(4)), (L3, b(1)), (L3, b(2)), (L3, b(3)), (L3, b(4)).

[0232] If we use the second example, there exists a layer-based modulation adaptation, with each layer having the following modulation schemes: L0: 16QAM; L1: 64QAM; L2: 16QAM; L3: QPSK, where the modulation orders are 4, 6, 4, and 2, respectively. Assuming the layer quality is ordered as L1 > L2 > L0 > L3, then: If rule 1, "bit position of modulation symbol first, then transport layer second," is used, the reliability order is given by (L1,b(1)), (L1, b(2)), (L2, b(1)), (L2, b(2)), (L0, b(1)), (L0, b(2)), (L3, b(1)), (L3, b(2)), (L1, b(3)), (L1, b(4)), (L2, b(3)), (L2, b(4)), (L0, b(3)), (L0, b(4)), (L1, b(5)), (L1, b(6)).

[0233] If rule 2, "transport layer priority, bit position of modulation symbol second", is used, the reliability order of the combination of bit position and layer index is given by (L1, b(1)), (L1, b(2)), (L1, b(3)), (L1, b(4)), (L1, b(5)), (L1, b(6)), (L2, b(1)), (L2, b(2)), (L2, b(3)), (L2, b(4)), (L0, b(1)), (L0, b(2)), (L0, b(3)), (L0, b(4)), (L3, b(1)), (L3, b(2)).

[0234] In some scenarios, if the modulation scheme of each layer is known, the layer reliability ranking can be based on the modulation order. For example, using the second example above, the modulation schemes for each layer are L0: 16QAM; L1: 64QAM; L2: 16QAM; L3: QPSK. Therefore, the modulation orders are 4, 6, 4, and 2, respectively. The layer ranking can be determined based on additional information, i.e., the higher the modulation order of a layer, the higher its reliability. Based on this additional information, the layer reliability ranking is determined to be L1>(L2, L0)>L3. When multiple layers have the same modulation order, the ranking of layers using the same modulation order can be based on other rules, such as the natural ascending (or descending) order of the layer indices corresponding to the same modulation scheme. For example, if the ascending order of the layer indices corresponding to layers with the same modulation order represents the ascending order of layer reliability, then the reliability of layers L2 and L0 can be determined as L2>L0. Then, the layer reliability can be determined as L1>L2>L0>L3. The additional information can be pre-configured or default information. Alternatively, the ordering of layers using the same modulation order can be based on CSI feedback, which indicates this ordering.

[0235] In the above embodiments, the ordering of the combinations is determined based on each layer and each bit position. In some other embodiments, the ordering is not based on each layer and each modulation bit (i.e., each bit position of the modulation symbol), but can be determined based on groups of layers or subsets of layers and groups of bit positions. Layers and bit positions of modulation symbols can be grouped. Grouping can be used in conjunction with any ordering determination or ordering rule.

[0236] For example, if L layers map to a single codeword, these L layers can be divided into several layer groups, such as Q layer groups. Grouping can be determined based on differences in layer channel quality. For instance, layers with similar channel quality can be grouped together, or layers with channel quality differences not exceeding a threshold can be grouped together.

[0237] Grouping can also be determined based on the physical channel. For example, the two polarizations of an antenna element belong to the same group. In another example, each panel / beam belongs to a single layer group. In yet another example, transport layers using different TRPs belong to different groups, while different layers of the same TRP belong to the same group, and so on.

[0238] The grouping method can be pre-configured, for example, per L g A layer belongs to a layer group, and the number of layers in a layer group is... L g It can be configurable or fixed (e.g.) L g =2). That is to say... L g This refers to the layer group size. The configuration of the number of layers belonging to a group can be semi-static (e.g., RRC signaling), dynamic signaling (e.g., in DCI), or a combination of both (e.g., a combination of RRC and DCI). In some scenarios, instead of configuring or fixing the number of layers belonging to the same group, it is possible to configure or fix the maximum number of layer groups belonging to a CW or a MIMO transmission.

[0239] If multiple layers are grouped together, it can be assumed that the layers within a group have the same ordering. In other words, the priority of layers within a transport layer group is the same in ordering. Similarly, bit positions can also be grouped because consecutive bits of a modulation symbol (e.g., the first and second bits, or the third and fourth bits, the fifth and sixth bits, etc.) have the same reliability.

[0240] Once multiple layers or multiple information bit positions are grouped together, the sorting rules only need to consider the ordering between layer groups or the ordering of combinations of layer groups and bit position groups (e.g., a single layer can be considered a special layer group consisting of only one layer, and / or a single bit position can be considered a special bit position group consisting of only one bit position, i.e., the number of components in a layer group or bit position group is 1). Once the group-based sorting is determined, the ordering of bit positions within layers or bit groups within the same layer group can follow specific rules, such as ascending or descending order of layer indices or bit position indices within the group. In this special case (i.e., a single layer as a layer group or a single bit position as a bit group), the number of layers remains unchanged regardless of the grouping process. That is, once the sorting is determined, the mapping process will not change regardless of the grouping process.

[0241] In some other scenarios, group-based sorting can also alter the number of levels and the mapping process. Examples are described below.

[0242] Figure 18 An example of modulation and reliability ordering based on layer groups rather than individual layers is shown. In this example, CW is mapped to 4 layers, but the transport layers are grouped into two layer groups: (L1, L2) belong to layer group (LG) 1, using 16QAM modulation (corresponding to modulation order = 4), and (L3, L4) belong to layer group (LG) 2, using QPSK modulation (corresponding to modulation order = 2). Joint modulation and layer ordering are based on layer groups, (LG1, L2) ... >(LG2, >(LG1, There are a total of 6 reliability levels, such as Figure 18 As shown. It should be noted that since L1 and L2 belong to one layer group, and L3 and L4 belong to another layer group, the combination of each bit position and layer group constitutes a level. For example, the combination of the first bit position of the modulation symbol and LG1 is represented by LG1. This indicates that the combination of the third bit position of the modulation symbol and LG1 is represented by LG1. This indicates, etc. Therefore, the six reliability levels are shown as: (LG1, ... ), (LG1, ), (LG2, ), (LG2, ), (LG1, ), (LG1, In addition, in Figure 18 In this context, the hierarchy is represented together with a layer group and two consecutive bit positions for simplicity. For example, (LG1, ) and (LG1, Together they are represented as (LG1, ),Right now Figure 18 The (shown) ) . Figure 18 The other symbol representations shown are similar to those clarified as examples and will not be repeated for brevity. During bit interleaving, two bits are taken from each layer instead of one bit and written horizontally to prepare two modulation symbols for each layer group. During modulation, two modulation symbols are also generated for each layer group and mapped sequentially to the two layers within the group. The remaining process is similar to a scheme where each layer group has one layer.

[0243] exist Figure 18 In the above embodiments shown, the modulation symbols have two bits with the same reliability (e.g., and , and The two bits are still considered as two levels for reliability ordering and mapping. However, since two bits have the same reliability, in some scenarios, two bits can be grouped together as one level. That is, every two consecutive bits in the modulation symbol are considered a bit position group, referred to as a bit group for simplicity. In this scenario, the total number of levels or sub-blocks / vertical sequences can be divided by 2 to become... When performing modulation and layer mapping, select 2 bits instead of 1 bit from each layer / subblock / vertical sequence. This will produce similar results, but the complexity of the bit interleaving process may be lower.

[0244] In the above embodiments, the symbols represent and symbol representation They are equivalent. For example, the symbol represents... and and symbolic representation and These are used to represent the same thing. Similarly, L1 is mathematically identical to L_j, where j=1. Furthermore, the indices in the above embodiments start from 1; however, in communication standards, they typically start from 0. For those skilled in the art, it is easy to derive the corresponding expressions starting from 0 based on expressions starting from 1. Without loss of generality, expressions starting from 1 and expressions starting from 0 are equivalent, and so on.

[0245] Figure 19 This illustrates an example of grouping two modulation bits with the same priority within the same level. Other parameter settings are the same as... Figure 10The example is the same. Now, due to grouping, there are P=8 levels instead of P=16 levels. The order of the 8 levels from highest reliability (or priority) to lowest reliability (or priority) is represented as Level Order 1, Level Order 2, ..., Level Order 8, with the number of bits at each level's bit position being twice that in the non-grouping case. It should be noted that Level Order 1 refers to the first position with the highest reliability in the order of the 8 levels, Level Order 2 refers to the second position with the second highest reliability in the order of the 8 levels, and so on. During bit interleaving, two bits are taken from each level and written horizontally, thus producing a bit stream for modulation. The remaining process is similar to the case without grouping.

[0246] The above details different methods for determining the order of modulation bits (i.e., the bit positions of modulation symbols) and the combination of the transmission layer. The advantages of these different methods can be discussed below: (1) Methods based on special sorting rules can provide minimal signaling overhead because the BS or UE only needs additional information (such as layer ordering or modulation order itself) to determine the order of the combinations. Most of the performance gains can still be obtained if the additional information comes from feedback, and minimal feedback information is required.

[0247] (2) The ILLR or MI-based methods are the most accurate and flexible for combinatorial sorting purposes. In addition, ILLR-based sorting is very simple and has low complexity, making it easy for BS or UE to calculate the sorting.

[0248] refer to Figures 6 to 18 The method provided in the embodiments of this application is described in detail below. Figure 19 and Figure 20 The apparatus provided in the embodiments of this application will be described in detail. The description of the apparatus embodiments corresponds to the description of the method embodiments. Therefore, for content not described in detail, reference can be made to the above method embodiments. For the sake of brevity, further details are omitted here.

[0249] refer to Figure 20 This diagram illustrates a schematic block diagram of an apparatus 10 provided in some embodiments of this application. Apparatus 10 has the function of implementing the methods described in the above method embodiments. Apparatus 10 may include corresponding modules or units for implementing the methods and / or embodiments described above. In some implementations, apparatus 10 includes a processing module 1001 and a communication module 1002. Optionally, apparatus 10 may also include a storage module for storing computer program code (or instructions) and / or data.

[0250] In some embodiments, device 10 may be a base station-side device, such as a base station or a module within a base station, or a circuit or chip within a base station responsible for communication functions. In some implementations, processing module 1001 may be a processor (which may include a scheduler). Communication module 1002 may be a transmitting unit and / or a receiving unit. The transmitting unit and / or receiving unit may be a transmitter and / or a receiver, respectively, and the storage module may be a memory.

[0251] In some embodiments, device 10 may be a terminal-side device, such as an ED or a module within an ED, or a circuit or chip within an ED responsible for communication functions. In some implementations, processing module 1001 may be a processor. Communication module 1002 may be a transmitting unit and / or a receiving unit. The transmitting unit and / or receiving unit may be a transmitter and / or a receiver, respectively, and the storage module may be a memory.

[0252] In some implementations, when device 10 is an ED or a module within an ED, or when device 10 is a network device or a module within a network device, the functionality of device 10 may be implemented by one or more processors. Specifically, the processor may include a modem chip, or a system-on-a-chip (SoC) or SIP chip including a modem core. The functionality of communication module 1002 may be implemented by transceiver circuitry.

[0253] In some implementations, when device 10 is a circuit or chip responsible for communication functions in an ED or network device (e.g., a modem chip, a system-on-a-chip (SoC) chip, or a SIP chip including a modem core), the function of processing module 1001 can be implemented by a circuit system including one or more processors or processor cores in the chip. The function of communication module 1002 can be implemented by the interface circuit or data transceiver circuit on the aforementioned chip.

[0254] refer to Figure 21 The diagram illustrates a schematic block diagram of an apparatus provided in some embodiments of this application. The apparatus 20 includes at least one processor 21. The at least one processor 21 is coupled to at least one memory 22. The at least one memory 22 is used to store one or more instructions and / or executable computer code. The at least one processor 21 is used to invoke one or more instructions and / or executable computer code to cause the apparatus 20 to implement the methods provided in the embodiments of this application. Optionally, the apparatus 20 may further include at least one memory 22. Optionally, the apparatus 20 may further include at least one communication interface 23, which is used to input and / or output information or data to assist the at least one processor 21 in implementing the methods or embodiments described above.

[0255] In one implementation, device 20 can be any type of communication device in the method embodiments. For example, device 20 can be a network device or a terminal device.

[0256] This application also provides a communication system, including at least one of a device in (or at) the UE of this application or a device in (or at) the network device of this application.

[0257] This application also provides a method executed by a system, the system including at least one of a device in (or at) the UE of this application and a device in (or at) the network device of this application.

[0258] This application also provides a computer-readable storage medium. This computer-readable storage medium stores computer-readable instructions, which, when read and executed by a computer, enable the computer to perform the methods described in any of the embodiments above.

[0259] This application also provides a computer program product. When a computer reads and executes the computer program product, the computer is able to perform the methods described in any of the embodiments above.

[0260] Those skilled in the art will understand that, for convenience and brevity, the detailed working process of the above-described systems, devices, and units can be referred to the corresponding process in the above-described method embodiments, and will not be repeated here.

[0261] It is understood that the modules in device 10 can be logical or functional modules. Each function can correspond to a functional module, or two or more functions can be integrated into one functional module. In actual implementation, all or some modules can be integrated into one physical entity, or they can be distributed across different physical entities. Furthermore, the aforementioned functional modules can be implemented in hardware, in software, or in a combination of hardware and software. Whether a function is implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the functions described for each specific application, but should not consider that such implementation methods exceed the scope of this application.

[0262] In one example, the functional modules in any of the above-described devices may be configured to implement one or more integrated circuits, such as one or more application-specific integrated circuits (ASICs), one or more central processing units (CPUs), one or more microprocessors (microcontroller units (MCUs)), one or more digital signal processors (DSPs), one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these integrated circuit forms.

[0263] In one example, the storage module may include random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, and / or registers.

[0264] A processor, processor system, application processor, baseband processor, processor circuit, or processor core can all be collectively referred to as a processor. A processor can include one or more of the following: central processing unit (CPU), digital signal processor (DSP), microprocessor unit (MPU), microcontroller unit (MCU), graphics processing unit (GPU), field programmable gate array (FPGA), artificial intelligence processor (AI processor), or neural network processing unit (NPU).

[0265] The memory or storage module may include one or more of the following storage media: random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), phase-change memory (PCM), resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), cache, register, read-only memory (ROM), flash memory, erasable programmable read-only memory (EPROM), hard disk, etc. In one example, computer program instructions for performing an embodiment may be stored in non-volatile memory, such as at least a portion of a memory or storage cell (e.g., one or more of ROM, flash memory, EPROM, or hard disk). When the terminal is running, some or all of the corresponding computer program instructions can be loaded into a memory with a higher transfer speed than the processor, such as at least a portion of a memory or storage unit (e.g., RAM, SRAM, DRAM, PCM, RERAM, MRAM, FRAM, cache, registers) so that the processor executes the computer program instructions to perform the steps in the method embodiments disclosed herein.

[0266] In this invention, when used in conjunction with the terms "comprising" or "including" in the claims and / or specification, the word "a" or "an" may refer to "one," but it also has the same meaning as "one or more," "at least one," and "one or more," unless explicitly stated otherwise. Similarly, the word "another" may refer to at least a second or more, unless explicitly stated otherwise.

[0267] In the embodiments of this application, "and / or" describes the association relationship between related objects, indicating that three possible relationships exist. For example, A and / or B can represent the following three cases: only A exists, both A and B exist, and only B exists. The character " / " generally represents an "OR" relationship between related objects. "At least one" refers to one or more. "At least one of A and B," similar to "A and / or B," describes the association relationship between related objects, indicating that three possible relationships exist. For example, at least one of A and B can represent the following three cases: only A exists, both A and B exist, and only B exists.

[0268] In the several embodiments provided in this application, the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the described apparatus embodiments are merely examples. For instance, unit partitioning is a logical functional partitioning, and other partitioning methods can be used in actual embodiments. For example, multiple units or components can be merged or integrated into another system, or some features can be ignored or not performed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed can be implemented using various communication interfaces. Indirect coupling or communication connection between devices or units can be implemented electronically, mechanically, or otherwise.

[0269] Furthermore, the functional units (or functional modules) in the embodiments of this application can be integrated into a processing unit. Each of these units can exist physically separately, or two or more units can be integrated into one unit.

[0270] When these functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. The technical solution of this application can be implemented as a software product. This software product is stored in a storage medium and includes several instructions for instructing a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the embodiments of this application. The aforementioned storage medium includes any medium capable of storing program code, such as a USB flash drive, portable hard drive, ROM, RAM, magnetic disk, or optical disk.

[0271] The units described as discrete components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one location or distributed across multiple network units. Some or all of the units can be selected based on actual needs to achieve the purpose of this embodiment. Furthermore, the functional units in the various embodiments of this application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0272] This invention includes various embodiments, not only method embodiments but also other embodiments, such as apparatus embodiments and embodiments relating to non-transitory computer-readable storage media. Embodiments may be combined individually or in combination with the features disclosed herein.

[0273] Although this invention pertains to illustrative embodiments, it is not intended to be interpreted in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to those skilled in the art upon reference to this specification.

[0274] Features disclosed herein in the context of any particular embodiment may or alternatively be implemented in other embodiments. For example, method embodiments may or alternatively be implemented in apparatus, system, and / or computer program product embodiments. Furthermore, although embodiments are described primarily in the context of methods and apparatus, other implementations are contemplated, for example, as instructions stored in one or more non-transitory computer-readable media. These media may store programs or instructions for performing any of the various methods consistent with the present invention.

[0275] The above description is merely a specific implementation of this application and is not intended to limit the scope of protection of this application. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims and the specification.

Claims

1. A method for communication, characterized in that, include: Based on measurements or pre-configured rules, a sequence of coded bits, including multiple coded bits, is mapped to a modulation symbol and L transmission layers, wherein the measurements or pre-configured rules are associated with a combination of bit positions of the transmission layers and the modulation symbol, and L is an integer greater than 1.

2. The method according to claim 1, characterized in that, Each of the L transport layers is associated with a codeword.

3. The method according to claim 1 or 2, characterized in that, Encoded bits with higher priority or lower indexes are mapped to combinations with higher priority.

4. The method according to any one of claims 1 to 3, characterized in that, The mapping is based on: sorting the combinations according to the measurements at each bit position of the modulation symbol, the measurements being determined based on the modulation scheme of each transport layer or transport layer group and the channel information of each transport layer or transport layer group.

5. The method according to claim 4, characterized in that, The measurement for each bit position includes the mutual information (MI) for each bit position.

6. The method according to claim 5, characterized in that, In the sorting, the first group with a higher MI has a higher priority than the second group with a lower MI.

7. The method according to claim 4, characterized in that, The measurement for each bit position includes the intrinsic log-likelihood ratio (LLR) for each bit position.

8. The method according to claim 7, characterized in that, In the sorting, the first combination with a higher intrinsic LLR has a higher priority than the second combination with a lower intrinsic LLR.

9. The method according to any one of claims 4 to 8, characterized in that, The channel information for each first transport layer or each layer group includes one or more of the following: Channel Quality Indicator (CQI); or Signal-to-reference noise ratio (SINR); or Signal-to-noise ratio (SNR).

10. The method according to any one of claims 1 to 3, characterized in that, The mapping is based on: sorting the combinations according to the pre-configured rules and additional information, wherein the additional information includes pre-configured information, default information, or channel state information (CSI) feedback from the terminal device.

11. The method according to claim 10, characterized in that, The pre-configuration rules include: The first rule indicates that the priority of a bit position or bit position group of a modulation symbol is higher than the priority of a transport layer or transport layer group; or The second rule indicates that the priority of the transport layer or transport layer group is higher than the priority of the bit position or bit position group of the modulation symbol.

12. The method according to any one of claims 1 to 11, characterized in that, The L transmission layers employ at least two modulation schemes.

13. The method according to any one of claims 10 to 12, characterized in that, The mapping is based on: sorting the combinations according to the pre-configured rules and the additional information, the additional information including: The ascending or descending order of L transport layer indices represents the sorting of the channel quality of the L transport layers from highest to lowest; or the ascending or descending order of Q transport layer group indices represents the sorting of the channel quality of the Q transport layer groups from highest to lowest; where Q is the number of transport layer groups.

14. The method according to any one of claims 10 to 12, characterized in that, The mapping is based on: sorting the combination according to the pre-configured rules and the additional information, the additional information including a first ranking of the channel quality of the L transport layers or Q transport layer groups, where Q is the number of transport layer groups.

15. The method according to any one of claims 10 to 12, characterized in that, The mapping is based on: sorting the combinations according to the pre-configured rules and the additional information, the additional information including: The modulation scheme of each of the L transmission layers or each of the Q transmission layer groups has a higher priority than the first transmission layer or the first transmission layer group that uses a first modulation scheme corresponding to a higher modulation order.

16. The method according to any one of claims 4 to 15, characterized in that, The ordering of the combination is determined based on the joint reliability of the bit positions of the transport layer and the modulation symbol.

17. A communication device, characterized in that, Used to perform the method according to any one of claims 1 to 16.

18. The communication device according to claim 17, characterized in that, include: A communication module for receiving a sequence of encoded bits, including multiple encoded bits; A processing module is configured to map the coded bit sequence to modulation symbols and L transmission layers based on a measurement or a pre-configured rule, wherein the measurement or the pre-configured rule is associated with a combination of bit positions of the transmission layers and modulation symbols, and L is an integer greater than 1.

19. The communication device according to claim 18, characterized in that, The communication module includes one or more receiving units.

20. The communication device according to claim 18 or 19, characterized in that, The processing module includes one or more processors.

21. The communication device according to claim 17, characterized in that, include: An interface circuit for receiving a sequence of encoded bits, including multiple encoded bits; One or more processors are configured to map the coded bit sequence to modulation symbols and L transport layers based on a measurement or a pre-configured rule, wherein the measurement or the pre-configured rule is associated with a combination of bit positions of the transport layers and the modulation symbols, and L is an integer greater than 1.

22. The communication device according to claim 21, characterized in that, The interface circuit includes one or more transceivers.

23. An apparatus, characterized in that, include: One or more processors; One or more memories, the one or more memories storing instructions that, when executed by the one or more processors, cause the apparatus to perform the method according to any one of claims 1 to 16.

24. A communication system, characterized in that, The communication system includes communication means for performing the method according to any one of claims 1 to 16.

25. A non-transitory computer-readable storage medium, characterized in that, The device stores instructions that, when executed by the device, cause the device to perform the method according to any one of claims 1 to 16.

26. A computer program product, characterized in that, The computer program product stores instructions, which, when executed, cause the device to perform the method according to any one of claims 1 to 16.

Images