Semiconductor device and method for manufacturing semiconductor device

CN123023485APending Publication Date: 2026-10-30MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
CN202480089624.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-03-26
Publication Date
2026-10-30

AI Technical Summary

Benefits of technology

[0009]根据本公开,半导体元件通过第一接合构件接合在电路图案上,第三接合构件的熔点高于第二接合构件的熔点。根据这样的结构,相比于绝缘基板与金属引线电极之间的接合的接合性及管理,能够优先进行半导体元件与金属引线电极之间的接合的接合性及管理。

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Abstract

The present application aims to provide a technology that enables preferential execution of the joining property and management of joining between a semiconductor element and a metal lead electrode, compared to the joining property and management of joining between an insulating substrate and a metal lead electrode. A semiconductor device includes an insulating substrate provided with a circuit pattern on an insulating layer; a semiconductor element joined to the circuit pattern by a first joining member; and a metal lead electrode including a first portion joined to the circuit pattern by a second joining member, and a second portion joined to the semiconductor element by a third joining member, the melting point of the third joining member being higher than the melting point of the second joining member.
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Description

Technical Field

[0001] This disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. Background Technology

[0002] Various technologies have been proposed for semiconductor devices. For example, Patent Document 1 discloses a structure for a semiconductor device in which a portion of a metal lead electrode is bonded to a semiconductor element by a high-temperature solder, another portion of the metal lead electrode is bonded to a wiring substrate by a low-temperature solder, and the semiconductor element is bonded to the wiring substrate by a heat sink.

[0003] In the manufacturing process of this semiconductor device, after the low-temperature solder and high-temperature solder are heated and melted, if they are cooled down, the difference in melting points between the low-temperature solder and the high-temperature solder allows the high-temperature solder to solidify before the low-temperature solder. This satisfies the general specification requirement that "the bonding performance and management of the connection between the semiconductor element and the metal lead electrode should be prioritized over the bonding performance and management of the connection between the wiring substrate and the metal lead electrode."

[0004] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2001-110957 Summary of the Invention The technical problem that the invention aims to solve

[0005] However, in the structure of Patent Document 1, when the solder melts, the heat sink bonded to the semiconductor element is also heated. The heat stored due to the large heat capacity of the heat sink exceeds the heat dissipation of the heat sink. Therefore, during subsequent cooling, the cooling of the high-temperature solder near the heat sink after heat storage is hindered, which may cause the low-temperature solder to solidify before the high-temperature solder.

[0006] In this situation, during the period before the temperature of the high-temperature solder drops to its solidification point, the distance between the semiconductor element and the metal lead electrode increases due to the warpage recovery behavior of the wiring substrate. As a result, the bonding area between the semiconductor element and the metal lead electrode is insufficient, failing to meet the aforementioned general specification requirements.

[0007] Therefore, this disclosure was made in view of the above-mentioned problems, and its object is to provide a technology that enables the bonding and management of the connection between a semiconductor element and a metal lead electrode to be prioritized over the bonding and management of the connection between an insulating substrate and a metal lead electrode. Technical solutions to solve technical problems

[0008] The semiconductor device disclosed herein includes: an insulating substrate having a circuit pattern on an insulating layer; a semiconductor element bonded to the circuit pattern by a first bonding member; and a metal lead electrode comprising a first portion bonded to the circuit pattern by a second bonding member and a second portion bonded to the semiconductor element by a third bonding member, the third bonding member having a melting point higher than that of the second bonding member. Invention Effects

[0009] According to this disclosure, a semiconductor element is bonded to a circuit pattern via a first bonding member, and a third bonding member has a melting point higher than that of a second bonding member. With this structure, the bonding quality and management of the bonding between the semiconductor element and the metal lead electrode can be prioritized compared to the bonding quality and management of the bonding between the insulating substrate and the metal lead electrode.

[0010] The purpose, features, aspects and advantages of this disclosure will become more apparent from the following detailed description and accompanying drawings. Attached Figure Description

[0011] Figure 1 This is a simplified cross-sectional view showing the structure of the semiconductor device according to Embodiment 1. Figure 2 This is a simplified cross-sectional view illustrating the manufacturing method of the semiconductor device according to Embodiment 1. Figure 3 This is a simplified cross-sectional view showing the structure of the semiconductor device involved in Embodiment 2. Figure 4 This is a simplified cross-sectional view showing the structure of the semiconductor device involved in Embodiment 3. Detailed Implementation

[0012] The embodiments will now be described with reference to the accompanying drawings. The features described in the following embodiments are examples, and not all features are essential. Furthermore, in the following description, the same structural elements are labeled with the same or similar reference numerals in multiple embodiments, and the description mainly focuses on different structural elements. Also, in the following description, specific positions and directions such as "upper," "lower," "left," "right," "front," or "back" may not be completely consistent with the actual positions and directions in the implementation.

[0013] <Implementation Method 1> Figure 1 This is a simplified cross-sectional view showing the structure of the semiconductor device according to Embodiment 1. Figure 1The semiconductor device includes: an insulating substrate 1; a bonding member 2 as a first bonding member; a low-melting-point bonding member 3 as a second bonding member; a semiconductor element 4; a high-melting-point bonding member 5 as a third bonding member; a monolithic metal lead electrode 6; external terminals 7a and 7b; wires 8a and 8b; and a sealing resin 9.

[0014] The insulating substrate 1 includes an insulating layer 1a, a circuit pattern 1b disposed on the upper surface of the insulating layer 1a, and a circuit pattern 1c disposed on the lower surface of the insulating layer 1a. The insulating layer 1a is made of, for example, a ceramic or resin with excellent thermal conductivity, such as aluminum nitride or silicon nitride. The circuit patterns 1b and 1c are circuit wirings, and are made of, for example, copper or aluminum alloy.

[0015] The bonding member 2 is disposed on the circuit pattern 1b. In this embodiment 1, the bonding member 2 is, for example, a solder material with tin (Sn) as the main component and various metal elements added.

[0016] The low-melting-point bonding member 3 is disposed on a circuit pattern 1b that is different from the circuit pattern 1b on which the bonding member 2 is disposed. The low-melting-point bonding member 3 is, for example, a solder material with tin as the main component and various metal elements added.

[0017] The semiconductor element 4 is bonded to the circuit pattern 1b disposed on the insulating layer 1a via the bonding member 2. That is, no heat sink is disposed between the semiconductor element 4 and the circuit pattern 1b.

[0018] Semiconductor element 4 can be made of ordinary silicon (Si), or it can be made of wide-bandgap semiconductors such as silicon carbide (SiC), gallium nitride (GaN), and diamond, which have a larger bandgap than ordinary silicon. When semiconductor element 4 is made of wide-bandgap semiconductor, stable operation under high temperature and high voltage and high switching speed can be achieved.

[0019] Semiconductor element 4 includes at least one of MOSFET (Metal Oxide Semiconductor Field Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), RC-IGBT (Reverse Conducting IGBT), SBD (Schottky Barrier Diode), and PND (PN junction diode). Furthermore, in this specification, for example, "at least one of A, B, C, ... and Z" means any one of all combinations of more than one from the group A, B, C, ... and Z.

[0020] A high-melting-point bonding member 5 is disposed on the semiconductor element 4. The high-melting-point bonding member 5 may be, for example, a solder material with tin as the main component and various metal elements added, or a sintered material in the form of a paste made of silver or copper with excellent conductivity.

[0021] Furthermore, as long as the melting point of the high-melting-point bonding member 5 is higher than that of the low-melting-point bonding member 3, the materials of the low-melting-point bonding member 3 and the high-melting-point bonding member 5 are not limited to those described above. Moreover, in this embodiment 1, the melting point of the bonding member 2 may be independent of the melting points of the high-melting-point bonding member 5 and the low-melting-point bonding member 3.

[0022] The metal lead electrode 6 is mainly composed of copper or other materials with excellent conductivity. The metal lead electrode 6 includes a thick-walled portion 6a as a first part and a thin-walled portion 6b, which is thinner than the thick-walled portion 6a as a second part. The thick-walled portion 6a is bonded to the circuit pattern 1b by a low-melting-point bonding member 3. The thin-walled portion 6b is bonded to the semiconductor element 4 by a high-melting-point bonding member 5. Alternatively, a portion of the thin-walled portion 6b of the metal lead electrode 6 opposite to the semiconductor element 4 may be provided with a [missing information - likely a typo]. Figure 1 An unillustrated through-hole extending vertically. Furthermore, the high-melting-point bonding member 5 can also be wetted and spread on the upper part of the metal lead electrode 6 with an area wider than the through-hole while filling the through-hole.

[0023] To connect the signal circuit used to control the semiconductor element 4 to the semiconductor element 4, wires 8a and 8b are used to connect a portion of the semiconductor element 4 to the external terminal 7a and a portion of the circuit pattern 1b to the external terminal 7b, respectively. The connection of wires 8a and 8b is, for example, achieved using ultrasonic connection. Wires 8a and 8b are made of materials with excellent thermal and electrical conductivity, such as aluminum, copper, silver, or gold.

[0024] Although not shown, the circuit pattern 1c on the lower surface of the insulating layer 1a can be bonded to a heat dissipation substrate (not shown) using a bonding material such as solder, or connected to heat dissipation fins or the like using thermal grease. The sealing resin 9 seals the aforementioned structural elements while the heat dissipation surface, which serves as the lower surface of the circuit pattern 1c, is exposed. The sealing resin 9 is, for example, made of epoxy resin or silicone gel. However, the material of the sealing resin 9 is not limited to the above, as long as it meets the desired physical properties such as elastic modulus, heat resistance, adhesion, and coefficient of linear expansion.

[0025] <Manufacturing Method> Next, the method for manufacturing the semiconductor device according to Embodiment 1 will be described.

[0026] <Process S1 (Assembly Process)> like Figure 2As shown, a semiconductor element 4 is mounted on the circuit pattern 1b via a bonding member 2. Furthermore, a thick-walled portion 6a of a metal lead electrode 6 is mounted on the circuit pattern 1b via a low-melting-point bonding member 3, and a thin-walled portion 6b of the metal lead electrode 6 is mounted on the semiconductor element 4 via a high-melting-point bonding member 5. For the bonding member 2, the low-melting-point bonding member 3, and the high-melting-point bonding member 5, for example, a plate-shaped solder or solder paste can be used. When using a plate-shaped solder, the mounting of the plate-shaped solder (bonding member 2, low-melting-point bonding member 3, high-melting-point bonding member 5) and the mounting of the semiconductor element 4 can be performed after mounting a positioning jig, such as a carbon fiber jig, with an opening for positioning the semiconductor element 4 on the insulating substrate 1. When using an adhesive material such as solder paste, the bonding member 2, the low-melting-point bonding member 3, and the high-melting-point bonding member 5 can be applied using screen printing or dispensing.

[0027] <Process S2 (Jointing Process)> The joining member 2, the low-melting-point joining member 3, and the high-melting-point joining member 5 are melted by heating them to a temperature above their melting points. Heating can be performed, for example, in a reflux furnace, but is not limited to this.

[0028] Then, the circuit pattern 1c on the lower surface side of the insulating substrate 1 is cooled. The cooling method in the bonding process can be a method of blowing a fluid such as air or nitrogen at a lower temperature onto the circuit pattern 1c, or a contact cooling method in which a cooling plate at a lower temperature contacts the circuit pattern 1c. As a result, the bonding member 2, the low-melting-point bonding member 3, and the high-melting-point bonding member 5 solidify, thereby bonding the circuit pattern 1b with the semiconductor element 4, the circuit pattern 1b with the thick-walled portion 6a, and the semiconductor element 4 with the thin-walled portion 6b. In this embodiment 1, the melting point of the high-melting-point bonding member 5 is sufficiently higher than that of the low-melting-point bonding member 3. Therefore, although the high-melting-point bonding member 5 is farther away from the cooling portion than the low-melting-point bonding member 3, the high-melting-point bonding member 5 solidifies before the low-melting-point bonding member 3 solidifies.

[0029] <Process S3 (Wire Connection Process)> In order to connect the signal circuit used to control the semiconductor element 4 to the semiconductor element 4, a connection is made between a portion of the semiconductor element 4 and the external terminal 7a, and between a portion of the circuit pattern 1b and the external terminal 7b, respectively, by wires 8a and 8b.

[0030] <Process S4 (Sealing Process)> The structure obtained in step S3 is substantially sealed with sealing resin 9. Although not shown, sealing resin 9 can be formed by pressing molten resin in a mold and molding it, or by directly injecting molten resin into a pre-formed resin shell after placing it on the insulating substrate 1. The molten resin is cured by heat treatment in a curing oven or the like to become sealing resin 9, thereby completing the semiconductor device. Additionally, as needed, bending of terminals (not shown) or other shaping processes can be performed, or the sealing resin 9 can be processed. Furthermore, as needed, the completed semiconductor device can be inspected for electrical characteristics, etc.

[0031] <Summary of Implementation Method 1> In the semiconductor device configured as described above, typically, to ensure heat dissipation, the area of ​​the circuit pattern 1c on the lower surface of the insulating substrate 1 is made much larger than the area of ​​the circuit pattern 1b on the upper surface of the semiconductor element 4. Therefore, during the heating and cooling processes of the bonding process, the difference in thermal expansion between the circuit patterns 1b and 1c causes the insulating substrate 1 to warp and recover.

[0032] In the prior art, a heat sink (not shown) is bonded between the semiconductor element 4 and the circuit pattern 1b. This heat sink is heated when the solder melts during the bonding process, and the heat stored due to its large heat capacity exceeds its heat dissipation. Therefore, during subsequent cooling, the cooling of the high-melting-point bonding member 5 near the heat sink after heat storage is hindered, potentially causing the low-melting-point bonding member 3 to solidify before the high-melting-point bonding member 5. As a result, the general specification requirement that "the bonding performance and management of the connection between the semiconductor element 4 and the metal lead electrode 6 should be prioritized over that of the connection between the insulating substrate 1 and the metal lead electrode 6" cannot be met.

[0033] In this embodiment 1, the semiconductor element 4 is bonded to the circuit pattern 1b via the bonding member 2. That is, no heat sink is bonded between the semiconductor element 4 and the circuit pattern 1b. Furthermore, the melting point of the high-melting-point bonding member 5 between the semiconductor element 4 and the metal lead electrode 6 is higher than the melting point of the low-melting-point bonding member 3 between the circuit pattern 1b and the metal lead electrode 6.

[0034] Therefore, during the cooling process of the bonding process, the high-melting-point bonding member 5 can solidify before the low-melting-point bonding member 3, thus suppressing insufficient bonding area between the semiconductor element 4 and the metal lead electrode 6 caused by the warpage recovery behavior of the insulating substrate 1. As a result, the bonding performance and management of the bonding between the semiconductor element 4 and the metal lead electrode 6 can be prioritized compared to the bonding performance and management of the bonding between the insulating substrate 1 and the metal lead electrode 6.

[0035] <Implementation Method 2> Figure 3 This is a simplified cross-sectional view showing the structure of the semiconductor device according to Embodiment 2. The bonding member 2 according to Embodiment 1 includes solder material, while the bonding member 2 according to Embodiment 2 includes sintering material. The sintering material of the bonding member 2 is, for example, a sintering material formed by mixing tiny silver or copper particles with a thixotropic adhesive material into a paste. Other structural features of Embodiment 2 are the same as those of Embodiment 1.

[0036] With this structure, similar to Embodiment 1, the high-melting-point bonding member 5 can solidify before the low-melting-point bonding member 3, thus meeting general specifications. Furthermore, in Embodiment 2, the bonding member 2 comprises a sintered material with a generally lower thermal resistance than the solder material, thus providing a semiconductor device with a longer lifespan than in Embodiment 1.

[0037] <Implementation Method 3> Figure 4 This is a simplified cross-sectional view showing the structure of the semiconductor device according to Embodiment 3. In Embodiment 3, the melting point of the bonding member 2 is the same as the melting point of the high-melting-point bonding member 5. Furthermore, the fact that the melting point of the bonding member 2 is the same as the melting point of the high-melting-point bonding member 5 includes the case where the melting point of the bonding member 2 is exactly the same as the melting point of the high-melting-point bonding member 5, and the case where the melting point of the bonding member 2 is substantially the same as the melting point of the high-melting-point bonding member 5. To achieve this, for example, the material of the bonding member 2 can be made the same as the material of the high-melting-point bonding member 5. The other structures of Embodiment 3 are the same as those of Embodiment 1.

[0038] With this structure, similar to Embodiment 1, the high-melting-point bonding member 5 can solidify before the low-melting-point bonding member 3, thus meeting general specifications. Furthermore, in Embodiment 3, the melting point of the bonding member 2 is the same as that of the high-melting-point bonding member 5. Therefore, during the cooling process in the bonding process, the bonding member 2 and the high-melting-point bonding member 5 can solidify before the low-melting-point bonding member 3. As a result, not only can insufficient bonding area between the semiconductor element 4 and the metal lead electrode 6 caused by the warpage recovery behavior of the insulating substrate 1 be suppressed, but also insufficient bonding area between the semiconductor element 4 and the circuit pattern 1b caused by the warpage recovery behavior of the insulating substrate 1 can be suppressed.

[0039] Furthermore, the various embodiments and variations can be freely combined, and the various embodiments and variations can be modified or omitted as appropriate.

[0040] The above description is illustrative in all respects and is not restrictive. It can be understood that numerous variations not illustrated are to be expected. Label Explanation

[0041] 1 Insulating substrate, 1a Insulating layer, 1b Circuit pattern, 2 Bonding component, 3 Low melting point bonding component, 4 Semiconductor element, 5 High melting point bonding component, 6 Metal lead electrode, 6a Thick wall portion, 6b Thin wall portion.

Claims

1. A semiconductor device, characterized in that, include: An insulating substrate having a circuit pattern on an insulating layer; A semiconductor element, which is bonded to the circuit pattern by a first bonding member; as well as A metal lead electrode comprising a first portion bonded to the circuit pattern by a second bonding member and a second portion bonded to the semiconductor element by a third bonding member. The melting point of the third joining member is higher than that of the second joining member.

2. The semiconductor device as claimed in claim 1, characterized in that, The first bonding member comprises solder material or sintered material.

3. The semiconductor device as claimed in claim 1 or 2, characterized in that, The melting point of the first joining member is the same as that of the third joining member.

4. A method for manufacturing a semiconductor device as described in any one of claims 1 to 3, characterized in that, include: The process of mounting the semiconductor element on the circuit pattern via the first bonding member, mounting the first portion of the metal lead electrode on the circuit pattern via the second bonding member, and mounting the second portion of the metal lead electrode on the semiconductor element via the third bonding member; The process of melting the first joining member, the second joining member, and the third joining member; as well as The process of cooling the lower surface of the insulating substrate so that the third bonding member solidifies before the second bonding member solidifies.

Citation Information

Patent Citations

  • Method for manufacturing power semiconductor module

    JP2001110957A