A metering data acquisition system of an electric energy meter and the electric energy meter

Abstract

This invention discloses a metering data acquisition system and an electricity meter, belonging to the field of electricity meters, to improve the accuracy of electricity metering results and solve the problem of poor accuracy in electricity metering results. A first sampling channel and a second sampling channel synchronously acquire voltage and current signals from the same power supply line under test. The second sampling channel suppresses high-frequency interference and transient disturbances through an anti-interference processing circuit. When electromagnetic interference reaches a preset trigger condition, an electromagnetic interference triggering device generates a hardware interference trigger signal, and the sampling switching circuit accordingly cuts off the analog sampling signal transmission of the first sampling channel. The processor then uses the sampling data from the second sampling channel for electricity metering. Therefore, the metering data source can be switched according to the electromagnetic interference state, reducing the participation of interfered data in electricity metering, and the anti-interference capability of the second sampling channel reduces the impact of interference on the metering data, thereby improving the accuracy of electricity metering results.

Description

Technical Field

[0001] This invention relates to the field of electricity meters, and in particular to an electricity meter data acquisition system and an electricity meter. Background Technology

[0002] During operation, electricity meters need to continuously collect voltage and current signals from the power supply line being tested to obtain data for electricity metering. However, there is a lack of mature electricity meter data acquisition systems in related technologies, and the accuracy of electricity metering results from current electricity meter data acquisition systems is poor.

[0003] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a metering data acquisition system for an electricity meter and an electricity meter itself. A first sampling channel and a second sampling channel synchronously acquire voltage and current signals from the same power supply line under test. The second sampling channel suppresses high-frequency interference and transient disturbances through an anti-interference processing circuit. When electromagnetic interference reaches a preset trigger condition, an electromagnetic interference triggering device generates a hardware interference trigger signal. The sampling switching circuit then cuts off the analog sampling signal transmission of the first sampling channel, and the processor switches to using the sampling data from the second sampling channel for electricity metering. Therefore, the metering data source can be switched according to the electromagnetic interference status, reducing the participation of interfered data in electricity metering, and the anti-interference capability of the second sampling channel reduces the impact of interference on the metering data, thereby improving the accuracy of the electricity metering results.

[0005] To solve the above-mentioned technical problems, the present invention provides a metering data acquisition system for an electricity meter, including a first sampling channel, a second sampling channel, an electromagnetic interference triggering device, a sampling switching circuit, and a processor; The first sampling channel and the second sampling channel are used to synchronously acquire voltage and current signals of the same power supply line under test, and generate sampling data based on the analog sampling signals; the analog sampling signals include voltage and current signals; the second sampling channel includes an anti-interference processing circuit for suppressing high-frequency interference and transient disturbances; The electromagnetic interference triggering device is used to sense electromagnetic interference in the external environment and generate a hardware interference triggering signal when the electromagnetic interference reaches a preset triggering condition. The sampling switching circuit is located in the analog sampling signal transmission path of the first sampling channel and is used to cut off the transmission of the analog sampling signal according to the hardware interference trigger signal. The processor is connected to the first sampling channel and the second sampling channel respectively, and is used to perform power metering using the sampling data of the first sampling channel, and to switch to using the sampling data of the second sampling channel for power metering after the sampling switching circuit cuts off the transmission of the analog sampling signal.

[0006] On the other hand, the electromagnetic interference triggering device includes an electromagnetic interference sensing unit and a hardware triggering unit, with the output terminal of the electromagnetic interference sensing unit connected to the input terminal of the hardware triggering unit. The electromagnetic interference sensing unit includes multiple induction coil groups arranged along different spatial directions. Each of the induction coil groups includes two induction sub-coils that are spaced apart and connected in series with opposite polarities to form a differential induction signal. The hardware triggering unit is used to determine whether the electromagnetic interference has reached the preset triggering condition based on each of the differential sensing signals, and to generate the hardware interference triggering signal when the electromagnetic interference reaches the preset triggering condition.

[0007] On the other hand, the electromagnetic interference sensing unit also includes multiple frequency selection conditioning circuits that correspond one-to-one with the multiple sets of induction coils; The input terminal of any of the frequency selective conditioning circuits is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the hardware trigger unit, for weakening the signal component caused by the power frequency background magnetic field in the corresponding differential induction signal; the frequency selective conditioning circuit is a high-pass conditioning circuit or a band-pass conditioning circuit.

[0008] On the other hand, the hardware triggering unit includes a peak detection branch, a rectification branch, a transient energy storage capacitor, and a threshold comparison circuit; The peak detection branch includes multiple peak detection sub-branches corresponding one-to-one with the multiple induction coil groups. The input terminal of any peak detection sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the threshold comparison circuit, which is used to generate a peak detection signal based on the corresponding differential sensing signal. The rectifier branch includes multiple rectifier sub-branches corresponding one-to-one with the multiple induction coil groups. The input terminal of any rectifier sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the transient energy storage capacitor for rectifying the corresponding differential induction signal. The transient energy storage capacitor is connected to the output terminals of the multiple rectifier sub-branches and the threshold comparison circuit, respectively, and is used to form an accumulated response signal based on the rectified signals output by the multiple rectifier sub-branches. The threshold comparison circuit is connected to the output terminals of the plurality of peak detection sub-branches and the transient energy storage capacitor, respectively, and is used to generate the hardware interference trigger signal based on at least one of the peak detection signal and the cumulative response signal.

[0009] On the other hand, the hardware triggering unit also includes a discharge branch; The discharge branch is connected to the transient energy storage capacitor and is used to discharge the transient energy storage capacitor so that the accumulated response signal attenuates after the electromagnetic interference subsides. The threshold comparison circuit includes a peak comparator, a cumulative path threshold comparator, and OR logic circuitry. The input terminal of the peak comparator is connected to the output terminal of the multiple peak detection sub-branches respectively, and the output terminal is connected to the OR logic circuit. It is used to compare each peak detection signal with the corresponding peak trigger threshold, and output a peak trigger signal when at least one peak detection signal reaches the corresponding peak trigger threshold. The input of the cumulative path threshold comparator is connected to the transient energy storage capacitor, and the output is connected to the OR logic circuit. The cumulative path threshold comparator is a hysteresis comparator with a trigger threshold and a recovery threshold. The trigger threshold is higher than the recovery threshold. It is used to enter the trigger state and output the cumulative trigger signal when the cumulative response signal reaches the trigger threshold, and to exit the trigger state when the cumulative response signal drops below the recovery threshold. The input terminals of the OR logic circuit are respectively connected to the output terminals of the peak comparator and the cumulative path threshold comparator, and are used to output the hardware interference trigger signal when at least one of the peak trigger signal and the cumulative trigger signal is received, and to stop outputting the hardware interference trigger signal when neither the peak trigger signal nor the cumulative trigger signal is received. The sampling switching circuit is also used to restore the transmission of the analog sampling signal of the first sampling channel when the OR logic circuit stops outputting the hardware interference trigger signal.

[0010] On the other hand, the second sampling channel includes a voltage sampling branch and a current sampling branch; The anti-interference processing circuit includes a first anti-interference processing sub-circuit disposed in the voltage sampling branch and a second anti-interference processing sub-circuit disposed in the current sampling branch. Both the first anti-interference processing sub-circuit and the second anti-interference processing sub-circuit include a transient limiting circuit, a common-mode rejection circuit and an anti-aliasing filter circuit. The transient limiting circuit is used to limit the analog sampling signal in the corresponding voltage sampling branch or current sampling branch. The common-mode rejection circuit is used to suppress common-mode interference of the analog sampling signal in the voltage sampling branch or the current sampling branch corresponding to the input. The anti-aliasing filter circuit is used to filter the high-frequency components of the analog sampling signal in the corresponding voltage sampling branch or current sampling branch.

[0011] On the other hand, it also includes hardware latches and synchronization timing units; The set input terminal of the hardware latch is connected to the electromagnetic interference triggering device, and the status output terminal is connected to the processor, which is used to set the latch according to the hardware interference triggering signal and output the interference status flag. The synchronization timing unit is connected to the electromagnetic interference triggering device, the first sampling channel, the second sampling channel and the processor respectively, and is used to provide a unified sampling timing to the first sampling channel and the second sampling channel, record the triggering time corresponding to the hardware interference triggering signal, determine the interference association time window corresponding to the triggering time, and provide the interference association time window to the processor. The processor is further configured to, when the interference status flag indicates that the hardware latch is set, determine the sampling data of the first sampling channel within the interference association time window as interference association data, and exclude the interference association data from the sampling data used for power metering.

[0012] On the other hand, the processor is also used for: After the sampling switching circuit restores the analog sampling signal transmission of the first sampling channel, it continuously determines multiple sets of voltage sampling data differences, current sampling data differences, and power data differences between the first sampling channel and the second sampling channel. When multiple consecutive sets of voltage sampling data differences, current sampling data differences, and power data differences are all within the corresponding preset allowable difference range, and the electromagnetic interference triggering device does not generate the hardware interference triggering signal again, it is determined that the first sampling channel has returned to stability. After the first sampling channel stabilizes, the sampling data from the first sampling channel is used again for power metering.

[0013] On the other hand, the first sampling channel includes a voltage sampling branch and a current sampling branch, both of which include analog-to-digital conversion circuits; The sampling switching circuit includes a first switching sub-circuit disposed in the voltage sampling branch and a second switching sub-circuit disposed in the current sampling branch. Both the first switching sub-circuit and the second switching sub-circuit include a first analog switch, a second analog switch, and a sample-and-hold circuit. For either the first switching sub-circuit or the second switching sub-circuit, the first analog switch is set in the analog sampling signal transmission path of the corresponding sampling branch, and its output terminal is connected to the input terminal of the corresponding analog-to-digital conversion circuit. It is used to disconnect when the electromagnetic interference triggering device outputs the hardware interference triggering signal, and to turn on when the electromagnetic interference triggering device stops outputting the hardware interference triggering signal. The output of the sample-and-hold circuit is connected to the input of the second analog switch, and is used to output a sample-and-hold signal when the first analog switch is open, so that the input of the corresponding analog-to-digital converter circuit maintains a predetermined level. The output terminal of the second analog switch is connected to the input terminal of the corresponding analog-to-digital converter circuit, and is used to turn on when the electromagnetic interference triggering device outputs the hardware interference trigger signal, so as to transmit the sample-and-hold signal to the corresponding analog-to-digital converter circuit, and to turn off when the electromagnetic interference triggering device stops outputting the hardware interference trigger signal.

[0014] To address the aforementioned technical problems, the present invention also provides an electricity meter, including an electricity meter body and a metering data acquisition system as described above, which is connected to the electricity meter body.

[0015] Beneficial Effects: This invention provides a metering data acquisition system for an electricity meter. Considering that electromagnetic interference may affect the sampling data used for electricity metering through the simulated sampling path, and that simultaneously obtaining another set of anti-interference sampling data for the same power supply line under test can provide an alternative data source when the original sampling data is interfered with, in this invention, the first sampling channel and the second sampling channel simultaneously acquire the voltage and current signals of the same power supply line under test. The second sampling channel is equipped with an anti-interference processing circuit to suppress high-frequency interference and transient disturbances. The electromagnetic interference triggering device generates a hardware interference trigger signal when the electromagnetic interference reaches a preset trigger condition. The sampling switching circuit cuts off the first sampling channel according to the hardware interference trigger signal. The processor correspondingly switches from using the sampling data from the first sampling channel to the sampling data from the second sampling channel for energy metering, allowing the data source for energy metering to switch according to electromagnetic interference conditions. Because the second sampling channel has anti-interference capabilities, it can reduce the impact of high-frequency interference and transient disturbances on the backup sampling data. Furthermore, when the trigger condition is met, the transmission of the analog sampling signal from the first sampling channel is cut off, reducing the amount of data from the first sampling channel affected by interference from continuing to participate in energy metering. In other words, this metering data acquisition system reduces the impact of electromagnetic interference on energy metering results and improves the accuracy of energy metering results.

[0016] The present invention also provides an electricity meter that has the same beneficial effects as the electricity meter's data acquisition system described above. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the relevant technologies and the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a first structural schematic diagram of the metering data acquisition system for an electricity meter provided by the present invention; Figure 2 A schematic diagram of the hardware triggering unit provided by the present invention; Figure 3 This is a schematic diagram of the hardware triggering unit and sampling switching circuit provided by the present invention; Figure 4 This is a schematic diagram of the structure of the second sampling channel provided by the present invention; Figure 5 This is a schematic diagram of the second structure of the metering data acquisition system for the electricity meter provided by the present invention; Figure 6 This is a schematic diagram of the structure of the first sampling channel provided by the present invention. Detailed Implementation

[0019] The core of this invention is to provide a metering data acquisition system for an electricity meter and an electricity meter. A first sampling channel and a second sampling channel synchronously acquire voltage and current signals from the same power supply line under test. The second sampling channel suppresses high-frequency interference and transient disturbances through an anti-interference processing circuit. When electromagnetic interference reaches a preset trigger condition, an electromagnetic interference triggering device generates a hardware interference trigger signal. The sampling switching circuit then cuts off the analog sampling signal transmission of the first sampling channel, and the processor switches to using the sampling data from the second sampling channel for electricity metering. Therefore, the metering data source can be switched according to the electromagnetic interference status, reducing the participation of interfered data in electricity metering, and the anti-interference capability of the second sampling channel reduces the impact of interference on the metering data, thereby improving the accuracy of the electricity metering results.

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Please refer to Figure 1 , Figure 1This is a first structural schematic diagram of the metering data acquisition system for an electricity meter provided by the present invention. The metering data acquisition system for the electricity meter includes a first sampling channel 1, a second sampling channel 2, an electromagnetic interference triggering device 3, a sampling switching circuit 4, and a processor 5. The first sampling channel 1 and the second sampling channel 2 are used to synchronously acquire voltage and current signals of the same power supply line under test, and generate sampling data based on the analog sampling signals; the analog sampling signals include voltage and current signals; the second sampling channel 2 includes an anti-interference processing circuit for suppressing high-frequency interference and transient disturbances; Electromagnetic interference triggering device 3 is used to sense electromagnetic interference in the external environment and generate a hardware interference triggering signal when the electromagnetic interference reaches the preset triggering conditions. The sampling switching circuit 4 is set in the analog sampling signal transmission path of the first sampling channel 1, and is used to cut off the transmission of the analog sampling signal according to the hardware interference trigger signal; The processor 5 is connected to the first sampling channel 1 and the second sampling channel 2 respectively. It is used to perform power metering using the sampling data of the first sampling channel 1, and after the sampling switching circuit 4 cuts off the transmission of the analog sampling signal, it switches to using the sampling data of the second sampling channel 2 for power metering.

[0022] Specifically, considering that electromagnetic interference may cause anomalies in the sampling data upon which normal metering relies via the analog sampling path, and that obtaining another set of sampling data with stronger anti-interference capabilities simultaneously on the same power supply line under test can provide an alternative data source when the first sampling channel 1 is disturbed, this embodiment of the invention keeps the first sampling channel 1 and the second sampling channel 2 sampling synchronously. An electromagnetic interference triggering device 3 generates a hardware interference trigger signal when electromagnetic interference reaches a preset trigger condition. The sampling switching circuit 4 directly cuts off the analog sampling signal transmission of the first sampling channel 1, and the processor 5 switches the actual power metering data source to the second sampling channel 2. This reduces the likelihood of data from the disturbed first sampling channel 1 continuing to enter the power metering system, while utilizing the second sampling channel 2's ability to suppress high-frequency interference and transient disturbances to maintain the metering data source, thereby reducing the impact of strong electromagnetic interference on the accuracy of power metering results.

[0023] The raw voltage and current sampling signals of the power supply line under test can be obtained by a common signal acquisition front end, and then sent to the first sampling channel 1 and the second sampling channel 2 respectively. Using a common signal acquisition front end eliminates the need to repeatedly install two sets of current sensing elements in the main current-carrying circuit. The common signal acquisition front end is responsible for obtaining suitable raw sampling signals from the power supply line under test for subsequent processing. The first sampling channel 1 and the second sampling channel 2 then perform their respective isolation, voltage division, impedance matching, buffering, filtering, and analog-to-digital conversion processes. Using a common front end does not affect the independence of the first sampling channel 1 and the second sampling channel 2 in the subsequent analog conditioning and digital output paths.

[0024] Specifically, after the system powers on and enters normal operating mode, the synchronization timing unit provides a unified sampling timing sequence to the first sampling channel 1 and the second sampling channel 2. The processor 5 receives the sampling data generated by the first sampling channel 1 and the second sampling channel 2, and prioritizes the voltage and current sampling data from the first sampling channel 1 for instantaneous power calculation and energy accumulation. The second sampling channel 2 does not stop working during this stage, but continues to synchronously sample the same power supply line under test, so that the system can obtain backup sampling data without waiting for the second sampling channel 2 to restart or establish a stable state when interference occurs later.

[0025] Specifically, the electromagnetic interference triggering device 3 continuously senses electromagnetic interference around the energy meter. When the electromagnetic interference does not reach the preset triggering condition, the electromagnetic interference triggering device 3 does not generate a valid hardware interference triggering signal, the sampling switching circuit 4 keeps the analog sampling signal transmission path of the first sampling channel 1 open, and the processor 5 continuously uses the sampling data of the first sampling channel 1 for energy metering. After the electromagnetic interference reaches the preset triggering condition, the electromagnetic interference triggering device 3 generates a hardware interference triggering signal, the sampling switching circuit 4 directly responds to the hardware interference triggering signal and cuts off the transmission of the real-time analog sampling signal in the first sampling channel 1 to the subsequent analog-to-digital conversion circuit.

[0026] Specifically, after the real-time analog sampling signal of the first sampling channel 1 is isolated, the processor 5 switches to using the sampling data from the second sampling channel 2 for power metering. The second sampling channel 2 has an anti-interference processing circuit, so even during periods of strong high-frequency interference or transient disturbances, it can still reduce the impact of abnormal components on the sampling results through limiting, common-mode rejection, and filtering. The processor 5 selects between the first sampling channel 1 and the second sampling channel 2 at the digital data source, without needing to switch the analog signal of the second sampling channel 2 to the analog-to-digital converter input of the first sampling channel 1. The second sampling channel 2 always maintains its own analog sampling path and digital data output path.

[0027] Specifically, the second sampling channel 2 is not activated only after electromagnetic interference occurs. Under normal conditions, the second sampling channel 2 continuously samples synchronously with the first sampling channel 1, but it is not used as the primary source of metering data under normal circumstances. This functional division allows the first sampling channel 1 to remain as the primary metering path under normal conditions, while keeping the second sampling channel 2 in a readily available standby state. To improve its immunity, the second sampling channel 2 employs stronger transient suppression and high-frequency attenuation processing, primarily targeting sampling reliability during periods of strong electromagnetic interference. Under normal conditions, the first sampling channel 1 continues to handle primary metering, allowing the first and second sampling channels 1 and 2 to respectively fulfill normal metering and interference-resistant standby tasks. The continuous sampling by the second sampling channel 2 can also be used for channel verification between the first and second sampling channels 1 and for consistency comparison after interference subsides. Therefore, it is not necessary to continuously select the second sampling channel 2 as the source of actual energy metering data under normal conditions.

[0028] The first sampling channel 1 and the second sampling channel 2 can be calibrated for amplitude and phase before being put into operation. Calibration establishes corresponding correction parameters for the differences in gain, phase, and signal transmission delay between the first sampling channel 1 and the second sampling channel 2, ensuring the comparability of voltage and current sampling data at the same time. The processor 5 can save the correction parameters during normal operation and recall them when the second sampling channel 2 is used for backup metering or when the first sampling channel 1 and the second sampling channel 2 perform a consistency comparison. The specific calibration method and parameters can be determined according to the metering accuracy requirements of the energy meter.

[0029] This invention provides a metering data acquisition system for an electricity meter. Considering that electromagnetic interference may affect the sampling data used for electricity metering through the simulated sampling path, and that simultaneously acquiring another set of anti-interference sampling data for the same power supply line under test can provide an alternative data source when the original sampling data is interfered with, this invention uses a first sampling channel and a second sampling channel to simultaneously acquire voltage and current signals of the same power supply line under test. The second sampling channel is equipped with an anti-interference processing circuit to suppress high-frequency interference and transient disturbances. An electromagnetic interference triggering device generates a hardware interference trigger signal when electromagnetic interference reaches a preset trigger condition. The sampling switching circuit cuts off the first sampling channel based on the hardware interference trigger signal. The processor correspondingly switches from using the sampling data from the first sampling channel to the sampling data from the second sampling channel for energy metering, allowing the data source for energy metering to switch according to electromagnetic interference conditions. Because the second sampling channel has anti-interference capabilities, it can reduce the impact of high-frequency interference and transient disturbances on the backup sampling data. Furthermore, when the trigger condition is met, the analog sampling signal transmission of the first sampling channel is cut off, reducing the amount of data from the first sampling channel affected by interference from continuing to participate in energy metering. In other words, this metering data acquisition system reduces the impact of electromagnetic interference on energy metering results and improves the accuracy of energy metering results.

[0030] Based on the above embodiments: As an optional embodiment, the electromagnetic interference triggering device 3 includes an electromagnetic interference sensing unit and a hardware triggering unit, with the output terminal of the electromagnetic interference sensing unit connected to the input terminal of the hardware triggering unit. The electromagnetic interference sensing unit includes multiple groups of induction coils arranged along different spatial directions. Each group of induction coils includes two induction sub-coils that are spaced apart and connected in series with opposite polarities to form a differential induction signal. The hardware triggering unit is used to determine whether the electromagnetic interference has reached the preset triggering condition based on each differential sensing signal, and to generate a hardware interference triggering signal when the electromagnetic interference reaches the preset triggering condition.

[0031] Specifically, considering that external electromagnetic interference may couple into the energy meter from different spatial directions, and that the normal load current of the power supply line under test will also generate a power frequency background magnetic field near the energy meter, if only a single-directional induction structure is used, there may be insufficient interference sensing in certain directions, or the common magnetic field component generated by the normal load may be treated as external interference. Therefore, in this embodiment of the invention, multiple induction coil groups are arranged along different spatial directions, and two induction sub-coils in each induction coil group are spaced apart and connected in series with opposite polarities. The induction components of the common background magnetic field formed by the two induction sub-coils can weaken each other, while the differential components formed by external interference at different spatial locations can be retained as differential induction signals. The hardware triggering unit uses these signals to determine whether the preset triggering conditions have been met, thereby improving the ability to sense external electromagnetic interference from different directions and reducing the possibility of false triggering caused by the normal load background magnetic field.

[0032] The electromagnetic interference sensing unit comprises multiple induction coil groups arranged along different spatial directions. Each induction coil group includes two spaced-apart sub-coils with essentially matched parameters, connected in series with opposite polarities. The two sub-coils maintain essentially consistent coupling conditions relative to the main current-carrying conductor in the power supply line under test, causing the power frequency background magnetic field generated by the normal load current to form a common component with similar amplitude in the two sub-coils. Because the two sub-coils are connected in series with opposite polarities, the common components weaken each other at the output.

[0033] Specifically, when strong external electromagnetic interference couples from outside the energy meter, the two induction coils are located at different spatial positions. The field strength, direction, or rate of change of the external interference field at these two positions may differ. Since the series connection of opposite polarities will not simultaneously cancel out these spatial differences, the induction coil group can form a differential induction signal. By employing multiple induction coil groups arranged along different spatial directions, external electromagnetic interference can be sensed from different directions, reducing the possibility of insufficient sensing due to changes in the direction of electromagnetic interference in a single-direction induction structure.

[0034] In one specific embodiment, the electromagnetic interference sensing unit is equipped with three sets of induction coils, each corresponding to one of three different directions in three-dimensional space, such as the X, Y, and Z directions. The differential induction signals from the three sets of induction coils are input to a hardware trigger unit. The three directions are merely used to illustrate one specific form of multi-directional arrangement; the actual number and direction can be set based on the internal space of the energy meter and the possible coupling directions of external electromagnetic interference, as long as the multiple sets of induction coils can obtain differential induction signals from different spatial directions.

[0035] Specifically, the induction coil array is used to sense spatial electromagnetic interference, not to measure the load current involved in energy metering in the power supply line under test. The two signal paths are distinct: the first sampling channel 1 and the second sampling channel 2 are responsible for acquiring the voltage and current signals of the power supply line under test, while the induction coil array is responsible for sensing external spatial electromagnetic interference. This avoids mistaking the induced signal used for interference detection as the metering current sampling signal.

[0036] In one alternative embodiment, any induction sub-coil can have 10 to 200 turns, an effective induction area of ​​20 to 1000 square millimeters, and can be positioned relatively far from the main current-carrying conductor and power supply magnetic devices. The aforementioned number of turns, area, and installation location are optional examples and are not intended to limit the induction coil group to fixed parameters. Specific parameters can be determined based on the internal space of the energy meter, electromagnetic interference intensity, and induction sensitivity requirements.

[0037] As an optional embodiment, the electromagnetic interference sensing unit also includes multiple frequency selection conditioning circuits corresponding one-to-one with multiple groups of induction coils; The input of any frequency selection conditioning circuit is connected to the output of the corresponding induction coil group, and the output is connected to a hardware trigger unit to reduce the signal component caused by the power frequency background magnetic field in the corresponding differential induction signal; the frequency selection conditioning circuit is a high-pass conditioning circuit or a band-pass conditioning circuit.

[0038] Specifically, considering that although inductor coils connected in series with opposite polarities can weaken the common background magnetic field component, low-frequency signal components caused by the power frequency background magnetic field may still remain in the differential induction signal due to differences in coil parameters, installation position, and actual coupling conditions, this embodiment of the invention sets up frequency selection conditioning circuits between each inductor coil group and the hardware triggering unit, and makes the frequency selection conditioning circuits adopt high-pass conditioning circuits or band-pass conditioning circuits. After the frequency selection conditioning circuit further weakens the residual response near the power frequency, the differential induction signal in the corresponding direction is sent to the hardware triggering unit, thereby reducing the interference of normal load current changes on subsequent hardware triggering judgment, and making the signal received by the hardware triggering unit more reflective of external electromagnetic interference.

[0039] Specifically, the frequency selection conditioning circuit can employ either a high-pass conditioning circuit or a band-pass conditioning circuit. When using a high-pass conditioning circuit, low-frequency components close to the power frequency can be attenuated, making it easier for higher-frequency variations to be triggered by subsequent hardware. When using a band-pass conditioning circuit, the frequency range relevant to the target electromagnetic interference can be preserved as needed, while signal components outside the target frequency range are attenuated. The specific cutoff frequency or passband range can be determined based on the application environment of the electricity meter; this embodiment of the invention is not limited to fixed frequency parameters.

[0040] Taking a power supply line with a frequency of 50 Hz or 60 Hz as an example, the two induction coils are first connected in series with opposite polarities to weaken the common background magnetic field component generated by the normal load current. The frequency selection and conditioning circuit then further weakens the remaining low-frequency response close to 50 Hz or 60 Hz. The differential structure combined with the frequency selection and conditioning reduces the impact of changes in normal load current on the hardware trigger judgment, making the signal sent to the hardware trigger unit more reflective of rapid changes or continuous disturbances in external electromagnetic interference.

[0041] Each frequency selection conditioning circuit corresponds one-to-one with its respective induction coil group, ensuring that the differential induction signals from different spatial directions are conditioned separately before entering the hardware trigger unit. This preserves the induction results from different directions while applying the same or separately set frequency selection processing to each signal. If the environmental coupling conditions differ in different directions, the specific parameters of each frequency selection conditioning circuit can be determined separately, but each output still serves as the differential induction signal for the corresponding direction in subsequent peak detection and rectification energy storage detection.

[0042] Specifically, for a better explanation of the embodiments of the present invention, please refer to... Figure 2 , Figure 2 The schematic diagram of the hardware triggering unit provided by the present invention, as an optional embodiment, includes a peak detection branch, a rectification branch, a transient energy storage capacitor and a threshold comparison circuit; The peak detection branch includes multiple peak detection sub-branches that correspond one-to-one with multiple induction coil groups. The input terminal of any peak detection sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to a threshold comparison circuit to generate a peak detection signal based on the corresponding differential induction signal. The rectifier branch includes multiple rectifier sub-branches that correspond one-to-one with multiple induction coil groups. The input terminal of any rectifier sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to a transient energy storage capacitor for rectifying the corresponding differential induction signal. The transient energy storage capacitor is connected to the output terminals of multiple rectifier sub-branches and the threshold comparison circuit, respectively, and is used to form an accumulated response signal based on the rectified signals output by the multiple rectifier sub-branches. The threshold comparison circuit is connected to the output of multiple peak detection sub-branch and the transient energy storage capacitor, respectively, and is used to generate a hardware interference trigger signal based on at least one of the peak detection signal and the cumulative response signal.

[0043] Specifically, considering that strong electromagnetic interference can manifest as transient interference with short duration, high amplitude, and rapid changes, or as interference with insufficient amplitude to trigger a single event but which occurs continuously or repeatedly, a single threshold detection path cannot simultaneously cover both types of interference. Therefore, this embodiment of the invention sets up a peak detection branch and a rectifier energy storage detection path in parallel. The peak detection branch generates a peak detection signal for the differential induction signal in each direction to respond to short-term high-amplitude interference; multiple rectifier sub-branches generate cumulative response signals for the transient energy storage capacitor to reflect continuous or repetitive interference; the threshold comparison circuit generates a hardware interference trigger signal when any peak detection signal or cumulative response signal meets the corresponding condition. This expands the coverage of the hardware trigger unit for electromagnetic interference with different time characteristics and improves the reliability of protection triggering.

[0044] The peak detection branch includes multiple peak detection sub-branches corresponding one-to-one with multiple induction coil groups. The input of any peak detection sub-branch is connected to the output of the corresponding induction coil group, and the output is connected to a threshold comparison circuit. The peak detection sub-branch generates a peak detection signal based on the corresponding differential induction signal. The peak detection sub-branch may include circuits for coupling input, peak detection, and peak hold, used to extract signals from the differential induction signal that characterize transient amplitude changes. The peak detection signal then enters the threshold comparison circuit for threshold comparison.

[0045] Specifically, the rectifier branch includes multiple rectifier sub-branches corresponding one-to-one with multiple induction coil groups. The input terminal of any rectifier sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the same transient energy storage capacitor. Each rectifier sub-branch rectifies the corresponding differential induction signal, and the resulting charge or voltage response is collected in the transient energy storage capacitor, enabling continuous or repetitive interference from multiple directions to form a cumulative response signal in the same accumulation path.

[0046] Specifically, the transient energy storage capacitor is connected to the output terminals of multiple rectifier sub-branches and the threshold comparison circuit. A single instance of low-amplitude electromagnetic interference may not be sufficient to trigger the peak detection signal, but continuous or recurring interference can continuously provide rectified responses to the transient energy storage capacitor through multiple rectifier sub-branches, gradually increasing the cumulative response signal. Therefore, the peak detection path can cover short-term high-amplitude interference, while the rectifier energy storage path can cover continuous or recurring interference; the two paths complement each other.

[0047] Specifically, the threshold comparison circuit receives multiple peak detection signals and an accumulated response signal formed by a transient energy storage capacitor. When at least one peak detection signal meets the corresponding peak trigger condition, or the accumulated response signal meets the accumulated trigger condition, the threshold comparison circuit generates a hardware interference trigger signal. Since the peak detection result and the accumulated response result are ORed, the hardware interference trigger signal is effective as long as either type of detection result indicates that electromagnetic interference has reached the protection condition, thus eliminating the need to wait for another type of detection path to simultaneously meet the trigger condition.

[0048] The hardware interference trigger signal, once generated, can be sent in parallel to the sampling switching circuit 4, the hardware latch, and the synchronization timing unit. The sampling switching circuit 4 uses this signal to isolate the real-time analog sampling signal of the first sampling channel 1, the hardware latch uses this signal to save the interference state, and the synchronization timing unit uses this signal to record the trigger time. These three actions correspond to the same hardware trigger event, which helps to maintain consistency between analog sampling path protection, state saving, and time recording.

[0049] Specifically, for a better explanation of the embodiments of the present invention, please refer to... Figure 3 , Figure 3 The schematic diagram of the hardware triggering unit and sampling switching circuit 4 provided by the present invention shows that, as an optional embodiment, the hardware triggering unit further includes a discharge branch. The discharge branch is connected to the transient energy storage capacitor to discharge the transient energy storage capacitor so that the accumulated response signal attenuates after the electromagnetic interference subsides. The threshold comparison circuit includes a peak comparator, a cumulative path threshold comparator, and OR logic circuitry; The input of the peak comparator is connected to the output of multiple peak detection sub-branches, and the output is connected to an OR logic circuit. It is used to compare each peak detection signal with the corresponding peak trigger threshold, and output a peak trigger signal when at least one peak detection signal reaches the corresponding peak trigger threshold. The input of the cumulative path threshold comparator is connected to the transient energy storage capacitor, and the output is connected to an OR logic circuit. The cumulative path threshold comparator is a hysteresis comparator with a trigger threshold and a recovery threshold. The trigger threshold is higher than the recovery threshold. It is used to enter the trigger state and output the cumulative trigger signal when the cumulative response signal reaches the trigger threshold, and to exit the trigger state when the cumulative response signal drops below the recovery threshold. The input terminals of the logic circuit are respectively connected to the output terminals of the peak comparator and the cumulative path threshold comparator, and are used to output a hardware interference trigger signal when at least one of the peak trigger signal and the cumulative trigger signal is received, and to stop outputting the hardware interference trigger signal when neither the peak trigger signal nor the cumulative trigger signal is received. The sampling switching circuit 4 is also used to restore the transmission of the analog sampling signal of the first sampling channel 1 when the logic circuit stops outputting the hardware interference trigger signal.

[0050] Specifically, considering that the cumulative response formed by the transient energy storage capacitor during continuous or repeated interference needs to gradually decrease after the interference subsides, and that if the triggering and recovery use the same threshold when the cumulative response is near a critical threshold, it is easy to cause repeated entry and exit of the protection state. Therefore, this embodiment of the invention sets up a discharge branch connected to the transient energy storage capacitor and uses a cumulative path threshold comparator with a trigger threshold higher than the recovery threshold. At the same time, the peak trigger signal and the cumulative trigger signal are combined through an OR logic circuit. The discharge branch provides an attenuation path for the cumulative response. The hysteresis comparison causes the cumulative response to enter the trigger state after reaching a higher trigger threshold and exit the trigger state after decreasing to below a lower recovery threshold, thereby reducing the possibility of repeated switching caused by critical electromagnetic interference and providing stable hardware conditions for the recovery of the analog sampling signal of the first sampling channel 1.

[0051] Specifically, the threshold comparison circuit includes a peak comparator, a cumulative path threshold comparator, and an OR logic circuit. The input of the peak comparator is connected to the output of multiple peak detection sub-branches, and its output is connected to the OR logic circuit. The peak comparator compares each peak detection signal with its corresponding peak trigger threshold, and outputs a peak trigger signal when at least one peak detection signal reaches its corresponding peak trigger threshold. The peak comparator can be a comparator with a response speed capable of covering the duration of the target transient electromagnetic interference, in order to respond promptly to short-duration interference with high amplitude.

[0052] The input of the cumulative path threshold comparator is connected to the transient energy storage capacitor, and the output is connected to an OR logic circuit. The cumulative path threshold comparator employs a hysteresis comparator with a trigger threshold and a recovery threshold, where the trigger threshold is higher than the recovery threshold. After the accumulated response signal rises and reaches the trigger threshold, the cumulative path threshold comparator enters the trigger state and outputs an accumulated trigger signal. After the interference subsides, the transient energy storage capacitor releases charge through the discharge branch, and the accumulated response signal gradually decreases. Only after it falls below the recovery threshold does the cumulative path threshold comparator exit the trigger state.

[0053] Specifically, a hysteresis interval is formed between the trigger threshold and the recovery threshold. When the accumulated response signal fluctuates slightly around the trigger threshold, the accumulated path threshold comparator will not frequently switch between the triggered and non-triggered states; after entering the triggered state, the accumulated response signal needs to drop below a lower recovery threshold before exiting the triggered state. This can reduce repeated protection and recovery caused by critical intensity electromagnetic interference or residual interference. The trigger threshold, recovery threshold, and the charging and discharging time parameters formed by the transient energy storage capacitor and the discharge branch can be set according to the application environment of the energy meter; the embodiments of this invention do not limit the specific values.

[0054] Specifically, the inputs of the OR logic circuit are connected to the outputs of the peak comparator and the cumulative path threshold comparator, respectively. The OR logic circuit outputs a hardware interference trigger signal when it receives at least one of the peak trigger signal and the cumulative trigger signal; it stops outputting the hardware interference trigger signal when both trigger signals are in a non-triggered state. The sampling switching circuit 4 maintains real-time analog sampling signal isolation of the first sampling channel 1 during the validity period of the hardware interference trigger signal, and resumes analog sampling signal transmission of the first sampling channel 1 after the OR logic circuit stops outputting the hardware interference trigger signal.

[0055] The restoration of analog sampling signal transmission in the first sampling channel 1 only indicates that the first sampling channel 1 has regained real-time voltage and current signals; it does not equate to the processor 5 immediately resuming the use of the first sampling channel 1 for main metering. After the first sampling channel 1 resumes real-time sampling, it still needs to undergo a continuous consistency comparison between the first sampling channel 1 and the second sampling channel 2. Only after the conditions for restoring stability are met will the processor 5 resume using the first sampling channel 1 as the data source for actual power metering.

[0056] Specifically, for a better explanation of the embodiments of the present invention, please refer to... Figure 4 , Figure 4 The diagram below illustrates the structure of the second sampling channel 2 provided by the present invention. As an optional embodiment, the second sampling channel 2 includes a voltage sampling branch and a current sampling branch. The anti-interference processing circuit includes a first anti-interference processing sub-circuit disposed in the voltage sampling branch and a second anti-interference processing sub-circuit disposed in the current sampling branch. Both the first and second anti-interference processing sub-circuits include a transient limiting circuit, a common-mode rejection circuit, and an anti-aliasing filter circuit. Transient limiting circuit, used to limit the analog sampling signal in the corresponding voltage sampling branch or current sampling branch; Common-mode rejection circuit is used to suppress common-mode interference of analog sampling signals in the voltage or current sampling branch corresponding to the input. Anti-aliasing filter circuit is used to filter the high-frequency components of the analog sampling signal in the corresponding voltage sampling branch or current sampling branch.

[0057] Specifically, considering that after the first sampling channel 1 is isolated, the second sampling channel 2 needs to continue providing voltage and current sampling data that can be used for energy metering during periods of strong electromagnetic interference. High-amplitude transients, common-mode coupling, and high-frequency components can all affect the validity of the backup sampling data. Therefore, this embodiment of the invention sets up anti-interference processing sub-circuits, including transient limiting circuits, common-mode suppression circuits, and anti-aliasing filter circuits, in the voltage and current sampling branches of the second sampling channel 2. The transient limiting circuit limits abnormal transient amplitudes, the common-mode suppression circuit weakens common-mode coupling interference, and the anti-aliasing filter circuit attenuates high-frequency components. These three types of processing work together to reduce the impact of high-frequency interference and transient disturbances on the sampling data of the second sampling channel 2, making the second sampling channel 2 more suitable for backup metering during the period when the first sampling channel 1 is protected.

[0058] The voltage sampling branch of the second sampling channel 2 can sequentially perform voltage input conditioning or voltage divider isolation, transient limiting, common-mode rejection, precision buffer amplification, anti-aliasing filtering, further buffering, and analog-to-digital conversion. The current sampling branch of the second sampling channel 2 can sequentially perform current input conditioning, transient limiting, common-mode rejection, precision buffer amplification, anti-aliasing filtering, further buffering, and analog-to-digital conversion. The aforementioned buffer amplification can provide suitable drive capability for subsequent filtering and analog-to-digital conversion, and reduce mutual interference between different circuit stages.

[0059] Specifically, the transient limiting circuit limits the transient signal of the corresponding voltage or current sampling branch. When a high-amplitude transient disturbance enters the second sampling channel 2, the transient limiting circuit limits the transient amplitude received by subsequent circuits, ensuring that the subsequent common-mode rejection circuit, anti-aliasing filter circuit, and analog-to-digital conversion circuit operate within a recoverable range. The specific threshold for transient limiting can be determined based on the allowable input range of the sampling front-end and the metering range of the energy meter.

[0060] Specifically, common-mode rejection circuits are used to suppress common-mode interference in the corresponding voltage or current sampling branches. External electromagnetic disturbances may simultaneously couple to multiple conductors in the sampling line, forming common-mode components. Common-mode rejection circuits reduce the extent to which such common variations propagate to subsequent differential or single-ended measurement paths. Common-mode rejection circuits can work in conjunction with input conditioning and buffer circuits to make the signal entering the anti-aliasing filter circuit closer to the effective voltage or current signal used for measurement.

[0061] Specifically, the anti-aliasing filter circuit is used to filter out high-frequency components in the corresponding sampling branch. The anti-aliasing filter of the second sampling channel 2 can adopt a narrower filter form with faster high-frequency attenuation, so that high-frequency interference above the effective measurement frequency band is strongly attenuated. The first sampling channel 1 can adopt a broadband anti-aliasing filter form that meets normal measurement requirements. Therefore, there can be differences in the high-frequency suppression capabilities of the first sampling channel 1 and the second sampling channel 2. The specific filter order, cutoff frequency, and device parameters can be determined according to the effective measurement frequency band and the target interference frequency.

[0062] Specifically, the aforementioned anti-interference processing of the second sampling channel 2 does not mean that it only operates after interference occurs. The second sampling channel 2 continuously samples synchronously. Under normal conditions, it can serve as a source of verification data; during interference, it serves as a source of actual backup metering data; and during the recovery phase, it participates in the consistency comparison between the first sampling channel 1 and the second sampling channel 2. Continuous synchronous sampling ensures that the corresponding data from the second sampling channel 2 already exists when switching metering data sources, avoiding additional waiting time introduced by temporary startup.

[0063] The first sampling channel 1 and the second sampling channel 2 can share the original signal acquisition front end of the power supply line under test, but the second sampling channel 2 maintains an independent subsequent conditioning and conversion path from the anti-interference processing circuit onwards, separate from the first sampling channel 1. When the first sampling channel 1 is isolated by the sampling switching circuit 4, the second sampling channel 2 continues to receive the corresponding voltage and current signals and output sampling data without going through the sampling switching circuit 4.

[0064] Specifically, for a better explanation of the embodiments of the present invention, please refer to... Figure 5 , Figure 5 The second structural diagram of the metering data acquisition system for the electricity meter provided by the present invention, as an optional embodiment, further includes a hardware latch and a synchronization timing unit; The set input terminal of the hardware latch is connected to the electromagnetic interference triggering device 3, and the status output terminal is connected to the processor 5. It is used to set the latch according to the hardware interference triggering signal and output the interference status flag. The synchronization timing unit is connected to the electromagnetic interference triggering device 3, the first sampling channel 1, the second sampling channel 2 and the processor 5 respectively. It is used to provide a unified sampling timing to the first sampling channel 1 and the second sampling channel 2, record the triggering time corresponding to the hardware interference triggering signal, determine the interference association time window corresponding to the triggering time, and provide the interference association time window to the processor 5. The processor 5 is also used to determine the sampled data of the first sampling channel 1 within the interference association time window as interference association data when the interference status flag indicates that the hardware latch is set, and to exclude the interference association data from the sampled data used by the power metering.

[0065] Specifically, considering that the hardware interference trigger signal may have a short duration, and that the processor 5 reads and processes the sampled data in a temporal sequence, if the interference state is only determined at the software processing moment, it may be difficult to accurately correspond to the data of the first sampling channel 1 affected near the hardware protection action. Therefore, this embodiment of the invention uses a hardware latch to store the interference state, records the trigger time corresponding to the hardware interference trigger signal through a synchronization timing unit, and determines the interference association time window. Then, the processor 5 identifies the interference-related data based on the interference state flag and the interference association time window. This establishes a time correspondence between the same hardware protection event and the corresponding sampled data, and excludes the data of the first sampling channel 1 that may be affected by interference from the data actually used in energy metering, reducing the possibility that the time difference between hardware triggering and digital data processing will cause disturbed data to enter the metering results.

[0066] Specifically, when the electromagnetic interference triggering device 3 generates a hardware interference trigger signal, the hardware latch is set according to the hardware interference trigger signal and outputs an interference status flag. The interference status flag is used to store the hardware protection events that have already occurred. Even if the transient interference that caused the trigger has quickly disappeared, the processor 5 can still identify the protection action that has already occurred based on the interference status flag, thereby reducing the possibility of missing interference events due to software read delays or short transient trigger durations.

[0067] The specific reset circuit, reset conditions, and reset timing of the hardware latch can be determined in conjunction with the recovery control logic. This embodiment of the invention does not limit the reset to a single condition, such as the hardware interference trigger signal decreasing, the accumulated response signal decreasing to the recovery threshold, or the consistency comparison between the first sampling channel 1 and the second sampling channel 2 passing. In practice, it is only necessary to ensure that the interference status flag can be reliably saved before the processor 5 completes the data processing of the corresponding interference event, and can be restored to a state that allows for the next setting before entering a new normal working cycle.

[0068] Specifically, the synchronization timing unit provides a unified sampling timing sequence to the first sampling channel 1 and the second sampling channel 2, enabling the first sampling channel 1 and the second sampling channel 2 to generate time-corresponding sampling data for the same power supply line under test. The unified sampling timing sequence can be represented by a unified sampling clock, a channel synchronization control signal, or a sampling phase alignment signal. Specifically, it can be implemented using independent timing circuits, the internal clock module of the metering chip, a processor timer, or other circuits capable of establishing a unified sampling reference.

[0069] Specifically, the synchronization timing unit also receives a hardware interference trigger signal and records the trigger time corresponding to the hardware interference trigger signal. The synchronization timing unit determines the interference-related time window corresponding to the trigger event based on the trigger time and provides the interference-related time window to the processor 5. The interference-related time window is used to establish a time relationship between the hardware protection event and the sampling data formed by the first sampling channel 1. The start position, end position, and duration of the interference-related time window can be determined based on the sampling frequency, the analog sampling path response time, and the protection switching response time; this embodiment of the invention does not limit the fixed window length.

[0070] The processor 5 receives an interference status flag, an interference-related time window, and sampling data from the first sampling channel 1. When the interference status flag indicates that the hardware latch is set, the processor 5 identifies the sampling data from the first sampling channel 1 within the interference-related time window as interference-related data and excludes it from the sampling data actually used for energy metering. This distinguishes data that may have been affected near the hardware protection action from normal metering data, avoiding reliance solely on software-based data exclusion after the processor 5 receives the status switch.

[0071] Specifically, the synchronization timing unit does not determine whether electromagnetic interference has reached the preset trigger condition, nor does it serve as the primary control source for the protection switching of the sampling switching circuit 4. When electromagnetic interference reaches the preset trigger condition, the electromagnetic interference triggering device 3 directly generates a hardware interference trigger signal and applies it to the sampling switching circuit 4; the synchronization timing unit simultaneously records the trigger time. This parallel relationship avoids the need to rewrite the analog protection path into a serial process where the processor 5 or the synchronization timing unit first determines and then controls the sampling switching circuit 4.

[0072] As an optional embodiment, processor 5 is also used for: After the sampling switching circuit 4 restores the analog sampling signal transmission of the first sampling channel 1, it continuously determines the differences in multiple sets of voltage sampling data, current sampling data, and power data between the first sampling channel 1 and the second sampling channel 2. When the differences in voltage sampling data, current sampling data, and power data are all within the corresponding preset allowable difference range, and the electromagnetic interference triggering device 3 does not generate a hardware interference triggering signal again, it is determined that the first sampling channel 1 has returned to stability. After the first sampling channel 1 stabilizes, the sampling data from the first sampling channel 1 is used again for power metering.

[0073] Specifically, considering that after the sampling switching circuit 4 restores the analog sampling signal transmission of the first sampling channel 1, the conditioning circuit, filtering response, and analog-to-digital conversion result of the first sampling channel 1 may still be in the recovery process, the mere reconnection of the analog path cannot directly indicate that the first sampling channel 1 is suitable to resume its main metering function. Therefore, in this embodiment of the invention, after the first sampling channel 1 resumes real-time sampling, it continues to compare the differences in multiple sets of voltage sampling data, current sampling data, and power data between the first sampling channel 1 and the second sampling channel 2, while simultaneously confirming that the electromagnetic interference triggering device 3 has not generated a hardware interference trigger signal again. Only when multiple consecutive sets of differences are within the corresponding preset allowable difference range does the processor 5 determine that the first sampling channel 1 has stabilized and resume using its sampling data for energy metering, thereby reducing the impact of residual interference and the transient state of the sampling front end recovery on the energy metering results.

[0074] Specifically, processor 5 continuously determines multiple sets of voltage sampling data differences, current sampling data differences, and power data differences between the first sampling channel 1 and the second sampling channel 2. Before comparison, the data can be corrected according to the amplitude and phase calibration parameters of the first sampling channel 1 and the second sampling channel 2, and the time-corresponding data can be paired according to a unified sampling timing sequence. Power data can be calculated based on the voltage and current sampling data at the corresponding time, or it can be generated by a metering processing path that can provide power data.

[0075] Specifically, processor 5 compares the differences in multiple sets of voltage sampling data, current sampling data, and power data with their corresponding preset allowable difference ranges. Only when multiple consecutive sets of voltage sampling data differences, current sampling data differences, and power data differences are all within their respective preset allowable difference ranges, and the electromagnetic interference triggering device 3 does not generate a hardware interference trigger signal again, does processor 5 determine that the first sampling channel 1 has returned to stability. The number of data sets used for continuous comparison and the preset allowable difference ranges for each type of data can be set according to the measurement accuracy and recovery response requirements.

[0076] In a more stringent recovery judgment method, processor 5 can also confirm the recovery result by combining the data status of the first sampling channel 1 itself, such as determining that the recovered first sampling channel 1 has not experienced saturation, clipping, or sampling anomalies. This condition can be used as an additional condition in addition to continuous consistency comparison. Only after processor 5 confirms that the first sampling channel 1 has recovered and stabilized will it resume using the sampling data of the first sampling channel 1 for power metering, and return the second sampling channel 2 to its role as a synchronous verification and backup data source.

[0077] Specifically, the recovery process follows the sequence of first restoring analog sampling and then restoring main metering. The first stage is only responsible for re-establishing the real-time analog sampling signal transmission between the first sampling channel 1 and the power supply line under test. The second stage confirms that the conditioning, conversion, and timing of the first sampling channel 1 have returned to a stable state through comparison of multiple sets of data. This reduces residual interference or allows transient data from the sampling front-end recovery process to directly enter the power metering results.

[0078] Specifically, for a better explanation of the embodiments of the present invention, please refer to... Figure 6 , Figure 6 The first sampling channel 1 provided by the present invention is shown in the following schematic diagram. As an optional embodiment, the first sampling channel 1 includes a voltage sampling branch and a current sampling branch, both of which include analog-to-digital conversion circuits. The sampling switching circuit 4 includes a first switching sub-circuit disposed in the voltage sampling branch and a second switching sub-circuit disposed in the current sampling branch. Both the first switching sub-circuit and the second switching sub-circuit include a first analog switch, a second analog switch and a sample-and-hold circuit. For either the first switching sub-circuit or the second switching sub-circuit, the first analog switch is set in the analog sampling signal transmission path of the corresponding sampling branch, and its output terminal is connected to the input terminal of the corresponding analog-to-digital conversion circuit. It is used to disconnect when the electromagnetic interference triggering device 3 outputs a hardware interference triggering signal and to turn on when the electromagnetic interference triggering device 3 stops outputting a hardware interference triggering signal. The output of the sample-and-hold circuit is connected to the input of the second analog switch, and is used to output a sample-and-hold signal when the first analog switch is open, so that the input of the corresponding analog-to-digital converter circuit is kept at a predetermined level. The output terminal of the second analog switch is connected to the input terminal of the corresponding analog-to-digital converter circuit. It is used to turn on when the electromagnetic interference triggering device 3 outputs a hardware interference trigger signal, so as to transmit the sample-and-hold signal to the corresponding analog-to-digital converter circuit, and to turn off when the electromagnetic interference triggering device 3 stops outputting the hardware interference trigger signal.

[0079] Specifically, considering that after strong electromagnetic interference reaches the protection condition, it is necessary to directly block the real-time analog sampling signal in the first sampling channel 1 from continuing to enter the analog-to-digital conversion circuit, while it is not advisable to leave the input terminal of the analog-to-digital conversion circuit in a floating or uncontrollable state, and the voltage sampling branch and the current sampling branch need to perform protection switching synchronously, this embodiment of the invention sets up switching sub-circuits including a first analog switch, a second analog switch, and a sample-and-hold circuit in each of the two sampling branches. When the hardware interference trigger signal is valid, the first analog switch disconnects the real-time analog sampling signal transmission, and the second analog switch turns on and sends the sample-and-hold signal to the analog-to-digital conversion circuit; after the hardware interference trigger signal stops, the two switches return to their opposite on / off states. Therefore, the disturbed real-time analog signal can be isolated and the subsequent input can be stabilized during the protection period, while maintaining the hardware path for the first sampling channel 1 to resume real-time sampling.

[0080] In this circuit, for either the first or second switching sub-circuit, a first analog switch is positioned in the real-time analog sampling signal transmission path of the corresponding sampling branch, and the output of the first analog switch is connected to the input of the corresponding analog-to-digital converter (ADC). The output of the sample-and-hold circuit is connected to the input of the second analog switch, and the output of the second analog switch is also connected to the input of the corresponding ADC. Therefore, the real-time analog sampling signal transmission path and the sample-and-hold signal transmission path form two selectable input paths at the input of the corresponding ADC.

[0081] Specifically, under normal operating conditions, the electromagnetic interference triggering device 3 does not output a valid hardware interference triggering signal, the first analog switch is turned on, and the second analog switch is turned off. The real-time analog sampling signal formed by the corresponding sampling branch after pre-stage conditioning enters the analog-to-digital conversion circuit through the first analog switch, and the first sampling channel 1 continuously generates real-time voltage sampling data and real-time current sampling data.

[0082] Specifically, after electromagnetic interference reaches the preset trigger condition, the electromagnetic interference triggering device 3 outputs a hardware interference trigger signal. The first analog switch is disconnected when the hardware interference trigger signal is valid, and the second analog switch is simultaneously turned on, isolating the input terminal of the corresponding analog-to-digital conversion circuit from the real-time analog sampling signal and connecting it to the output terminal of the sample-and-hold circuit. The voltage sampling branch and the current sampling branch perform this switching synchronously to avoid isolating only one sampling branch while the other sampling branch still receives the disturbed real-time signal.

[0083] The sample-and-hold circuit outputs a sample-and-hold signal during the period when the first analog switch is open, keeping the input of the corresponding analog-to-digital converter at a predetermined level. The sample-and-hold signal only serves to stabilize the input of the first sampling channel 1 and is not used as a real-time voltage or current signal for actual energy measurement during interference. Whether the sample-and-hold circuit holds a specific effective value before triggering or uses a preset reference level can be determined based on the circuit implementation. This embodiment of the invention does not limit one form to a unique implementation; it only requires that the input of the analog-to-digital converter be kept in an uncontrolled state during the protection period.

[0084] Specifically, the first and second analog switches can be interlocked, ensuring that the second analog switch remains open when the first analog switch is on, and vice versa, preventing both input paths from being connected simultaneously. After the hardware interference trigger signal stops, the first analog switch is turned on again, the second analog switch is turned off, and the first sampling channel 1 resumes real-time analog sampling signal transmission. The sampling switching circuit 4 only changes the analog input path of the first sampling channel 1 itself, without connecting the analog output of the second sampling channel 2 to the analog-to-digital conversion circuit of the first sampling channel 1.

[0085] The voltage sampling branch of the first sampling channel 1 can sequentially include voltage input conditioning or voltage divider isolation, precision buffer amplification, broadband anti-aliasing filtering, secondary buffering, sampling switching circuit 4, and analog-to-digital conversion circuit. The current sampling branch of the first sampling channel 1 can sequentially include current input conditioning, precision buffer amplification, broadband anti-aliasing filtering, secondary buffering, sampling switching circuit 4, and analog-to-digital conversion circuit. The sampling switching circuit 4 is located between the analog signal conditioning output of each sampling branch and the input of the corresponding analog-to-digital conversion circuit, thereby directly isolating the subsequent analog-to-digital conversion circuit from the real-time analog sampling signal when strong interference triggers.

[0086] As an optional embodiment, processor 5 is also used for: Based on the sampling data of the second sampling channel 2, determine whether the second sampling channel 2 has experienced saturation, continuous clipping, or sampling interruption, and determine the time interval during which saturation, continuous clipping, or sampling interruption occurs as the abnormal interval; During the electricity metering process using the sampling data from the second sampling channel 2, the sampling data within the abnormal range is excluded from the sampling data used for electricity metering.

[0087] Specifically, considering that although the second sampling channel 2 has strong anti-interference processing capabilities, it may still experience saturation, continuous clipping, or sampling interruption when the intensity of external electromagnetic interference increases further. If these obviously abnormal sampling data continue to be used as normal data in power metering, it may still cause deviations in the metering results. Therefore, in this embodiment of the invention, the processor 5 identifies the above-mentioned abnormal states of the second sampling channel 2 and determines the time interval of the abnormality as the abnormal interval. During the power metering period undertaken by the second sampling channel 2, the sampling data within the abnormal interval is excluded. This allows the backup metering to not only rely on the anti-interference hardware capabilities of the second sampling channel 2, but also to increase the check on the validity of the backup sampling data itself, reducing the amount of obviously distorted backup sampling data entering the normal power metering results.

[0088] Specifically, saturation can be manifested as the sampled values ​​of the second sampling channel 2 continuously reaching or approaching the boundary of the representable range; continuous clipping can be manifested as multiple consecutive sampling points being restricted to approximately the same upper or lower limit value within a certain period of time; and sampling interruption can be manifested as the failure to form corresponding sampled data at the expected sampling time or the appearance of missing data sequences that do not conform to the unified sampling timing. The specific judgment threshold, the number of consecutive sampling points, and the interruption duration can be set according to the range, sampling frequency, and digital data format of the second sampling channel 2. The embodiments of the present invention do not limit the specific values.

[0089] Specifically, during the energy metering process using the sampling data from the second sampling channel 2, the processor 5 excludes the sampling data within the abnormal range from the actual energy metering data. Therefore, even if the intensity of strong electromagnetic interference exceeds the immunity of the second sampling channel 2, causing significant distortion in the second sampling channel 2 itself, the identified abnormal data will not be directly used as normal metering data for continued accumulation.

[0090] Specifically, for short-duration abnormal intervals, interpolation or short-time estimation can be performed based on stable power data before and after the abnormal interval to generate compensation data for maintaining metering continuity. When using compensation data, processor 5 should add an abnormal compensation flag to the compensation result so that the compensated data can be distinguished from the original normal sampling data. Whether to perform interpolation or short-time estimation, the maximum allowable compensation time, and the specific estimation method can be determined according to the electricity meter metering strategy. Therefore, interpolation or short-time estimation is an optional process and not a necessary method for abnormal handling of the second sampling channel 2.

[0091] The processor 5 can also save abnormal interval information, interference status flags, and metering data status to memory for later querying or operational status analysis. For abnormal intervals that last for a long time or for which reliable compensation cannot be formed, the abnormality flag can be retained instead of treating obviously distorted sampling data as normal power data.

[0092] Specifically, the first sampling channel 1, the second sampling channel 2, the electromagnetic interference triggering device 3, the sampling switching circuit 4, the hardware latch, the synchronization timing unit, and the processor 5 work together according to three relationships: analog signal transmission, hardware protection control, and digital data processing. The electromagnetic interference triggering device 3 is responsible for interference sensing and hardware trigger judgment; the sampling switching circuit 4 is responsible for isolating and restoring the analog sampling signal transmission path of the first sampling channel 1; the hardware latch stores the interference protection status that has occurred; the synchronization timing unit provides a unified sampling timing sequence and establishes the time correspondence between trigger events and sampling data; and the processor 5 completes the selection of metering data sources, exclusion of interference-related data, identification of abnormal intervals, consistency comparison between the first sampling channel 1 and the second sampling channel 2, and energy metering. The hardware interference trigger signal acts directly on the sampling switching circuit 4, without requiring the processor 5 to first judge the interference status before issuing a protection control command, thus enabling the protection action of the analog sampling signal transmission path to directly respond to the hardware judgment result of the electromagnetic interference triggering device 3.

[0093] The various components can be implemented in different physical forms depending on the internal space of the energy meter, the selection of components, and the configuration of the metering chip. The first sampling channel 1 and the second sampling channel 2 need to have independent analog sampling paths and sampling data outputs, but they are not limited to using separate analog-to-digital converter chips; different conversion channels from the same multi-channel analog-to-digital converter can also be used. The synchronization timing unit can be implemented by an independent timing circuit, the internal clock module of the metering chip, the timer of the processor 5, or a circuit capable of providing the same function. The various digital processing functions performed by the processor 5 can run within the same processor 5, or they can be completed by a metering chip with processing capabilities.

[0094] Furthermore, this embodiment of the invention provides a unified description of the complete process of system initialization, calibration, normal measurement, strong interference triggering, backup measurement, interference reduction, recovery verification, and return to normal measurement. After the system is powered on, the synchronization timing unit establishes a unified sampling timing sequence for the first sampling channel 1 and the second sampling channel 2. The processor 5 reads the calibration parameters of the first sampling channel 1 and the second sampling channel 2, and makes the first sampling channel 1 the main metering unit. The second sampling channel 2 simultaneously outputs synchronous sampling data for channel verification and subsequent recovery comparison. The electromagnetic interference sensing unit continuously outputs differential induction signals from different spatial directions, and the peak detection path and rectification energy storage path in the hardware triggering unit continue to operate.

[0095] Specifically, when the peak detection signal in any direction reaches the corresponding peak trigger threshold, the peak comparator generates a peak trigger signal; when the cumulative response signal formed by multiple rectifier sub-branches to continuous or repetitive interference reaches the trigger threshold, the cumulative path threshold comparator generates a cumulative trigger signal. Alternatively, the logic circuit generates a hardware interference trigger signal after receiving any trigger signal. The hardware interference trigger signal directly controls the sampling switching circuit 4 to isolate the real-time analog input of the first sampling channel 1, while simultaneously setting the hardware latch and causing the synchronization timing unit to record the trigger time. The processor 5 then excludes data related to the trigger event in the first sampling channel 1 based on the interference status flag and the interference-related time window, and continues to perform power metering using the valid sampling data from the second sampling channel 2.

[0096] During the protection period, the first analog switch of the first sampling channel 1 is disconnected, and the second analog switch is turned on. The sample-and-hold circuit provides a sample-and-hold signal to the analog-to-digital conversion circuit. The second sampling channel 2 is unaffected by the protection switching of the first sampling channel 1 and continues to form sampled data through the transient limiting circuit, common-mode rejection circuit, anti-aliasing filter circuit, and analog-to-digital conversion path. The processor 5 continuously checks whether the second sampling channel 2 experiences saturation, continuous clipping, or sampling interruption, and only uses the data from the second sampling channel 2 that meets the validity conditions for energy metering.

[0097] Specifically, after the electromagnetic interference subsides, the peak detection signal no longer reaches the peak trigger threshold, the transient energy storage capacitor releases charge through the discharge branch, and the accumulated response signal gradually decreases. When the accumulated response signal falls below the recovery threshold and the peak comparator does not output the peak trigger signal again, or the logic circuit stops outputting the hardware interference trigger signal, the sampling switching circuit 4 then re-turns the first analog switch on and turns the second analog switch off, and the first sampling channel 1 resumes real-time analog sampling signal transmission.

[0098] Specifically, after the first sampling channel 1 resumes real-time sampling, the processor 5 continues to use the second sampling channel 2 as the source of actual power metering data, and simultaneously begins continuous consistency comparison between the first sampling channel 1 and the second sampling channel 2. After calibration, the processor 5 can calculate the voltage sampling data difference, current sampling data difference, and power data difference at corresponding times, and observe whether multiple consecutive sets of data remain within the corresponding preset allowable difference range. During this period, the electromagnetic interference triggering device 3 continues to operate. If a hardware interference trigger signal is generated again, the stabilization condition is not met, and the sampling switching circuit 4 re-enters the protection state.

[0099] Specifically, the processor 5 determines that the first sampling channel 1 has returned to stability only when the differences in multiple consecutive sets of voltage sampling data, current sampling data, and power data all meet the corresponding preset allowable difference ranges, and the electromagnetic interference triggering device 3 does not generate a hardware interference trigger signal again. The processor 5 then resumes using the sampling data from the first sampling channel 1 for energy metering. The second sampling channel 2 continues to maintain synchronous sampling for subsequent channel verification, backup metering during the next strong electromagnetic interference, and consistency comparison during the next recovery process.

[0100] The analog-to-digital conversion (ADC) methods of the first sampling channel 1 and the second sampling channel 2 are not limited by a single chip configuration. The first sampling channel 1 and the second sampling channel 2 can use independent ADC chips, or they can use different channels from the same synchronous multi-channel ADC chip, as long as the first sampling channel 1 and the second sampling channel 2 have independent analog conditioning paths and distinguishable sampled data outputs, and can generate time-corresponding data under a unified sampling timing sequence. Similarly, the processor 5 can be an independent microprocessor or a processing core with digital processing capabilities within the metering chip.

[0101] The physical boundary between the common signal acquisition front end and the first sampling channel 1 and the second sampling channel 2 can be determined according to the specific energy meter circuit. For example, voltage division, isolation, or current detection functions can be partially located at the common signal acquisition front end, or they can be completed by their respective input conditioning circuits after entering the first sampling channel 1 and the second sampling channel 2. Regardless of how the specific physical boundary is set, it should be ensured that the first sampling channel 1 and the second sampling channel 2 acquire the corresponding voltage and current signals of the same power supply line under test, and the first sampling channel 1 should not be interpreted as only acquiring voltage and the second sampling channel 2 as only acquiring current.

[0102] Specifically, the first sampling channel 1 and the second sampling channel 2 may differ in their filtering responses. The first sampling channel 1 can employ a broadband anti-aliasing filter that meets normal metering requirements, while the second sampling channel 2 can employ an anti-aliasing filter with stronger attenuation capabilities above the effective metering frequency band. Before being put into operation, the first and second sampling channels 1 and 2 undergo amplitude and phase calibration to ensure that differences in filtering, gain, and transmission delay do not directly affect the consistency judgment between them. The stronger high-frequency suppression of the second sampling channel 2 is used to improve data availability during periods of strong electromagnetic interference, but the second sampling channel 2 continues sampling rather than being temporarily activated. Under normal conditions, the first sampling channel 1 undertakes the main metering; this is part of the functional division between the first and second sampling channels 1 and 2, and not because the second sampling channel 2 cannot operate continuously.

[0103] The electromagnetic interference sensing unit can use multiple induction coil groups with the same parameters, or different parameters depending on the spatial conditions of different installation orientations. The two induction sub-coils within each group should maintain parameter matching as much as possible, and their coupling conditions to the main current-carrying conductor should be basically consistent to enhance the cancellation effect on the common components of the power frequency background. The number, number of turns, effective area, spacing, installation position, and orientation of the induction coil groups can be adjusted based on the size of the electricity meter casing and the distribution of internal components. The aforementioned 10 to 200 turns and 20 to 1000 square millimeters are only optional ranges and do not imply that all implementations must adopt these ranges.

[0104] Specifically, the cutoff frequency or passband range of the frequency selection conditioning circuit, the peak trigger threshold, the cumulative path trigger threshold, the recovery threshold, the capacity of the transient energy storage capacitor, and the decay time corresponding to the discharge branch can all be determined according to the operating environment of the energy meter. When determining these parameters, considerations should be given to suppressing the background magnetic field of the normal load, the response speed to target electromagnetic interference, and the stability of the recovery process. The recovery threshold is lower than the trigger threshold to create hysteresis; the discharge branch provides a cumulative response decay path, ensuring that the conditions for exiting the trigger state are met after continuous or repetitive interference subsides.

[0105] The interference correlation time window is used to establish the time relationship between hardware protection events and the sampling data of the first sampling channel 1. Since different energy meters can use different sampling frequencies, analog filtering responses, and switching speeds, the interference correlation time window does not need to be limited to a uniform start and end position. The processor 5 only needs to be able to identify a set of sampling data related to the hardware interference trigger event based on the trigger time and time window provided by the synchronization timing unit, and exclude this set of sampling data from the normal energy metering data.

[0106] Specifically, processor 5 undertakes multiple functions that could originally be separated into data status judgment and metering processing. Processor 5 can receive digital sampling data from the first sampling channel 1 and the second sampling channel 2, interference status flags output by the hardware latch, trigger times and interference-related time windows provided by the synchronization timing unit, and trigger status provided by the electromagnetic interference triggering device 3. Processor 5 uses this information to complete interference-related data marking and elimination, validity judgment of the second sampling channel 2, comparison of the first sampling channel 1 and the second sampling channel 2 during the recovery phase, selection of metering data sources, amplitude correction, phase correction, zero-point correction, instantaneous power calculation, energy integration, data storage, and data output to the communication interface and display or indication module.

[0107] The primary function of the sample-and-hold circuit during the protection period is to maintain the stability of the analog-to-digital converter input after the first sampling channel 1. The sample-and-hold signal cannot be used by the processor 5 as the current real-time voltage or current signal for energy calculation. The specific level form of the output of the sample-and-hold circuit can be determined by the hardware implementation; it is not necessary to write either the last valid sample value before triggering or the preset reference level into a fixed form that all implementation methods must satisfy.

[0108] Specifically, the hardware latch's function is to store the protection events that have occurred, not to determine whether the sampling switching circuit 4 should activate. The activation of the sampling switching circuit 4 is directly controlled by the hardware interference trigger signal. The synchronization timing unit's function is to unify the sampling timing and record the trigger events; it is not responsible for determining whether the electromagnetic interference has reached the preset trigger condition. Whether the electromagnetic interference has reached the preset trigger condition is determined by the hardware trigger unit in the electromagnetic interference triggering device 3. Maintaining this functional division clarifies the relationship between interference sensing, hardware judgment, analog path execution, and digital data processing.

[0109] In a complete operation, the system sequentially goes through the following states: normal main metering state, strong interference protection state, standby metering state of the second sampling channel 2, real-time sampling recovery state of the first sampling channel 1, consistency verification state of the first sampling channel 1 and the second sampling channel 2, and restoration to normal main metering state. There is no requirement for the processor 5 to issue all hardware control commands uniformly between these states. The entry into the strong interference protection state is directly driven by a hardware interference trigger signal to the sampling switching circuit 4. The digital processing section then selects metering data based on the hardware state and time stamp, thus enabling the hardware protection action and metering data processing to coordinate with each other.

[0110] Specifically, the parameters, device types, number of channels, and installation methods in each embodiment can be adjusted according to the requirements of the electricity meter product, as long as the corresponding electromagnetic interference sensing, hardware triggering, isolation of the first sampling channel 1, backup metering of the second sampling channel 2, interference-related data elimination, and consistency verification can still be completed after the adjustment. The above embodiments are used to illustrate the structure and working process of the present invention. Those skilled in the art can make adjustments to the specific device selection, parameter range, channel configuration, and functional integration method without changing the core working relationship of the present invention.

[0111] This invention also provides an electricity meter, including an electricity meter body and a metering data acquisition system as described in the foregoing embodiments, which is connected to the electricity meter body.

[0112] Specifically, considering that the synchronous sampling of the first sampling channel 1 and the second sampling channel 2, electromagnetic interference sensing, hardware trigger protection, analog sampling signal switching, and digital metering data selection all need to be coordinated within the energy meter product, this embodiment of the invention connects the energy meter's metering data acquisition system to the energy meter body. This allows the energy meter body to combine with the metering data acquisition system to complete the acquisition of voltage and current signals of the tested power supply line and to perform energy metering. Therefore, the anti-electromagnetic interference sampling and metering process formed in the aforementioned embodiments can be directly applied to the energy meter. When electromagnetic interference reaches the protection condition, the first sampling channel 1 is protected, and the second sampling channel 2 maintains backup metering. After the interference subsides and recovery verification is completed, the metering returns to the first sampling channel 1 for main metering, thereby enabling the energy meter to achieve the same technical effect as the aforementioned metering data acquisition system.

[0113] The main body of the electricity meter can house the processor 5, memory, communication interface, and display or indication module. After completing amplitude correction, phase correction, zero-point correction, instantaneous power calculation, and energy integration, the processor 5 can write metering data, interference status, and anomaly flags into the memory and provide corresponding data to the communication interface and display or indication module. The specific installation and circuit integration between the electricity meter main body and the metering data acquisition system can be determined based on the electricity meter product structure; it is not required that each functional part be set as an independent chip.

[0114] Specifically, for single-phase, three-phase three-wire, or three-phase four-wire energy meters, voltage sampling branches and current sampling branches can be copied or configured as needed. Regardless of the wiring method, the first sampling channel 1 and the second sampling channel 2 are for the sampling data of the first sampling channel 1 and the second sampling channel 2 corresponding to the formation time of the corresponding voltage and current signals in the same power supply line under test.

[0115] The various embodiments described in this specification are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. It should also be noted that in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0116] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A metering data acquisition system for an electricity meter, characterized in that, It includes a first sampling channel, a second sampling channel, an electromagnetic interference triggering device, a sampling switching circuit, and a processor; The first sampling channel and the second sampling channel are used to synchronously acquire voltage and current signals of the same power supply line under test, and generate sampling data based on the analog sampling signals; the analog sampling signals include voltage and current signals; the second sampling channel includes an anti-interference processing circuit for suppressing high-frequency interference and transient disturbances; The electromagnetic interference triggering device is used to sense electromagnetic interference in the external environment and generate a hardware interference triggering signal when the electromagnetic interference reaches a preset triggering condition. The sampling switching circuit is located in the analog sampling signal transmission path of the first sampling channel and is used to cut off the transmission of the analog sampling signal according to the hardware interference trigger signal. The processor is connected to the first sampling channel and the second sampling channel respectively, and is used to perform power metering using the sampling data of the first sampling channel, and to switch to using the sampling data of the second sampling channel for power metering after the sampling switching circuit cuts off the transmission of the analog sampling signal.

2. The metering data acquisition system for an electricity meter according to claim 1, characterized in that, The electromagnetic interference triggering device includes an electromagnetic interference sensing unit and a hardware triggering unit, wherein the output terminal of the electromagnetic interference sensing unit is connected to the input terminal of the hardware triggering unit. The electromagnetic interference sensing unit includes multiple induction coil groups arranged along different spatial directions. Each of the induction coil groups includes two induction sub-coils that are spaced apart and connected in series with opposite polarities to form a differential induction signal. The hardware triggering unit is used to determine whether the electromagnetic interference has reached the preset triggering condition based on each of the differential sensing signals, and to generate the hardware interference triggering signal when the electromagnetic interference reaches the preset triggering condition.

3. The metering data acquisition system for an electricity meter according to claim 2, characterized in that, The electromagnetic interference sensing unit also includes multiple frequency selection conditioning circuits that correspond one-to-one with the multiple groups of induction coils. The input terminal of any of the frequency selective conditioning circuits is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the hardware trigger unit, for weakening the signal component caused by the power frequency background magnetic field in the corresponding differential induction signal; the frequency selective conditioning circuit is a high-pass conditioning circuit or a band-pass conditioning circuit.

4. The metering data acquisition system for an electricity meter according to claim 2, characterized in that, The hardware triggering unit includes a peak detection branch, a rectification branch, a transient energy storage capacitor, and a threshold comparison circuit; The peak detection branch includes multiple peak detection sub-branches corresponding one-to-one with the multiple induction coil groups. The input terminal of any peak detection sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the threshold comparison circuit, which is used to generate a peak detection signal based on the corresponding differential sensing signal. The rectifier branch includes multiple rectifier sub-branches corresponding one-to-one with the multiple induction coil groups. The input terminal of any rectifier sub-branch is connected to the output terminal of the corresponding induction coil group, and the output terminal is connected to the transient energy storage capacitor for rectifying the corresponding differential induction signal. The transient energy storage capacitor is connected to the output terminals of the multiple rectifier sub-branches and the threshold comparison circuit, respectively, and is used to form an accumulated response signal based on the rectified signals output by the multiple rectifier sub-branches. The threshold comparison circuit is connected to the output terminals of the plurality of peak detection sub-branches and the transient energy storage capacitor, respectively, and is used to generate the hardware interference trigger signal based on at least one of the peak detection signal and the cumulative response signal.

5. The metering data acquisition system for an electricity meter according to claim 4, characterized in that, The hardware triggering unit also includes a discharge branch; The discharge branch is connected to the transient energy storage capacitor and is used to discharge the transient energy storage capacitor so that the accumulated response signal attenuates after the electromagnetic interference subsides. The threshold comparison circuit includes a peak comparator, a cumulative path threshold comparator, and OR logic circuitry. The input terminal of the peak comparator is connected to the output terminal of the multiple peak detection sub-branches respectively, and the output terminal is connected to the OR logic circuit. It is used to compare each peak detection signal with the corresponding peak trigger threshold, and output a peak trigger signal when at least one peak detection signal reaches the corresponding peak trigger threshold. The input of the cumulative path threshold comparator is connected to the transient energy storage capacitor, and the output is connected to the OR logic circuit. The cumulative path threshold comparator is a hysteresis comparator with a trigger threshold and a recovery threshold. The trigger threshold is higher than the recovery threshold. It is used to enter the trigger state and output the cumulative trigger signal when the cumulative response signal reaches the trigger threshold, and to exit the trigger state when the cumulative response signal drops below the recovery threshold. The input terminals of the OR logic circuit are respectively connected to the output terminals of the peak comparator and the cumulative path threshold comparator, and are used to output the hardware interference trigger signal when at least one of the peak trigger signal and the cumulative trigger signal is received, and to stop outputting the hardware interference trigger signal when neither the peak trigger signal nor the cumulative trigger signal is received. The sampling switching circuit is also used to restore the transmission of the analog sampling signal of the first sampling channel when the OR logic circuit stops outputting the hardware interference trigger signal.

6. The metering data acquisition system for an electricity meter according to claim 1, characterized in that, The second sampling channel includes a voltage sampling branch and a current sampling branch; The anti-interference processing circuit includes a first anti-interference processing sub-circuit disposed in the voltage sampling branch and a second anti-interference processing sub-circuit disposed in the current sampling branch. Both the first anti-interference processing sub-circuit and the second anti-interference processing sub-circuit include a transient limiting circuit, a common-mode rejection circuit and an anti-aliasing filter circuit. The transient limiting circuit is used to limit the analog sampling signal in the corresponding voltage sampling branch or current sampling branch. The common-mode rejection circuit is used to suppress common-mode interference of the analog sampling signal in the voltage sampling branch or the current sampling branch corresponding to the input. The anti-aliasing filter circuit is used to filter the high-frequency components of the analog sampling signal in the corresponding voltage sampling branch or current sampling branch.

7. The metering data acquisition system for an electricity meter according to claim 1, characterized in that, It also includes hardware latches and synchronization timing units; The set input terminal of the hardware latch is connected to the electromagnetic interference triggering device, and the status output terminal is connected to the processor, which is used to set the latch according to the hardware interference triggering signal and output the interference status flag. The synchronization timing unit is connected to the electromagnetic interference triggering device, the first sampling channel, the second sampling channel and the processor respectively, and is used to provide a unified sampling timing to the first sampling channel and the second sampling channel, record the triggering time corresponding to the hardware interference triggering signal, determine the interference association time window corresponding to the triggering time, and provide the interference association time window to the processor. The processor is further configured to, when the interference status flag indicates that the hardware latch is set, determine the sampling data of the first sampling channel within the interference association time window as interference association data, and exclude the interference association data from the sampling data used for power metering.

8. The metering data acquisition system for an electricity meter according to claim 7, characterized in that, The processor is also used for: After the sampling switching circuit restores the analog sampling signal transmission of the first sampling channel, it continuously determines multiple sets of voltage sampling data differences, current sampling data differences, and power data differences between the first sampling channel and the second sampling channel. When multiple consecutive sets of voltage sampling data differences, current sampling data differences, and power data differences are all within the corresponding preset allowable difference range, and the electromagnetic interference triggering device does not generate the hardware interference triggering signal again, it is determined that the first sampling channel has returned to stability. After the first sampling channel stabilizes, the sampling data from the first sampling channel is used again for power metering.

9. The metering data acquisition system for an electricity meter according to any one of claims 1 to 8, characterized in that, The first sampling channel includes a voltage sampling branch and a current sampling branch, both of which include analog-to-digital conversion circuits; The sampling switching circuit includes a first switching sub-circuit disposed in the voltage sampling branch and a second switching sub-circuit disposed in the current sampling branch. Both the first switching sub-circuit and the second switching sub-circuit include a first analog switch, a second analog switch, and a sample-and-hold circuit. For either the first switching sub-circuit or the second switching sub-circuit, the first analog switch is set in the analog sampling signal transmission path of the corresponding sampling branch, and its output terminal is connected to the input terminal of the corresponding analog-to-digital conversion circuit. It is used to disconnect when the electromagnetic interference triggering device outputs the hardware interference triggering signal, and to turn on when the electromagnetic interference triggering device stops outputting the hardware interference triggering signal. The output of the sample-and-hold circuit is connected to the input of the second analog switch, and is used to output a sample-and-hold signal when the first analog switch is open, so that the input of the corresponding analog-to-digital converter circuit maintains a predetermined level. The output terminal of the second analog switch is connected to the input terminal of the corresponding analog-to-digital converter circuit, and is used to turn on when the electromagnetic interference triggering device outputs the hardware interference trigger signal, so as to transmit the sample-and-hold signal to the corresponding analog-to-digital converter circuit, and to turn off when the electromagnetic interference triggering device stops outputting the hardware interference trigger signal.

10. An electricity meter, characterized in that, It includes an electricity meter body, and also includes a metering data acquisition system for the electricity meter as described in any one of claims 1 to 9, which is connected to the electricity meter body.

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