Three-phase unbalance adaptive compensation and harmonic tracing measurement method and electric energy meter

Abstract

This invention discloses a three-phase unbalance adaptive compensation and harmonic source tracing metering method and an energy meter. The method includes the following steps: S1: high-precision synchronous sampling of three-phase voltage and current; S2: symmetrical component decomposition, real-time calculation of three-phase unbalance degree, and compensation trigger determination; S3: dynamic adaptive compensation correction of three-phase metering gain; S4: lightweight fixed-point FFT real-time analysis of all harmonics; S5: harmonic fingerprint comparison for source tracing and allocation of power supply and consumption responsibilities; S6: dynamic low-power edge computing scheduling and proactive data reporting. The three-phase unbalance adaptive compensation and harmonic source tracing metering method and energy meter disclosed in this invention simultaneously meet multiple requirements such as high-precision metering, unbalance adaptive compensation, harmonic source tracing and responsibility determination, and local edge processing at the meter end.

Description

Technical Field

[0001] This invention belongs to the technical fields of low-voltage metering in smart grids, metering compensation of three-phase smart energy meters, power quality monitoring, and meter-embedded edge computing algorithms. Specifically, it relates to a three-phase imbalance adaptive compensation and harmonic source tracing metering method based on edge computing and an energy meter. Background Technology

[0002] The State Grid's new 2025 version of the Class B three-phase smart energy meter standard sets upgraded requirements for meter accuracy, wide range adaptability, anti-interference under complex operating conditions, local edge computing, and local power quality monitoring. It requires the meter to maintain high-precision metering over a long period of time under full load range, nonlinear impact load, severe three-phase imbalance, and distributed photovoltaic harmonic disturbance scenarios, while also having harmonic statistics, imbalance monitoring, local load anomaly analysis, and local data freeze storage functions.

[0003] Existing three-phase smart meters have three major flaws: 1. Excessive drift in metering error under unbalanced operating conditions: Traditional meters use fixed metering gain parameters and do not dynamically correct for three-phase imbalance. When there is a single-phase high-power load in the distribution area, single-phase photovoltaic grid connection, or uneven distribution of three-phase loads, voltage and current generate a large number of negative sequence and zero sequence components, causing significant drift in phase metering errors. This can easily exceed the 2025 version of the Class B error limit, resulting in false line loss and frequent metering disputes.

[0004] 2. Harmonics cannot distinguish the responsibilities of power supply and consumption: Existing electricity meters can only simply count the harmonic content and cannot identify the source of harmonics from the 2nd to the 21st order, nor can they distinguish whether the harmonic disturbance comes from the grid side or the user side. When excessive harmonics cause equipment overheating, metering abnormalities, or damage to power distribution equipment, the boundaries of responsibility between the power supply and consumption parties are blurred, making disputes difficult to resolve.

[0005] 3. Lack of local edge lightweight analysis capabilities: All power quality data and abnormal events need to be uploaded to the main station for processing, resulting in high data transmission latency, high computing power load on the main station, and delayed on-site fault handling, which cannot meet the technical requirements of the new standard for on-site sensing, on-site analysis, and on-site handling.

[0006] In summary, existing three-phase electricity meters cannot simultaneously meet the multiple requirements of high-precision metering, unbalanced adaptive compensation, harmonic source tracing and accountability, and local processing at the meter edge. There is an urgent need for an integrated metering compensation and harmonic source tracing solution that does not require modification of the meter hardware and integrates edge computing. Summary of the Invention

[0007] The main objective of this invention is to provide a three-phase unbalanced adaptive compensation and harmonic source tracing metering method and energy meter, achieving dynamic adaptive correction of metering errors under three-phase unbalanced operating conditions, and consistently meeting Class B high-precision metering indicators over the long term; completing accurate analysis of 2nd to 21st harmonics, automatically distinguishing between grid-side and user-side harmonic pollution sources, and automatically assigning responsibility; metering correction, harmonic analysis, and anomaly assessment are all completed locally at the meter's edge, without relying on the main station backend; the embedded algorithm features a lightweight design, coupled with dynamic frequency modulation and low-power control, without increasing the overall power consumption of the meter or shortening the equipment's lifespan. To achieve the above objectives, this invention provides a three-phase unbalance adaptive compensation and harmonic source tracing measurement method, comprising the following steps: Step S1: High-precision synchronous sampling of three-phase voltage and current; The built-in ADC synchronous sampling circuit of the three-phase energy meter is used to synchronously collect the instantaneous data of the three-phase voltage and three-phase current of A, B, and C at the same moment and cache them to the local storage unit of the meter. Step S2: Symmetrical component decomposition, real-time calculation of three-phase unbalance and compensation trigger determination; perform transformation on the sampled data to extract the fundamental phasor, decompose the positive sequence, negative sequence and zero sequence current components by symmetric component method, and calculate the three-phase current unbalance; set the compensation start threshold, add no-load protection and continuous cycle anti-jitter logic, and determine whether to start metering adaptive compensation; and divide the unbalance into three levels: mild, moderate and severe, according to the magnitude of the unbalance, and match the corresponding compensation weight; Step S3: Dynamic adaptive compensation and correction of three-phase metering gain; When the imbalance exceeds the compensation start threshold, the independent metering gain calibration coefficients of each phase A, B, and C are dynamically adjusted in real time according to the proportion of negative sequence and zero sequence components, and the active and reactive energy metering pulses of each phase are corrected in real time to offset the metering drift error caused by the three-phase imbalance. Step S4: Lightweight fixed-point FFT real-time analysis of all harmonics; Using a single power frequency cycle as the operation cycle, perform fixed-point FFT spectrum decomposition on the three-phase sampled data, extract the preset harmonic amplitude and harmonic content, and calculate the total harmonic distortion rate (THD) to complete the on-site statistics and recording of all-dimensional power quality harmonic data. Step S5: Harmonic fingerprint comparison and source tracing and power supply responsibility division; The meter pre-stores a typical harmonic fingerprint feature library locally, and compares the real-time detected harmonic features with the fingerprint feature library for similarity matching, automatically determining whether the current harmonic pollution source belongs to the background harmonics on the power grid supply side or the harmonics generated by the nonlinear load on the user side, automatically generating harmonic source tracing results and responsibility attribution information, and adding a timestamp to freeze and store locally. Step S6: Dynamic low-power scheduling and proactive data reporting for edge computing; The embedded MCU for edge computing is configured with multiple levels of dynamic frequency switching: low-frequency sleep during normal monitoring, medium frequency during imbalance compensation operation, high frequency during harmonic FFT and fingerprint tracing operation, and frequency reduction immediately after operation; When three-phase imbalance exceeds the standard, harmonic THD exceeds the standard, or harmonic responsibility determination event is detected, the corresponding data is proactively reported to the main station system of the distribution area.

[0008] As a further preferred technical solution to the above technical solution, step S2, calculating the three-phase current imbalance, is specifically implemented as follows: Step S2.1: Synchronous sampling: The ADC synchronous sampling circuit collects the instantaneous values ​​of the three-phase currents A, B, and C at the same moment, and collects complete power frequency cycle data; Step S2.2: Fundamental wave extraction: Perform SDFT discrete Fourier transform on the three-phase sampling sequence to filter out harmonics and obtain the real and imaginary parts of the fundamental wave current phasor for each phase; Step S2.3: Symmetrical component decomposition: Substitute into the formula of the realized symmetric component method to calculate the real and imaginary parts of the zero-sequence, positive-sequence, and negative-sequence current phasors; Step S2.4: Solving for the sequence current amplitude: By taking the square root of the sum of the squares of the real and imaginary parts, the effective values ​​of I0, I1, and I2 corresponding to the zero-sequence, positive-sequence, and negative-sequence currents are obtained; Step S2.5: Current unbalance calculation: the percentage of the ratio of the effective value of the negative sequence current to the effective value of the positive sequence current; Step S2.6: Cyclic refresh: Calculate the unbalance and three-sequence current in real time for each power frequency cycle.

[0009] As a further preferred technical solution to the above technical solution, the compensation trigger determination in step S2 involves setting an imbalance compensation start threshold. When the real-time detected three-phase imbalance exceeds the set threshold, the metering adaptive compensation process is automatically triggered; when the imbalance is below the threshold, the conventional Class B metering mode is maintained. Specifically, the implementation is as follows: Real-time calculation of imbalance, adding no-load protection; if the effective value of positive sequence current is less than the preset value, no-load is determined and compensation is not activated. The threshold comparison logic refreshes the flag bit once per power frequency cycle, and compensation is locked only if the threshold is exceeded for consecutive preset cycles. The compensation is tiered, and the compensation weight is adjusted according to the degree of imbalance. Specifically: when the degree of imbalance is in the first range, it is determined to be a slight imbalance and a first compensation coefficient is set; when the degree of imbalance is in the second range, it is determined to be a moderate imbalance and a second compensation coefficient is set; when the degree of imbalance is in the third range, it is determined to be a severe imbalance and a third compensation coefficient is set.

[0010] As a further preferred technical solution to the above technical solution, the dynamic real-time adjustment of the independent metering gain calibration coefficients of phases A, B, and C in step S3 specifically includes the following steps: Step S3.1: Calculate the global imbalance percentage Runb; and perform global adjustment intensity coefficient Kadj mapping using piecewise linear mapping to limit the upper limit of Kadj and prevent overcompensation of gain. Step S3.2: Calculate the load deviation coefficient dx for each phase of A / B / C. Calculate the effective value of the single-phase equivalent fundamental current and the three-phase average load current in sequence to obtain the phase-specific load deviation coefficient dx. Step S3.3: Real-time calculation of phase gain correction increment; Step S3.4: Hard limit the gain correction amount to prevent overshoot from damaging the metering chip; Step S3.5: First-order low-pass smoothing filter to suppress high-frequency gain jitter; Step S3.6: Complete calculation of real-time dynamic phase-splitting gain; Step S3.7: Bottom current phasor gain correction.

[0011] As a further preferred technical solution to the above technical solution, in step S3, real-time error correction is performed on the metering pulses of active and reactive energy for each phase, specifically implemented as follows: Extract the incremental raw electrical energy of the hardware in a single cycle; Calculate the amount of unbalanced error to be offset in this cycle; Calculate the actual increase in electrical energy for this cycle after correction; The phase-separated energy register accumulates in layers to achieve pulse correction.

[0012] As a further preferred technical solution of the above technical solution, the lightweight fixed-point FFT operation process in step S4 includes: removing DC bias from the sampled data, converting it to a fixed-point format, reordering the bits in reverse order using a lookup table, performing layered butterfly fixed-point operation, extracting the harmonic spectrum in sequence, solving for the amplitude of each harmonic by taking the square root at the fixed point, and calculating the harmonic content rate and total harmonic distortion rate one by one.

[0013] This invention also provides a three-phase energy meter with adaptive compensation for three-phase imbalance and harmonic source tracing, comprising a hardware architecture including: an ADC synchronous sampling circuit, a main metering chip, an edge computing embedded MCU, a local Flash storage unit, and a transformer area master station communication and reporting module, wherein: The edge computing embedded MCU has built-in embedded algorithm programs, which include: a three-phase unbalanced sequence component separation adaptive compensation algorithm module, a lightweight fixed-point FFT full harmonic analysis algorithm module, a harmonic fingerprint feature comparison and tracing algorithm module, and an MCU dynamic frequency modulation low power control module. The local Flash storage unit stores a typical load harmonic fingerprint database, which is used to store the original sampling data, measurement correction parameters, imbalance data, harmonic indices, harmonic source tracing responsibility determination events and corresponding timestamps. The communication reporting module is used to proactively report events such as imbalance exceeding the standard, harmonic exceeding the standard, and harmonic responsibility determination to the main station system of the distribution area.

[0014] The beneficial effects of this invention are as follows: 1. High-precision metering adapts to unbalanced and complex working conditions: Through threshold triggering and graded adaptive gain compensation, the metering drift caused by negative sequence and zero sequence components is dynamically offset, and the metering error is stably controlled within ±0.3%, which is better than the State Grid 2025 Class B standard, eliminating the real problem of line loss in unbalanced transformer areas.

[0015] 2. Automatic harmonic source tracing and clear division of power supply and consumption responsibilities: The meter has a built-in harmonic fingerprint database for multiple types of loads, which can automatically identify the source of harmonics without the participation of the master station, clarify the responsibility boundary between the power grid side and the user side, and greatly reduce the difficulty of handling disputes caused by harmonics in metering and equipment damage.

[0016] 3. End-to-end edge computing at the meter reduces the pressure on the main station: metering compensation, harmonic analysis, anomaly judgment, and data storage are all completed locally, with only abnormal events being uploaded on demand. This significantly reduces data transmission traffic, transmission latency, and the computing load on the main station, which is in line with the local intelligent development trend of smart meters.

[0017] 4. Low transformation cost and strong scalability: All algorithms are lightweight embedded software solutions, which do not require changes to the existing hardware structure of the 2025 version B-level electricity meter. They can be deployed simply by upgrading the firmware, making them suitable for batch transformation applications in low-voltage distribution areas across the country.

[0018] 5. Balancing high-precision computing with low power consumption: The MCU's dynamic frequency adjustment and collaborative algorithm operation mechanism ensures fixed-point calculation accuracy by increasing the frequency during high-load operations and reducing the frequency to reduce average power consumption during idle periods, without exceeding the power consumption index of the electricity meter and without shortening the service life of the equipment. Attached Figure Description

[0019] Figure 1 This is a flowchart of the overall hardware architecture and edge computing algorithm of the present invention.

[0020] Figure 2 A flowchart illustrating the working logic of responsibility allocation for three-phase unbalanced adaptive metering compensation and harmonic source tracing meters. Detailed Implementation

[0021] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0022] In the preferred embodiments of the present invention, those skilled in the art should note that the 2025 version B-class three-phase prepaid smart energy meter and the like involved in the present invention can be regarded as prior art.

[0023] Preferred embodiment.

[0024] like Figure 1 As shown, this invention discloses a three-phase unbalance adaptive compensation and harmonic source tracing measurement method, comprising the following steps: Step S1: High-precision synchronous sampling of three-phase voltage and current; The three-phase energy meter (2025 version B-level three-phase prepaid smart energy meter) is equipped with a built-in 24-bit high-precision ADC synchronous sampling circuit to synchronously collect instantaneous data of three-phase voltage and three-phase current of A, B, and C at the same moment, and cache them to the local storage unit of the meter to ensure that the sampling data is phase synchronized and the amplitude is accurate, providing the original data basis for subsequent metering correction and harmonic analysis; Step S2: Symmetrical component decomposition, real-time calculation of three-phase unbalance and compensation trigger determination; SDFT transformation is performed on the sampled data to extract the 50Hz fundamental phasor, and the positive sequence, negative sequence and zero sequence current components are obtained by symmetric component decomposition, and the three-phase current unbalance is calculated; a compensation start threshold is set, no-load protection and continuous cycle anti-jitter logic are added, and it is determined whether to start metering adaptive compensation; and the unbalance is divided into three levels: mild, moderate and severe, according to the magnitude of the unbalance, and the corresponding compensation weight is matched. In step S2, the calculation of the three-phase current imbalance is specifically implemented as follows: Step S2.1: Synchronous sampling: The ADC synchronous sampling circuit collects the instantaneous values ​​of the three-phase currents A, B, and C at the same moment, and collects complete power frequency cycle data; Step S2.2: Fundamental wave extraction: Perform SDFT discrete Fourier transform on the three-phase sampling sequence to separate the 50Hz fundamental wave, filter out harmonics, and obtain the real and imaginary parts of the fundamental wave current phasor for each phase; Step S2.3: Symmetrical component decomposition: Substitute into the real-valued symmetric component method formula (substitute into the three-phase-sequence component transformation formula containing the rotation operator α) to calculate the real and imaginary parts of the zero-sequence, positive-sequence, and negative-sequence current phasors; Symmetrical component method formula: Any asymmetrical three-phase vector can be uniquely decomposed into the superposition of three sets of symmetric vectors: positive-sequence, negative-sequence, and zero-sequence. ; Step S2.4: Solving for the sequence current amplitude: By taking the square root of the sum of the squares of the real and imaginary parts, the effective values ​​of I0, I1, and I2 corresponding to the zero-sequence, positive-sequence, and negative-sequence currents are obtained; Step S2.5: Current unbalance calculation: using the national standard definition, the percentage of the ratio of the effective value of the negative sequence current to the effective value of the positive sequence current; ; Step S2.6: Cyclic refresh: Cyclic calculation is performed every power frequency cycle (20ms) to output the unbalance and three-sequence current in real time.

[0025] In step S2, the compensation trigger determination sets an imbalance of 5% as the compensation start threshold. When the real-time detected three-phase imbalance exceeds the set threshold, the metering adaptive compensation process is automatically triggered; when the imbalance is below the threshold, the conventional Class B metering mode is maintained. Specifically, the implementation is as follows: Real-time calculation of imbalance Add no-load protection. If the effective value of the positive sequence current is less than the preset value (I1<0.001Irated (one-thousandth of the rated current)), it is determined to be no-load and compensation is not activated. The threshold comparison logic refreshes the flag bit once every power frequency cycle (20ms). Compensation is locked only if the threshold is exceeded for a consecutive preset cycle (preferably 3 cycles) (to prevent false triggering due to instantaneous fluctuations and to prevent jitter). The system employs tiered compensation, adjusting compensation weights based on the degree of imbalance to prevent overcompensation. Specifically: when the imbalance is in the first range (greater than 5% and less than or equal to 10%), it is classified as a mild imbalance, and a first compensation coefficient (preferably 0.4) is set; when the imbalance is in the second range (greater than 10% and less than or equal to 20%), it is classified as a moderate imbalance, and a second compensation coefficient (preferably 0.7) is set; and when the imbalance is in the third range (greater than 20%), it is classified as a severe imbalance, and a third compensation coefficient (preferably 1.0) is set.

[0026] Preferably, the three-level graded compensation weight is the pre-amplitude controller for subsequent dynamic gain adaptive correction, which directly determines the magnitude of the global adjustment coefficient and controls the gain correction increment of each phase; Functions: To achieve differentiated compensation for strong and weak disturbances, avoid overcompensation / undercompensation, smooth gain fluctuations, reduce filtering delay, coordinate power and gain dual-layer compensation, and prevent oscillations near the threshold. Without grading and using a uniform fixed weight (e.g., always equal to 1.0): in lightly loaded, slightly unbalanced scenarios, Kadj is too large, the gain correction is too large, resulting in overcompensation. The originally small measurement error is amplified, and the measurement error exceeds the ±0.3% target. Grading reduces the weight of lightly unbalanced disturbances and decreases the correction amplitude, avoiding overcompensation from the source.

[0027] Step S3: Dynamic adaptive compensation and correction of three-phase metering gain; When the imbalance exceeds the compensation start threshold, the independent metering gain calibration coefficients of phases A, B, and C are dynamically adjusted in real time according to the proportion of negative sequence and zero sequence components. Real-time error correction is performed on the active and reactive energy metering pulses of each phase to offset the metering drift error caused by the three-phase imbalance, so that the overall metering error under all operating conditions is stably controlled within ±0.3% for a long time, which is better than the requirements of the State Grid 2025 Class B metering standard. Step S3, which involves dynamically and in real-time adjusting the independent metering gain calibration coefficients of phases A, B, and C, specifically includes the following steps: Step S3.1: Calculate the global imbalance percentage (Runb); The physical meaning of Runb is: Excluding the symmetrical positive sequence, it represents the total proportion of all unbalanced currents causing measurement errors. A larger value indicates a more severe global imbalance and a larger gain adjustment range. Furthermore, a global adjustment intensity coefficient Kadj mapping is performed, using piecewise linear mapping, with an upper limit of Kadj of 0.05 to prevent over-compensation of the gain. When Runb≈0 (three-phase balance, unbalance degree less than or equal to 5%): Kadj=0, no dynamic gain correction is performed, and the factory reference gain is used. Slight imbalance: Runb increases slightly, Kadj increases linearly and slightly; Moderate imbalance: Kadj shows a moderate increase; Severe imbalance: Kadj=0.05 (upper limit locked, maximum correction strength).

[0028] Function: Kadj controls the overall gain correction amplitude of the three phases. The more severe the imbalance, the stronger the global correction.

[0029] Step S3.2: Calculate the load deviation coefficient dx for each phase of A / B / C (independent phase correction weights, real part Ixr and imaginary part Ixi of each phase current), and calculate the effective value of the single-phase equivalent fundamental current and the three-phase average load current in sequence to obtain the phase load deviation coefficient dx; specifically: Calculate the amplitude of the real and imaginary parts of the fundamental phasor for each phase: (x = three phases: A, B, and C); Three-phase average load current: ; Phase load deviation coefficient dx: ; dx>0: The load on this phase is too heavy, and the imbalance causes a negative metering error, which requires positive gain compensation; dx < 0: The load on this phase is too light, and the imbalance causes a positive metering error, which requires reverse gain compensation; dx=0: The load of this phase is equal to the average of the three phases, and no additional phase correction is required.

[0030] The three-phase dx is calculated independently, enabling independent adjustment of A / B / C gain. The phases under heavy load receive more compensation, while the phases under light load receive less compensation, avoiding overcompensation / undercompensation caused by uniform correction.

[0031] Step S3.3: Real-time calculation of phase gain correction increment; specifically: By combining the global adjustment intensity Kadj and the phase deviation coefficient dx, the single-phase gain correction amount is obtained: Kadj controls the global correction magnitude, while dx determines the direction and relative proportion of the phase correction. This is the correction increment that needs to be superimposed on the reference gain for this cycle; a positive number increases the channel gain, and a negative number decreases the channel gain.

[0032] Step S3.4: Hard limit the gain correction amount to prevent overshoot from damaging the metering chip; set the maximum gain correction threshold for a single cycle. ,right Amplitude limiting. Purpose: To limit the gain jump amplitude within a single 20ms cycle, and to avoid severe jitter and error jumps in the metering pulse caused by sudden gain changes during drastic load fluctuations.

[0033] Step S3.5: First-order low-pass smoothing filter to suppress high-frequency gain jitter; a single-pole first-order digital low-pass filter is used to smooth the limited ΔGx', and the output smoothing correction increment is output. ; ; These are the filter coefficients. This represents the current power frequency cycle; its function is to filter out frequent gain fluctuations caused by instantaneous load impacts and sampling noise, ensuring a continuous and smooth change in the gain curve.

[0034] Step S3.6: Real-time dynamic phase-splitting gain complete calculation; specifically: ; The standard reference gain (fixed metering gain under balanced operating conditions) of the three phases A / B / C is written into the Flash memory for factory calibration. This results in the independent dynamic adjustment gain of the three phases A / B / C for this cycle, with each phase gain being decoupled from the others. Step S3.7: Bottom-layer current phasor gain correction (signal layer correction); specifically: Multiply the real and imaginary parts of the fundamental current of each phase obtained from the original sampling by the dynamic gain of this phase. Complete the correction of the underlying sampling signal: The corrected three-phase current phasor is used as the input for power and energy integral calculation, and the sampling error drift caused by the unbalanced sequence component is offset from the signal source.

[0035] In step S3, real-time error correction is performed on the active and reactive energy metering pulses for each phase. Specifically, this is implemented as follows: Extract the raw electrical energy increment (pulse raw energy) of the hardware in a single cycle; using a single 20ms power frequency cycle as the calculation unit, read the energy increment corresponding to the current cycle output pulse of the metering chip, and label it as ΔWraw_x and ΔVarraw_x. ΔWraw_x represents the raw active power increment of phases A / B / C obtained by accumulating the hardware pulses in the current cycle, and ΔVarraw_x represents the raw reactive power increment of phases A / B / C obtained by accumulating the hardware pulses in the current cycle. This value includes the drift error caused by imbalance.

[0036] Calculate the imbalance error charge to be offset in this cycle; combine the power deviations ΔPx and ΔQx with the power frequency cycle duration to calculate the drift error charge of this phase in the current cycle, denoted as ΔWerr_x and ΔVarerr_x. ΔWerr_x is the active drift error charge of this phase, and ΔVarerr_x is the reactive drift error charge of this phase; the numerical sign indicates the direction of the deviation: a positive error charge indicates that the hardware metering is too high and needs to be deducted; a negative error charge indicates that the hardware metering is too low and needs to be added. Simultaneously, multiply ΔWerr_x and ΔVarerr_x by the graded compensation weight kcomp. For minor imbalances, a small weight is used to reduce the correction amplitude; for severe imbalances, a full weight is used to completely offset the deviation, avoiding overcompensation.

[0037] Calculate the corrected actual energy increment for the current cycle; subtract the unbalance error energy from the original pulse energy increment to obtain the compensated accurate energy increment, labeled ΔWcorr_x and ΔVarcorr_x. ΔWcorr_x is the corrected phase-specific active energy cycle increment, and ΔVarcorr_x is the corrected phase-specific reactive energy cycle increment. These values ​​have eliminated the metering drift caused by the three-phase unbalance sequence components.

[0038] The phase-specific energy registers accumulate data in layers to achieve pulse correction. The meter's MCU internally has two independent 64-bit fixed-point registers: one stores the original accumulated pulse data, used only for data traceability; the other is a dedicated compensated register for external settlement, identified as Wcorr_reg_x and Varcorr_reg_x. Meter reading, time-of-use freezing, and line loss statistics all read the values ​​from this register. In each power frequency cycle, the current cycle's corrected increments ΔWcorr_x and ΔVarcorr_x are added to Wcorr_reg_x and Varcorr_reg_x, continuously updating the settled electricity consumption. Hardware pulses continue to output normally without altering the metering chip's hardware path; only the total accumulated pulse amount is continuously and dynamically corrected via software.

[0039] Step S4: Lightweight Fixed-Point FFT Real-Time Analysis of All Harmonics; Using a single power frequency cycle of 20ms as the calculation period, perform fixed-point FFT spectrum decomposition on the three-phase sampled data, extract the amplitude and harmonic content of preset harmonics (2nd-21st), and calculate the total harmonic distortion (THD), completing the on-site statistics and recording of all-dimensional power quality harmonic data; The lightweight fixed-point FFT operation process in Step S4 includes: removing DC bias from the sampled data, converting to Q15 fixed-point format, reordering the bits in reverse order using a lookup table, performing layered butterfly fixed-point operation, extracting the spectrum of harmonics from the 2nd to the 21st, solving for the amplitude of each harmonic by taking the square root at fixed points, and calculating the harmonic content and total harmonic distortion (THD) sequentially. Specifically: The operation is performed cyclically, with one power frequency cycle (20ms) as the calculation cycle: Step S4.1: Synchronous ADC sampling: Synchronously acquire three-phase voltage and three-phase current, each with N=128 points of raw int16 sampling data.

[0040] Step S4.2: Preprocessing: Remove DC bias from each signal channel; Convert to Q15 fixed-point format and fill the FFT complex array (set the imaginary part to 0).

[0041] Step S4.3: Lightweight Fixed-Point FFT: Reverse order rearrangement (table lookup method); Layered butterfly fixed-point arithmetic outputs a 128-point complex spectrum.

[0042] Step S4.4: Extract the complex spectrum of the 2nd to 21st harmonics: Take out the real and imaginary parts of k=1 (fundamental wave) and k=2-21 (harmonic waves) in sequence.

[0043] Step S4.5: Calculate the harmonic amplitude successively: For h=1-21: Calculate the sum of squares, Sh; The amplitude Ah is obtained by taking the square root at a fixed point.

[0044] Step S4.6: Calculate the single harmonic content. Traverse h = 2 - 21 and calculate the content rate according to HRh = (Ah × 100) / A1.

[0045] Step S4.7: Calculate the total harmonic distortion (THD): Accumulate h = 2 - 21 sum of squared amplitudes; The equivalent amplitude of the total harmonic is obtained by taking the square root at a fixed point. The percentage of THD is calculated using fixed-point division.

[0046] Step S4.8: Data storage / reporting Write the following data to the local Flash / cache for the host computer to read: Amplitude and content of each harmonic from 2nd to 21st order; Basic phase THD, maximum / average three-phase THD; Timestamp and statistical identifier (daily / hourly statistics).

[0047] Step S5: Harmonic fingerprint comparison and source tracing and power supply responsibility division; The meter pre-stores typical harmonic fingerprint feature databases such as frequency conversion loads, photovoltaic inverters, industrial rectifier equipment, and power grid background harmonics. The real-time detected harmonic features are matched and compared with the fingerprint feature database to automatically determine whether the current harmonic pollution source belongs to the background harmonics on the power grid supply side or the harmonics generated by the nonlinear load on the user side. The harmonic source tracing results and responsibility attribution information are automatically generated and timestamped and frozen locally. The similarity comparison is specifically implemented as follows: 1. Database construction phase: Offline collection of typical load harmonic data, extraction of 2nd-21st harmonic content to construct standardized fingerprints, addition of tolerance, weight, and responsibility labels, and solidification to the meter flash memory; 2. Feature extraction: Based on the fixed-point FFT results above, real-time harmonic features are extracted, and moving average filtering is used to ensure stability; 3. Similarity comparison: Employs a two-level algorithm of coarse matching and weighted fine scoring, with fixed-point integer operations throughout, making it suitable for low-resource MCUs; 4. Source tracing and determination: Identify the source of harmonic interference (power grid / frequency converter / photovoltaic / rectifier) ​​based on the maximum similarity. 5. Division of Responsibilities: Combining the built-in responsibility identifier in the fingerprint and the national standard limit for THD, the system automatically distinguishes between grid-side, user-side, and mixed responsibilities, and completes local power quality traceability and responsibility definition.

[0048] The entire solution runs locally on the electricity meter, without the need to upload raw sampling data, enabling end-to-end harmonic analysis, source tracing, and responsibility determination at the edge.

[0049] Step S6: Dynamic low-power scheduling and proactive data reporting for edge computing; The embedded MCU for edge computing is configured with multiple levels of dynamic frequency switching: low-frequency sleep during normal monitoring, medium frequency during imbalance compensation operation, high frequency during harmonic FFT and fingerprint tracing operation, and frequency reduction immediately after operation; When three-phase imbalance exceeds the standard, harmonic THD exceeds the standard, or harmonic responsibility determination event is detected, the corresponding data is proactively reported to the main station system of the distribution area.

[0050] The specific implementation of dynamic switching of multi-level main frequency is as follows: The MCU uses dynamic switching of multiple main frequency levels: 1. Idle / Normal Monitoring State: Reduce frequency and put peripherals to sleep to lower static power consumption; 2. High-load operation mode (metering gain compensation, FFT harmonics, fingerprint tracing): Temporary frequency upsampling to ensure real-time operation and fixed-point calculation accuracy; 3. The frequency immediately drops back to low after the operation ends, and the frequency is dynamically switched throughout the process to balance the operation performance and power consumption.

[0051] Dynamic frequency modulation low-power execution process (steps): 1. Upon system power-up, it defaults to low-frequency and IDLE mode and initiates 20ms time base scheduling; 2. Wake up every 20ms via interrupt to perform basic sampling and calculation of effective voltage and current values; 3. Real-time detection of triggered events: (1) If >5%, switch to intermediate frequency and perform symmetrical component, dynamic gain compensation, and power pulse correction; after compensation is completed and hysteresis condition is met, switch back to low frequency; (2) If the harmonic timing time expires, switch to high frequency, perform fixed-point FFT, harmonic index calculation, fingerprint tracing, and responsibility determination; after all operations are completed, switch back to the original main frequency; 4. No high-load events, maintains low frequency and peripheral gating and IDLE sleep for extended periods; 5. During light nighttime loads, the system can enter deep sleep mode as needed and be woken up periodically for inspection.

[0052] Overall joint operation logic (full linkage of low power consumption, edge computing, and proactive reporting): 1. Normal state (over 90% of the time): MCU: Low frequency and IDLE sleep mode with most peripherals turned off; Tasks: Synchronous ADC sampling and basic RMS value calculation; Reporting: No events, waiting for periodic polling.

[0053] 2. If an imbalance > 5% is detected: the event is triggered, the main frequency is increased to the intermediate frequency; the following operations are performed: symmetric component decomposition, dynamic metering gain compensation, and power pulse correction; the imbalance exceeds the limit and the compensation is initiated; after the operation is completed, the hysteresis condition is judged: if the condition is not met, the operation is exited and the intermediate frequency is maintained; if the condition is met, the operation is switched back to the low frequency; the event is triggered to actively report the imbalance, gain coefficient, and correction amount.

[0054] 3. Harmonic timing task arrives: The main frequency is raised to high frequency; Execution: fixed-point FFT, 2nd-21st harmonic calculation, THD statistics, fingerprint comparison and tracing, and power supply and consumption responsibility division; If THD exceeds the standard / responsibility determination event occurs, the event and full harmonic data are immediately and proactively reported; The whole algorithm ends and the main frequency drops back to low frequency / medium frequency.

[0055] 4. All tasks are idle: The clocks of peripherals such as communication, display, and computing accelerator are turned off; the MCU returns to low-frequency IDLE mode, continuously reducing the average power consumption to meet the 2025B class limit.

[0056] like Figure 2 As shown, this invention also discloses a three-phase energy meter with adaptive compensation for three-phase imbalance and harmonic source tracing, including a hardware architecture: an ADC synchronous sampling circuit, a Class B high-precision main metering chip, an edge computing embedded MCU, a local Flash storage unit, and a transformer area master station communication and reporting module, wherein: The edge computing embedded MCU has built-in embedded algorithm programs, which include: a three-phase unbalanced sequence component separation adaptive compensation algorithm module, a lightweight fixed-point FFT full harmonic analysis algorithm module, a harmonic fingerprint feature comparison and tracing algorithm module, and an MCU dynamic frequency modulation low power control module. The local Flash storage unit stores a typical load harmonic fingerprint database, which is used to store the original sampling data, measurement correction parameters, imbalance data, 2nd to 21st harmonic indices, harmonic source tracing responsibility determination events and corresponding timestamps; The communication reporting module is used to proactively report events such as imbalance exceeding the standard, harmonic exceeding the standard, and harmonic responsibility determination to the main station system of the distribution area.

[0057] It is worth mentioning that the technical features of the 2025 version B-class three-phase prepaid smart energy meter involved in this patent application should be regarded as prior art. The specific structure, working principle and possible control methods and spatial arrangement of these technical features can be adopted using conventional choices in the field, and should not be regarded as the inventive point of this patent. This patent will not be further elaborated in detail.

[0058] For those skilled in the art, modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the protection scope of this invention.

Claims

1. A method for three-phase unbalance adaptive compensation and harmonic tracing metrology, characterized in that, Includes the following steps: Step S1: High-precision synchronous sampling of three-phase voltage and current; The three-phase energy meter adopts a built-in ADC synchronous sampling circuit to synchronously collect instantaneous data of the three-phase voltage and three-phase current of A, B and C at the same moment and cache them to the local storage unit of the meter. Step S2: Symmetrical component decomposition, real-time calculation of three-phase unbalance and compensation trigger determination; perform transformation on the sampled data to extract the fundamental phasor, and decompose the positive sequence, negative sequence and zero sequence current components by symmetric component method to calculate the three-phase current unbalance. Set a compensation activation threshold, add no-load protection and continuous cycle anti-shake logic to determine whether to activate metering adaptive compensation; and classify the imbalance into three levels: mild, moderate and severe, and match the corresponding compensation weights according to the magnitude of the imbalance. Step S3: Dynamic adaptive compensation and correction of three-phase metering gain; When the imbalance exceeds the compensation start threshold, the independent metering gain calibration coefficients of each phase A, B, and C are dynamically adjusted in real time according to the proportion of negative sequence and zero sequence components, and the active and reactive energy metering pulses of each phase are corrected in real time to offset the metering drift error caused by the three-phase imbalance. Step S4: Lightweight fixed-point FFT real-time analysis of all harmonics; Using a single power frequency cycle as the operation cycle, perform fixed-point FFT spectrum decomposition on the three-phase sampled data, extract the preset harmonic amplitude and harmonic content, and calculate the total harmonic distortion rate (THD) to complete the on-site statistics and recording of all-dimensional power quality harmonic data. Step S5: Harmonic fingerprint comparison and source tracing and power supply responsibility division; The meter pre-stores a typical harmonic fingerprint feature library locally, and compares the real-time detected harmonic features with the fingerprint feature library for similarity matching, automatically determining whether the current harmonic pollution source belongs to the background harmonics on the power grid supply side or the harmonics generated by the nonlinear load on the user side, automatically generating harmonic source tracing results and responsibility attribution information, and adding a timestamp to freeze and store locally; Step S6: Dynamic low-power scheduling and proactive data reporting for edge computing; The edge computing embedded MCU is configured with multiple levels of dynamic frequency switching: low frequency sleep during normal monitoring, medium frequency during imbalance compensation operation, high frequency during harmonic FFT and fingerprint tracing operation, and frequency reduction immediately after operation; when three-phase imbalance exceeds the standard, harmonic THD exceeds the standard, or harmonic responsibility determination event is detected, the corresponding data is actively reported to the main station system of the distribution area.

2. The method of claim 1, wherein, In step S2, the calculation of the three-phase current imbalance is specifically implemented as follows: Step S2.1: Synchronous sampling: The ADC synchronous sampling circuit collects the instantaneous values ​​of the three-phase currents A, B, and C at the same moment, and collects complete power frequency cycle data; Step S2.2: Fundamental wave extraction: Perform SDFT discrete Fourier transform on the three-phase sampling sequence to filter out harmonics and obtain the real and imaginary parts of the fundamental wave current phasor for each phase; Step S2.3: Symmetrical component decomposition: Substitute into the formula of the realized symmetric component method to calculate the real and imaginary parts of the zero-sequence, positive-sequence, and negative-sequence current phasors; Step S2.4: Solving for the sequence current amplitude: By taking the square root of the sum of the squares of the real and imaginary parts, the effective values ​​of I0, I1, and I2 corresponding to the zero-sequence, positive-sequence, and negative-sequence currents are obtained; Step S2.5: Current unbalance calculation: the percentage of the ratio of the effective value of the negative sequence current to the effective value of the positive sequence current; Step S2.6: Cyclic refresh: Calculate the unbalance and three-sequence current in real time for each power frequency cycle.

3. The three-phase imbalance adaptive compensation and harmonic source tracing measurement method according to claim 2, characterized in that, In step S2, the compensation trigger determination sets an imbalance compensation start threshold. When the real-time detected three-phase imbalance exceeds the set threshold, the metering adaptive compensation process is automatically triggered; when the imbalance is below the threshold, the conventional Class B metering mode is maintained. Specifically, the implementation is as follows: Real-time calculation of imbalance, addition of no-load protection; if the effective value of positive sequence current is less than the preset value, no-load is determined and compensation is not activated. The threshold comparison logic refreshes the flag bit once per power frequency cycle, and compensation is locked only if the threshold is exceeded for a consecutive preset cycle. The compensation is tiered, and the compensation weight is adjusted according to the degree of imbalance. Specifically: when the degree of imbalance is in the first range, it is determined to be a slight imbalance and a first compensation coefficient is set; when the degree of imbalance is in the second range, it is determined to be a moderate imbalance and a second compensation coefficient is set; when the degree of imbalance is in the third range, it is determined to be a severe imbalance and a third compensation coefficient is set.

4. The three-phase unbalance adaptive compensation and harmonic source tracing measurement method according to claim 3, characterized in that, Step S3, which involves dynamically and in real-time adjusting the independent metering gain calibration coefficients of phases A, B, and C, specifically includes the following steps: Step S3.1: Calculate the global imbalance percentage Runb; and perform global adjustment intensity coefficient Kadj mapping using piecewise linear mapping to limit the upper limit of Kadj and prevent overcompensation of gain. Step S3.2: Calculate the load deviation coefficient dx for each phase of A / B / C. Calculate the effective value of the single-phase equivalent fundamental current and the three-phase average load current in sequence to obtain the phase-specific load deviation coefficient dx. Step S3.3: Real-time calculation of phase gain correction increment; Step S3.4: Hard limit the gain correction amount to prevent overshoot from damaging the metering chip; Step S3.5: First-order low-pass smoothing filter to suppress high-frequency gain jitter; Step S3.6: Complete calculation of real-time dynamic phase split gain; Step S3.7: Bottom current phasor gain correction.

5. The three-phase unbalance adaptive compensation and harmonic source tracing measurement method according to claim 4, characterized in that, In step S3, real-time error correction is performed on the active and reactive energy metering pulses for each phase. Specifically, this is implemented as follows: Extract the incremental raw electrical energy of the hardware in a single cycle; Calculate the amount of unbalanced error to be offset in this cycle; Calculate the actual increase in electrical energy for this cycle after correction; The phase-separated energy register accumulates in layers to achieve pulse correction.

6. The three-phase imbalance adaptive compensation and harmonic source tracing measurement method according to claim 5, characterized in that, The lightweight fixed-point FFT operation process in step S4 includes: removing DC bias from the sampled data, converting it to a fixed-point format, reordering the bits in reverse order using a lookup table, performing layered butterfly fixed-point operations, extracting the harmonic spectrum in sequence, solving for the amplitude of each harmonic by taking the square root at the fixed point, and calculating the harmonic content rate and total harmonic distortion rate one by one.

7. A three-phase energy meter with adaptive compensation for three-phase imbalance and harmonic source tracing, used to execute the metering method according to any one of claims 1-6, characterized in that, The hardware architecture includes: ADC synchronous sampling circuit, main metering chip, edge computing embedded MCU, local Flash storage unit, and transformer area master station communication and reporting module, among which: The edge computing embedded MCU has built-in embedded algorithm programs, which include: a three-phase unbalanced sequence component separation adaptive compensation algorithm module, a lightweight fixed-point FFT full harmonic analysis algorithm module, a harmonic fingerprint feature comparison and tracing algorithm module, and an MCU dynamic frequency modulation low power control module. The local Flash storage unit stores a typical load harmonic fingerprint database, which is used to store the original sampling data, metering correction parameters, imbalance data, harmonic indices, harmonic source tracing responsibility determination events and corresponding timestamps. The communication reporting module is used to proactively report events such as imbalance exceeding the standard, harmonic exceeding the standard, and harmonic responsibility determination to the main station system of the distribution area.

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