Integrated intelligent automobile virtual bench test harness adapter system

Abstract

This application provides an integrated intelligent automotive virtual bench test wiring harness adapter system, belonging to the technical field of automotive virtual calibration testing. It addresses the problems of low adaptation efficiency, insufficient intelligence, limited signal accuracy, and weak safety protection in related technologies. The system includes an intelligent adapter box body, integrated wiring harness components, modular interface components, an intelligent control module, a safety protection module, and a new energy vehicle adaptation module. It achieves rapid interface replacement through magnetic quick-release and near-field communication automatic identification, automatic fault diagnosis through a double-layer stacked long short-term memory neural network, automatic fault signal injection through a matrix relay array, and integrates full-link electrical protection and high-voltage interlocking protection. This application reduces test preparation time, improves fault diagnosis efficiency, and enhances system reliability.

Description

Technical Field

[0001] This application relates to the field of virtual calibration testing for automobiles, and more particularly to an integrated intelligent automotive virtual bench test wiring harness adapter system. Background Technology

[0002] As the automotive industry rapidly moves towards electrification and intelligentization, the government has introduced stricter emission regulations and energy consumption standards, prompting OEMs to conduct extensive virtual bench testing in the early stages of R&D to reduce the cost of real bench testing and shorten development cycles. Meanwhile, the widespread adoption of new energy vehicles has made the three-electric system (battery, motor, and electronic control system) a core testing area, with signal types encompassing multiple protocols such as CAN, CAN FD, Ethernet, and LIN, placing higher demands on the compatibility, transmission speed, and intelligence level of testing equipment.

[0003] In existing technologies, automotive virtual bench testing primarily relies on independent wiring harness devices and signal adapter boxes to achieve signal connections between the electronic control unit (ECU) and the HIL cabinet. Some solutions provide a basic signal adapter box structure to achieve the physical connection between the HIL cabinet and the ECU; some solutions provide wiring harness devices, including the wiring harness backbone and wiring harness nodes, to achieve signal transmission in the test link; some solutions apply relay arrays to the wiring harness connection management of the HIL virtual simulation system; in addition, some solutions also involve vehicle cable fault diagnosis, high-voltage interlock circuit design, and magnetic vehicle adapter cable structures.

[0004] However, the aforementioned existing technologies still have the following shortcomings: In terms of protocol compatibility, traditional devices only support CAN bus and basic analog digital signals, which cannot adapt to the high-speed multi-protocol signal transmission requirements of new energy vehicles such as Ethernet and LIN bus; in terms of interface adaptation efficiency, the interface models of different electronic control units vary greatly, and the existing replaceable interfaces are mostly snap-on or screw-fixed, which are time-consuming to disassemble and lack automatic identification functions, requiring manual matching of signal definitions, which is prone to configuration errors; in terms of signal quality and anti-interference capabilities, there is a lack of professional signal filtering and shielding design, which makes them susceptible to electromagnetic interference in multi-signal parallel transmission scenarios, resulting in signal attenuation and data distortion; in terms of intelligence, fault simulation relies on manual operation, there is no automatic diagnosis and prediction function, test data needs to be exported and analyzed locally, and cloud sharing and remote monitoring cannot be achieved; in terms of safety protection and environmental adaptability, there is only basic overcurrent and reverse connection protection, lacking surge protection, active heat dissipation and dustproof and waterproof design, resulting in insufficient reliability in complex testing environments; in terms of new energy adaptation, there is no optimization for the high voltage and high current characteristics of the three-electric system, which cannot meet the requirements of high voltage signal acquisition and power drive signal transmission. To address the aforementioned industry pain points, existing technologies have not yet proposed a complete solution that organically integrates multi-protocol compatibility, new energy adaptation, AI intelligent diagnosis, and proactive safety protection. Summary of the Invention

[0005] This application provides an integrated intelligent vehicle virtual bench test wiring harness adapter system, which can solve the technical problems of low adaptation efficiency, insufficient intelligence, limited signal accuracy and weak safety protection in the prior art by integrating functional modules such as signal acquisition, AI diagnosis, automatic fault injection, automatic interface identification, safety protection and new energy adaptation.

[0006] In one aspect, this application provides an integrated intelligent vehicle virtual bench test wiring harness adapter system. The integrated intelligent vehicle virtual bench test wiring harness adapter system includes an intelligent adapter box body, an integrated wiring harness assembly, an intelligent control module, a modular interface assembly, and a safety protection module; the intelligent adapter box body is an integrated sealed box structure; the integrated wiring harness assembly is disposed within the intelligent adapter box body and includes a wiring harness backbone, wiring harness nodes, and several functional wiring harness branches, the wiring harness backbone adopting a double-layer shielding structure; the intelligent control module is disposed within the intelligent adapter box body and includes a signal acquisition unit, an artificial intelligence diagnostic module, and an automatic fault simulation unit; the artificial intelligence diagnostic module has a built-in neural network fault identification algorithm; the signal acquisition unit acquires test signals... The system transmits multi-protocol signals in the link to the AI ​​diagnostic module; the AI ​​diagnostic module generates fault identification results based on the multi-protocol signals; the automatic fault simulation unit injects corresponding fault signals into the test link through a relay array based on the fault identification results; the modular interface component is detachably installed on the intelligent adapter box body through a quick-release structure, including a replaceable interface module, which has a built-in identification chip; the intelligent control module configures the acquisition parameters of the signal acquisition unit based on the reading results of the identification chip; the safety protection module is electrically connected to the integrated wiring harness assembly and the intelligent control module respectively.

[0007] By adopting the above technical solution, the intelligent adapter box body, double-shielded wire harness assembly, intelligent control module with AI diagnostic and fault injection functions, quick-release identification interface assembly, and safety protection module are integrated into a unified test adapter system. A complete collaborative link of "signal acquisition—AI diagnostics—fault injection—parameter adaptive configuration" is formed between the modules. After the signal acquisition unit acquires multi-protocol signals, the AI ​​diagnostic module performs fault identification. The automatic fault simulation unit automatically injects the corresponding fault signal based on the identification results. Simultaneously, the reading results from the interface identification chip are used to adaptively configure the acquisition parameters, realizing fully automated testing from signal access, transmission, processing to fault simulation. This solves the problems of low adaptation efficiency and insufficient intelligence in existing technologies. The double-shielded wire harness structure reduces electromagnetic interference during parallel transmission of multiple signals, improving signal transmission quality. The safety protection module provides full-link circuit protection, improving the system's reliability in complex testing environments.

[0008] Furthermore, the quick-release structure is a magnetic quick-release structure, including a permanent magnet array and a mechanical anti-detachment buckle; the identification chip is a near-field communication chip, and the intelligent adapter box body is equipped with a near-field communication card reader that matches the near-field communication chip; after the replaceable interface module is connected, the near-field communication card reader reads the interface encoding information and signal definition mapping table stored in the near-field communication chip; the intelligent control module retrieves the signal configuration parameters corresponding to the replaceable interface module according to the interface encoding information; the signal configuration parameters include the protocol type parameters and impedance matching parameters of each signal channel; the intelligent control module configures the terminal matching resistor of the corresponding signal link according to the impedance matching parameters.

[0009] By adopting the above technical solution, the combination of magnetic quick-release structure and mechanical anti-detachment buckle realizes rapid physical replacement and reliable locking of interface modules; the near-field communication chip stores interface encoding information and signal definition mapping table. After the interface module is connected, the card reader automatically reads this information, and the intelligent control module automatically retrieves the corresponding signal configuration parameters and configures the terminal matching resistor accordingly. This realizes plug-and-play recognition of signal definitions and automatic adaptation of electrical parameters after interface replacement, eliminating the need for manual configuration, greatly shortening test preparation time, and avoiding signal anomalies caused by manual configuration errors.

[0010] Furthermore, the intelligent control module also includes a multi-core microcontroller; the first core of the multi-core microcontroller performs signal acquisition and preprocessing; the second core of the multi-core microcontroller runs the neural network fault identification algorithm of the artificial intelligence diagnostic module; the third core of the multi-core microcontroller performs interface identification and wireless communication management; data transmission between the cores is achieved through shared memory; the signal acquisition unit acquires signals at a sampling rate of not less than 1kHz, with a sampling error within ±0.5%; the signal acquisition unit supports CAN protocol signal acquisition, CAN FD protocol signal acquisition, Ethernet protocol signal acquisition, and LIN protocol signal acquisition; the multi-protocol signals acquired by the signal acquisition unit are preprocessed by the multi-core microcontroller and then constructed into a multi-dimensional time-series signal matrix.

[0011] By adopting the above technical solution, each core of the multi-core microcontroller performs signal acquisition and preprocessing, AI fault identification, interface identification and communication management respectively. Each core achieves zero-copy data transfer through shared memory, realizing multi-task parallel processing and reducing the latency of data transfer between functional modules. The sampling rate of no less than 1kHz and the sampling error of ±0.5% ensure the real-time performance and accuracy of signal acquisition, support the signal acquisition of multiple vehicle communication protocols, and enable the system to meet the diverse needs of traditional fuel vehicle ECU testing and new energy vehicle three-electric system testing.

[0012] Furthermore, the double-layer shielding structure includes an inner aluminum foil shielding layer and an outer braided mesh shielding layer; the main harness is covered with a flame-retardant and heat-resistant protective sleeve; the functional harness branches are connected to the harness nodes via gold-plated terminals; a signal distributor is provided inside the harness node; the signal distributor distributes the multi-protocol signals transmitted by the main harness to the corresponding functional harness branches according to frequency range; the shielding layer of each functional harness branch and the shielding layer of the main harness maintain electrical continuity at the harness node.

[0013] By adopting the above technical solution, the inner aluminum foil shielding layer and the outer braided mesh shielding layer form a double-layer shielding structure. The aluminum foil shielding layer has excellent reflection and absorption effects on high-frequency electromagnetic interference, while the braided mesh shielding layer provides a low-impedance discharge path for low-frequency magnetic field interference. The two complement each other to effectively suppress wide-band electromagnetic interference. The signal distributor distributes multi-protocol signals to the corresponding functional harness branches according to the frequency range. The shielding layers of each branch and the main shielding layer maintain electrical continuity at the nodes, avoiding electromagnetic leakage and external interference coupling caused by shielding layer interruption, and further improving the integrity of signal transmission.

[0014] Furthermore, the neural network of the artificial intelligence diagnostic module is a double-layer stacked long short-term memory neural network; the input layer of the double-layer stacked long short-term memory neural network receives the multi-dimensional time-series signal matrix constructed by the signal acquisition unit; the hidden layer of the double-layer stacked long short-term memory neural network extracts time-series features from the multi-dimensional time-series signal matrix; the output layer of the double-layer stacked long short-term memory neural network outputs fault category codes, fault confidence values, and fault location codes; the relay array of the automatic fault simulation unit is an M-row N-column matrix relay array, where M and N are both integers greater than 1; the matrix relay array supports series injection mode, parallel injection mode, and matrix injection mode; the automatic fault simulation unit injects single fault signals or multiple fault superimposed signals into the test link through the matrix relay array; when multiple faults are superimposed, the automatic fault simulation unit performs fault injection according to the priority order of high-voltage faults taking precedence over communication faults, and communication faults taking precedence over analog signal faults.

[0015] By adopting the above technical solution, the dual-layer stacked long short-term memory neural network extracts the temporal features of the multi-dimensional time-series signal matrix, which can effectively capture fault features such as amplitude fluctuations, frequency anomalies, and transmission delays in the time dimension of the signal, and output fault category, confidence level, and location code, realizing automatic identification of various fault modes such as open circuit, short circuit, attenuation, and interference. The matrix relay array supports three injection modes: series, parallel, and matrix, and can select the optimal electrical connection method according to different fault types. The single fault or multiple fault superposition injection capability enables the system to simulate combined fault scenarios under complex working conditions. When multiple faults are superimposed, the injection is performed in the priority order of high voltage faults over communication faults, and communication faults over analog signal faults, ensuring that high voltage safety-related faults can be responded to and handled first.

[0016] Furthermore, the multidimensional time-series signal matrix is ​​a k-row, n-column matrix, where k represents the number of signal channels and n represents the number of historical sampling points for each signal channel. The dual-layer stacked long short-term memory neural network analyzes the multidimensional time-series signal matrix through a sliding window. The window length of the sliding window is w sampling points, and the step size is s sampling points, where w and s are both positive integers and s is less than w. The dual-layer stacked long short-term memory neural network identifies fault modes, including open-circuit fault mode, short-circuit fault mode, signal attenuation fault mode, and signal interference fault mode, through sliding window analysis. The number of hidden layer units in the dual-layer stacked long short-term memory neural network is 256. The output of the hidden layer is connected to a fully connected layer, and the fully connected layer outputs the fault category code, the fault confidence value, and the fault location code.

[0017] By adopting the above technical solution, sliding window analysis extracts time-series signal segments with a window length of w sampling points and slides the window with a step size of s sampling points to achieve continuous block processing of the multi-dimensional time-series signal matrix. This enables the neural network to capture the local time-series features of the signal within the sliding time window, thereby effectively identifying different fault modes such as open circuit, short circuit, attenuation, and interference. The hidden layer has 256 units, and the output of the hidden layer is mapped by the fully connected layer to output the fault category code, confidence value, and location code, realizing a complete inference link from the original signal matrix to the structured fault diagnosis result.

[0018] Furthermore, the safety protection module includes an overcurrent protection unit, a reverse connection protection unit, an electrostatic discharge protection unit, a surge protection unit, a short circuit protection unit, a high-voltage interlock circuit, and an insulation monitoring unit. The overcurrent protection threshold of the overcurrent protection unit is adjustable from 5A to 30A. The electrostatic discharge protection level of the electrostatic discharge protection unit is no less than ±8kV for contact discharge and no less than ±15kV for air discharge. The surge protection level of the surge protection unit is no less than ±2kV. The short circuit response time of the short circuit protection unit is no greater than 1ms. The high-voltage interlock circuit adopts a low-level loop detection topology and includes a high-voltage interlock signal source, a current-limiting resistor, a detection loop, and an isolation unit. The insulation resistance monitoring threshold of the insulation monitoring unit is no less than 1MΩ. When the high-voltage connector is not locked or the loop resistance is greater than the preset resistance threshold, the isolation unit outputs an interrupt signal, and the high-voltage interlock circuit cuts off the high-voltage path according to the interrupt signal. The response time of the high-voltage interlock circuit from detecting abnormal loop resistance to cutting off the high-voltage path is no greater than 10ms.

[0019] By adopting the above technical solutions, overcurrent, reverse connection, electrostatic discharge, surge, and short circuit protection units constitute a basic electrical safety protection layer, covering various common electrical anomalies that may occur during testing. The high-voltage interlock circuit adopts a low-level loop detection topology. When the high-voltage connector is not locked or the loop resistance is abnormal, the isolation unit outputs an interrupt signal and quickly cuts off the high-voltage path. The insulation monitoring unit monitors the insulation resistance in real time. Together, they constitute a dedicated safety protection for high-voltage testing scenarios of new energy vehicles. The basic protection layer and the high-voltage protection layer work together to achieve full-link safety protection from low-voltage signals to high-voltage power supplies, ensuring the safety of testing equipment and operators.

[0020] Furthermore, the intelligent adapter box also includes a new energy adaptation module; the new energy adaptation module includes a high-voltage signal processing unit and a dedicated connector for the battery management system; the high-voltage signal processing unit is electrically connected to the high-voltage interlock circuit and the insulation monitoring unit; the dedicated connector for the battery management system is electrically connected to the high-voltage signal processing unit; the high-voltage signal processing unit supports the acquisition and isolated transmission of high-voltage signals of not less than 200V; the high-voltage signal processing unit converts the acquired high-voltage signal into a low-voltage safety signal of 0V to 5V through voltage and current sensors and then transmits it to the signal acquisition unit; the dedicated connector for the battery management system conforms to the ISO 15118 standard and supports bidirectional transmission of battery status monitoring signals and bidirectional transmission of charging control signals; the signal acquisition unit uses the low-voltage safety signal and the multi-protocol signal to jointly construct the multi-dimensional timing signal matrix.

[0021] By adopting the above technical solutions, the new energy adaptation module enables the system to be compatible with the testing scenarios of the three-electric system of new energy vehicles; the high-voltage signal processing unit supports the acquisition of high-voltage signals of no less than 200V, and converts the high-voltage signals into low-voltage safety signals of 0V to 5V through voltage and current sensors before transmitting them to the signal acquisition unit, realizing the safe isolation and low-voltage processing of high-voltage signals, and enabling high-voltage test data to be seamlessly integrated into the unified signal acquisition and AI diagnostic link of the system; the dedicated connector for the battery management system conforms to the ISO 15118 standard, supports bidirectional transmission of battery status monitoring and charging control signals, and enables the system to be adapted to the standard test interface of the battery management system of new energy vehicles.

[0022] Furthermore, the intelligent control module also includes a wireless communication unit and a data storage and cloud synchronization unit; the data storage and cloud synchronization unit has a built-in high-speed flash memory with a storage capacity of not less than 64GB; the wireless communication unit supports wireless LAN communication, cellular communication, and low-power wide-area network communication; the data storage and cloud synchronization unit synchronizes test data to the cloud server through the wireless communication unit; before sending the test data to the cloud server, the data storage and cloud synchronization unit encrypts the test data using an encryption algorithm; the cloud server stores a fault feature dataset; when the accumulated fault feature data on the cloud server exceeds a preset threshold, the cloud server triggers the retraining of the neural network in the artificial intelligence diagnostic module and sends the retrained and updated model parameters to the intelligent control module through the wireless communication unit.

[0023] By adopting the above technical solutions, the wireless communication unit supports wireless LAN, cellular communication, and low-power wide-area network communication, covering the communication needs of both indoor laboratory scenarios and remote outdoor scenarios; the data storage and cloud synchronization unit encrypts the test data and synchronizes it to the cloud server, realizing remote data backup and multi-terminal collaborative viewing; the cloud server stores the fault feature dataset, and when the accumulated data exceeds the threshold, it automatically triggers the retraining of the neural network and sends the updated model parameters to the local device, realizing the continuous online evolution of the AI ​​diagnostic model, so that the system's fault identification capability can be continuously improved with the accumulation of test data.

[0024] Furthermore, the intelligent adapter box body is also equipped with a virtual rack connection port and a signal conversion panel; the signal conversion panel is arranged with categorized banana sockets; the banana sockets include analog signal sockets, digital signal sockets, pulse signal sockets, power drive signal sockets, CAN communication signal sockets, Ethernet signal sockets, LIN signal sockets, and high-voltage signal sockets; the analog signal sockets are marked in blue; the digital signal sockets are marked in green; the pulse signal sockets are marked in yellow; the power drive signal sockets are marked in orange; the CAN communication signal sockets are marked in red; the Ethernet signal sockets are marked in purple; the LIN signal sockets are marked in gray; and the high-voltage signal sockets are marked in black and have a high-voltage warning mark; the banana sockets of different signal types are distinguished by color markings or shape markings, or by a combination of color and shape markings; the banana sockets are equipped with anti-misinsertion protrusions.

[0025] By adopting the above technical solution, various types of banana plugs are arranged on the signal adapter panel. Each type of plug is distinguished by a combination of color markings (blue, green, yellow, orange, red, purple, gray, and black) and shape markings, enabling rapid visual identification of the signal type. High-voltage signal plugs are marked in black and have high-voltage warning signs to remind operators to pay attention to high-voltage safety. The anti-misinsertion protrusion structure prevents different types of signal plugs from being mistakenly inserted into the wrong plugs, avoiding equipment damage or abnormal test data caused by wiring errors.

[0026] In summary, this application has at least the following beneficial effects:

[0027] An integrated intelligent vehicle virtual bench test wiring harness adapter system is provided. Through the collaborative efforts of multiple modules including signal acquisition, AI diagnosis, fault injection, automatic interface identification and safety protection, it achieves shorter test preparation time, improved fault diagnosis efficiency and enhanced system reliability.

[0028] The magnetic quick-release and near-field communication automatic identification interface solution enables interface replacement and automatic configuration of signal parameters within 30 seconds, which greatly shortens the test preparation time and avoids manual configuration errors.

[0029] The scheme of linking a double-layer stacked long short-term memory neural network with a matrix relay array realizes automatic fault identification and automatic injection closed loop, supports single fault and multi-fault superposition injection, and enables unattended automated operation of fault simulation test.

[0030] The full-link security protection and new energy high-voltage adaptation solution achieves multi-level security protection from low-voltage signals to high-voltage power supplies, enabling the system to be safely adapted to the test scenarios of the three-electric system of new energy vehicles.

[0031] It should be understood that the description in the Summary Section is not intended to limit the key or essential features of the embodiments of this application, nor is it intended to restrict the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0032] The above and other features, advantages, and aspects of the embodiments of this application will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein:

[0033] Figure 1 The diagram shows the overall module architecture of an integrated intelligent vehicle virtual bench test harness adapter system according to an embodiment of this application.

[0034] Figure 2 This paper illustrates a schematic diagram of the integrated wiring harness assembly structure of an integrated intelligent vehicle virtual bench test wiring harness adapter system according to an embodiment of this application.

[0035] Figure 3 A schematic diagram of the modular interface component structure of an integrated intelligent vehicle virtual bench test harness adapter system according to an embodiment of this application is shown.

[0036] Figure 4 This paper illustrates the architecture of an intelligent control module for an integrated intelligent vehicle virtual bench test harness adapter system, as shown in an embodiment of this application.

[0037] Figure 5 This paper illustrates the safety protection module architecture of an integrated intelligent vehicle virtual bench test harness adapter system according to an embodiment of this application.

[0038] Figure 6 This paper illustrates the architecture of a new energy vehicle adaptation module for an integrated intelligent vehicle virtual bench test harness adapter system, as shown in an embodiment of this application.

[0039] Figure 7 A schematic diagram of the signal transfer panel layout of an integrated intelligent vehicle virtual bench test harness conversion system according to an embodiment of this application is shown.

[0040] Figure 8 The diagram illustrates the signal processing and fault injection control flowchart of an integrated intelligent vehicle virtual bench test harness adapter system according to an embodiment of this application.

[0041] Figure 9The diagram illustrates the high-voltage interlocking and insulation monitoring logic flow of an integrated intelligent vehicle virtual bench test harness conversion system according to an embodiment of this application.

[0042] Figure 10 The diagram shows the working state of the magnetic quick-release structure of an integrated intelligent vehicle virtual bench test harness adapter system according to an embodiment of this application. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0044] Furthermore, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0045] This application provides an integrated intelligent vehicle virtual bench test wiring harness adapter system, which constructs a closed-loop test link from signal acquisition to fault injection through multi-module collaboration. Combined with magnetic quick-release and near-field communication automatic identification interface scheme, it achieves shortened test preparation time and improved fault diagnosis efficiency.

[0046] Reference Figure 1-10 This application provides an integrated intelligent vehicle virtual bench test wiring harness adapter system.

[0047] The intelligent adapter box features an integrated, sealed box structure. This structure is made of a composite material of ABS flame-retardant material and an aluminum alloy frame. The box body and cover are hinged with magnetic hinges and equipped with an electronic lock for double protection. The electronic lock supports both password unlocking and near-field communication unlocking. A touchscreen display is embedded on the front of the box to show system operating status, signal channel configuration, and fault diagnosis results. It also supports touch operation for parameter setting and function switching. The sides of the box have ventilation grilles, and an internal cooling fan is fixedly installed, forming an active cooling airflow. The fan's start and stop are automatically controlled by an intelligent control module based on internal temperature monitoring. The intelligent adapter box also features a virtual rack connection port, including a low-current connector, a high-current connector, an Ethernet interface, and a power interface. The power interface supports a wide voltage input from 12V to 24V. The intelligent adapter box also includes a signal conversion panel with categorized banana-shaped sockets. The panel banana socket includes analog signal sockets, digital signal sockets, pulse signal sockets, power drive signal sockets, CAN communication signal sockets, Ethernet signal sockets, LIN signal sockets, and high-voltage signal sockets. Analog signal sockets are marked in blue, digital signal sockets in green, pulse signal sockets in yellow, power drive signal sockets in orange, CAN communication signal sockets in red, Ethernet signal sockets in purple, LIN signal sockets in gray, and high-voltage signal sockets in black with a high-voltage warning mark. Different signal types of panel banana sockets are distinguished by color or shape markings, or by a combination of both. The panel banana sockets have anti-misinsertion protrusions. All types of sockets use a 4mm standard plug with a contact resistance of no more than 10mΩ to ensure reliable and consistent signal transmission. Each type of socket on the signal adapter panel is electrically connected to the corresponding signal acquisition channel and test link via a printed circuit board inside the housing. The IP54 dust and water resistance rating of the intelligent adapter box is ensured by the sealing strip between the box body and the cover, as well as the sealing structure at each interface, enabling the system to operate reliably in bench testing environments containing dust or liquid splashes. The intelligent adapter box contains a fixed intelligent control module, a safety protection module, and a new energy adaptation module. These modules are electrically interconnected via a PCB substrate and standardized cables inside the box. The main trunk of the integrated wiring harness assembly extends from inside the box and connects to the corresponding interfaces of each module.

[0048] The integrated wire harness assembly is housed within the intelligent adapter box and includes the wire harness backbone, wire harness nodes, and several functional wire harness branches. The wire harness backbone employs a double-layer shielding structure, comprising an inner aluminum foil shielding layer and an outer braided mesh shielding layer. The inner aluminum foil shielding layer reflects and absorbs high-frequency electromagnetic interference, while the outer braided mesh shielding layer provides a low-impedance discharge path for low-frequency magnetic field interference. Together, they form a wide-band electromagnetic interference suppression barrier. The wire harness backbone is covered with a flame-retardant and temperature-resistant protective sleeve made of PVC material, with a temperature resistance range of -40℃ to 125℃, ensuring the thermal stability and flame-retardant safety of the wire harness backbone in bench testing environments. The shielding effectiveness of the wire harness backbone is quantitatively characterized by its transfer impedance. The lower the transfer impedance value, the stronger the shielding layer's ability to suppress interference from external electromagnetic fields coupled to the core wire. For the double-layer shielding structure, its transfer impedance per unit length is... This can be expressed as the transfer impedance of the inner aluminum foil shielding layer. Impedance transfer with outer braided mesh shielding layer Parallel equivalent:

[0049]

[0050] in, The transfer impedance per unit length of the inner aluminum foil shielding layer is physically represented as the ratio of the induced voltage per unit length of the inner shielding layer to the surface current of the shielding layer, with units of [unit missing]. This value is determined by the thickness and conductivity of the aluminum foil. The lower the value, the better the inner shielding effect on suppressing high-frequency interference. The transfer impedance per unit length of the outer braided mesh shielding layer is physically represented as the ratio of the induced voltage per unit length of the outer shielding layer to the surface current of the shielding layer, with units of [unit missing]. This value is determined by the braiding density, number of strands, and wire diameter of the braided mesh. The lower the value, the better the outer shielding effect on suppressing low-frequency interference. The transfer impedance per unit length of the double-layer shielded structure is given by [value]. Its physical meaning is a measure of the ability of a double-layer shield, as a whole, to suppress the coupling of external electromagnetic fields to the internal core wire per unit length. Transfer impedance The lower the value, the stronger the shielding layer's ability to suppress external interference signals, and the higher the signal integrity during transmission. The double-layer shielding structure, through the parallel connection of the inner aluminum foil shielding layer and the outer braided mesh shielding layer, enhances the overall impedance transfer. The transfer impedance is lower than that of any single-layer shielding, thus achieving electromagnetic interference suppression superior to single-layer shielding over a wide frequency range. The main harness integrates multiple signal cores, grouped according to signal type, with twisted pairs between cores within the same group to further suppress common-mode interference. Functional harness branches include ECU connection branches, CAN bus branches, Ethernet branches, LIN bus branches, and new energy high-voltage branches. Each functional harness branch connects to the harness node via gold-plated terminals. The gold-plated terminals have a gold coating and a contact resistance of no more than 5mΩ to reduce contact and reflection losses during signal transmission. The harness node is an integrated injection-molded structure containing a signal distributor. The signal distributor integrates an impedance matching circuit composed of a resistor network and a frequency division network composed of cascaded high-pass and low-pass filters. After the multi-protocol signals transmitted by the harness backbone enter the signal distributor, they first undergo impedance transformation through an impedance matching circuit to match the signal source impedance with the load impedance of each output branch, thereby reducing signal reflection. Subsequently, through a frequency division network, a high-pass filter extracts the high-frequency signal components, and a low-pass filter extracts the low-frequency signal components, achieving distribution according to frequency range. High-frequency signals (such as Ethernet signals) are distributed to the corresponding high-frequency functional harness branches, low-frequency signals (such as LIN signals) to the corresponding low-frequency functional harness branches, and intermediate-frequency signals (such as CAN signals) to the corresponding intermediate-frequency functional harness branches. The shielding layers of each functional harness branch and the harness backbone maintain electrical continuity at the harness nodes through a 360-degree loop connection. This loop connection structure includes a conductive ring surrounding the inner cavity of the harness node. The shielding layers of the harness backbone and each functional harness branch are pressed onto this conductive ring by conductive spring sheets, forming a complete electrical closed loop for the shielding layer. This ensures that the potential of the shielding layer is equal throughout the signal transmission path, preventing electromagnetic leakage and external interference coupling caused by shielding layer interruptions.

[0051] Modular interface components, including replaceable interface modules, are detachably installed on the smart adapter box body via a quick-release structure. The quick-release structure is a magnetic quick-release structure, comprising a permanent magnet array and mechanical anti-detachment latches. The permanent magnet array is a neodymium iron boron (NdFeB) permanent magnet array, consisting of multiple NdFeB permanent magnets arranged in a ring or rectangular array on the interface mounting surface of the smart adapter box body. Each permanent magnet provides a magnetic attraction force of no less than 5N, and the total magnetic attraction force generated by multiple permanent magnets ensures a stable end-face pressing contact between the replaceable interface module and the smart adapter box body. The mechanical anti-detachment latches are located on both sides of the interface mounting surface of the smart adapter box body, including elastic hooks and release buttons. Corresponding positions on the replaceable interface modules have slots that engage with the elastic hooks. When the replaceable interface module is magnetically attached to the interface mounting surface of the smart adapter box, the elastic hook engages with the slot to form a mechanical lock. Pressing the release button disengages the elastic hook from the slot, allowing the replaceable interface module to be pulled out in the direction of magnetic attraction. The smart adapter box body has a positioning pin, and the replaceable interface module has a positioning hole that mates with the positioning pin. The tolerance between the outer diameter of the positioning pin and the inner diameter of the positioning hole is [not specified]. The system ensures the replaceable interface module is installed in the precise preset position, aligning each signal pin with its corresponding signal contact. The permanent magnet array, positioning pins, and mechanical anti-drop latches work together: the positioning pins guide and initially position the module; the permanent magnet array provides end-face clamping force to prevent loosening on the mounting surface; and the mechanical anti-drop latches provide redundant locking to prevent accidental dislodgement. Together, they form a three-in-one quick-release connection structure for rapid insertion and removal, accurate positioning, and reliable locking. The replaceable interface module contains a built-in identification chip, which is a near-field communication (NFC) chip. This NFC chip is fixed on a printed circuit board inside the replaceable interface module. The NFC chip's antenna coil is embedded inside the end face of the replaceable interface module near the smart adapter box body. The antenna coil is covered with a ferrite magnetic shielding layer to isolate interference from the internal metal components of the replaceable interface module. The smart adapter box contains a near-field communication (NFC) reader that matches the NFC chip. The NFC reader's antenna coil is located inside the interface mounting surface of the smart adapter box. When the replaceable interface module is installed in the smart adapter box via a magnetic quick-release structure, the axial distance between the NFC antenna coil inside the replaceable interface module and the NFC reader's antenna coil inside the interface mounting surface of the smart adapter box is no more than 5mm, which is within the effective coupling distance for NFC, ensuring a stable NFC link can be established between them. After the replaceable interface module is connected, the NFC reader reads the interface encoding information and signal definition mapping table stored in the NFC chip. The interface encoding information is a unique identifier for the interface module type, used to distinguish different specifications of replaceable interface modules, including ECU general interface modules, BMS high-voltage interface modules, and MCU power interface modules. The signal definition mapping table is a data table stored in the non-volatile memory inside the near-field communication chip. This table records the channel number, signal type, protocol type, rated voltage range, rated current range, and impedance matching parameters for each signal channel corresponding to the replaceable interface module. After the near-field communication reader reads the interface encoding information and the signal definition mapping table through the near-field communication link, it transmits this information to the intelligent control module via the third core of the multi-core microcontroller. The intelligent control module retrieves the signal configuration parameters corresponding to the replaceable interface module based on the interface encoding information. These parameters include the protocol type parameters and impedance matching parameters for each signal channel. The intelligent control module then configures the terminating resistors for the corresponding signal link based on the impedance matching parameters. For each signal channel, the intelligent control module identifies the signal type of that channel and determines the target resistance value of the terminating resistor based on the impedance matching parameters recorded in the signal definition mapping table. The configuration method for the terminating matching resistor is as follows: the intelligent control module controls the digital potentiometer on the corresponding signal link to adjust its resistance value to the target resistance value. This is to reduce signal reflections caused by impedance mismatch at the end of the transmission line. For the CAN protocol signal channel, its characteristic impedance is 120Ω. Target matching resistor For Ethernet protocol signal channels, the characteristic impedance is 100Ω. Target matching resistor For the LIN protocol signal channel, its characteristic impedance is 1kΩ. Target matching resistor Reflection coefficient along the signal transmission path Characteristic impedance of the transmission line Matching resistor with terminal The mathematical relationship is as follows:

[0052]

[0053] in, The characteristic impedance of the transmission line, in units of Ω. This parameter is determined by the physical structure of the wire harness backbone (including core wire diameter, insulation dielectric constant, and core wire spacing), and has different nominal values ​​for different types of signal channels; The terminal matching resistor value configured for the intelligent control module, in units of This parameter is set by the intelligent control module according to the impedance matching parameters recorded in the signal definition mapping table; Let be the reflection coefficient of the signal at the end of the transmission line. It is dimensionless and its physical meaning is the ratio of the reflected wave voltage amplitude to the incident wave voltage amplitude. The closer this value is to 0, the less energy is reflected at the end of the transmission line, and the better the signal integrity. and When they are equal, the reflection coefficient This indicates that the signal is not reflected at the end of the transmission line, and all signal energy is absorbed by the terminating resistor, resulting in optimal signal integrity. The intelligent control module uses a digital potentiometer to adjust the terminating resistor. Configured to equal the characteristic impedance of the transmission line , making the reflection coefficient The impedance is approached to zero, thus eliminating signal reflection and ensuring the transmission quality of multi-protocol signals in the test link. For multi-channel scenarios, each signal channel independently performs the above impedance matching configuration process, so that each signal channel obtains a terminating matching resistor that matches its signal type.

[0054] The intelligent control module is located within the intelligent adapter box and includes a signal acquisition unit, an artificial intelligence diagnostic module, and an automatic fault simulation unit. The signal acquisition unit integrates a 16-bit successive approximation analog-to-digital converter and is configured with differential input circuitry and an anti-aliasing filter. The differential input circuitry is used to suppress common-mode noise in the acquisition link, with a common-mode rejection ratio (CMRR) of no less than 80dB. The anti-aliasing filter is a second-order Butterworth low-pass filter, with its cutoff frequency set according to the Nyquist frequency of each signal channel to eliminate aliasing interference from frequency components higher than half the sampling frequency. The signal acquisition unit acquires multi-protocol signals in the test link and outputs them to the artificial intelligence diagnostic module. The sampling rate of the signal acquisition unit is no less than 1kHz, and the overall sampling error includes quantization error, nonlinearity error, and temperature drift error, with the overall sampling error controlled within a certain range. Within [a certain range]. Quantization error is determined by the resolution of the analog-to-digital converter (ADC). For a 16-bit ADC, the theoretical maximum value of its quantization error is [a certain value] times the full-scale voltage. The ratio. The signal acquisition unit supports CAN protocol signal acquisition, CAN FD protocol signal acquisition, Ethernet protocol signal acquisition, and LIN protocol signal acquisition. For CAN and CAN FD protocols, the signal acquisition unit uses a built-in protocol controller to achieve physical layer sampling and protocol frame parsing of differential signals. The CAN FD protocol supports a maximum data segment rate of 8Mbps. For the Ethernet protocol, the signal acquisition unit uses a 100BASE-T1 or 1000BASE-T1 physical layer transceiver to achieve differential signal acquisition and MAC layer data frame parsing. For the LIN protocol, the signal acquisition unit uses a LIN transceiver to achieve single-wire signal sampling and protocol frame parsing. The LIN protocol supports transmission rates from 9.6kbps to 19.2kbps. Each protocol signal is converted into a digital signal by the corresponding transceiver and then input to the multi-core microcontroller. The signal acquisition unit also integrates a digital filtering circuit, which adopts a finite impulse response filter structure. Its differential equation is expressed as:

[0055]

[0056] in, For the first The input signal sample value at each sampling time is obtained by the signal acquisition unit from the test link at a sampling rate of not less than 1kHz and obtained by analog-to-digital conversion, with the unit being V; For the filter number Each tap coefficient is dimensionless and is pre-designed and determined using the window function method based on the noise spectrum distribution of each signal channel. Its value determines the degree of attenuation of different frequency components by the filter. The filter order is a positive integer, determined by the stopband attenuation requirements during filter design, and thus determines the filter's computational complexity and the steepness of its frequency response. For the first The output signal value after filtering at each sampling time point, in units of V, represents the filter's extraction of the effective frequency components from the input signal, used for subsequent construction of a multi-dimensional time-series signal matrix. Filter order. and tap coefficient The noise spectrum distribution of each signal channel is pre-set to effectively suppress high-frequency noise while maintaining the integrity of signal amplitude and phase. The intelligent control module also includes a multi-core microcontroller. The multi-core microcontroller adopts the ARM Cortex-A53 architecture, including a first core, a second core, and a third core, with data transfer between cores via shared memory. The first core of the multi-core microcontroller performs signal acquisition and preprocessing; the second core runs the neural network fault identification algorithm of the artificial intelligence diagnostic module; and the third core performs interface identification and wireless communication management. The first core timestamps and unifies the format of the acquired multi-protocol signals, then arranges them by channel number to construct a multi-dimensional time-series signal matrix. The data structure of this multi-dimensional time-series signal matrix is ​​defined as a... OK Column matrix form, The number of signal channels is determined by the signal definition mapping table of the currently connected modular interface component; This represents the number of historical sampling points for each signal channel, dynamically allocated by the multi-core microcontroller based on the current sampling rate. Its physical meaning is the length of the time-series data for each signal channel participating in a single fault diagnosis; a larger value indicates richer historical information that the diagnostic model can observe. The matrix contains the [missing information - likely a specific matrix or parameter]. Line 1 Column elements Indicates the first The signal channel in the first The normalized signal amplitude at each historical sampling moment, dimensionless, with a value range of [value missing]. This value represents the basic unit of input data for subsequent LSTM neural network processing. Each element in the multidimensional time-series signal matrix... The numerical value originates from the digital value acquired by the signal acquisition unit at a sampling rate of not less than 1 kHz, after analog-to-digital conversion and digital filtering. This digital value is then mapped to a value after max-min normalization. Interval. Specifically, for the... The signal channel in the first The original sampled values ​​at each sampling time point Its normalized value The calculation method is to subtract the minimum value of the channel within the sliding time window from the original sampled value, and then divide by the difference between the maximum and minimum values ​​of the channel within the sliding time window. The artificial intelligence diagnostic module incorporates a neural network fault identification algorithm, which is a two-layer stacked long short-term memory neural network. Long short-term memory neural networks are a variant of recurrent neural networks with gating mechanisms. They effectively model long-term dependencies in time-series signals by introducing input gates, forget gates, and output gates in the hidden layers. The first layer of the long short-term memory network receives a multi-dimensional time-series signal matrix as input, encodes the input vector at each time step, and outputs the first-layer hidden state sequence. The second layer of the long short-term memory network uses the hidden state sequence output by the first layer as input to further extract higher-level time-series features. The calculation process of each gating unit in the first layer of the long short-term memory network is defined as follows. The forget gate determines which information in the cell state at the previous time step needs to be discarded, and its calculation formula is:

[0057]

[0058] in, Forget the gate at any time The output vector has a value range of . Each element value represents the proportion of information retained in the corresponding dimension. The closer the value is to 1, the more information is retained; the closer it is to 0, the more information is discarded. The Sigmoid activation function maps the input to the interval between 0 and 1. Let be the weight matrix of the forget gate, and the dimension of this matrix is ​​. ,in 256 represents the number of signal channels and the number of hidden layer units. This weight matrix is ​​pre-trained on a cloud server using a historical fault dataset and a backpropagation algorithm. Its physical meaning is the encoding of the importance weights of each dimension of the input vector by the forget gate. For the next layer of the Long Short-Term Memory network in The hidden state vector at time step 256 has a dimension and contains the temporal feature information of the output after processing at the previous time step. For a multidimensional time-series signal matrix at time... A column vector with dimension . Wei, that is The normalized signal amplitude of each signal channel at the current sampling time; The bias vector for the forget gate is 256-dimensional and is obtained through pre-training. The input gate determines which parts of the current input information need to be updated to the cell state; its calculation formula is as follows:

[0059]

[0060] in, For the input gate at time The output vector has a value range of . Each element value represents the proportion of new information written to the cell state in the corresponding dimension. The closer the value is to 1, the more new information is written. Here is the weight matrix of the input gate, with dimension . It is obtained through pre-training; The bias vector for the input gate is 256-dimensional and obtained through pre-training. The formula for calculating the candidate cell state is:

[0061]

[0062] in, For a moment The candidate cell state vector, with values ​​ranging from 1 to 2. Each element value represents the content of the new information to be written into the cell state; The hyperbolic tangent activation function maps the input to the interval between -1 and 1. Here is the weight matrix for the candidate cell states, with dimension 1. It is obtained through pre-training; Let be the bias vector of the candidate cell states, with a dimension of 256, obtained through pre-training. The cell state update formula is:

[0063]

[0064] in, For a moment The updated cell state vector has a dimension of 256. Its physical meaning is the long short-term memory network unit's accumulated long-term memory information up to the current moment. It is a comprehensive encoding representation of historical time-series data by the network. For the previous moment The cell state vector has a dimension of 256; The Hadamard product operation represents the element-wise multiplication of two vectors, which multiplies corresponding elements of two vectors of the same dimension to obtain a new vector. The output gate determines which information from the cell state needs to be output to the hidden state; its calculation formula is:

[0065]

[0066] in, For the output gate at time The output vector has a value range of . Each element value represents the proportion of cell state information in the corresponding dimension that is output to the hidden state; Let be the weight matrix of the output gate, with dimension . It is obtained through pre-training; The bias vector for the output gate is 256-dimensional and is obtained through pre-training. (Time step) Hidden state It is calculated jointly by the output gate and the cell state:

[0067]

[0068] in, For a moment The hidden state vector, with a dimension of 256, physically represents the temporal feature representation of the Long Short-Term Memory (LSTM) network unit at the current time step. This vector contains important feature information extracted from the input signal for subsequent fault identification. The first layer of the LSM network calculates the hidden state at each time step according to the above process. The hidden states at all times are arranged in chronological order to form a hidden state sequence. The second layer of the Long Short-Term Memory (LSTM) network has the same structure as the first layer. It takes the hidden state sequence output by the first layer as input and processes it using the same gating computation process as the first layer to obtain the hidden state sequence of the second layer, thus achieving higher-level abstract feature extraction of the time series signal. The two-layer stacked LSM neural network analyzes the multidimensional time series signal matrix through sliding window analysis. The execution process of sliding window analysis is as follows: a window length is set to... A time window for each sampling point and a step size of The sliding step of each sampling point and All are positive integers and ,in The physical meaning of this is the number of consecutive sampling points contained in each input sample, which determines the historical data span used for each diagnosis. The larger the value of , the longer the historical context that the diagnostic model can observe, but the computational cost increases accordingly. The physical meaning of is the sampling point interval between the starting positions of two adjacent windows, which determines the time resolution of the diagnostic output. The smaller the value, the higher the overlap between adjacent windows and the finer the temporal resolution of the diagnostic output, but the computational load increases accordingly. Using a step size of 1 sampling point, the time window is slid sequentially along the time axis. The signal segment falling within each window from the multidimensional time-series signal matrix is ​​used as an input sample for the two-layer stacked long short-term memory neural network. For each window position, the signal within the window... Column vectors at each time step Arranged in chronological order, forming a shape as follows The submatrix is ​​input into the two-layer stacked Long Short-Term Memory (LSTM) neural network for forward computation. The hidden state sequence output from the second LSM network is input into the fully connected layer. The fully connected layer maps the 256-dimensional hidden state vector to the output space after linear transformation and nonlinear activation. The computation process of the fully connected layer is as follows: the hidden state vector at the last time step of the second layer is multiplied by the weight matrix of the fully connected layer and a bias vector is added. Then, the output is mapped to a probability distribution by the Softmax activation function. The number of hidden layer units in the two-layer stacked LSM neural network is 256, i.e. and Each layer has 256 dimensions; the fully connected layer outputs fault category codes, fault confidence scores, and fault location codes. The two-layer stacked long short-term memory neural network identifies fault modes, including open-circuit fault modes, short-circuit fault modes, signal attenuation fault modes, and signal interference fault modes, through sliding window analysis. For these four fault modes, the fully connected layer outputs four nodes, each corresponding to a probability value for one of the four fault categories. ,in All are dimensionless real numbers, and their values ​​range from 1 to 2. And satisfy Their physical meanings are the probability estimates of whether the current input signal segment belongs to an open-circuit fault, a short-circuit fault, a signal attenuation fault, and a signal interference fault, respectively. These probability estimates are a quantitative expression of the fault probability, and the Softmax activation function maps the original output of the fully connected layer to... Obtained after probability intervals. Fault category code. for The index value corresponding to the category with the highest probability value is defined as follows: index 0 corresponds to open circuit fault, index 1 corresponds to short circuit fault, index 2 corresponds to signal attenuation fault, and index 3 corresponds to signal interference fault. This code is used to uniquely identify the fault type determined by the artificial intelligence diagnostic module. Fault confidence value. The highest probability value among the four probability values, i.e. This value, a real number between 0 and 1, represents a quantitative measure of the reliability of the fault category determination by the artificial intelligence diagnostic module. A value closer to 1 indicates higher reliability, while a value closer to 0 indicates lower reliability. Fault location coding. For a length equal to the total number of signal channels A one-dimensional one-hot encoded vector, the first of which is the first... The value of the nth element being 1 indicates that the nth element is... One signal channel is identified as faulty, and the remaining elements are set to 0. This vector uniquely identifies the specific signal channel where the fault occurred, providing location information for the precise injection of subsequent fault simulation units. The fault confidence value output by the dual-layer stacked long short-term memory neural network... Greater than the preset confidence threshold At that time, the artificial intelligence diagnostic module encodes the fault category. and fault location coding This serves as the output of a valid fault identification result. The confidence threshold is a pre-defined, dimensionless real number ranging from 0 to 1. This threshold is set by the user on the touchscreen display based on their tolerance for false alarm and false negative rates in the test scenario. A higher value results in a lower false alarm rate but a higher false alarm rate. A lower value results in a lower false alarm rate but a higher false negative rate. Physically, it represents the minimum confidence level required for a valid fault determination. Only when the AI ​​diagnostic module's confidence level in the fault determination exceeds this threshold will it output a valid fault identification result, thus balancing the accuracy and sensitivity of fault identification. The automatic fault simulation unit injects the corresponding fault signal into the test link through a relay array based on the fault identification result. The relay array of the automatic fault simulation unit is... OK Column matrix relay array, and Both are integers greater than 1, representing the number of rows and columns of the relay array, respectively. The horizontal control line connects to the general-purpose input / output interface of the multi-core microcontroller. The column control lines are connected to the signal injection nodes of each test link, and an electromagnetic relay is installed at each row-column intersection. The matrix relay array consists of... The matrix relay array consists of independently controlled electromagnetic relays arranged in a row-column topology. The coil of each relay is controlled by the general-purpose input / output interface of a multi-core microcontroller, and the contacts are connected to the signal input and output sides of the test link, respectively. The matrix relay array supports series injection, parallel injection, and matrix injection modes. Series injection mode connects the relay contacts in series in the test link to simulate open-circuit, signal attenuation, and signal delay faults. Parallel injection mode connects the relay contacts in parallel between the test link and the reference potential to simulate short circuits to the power supply, short circuits to ground, and signal interference faults. Matrix injection mode simultaneously activates multiple relay combinations at row and column intersections to simulate multiple fault superposition scenarios. The automatic fault simulation unit uses the fault category code output by the artificial intelligence diagnostic module. and fault location coding According to a preset fault type-relay operation mapping table, the system determines the relay row and column addresses and injection mode types that need to be closed or opened, and executes the corresponding relay switching operations to inject single fault signals or multiple fault superimposed signals into the test link. During multiple fault superimposed injection, the automatic fault simulation unit executes fault injection in a priority order: high-voltage faults take precedence over communication faults, and communication faults take precedence over analog signal faults. The intelligent control module also includes a wireless communication unit and a data storage and cloud synchronization unit. The data storage and cloud synchronization unit has built-in high-speed flash memory with a storage capacity of no less than 64GB, used to cache the raw signal data collected by the signal acquisition unit, the fault identification results generated by the artificial intelligence diagnostic module, and the fault injection records of the automatic fault simulation unit. The wireless communication unit supports wireless LAN communication, cellular communication, and low-power wide-area network (LPWAN) communication. Wireless LAN communication is based on the IEEE 802.11ax standard, cellular communication is based on the 5G New Radio standard, and LPWAN communication is based on LoRa modulation technology. The data storage and cloud synchronization unit synchronizes the test data to the cloud server through the wireless communication unit. Before sending test data to the cloud server, the data storage and cloud synchronization unit encrypts the test data using the AES symmetric encryption algorithm. The encryption key is generated by the physically unclonable function module of the multi-core microcontroller and stored in a secure area. The cloud server stores a fault feature dataset, which contains fault signal samples from multiple sources and their corresponding fault category and fault location labels. When the accumulated fault feature data on the cloud server exceeds a preset threshold, the cloud server triggers the retraining of the double-layer stacked long short-term memory neural network in the artificial intelligence diagnostic module. Specifically, the newly added fault feature data is merged with historical fault data to form an expanded training set, and the backpropagation algorithm combined with an adaptive moment estimation optimizer is used to retrain the network weight matrix. and bias vector The model is updated to minimize the cross-entropy loss function. After retraining, the updated model parameters are sent to the multi-core microcontroller of the intelligent control module via the wireless communication unit. The multi-core microcontroller then loads the updated weight matrix and bias vector into the neural network model of the artificial intelligence diagnostic module, enabling continuous online evolution of fault identification accuracy.

[0069] The safety protection module is electrically connected to both the integrated wiring harness assembly and the intelligent control module. The safety protection module includes an overcurrent protection unit, a reverse connection protection unit, an electrostatic discharge (ESD) protection unit, a surge protection unit, a short-circuit protection unit, a high-voltage interlock circuit, and an insulation monitoring unit. Each protection unit is connected in series with the power supply and signal lines of the integrated wiring harness assembly according to the signal transmission direction, forming a full-link hierarchical protection architecture from the power input to the signal output. The overcurrent protection unit, reverse connection protection unit, ESD protection unit, surge protection unit, and short-circuit protection unit constitute the basic electrical protection layer, deployed at the entry points of the low-voltage power supply and signal lines; the high-voltage interlock circuit and insulation monitoring unit constitute the high-voltage safety protection layer, deployed at the high-voltage line entry point of the new energy adapter module. The basic electrical protection layer and the high-voltage safety protection layer are electrically isolated from each other, and signal transmission between the low-voltage and high-voltage sides is achieved through optocoupler isolation devices, ensuring that abnormalities on the high-voltage side are not conducted to the low-voltage side. The overcurrent protection threshold of the overcurrent protection unit is adjustable from 5A to 30A. The overcurrent protection unit includes a sampling resistor, a differential amplifier, and a comparator. The sampling resistor is a high-precision manganin resistor with a resistance value of It is connected in series in the positive path of the power supply line. The unit is Its physical meaning is a conversion resistor that converts load current into a voltage signal. The value is selected based on the rated current of the power supply line to ensure that the voltage drop across the sampling resistor is within the range that the subsequent amplifier can measure. When the load current... When current flows through the sampling resistor, a voltage drop is generated across the sampling resistor. ,in This refers to the actual load current in the power supply line, expressed in amperes (A). This represents the voltage drop across the sampling resistor, measured in volts (V). The differential amplifier will... The amplified voltage is output to the comparator, and the amplified voltage value is... ,in This is the gain factor of the differential amplifier, dimensionless, set by the feedback resistor network of the differential amplifier. The comparator will amplify the voltage value. With reference voltage Comparison, This is the reference voltage value generated by the digital-to-analog converter based on the overcurrent protection threshold set by the multi-core microcontroller, in volts (V). When... When the comparator outputs an overcurrent trigger signal, this signal is a digital logic level signal that is active high or low, determined by the comparator's output characteristics. This overcurrent trigger signal is transmitted to the interrupt input pin of the multi-core microcontroller. Upon receiving the interrupt signal, the multi-core microcontroller controls the electronic switch on the power supply line to turn off via the general-purpose input / output interface, thus achieving overcurrent protection. The reverse connection protection unit uses a P-channel MOSFET connected in series in the positive path of the power supply line. Its gate is connected to the negative terminal of the power supply line through a resistor. When the positive and negative terminals of the power supply are reversed, the body diode of the P-channel MOSFET is reverse-biased and cut off, and the power supply line is in an open-circuit state, preventing reverse current from damaging subsequent circuits. The electrostatic discharge (ESD) protection unit uses a transient voltage suppressor diode array with a junction capacitance of no more than 5pF, deployed at the input terminals of each signal channel. When an ESD pulse occurs on the signal line, the transient voltage suppressor diode clamps the voltage to a safe range. The ESD protection level is no less than [value missing] for contact discharge. kV and air discharge not less than kV. The surge protection unit uses a series combination of a varistor and a gas discharge tube, deployed at the input end of the power supply line. The varistor's varistor voltage is 1.5 times the rated power supply voltage, and the gas discharge tube's DC breakdown voltage is twice the rated power supply voltage. The surge protection level is not lower than kV. kV. The short-circuit protection unit uses a current sensing chip in conjunction with a high-speed comparator. The current sensing chip monitors the rate of change of current in the power supply line in real time through the Hall effect or the principle of resistor shunt. and instantaneous current amplitude ,in It is the rate of change of current over time, with units of A / s. Its physical meaning is the rate at which the current changes. It is used to distinguish the steep rising edge of the short-circuit fault current from the gradual change of the normal load current and is one of the important criteria for rapid identification of short-circuit faults. This represents the instantaneous current amplitude at the current moment, in amperes (A). The high-speed comparator will... Compared with the preset short-circuit current threshold Comparison, among which This is a preset short-circuit current threshold, measured in amperes (A). This threshold is pre-set by the multi-core microcontroller based on the rated current of the power supply line and the load characteristics, and is used to distinguish between short-circuit and normal overload conditions. At this time, the high-speed comparator directly triggers the electronic switch to turn off at the hardware level, with a short-circuit response time of no more than 1ms. The high-voltage interlock circuit adopts a low-level loop detection topology, including a high-voltage interlock signal source, a current-limiting resistor, a detection loop, and an isolation unit. The high-voltage interlock circuit generates a low-voltage DC detection signal with an amplitude of 5V from the high-voltage interlock signal source, and this detection signal is passed through the current-limiting resistor... After being connected in series, a complete detection loop is formed through the dedicated interlock pins of the high-voltage connector. This is the resistance value of the current-limiting resistor, in units of... Its physical meaning is to limit the maximum current in the detection loop to protect the high-voltage interlock signal source and the detection circuit. The connection length of this dedicated interlock pin is shorter than that of the high-voltage power supply pin. During the insertion and removal of the high-voltage connector, the interlock pin disconnects before or after the high-voltage power supply pin. The detection circuit consists of a pull-down resistor connected between the loop and ground. The structure is formed by monitoring the voltage across the pull-down resistor. The loop status can then be determined, where The value of the pull-down resistor, in units of... It is related to the current-limiting resistor. Forming a voltage divider network, This is the voltage across the pull-down resistor, measured in volts (V). Its physical meaning is a voltage level signal reflecting the latch-up state of the high-voltage connector. Current-limiting resistor. The resistance range is between 1kΩ. Up to 5k Between, pull-down resistors The resistance is 1kΩ This forms a resistor voltage divider network. When the high-voltage connector is fully locked, the detection loop is closed, pulling down the voltage across the resistor. When the high-voltage connector is not locked or the interlock pin has poor contact, the detection loop is in an open circuit state, and the voltage across the pull-down resistor is... The insulation monitoring unit uses a reference resistor of known resistance connected in series between the high-voltage positive terminal and ground. Measure the voltage drop across the reference resistor. The insulation resistance between the high-voltage positive electrode and ground was calculated. And the insulation resistance of the high-voltage negative electrode to ground. .in The resistance value of the reference resistor, in units of... Its resistance value is known and fixed, and it is used to form a voltage divider network with the insulation resistance to be measured in order to indirectly measure the insulation resistance. The voltage drop across the reference resistor is expressed in volts (V). The insulation resistance between the high-voltage positive terminal and the reference ground, in units of . Its physical meaning is to characterize the insulation performance between the high-voltage positive line and the equipment casing or reference ground; The insulation resistance between the high-voltage negative electrode and the reference ground, in units of . Its physical meaning is to characterize the insulation performance between the high-voltage negative line and the equipment casing or reference ground. The insulation resistance monitoring threshold is not less than 1MΩ. The insulation monitoring unit monitors insulation resistance. or When the insulation monitoring unit detects an insulation abnormality, the high-voltage connector is not locked (detection loop open). When the high-voltage connector fails to lock or the insulation resistance drops below the threshold, the isolation unit outputs an interrupt signal. The high-voltage interlock circuit then cuts off the high-voltage path based on the interrupt signal. The response time of the high-voltage interlock circuit from detecting abnormal circuit resistance to cutting off the high-voltage path is no more than 10ms. Both the high-voltage interlock circuit and the insulation monitoring unit are electrically connected to the intelligent control module via an optocoupler isolation unit. When the high-voltage connector fails to lock or the insulation resistance drops below the threshold, the isolation unit outputs an interrupt signal to the interrupt input pin of the multi-core microcontroller. Upon receiving the interrupt signal, the multi-core microcontroller uses the high-voltage contactor control signal to turn off the high-voltage relay, cutting off the high-voltage path, and controls the touchscreen display to show high-voltage fault warning information. Simultaneously, the fault event is recorded in the data storage and cloud synchronization unit.

[0070] The intelligent adapter box also houses a new energy adaptation module, which includes a high-voltage signal processing unit and a dedicated connector for the battery management system. The high-voltage signal processing unit is electrically connected to the high-voltage interlock circuit and insulation monitoring unit. The dedicated connector for the battery management system is electrically connected to the high-voltage signal processing unit. The high-voltage signal processing unit includes a high-voltage divider resistor network, an isolation amplifier, and a low-voltage output interface. The high-voltage divider resistor network consists of a first resistor connected in series. Second resistor Composition, first resistor One end is connected to the high-voltage signal input terminal, and the first resistor The other end is connected to a second resistor One end forms a voltage divider node, and the second resistor The other end is connected to the reference ground of the high-voltage signal. and All are high-resistance precision resistors, among which It is a series resistor on the high-voltage side, and its resistance is much greater than... Physically, it bears most of the high voltage drop to reduce the high voltage signal to a low voltage safe range; This is a low-voltage side voltage divider resistor, and its resistance is much smaller than... Physically, the voltage across its terminals is the stepped-down low-voltage signal, and together they form a resistor divider network to achieve a linear conversion from high voltage to low voltage. The resistance values ​​are selected as follows: , To reduce the influence of the voltage divider network on the high-voltage signal source under test. First resistor With the second resistor The ratio of the resistance values ​​determines the voltage division ratio. When a high-voltage signal... When applied to the input of a voltage divider network, the voltage at the voltage divider node Determined by the voltage divider formula:

[0071]

[0072] in, This is a high-voltage signal collected from the battery pack or motor controller, measured in volts. This signal originates from the high-voltage signal input terminal of the new energy adapter module and is the raw high-voltage signal to be collected and processed by the system. This is the resistance value of the series resistor on the high-voltage side, in units of... This resistance value is pre-selected to ensure that the voltage at the voltage divider node does not exceed the input range of the isolation amplifier at the highest input voltage; This is the resistance value of the low-voltage side voltage divider resistor, in units of... The resistance value is pre-selected to match... To achieve the required partial pressure ratio; This is the voltage at the voltage divider node, in volts (V). This value is the low-voltage analog signal after the original high-voltage signal is stepped down by the resistor divider network, serving as the input signal for the isolation amplifier. Through the voltage division formula described above, the original high-voltage signal is stepped down to a low-voltage signal suitable for the input range of the isolation amplifier. The high-voltage signal processing unit supports the acquisition and isolated transmission of high-voltage signals of at least 200V. The isolation amplifier is located between the voltage divider node and the low-voltage output interface. The high-voltage side signal at the voltage divider node is transmitted to the low-voltage side through capacitive isolation or magnetic isolation barriers inside the isolation amplifier. The electrical isolation withstand voltage between its input and output is at least 2500V. The output signal of the isolation amplifier... With input signal They satisfy a linear relationship:

[0073]

[0074] in, The gain of the isolation amplifier is dimensionless and is set by the internal feedback network of the isolation amplifier. Its physical meaning is the amplification factor of the isolation amplifier on the input signal voltage, which is used to adjust the voltage divider node signal to the optimal input range of the subsequent signal acquisition unit. The output offset voltage of the isolation amplifier is measured in volts (V). It is determined by the internal circuit bias of the isolation amplifier and is the output voltage of the isolation amplifier when the input signal is zero. It needs to be compensated during system calibration. This is the voltage value, in volts, output from the isolation amplifier to the low-voltage output interface. This value is the low-voltage safety signal obtained after the original high-voltage signal is divided, stepped down, and amplified through isolation. It serves as one of the input signals to the signal acquisition unit. The high-voltage signal processing unit achieves electrical isolation between the high-voltage and low-voltage sides through the isolation amplifier and converts the acquired high-voltage signal into a 0V to 5V low-voltage safety signal before transmitting it to the signal acquisition unit. The insulation monitoring unit works in conjunction with the high-voltage signal processing unit. The insulation monitoring unit monitors the insulation resistance between the high-voltage positive terminal and the reference ground. Insulation resistance between the high voltage negative electrode and the reference ground To achieve insulation monitoring, when any insulation resistance drops below a preset threshold, the insulation monitoring unit outputs a fault signal to the high-voltage interlock circuit. The high-voltage interlock circuit then cuts off the high-voltage input path of the high-voltage signal processing unit, thereby preventing the abnormal high-voltage signal from being transmitted to the low-voltage side. To determine the connection status, By measuring the voltage drop in the detection loop And calculate the loop current. get:

[0075]

[0076] in, The detection voltage output by the high-voltage interlock signal source is in volts (V). This voltage is a known constant reference voltage. The voltage across the pull-down resistor is measured in volts (V), and this value is obtained by the signal acquisition unit. To detect the current in the loop, the unit is A. This value is obtained by measuring the voltage drop across the current-limiting resistor and dividing it by the resistance of the current-limiting resistor. The loop resistance of the high-voltage connector interlock pin, in units of... This value is used to determine the locking state of the high-voltage connector. When When the resistance exceeds a preset threshold, it is determined that the high-voltage connector is not locked or has abnormal contact, and the high-voltage interlock circuit cuts off the high-voltage input path of the high-voltage signal processing unit. The current sensor is used for acquiring high-voltage current signals. The current sensor uses the Hall effect principle; when the high-voltage current... When current flows through the conductive path inside the sensor, a Hall voltage proportional to the measured current is generated on the sensitive axis perpendicular to the current direction. The voltage is amplified by the signal conditioning circuit and used as the output signal of the current sensor. The high-voltage signal processing unit converts the acquired high-voltage signal into a low-voltage safety signal (0V to 5V) using voltage and current sensors, and then transmits it to the signal acquisition unit. This low-voltage safety signal includes a voltage signal that has been divided and isolated for amplification. and the current signal after signal conditioning .in This is the Hall voltage after amplification and filtering by the signal conditioning circuit, measured in volts (V). This value is related to the measured high-voltage current. The relationship between the two is linear, and the proportionality coefficient is determined by the sensitivity of the Hall sensor and the gain of the signal conditioning circuit. The battery management system (BMS) connector is a high-voltage connector conforming to the ISO 15118 standard. Its housing integrates a high-voltage positive pin, a high-voltage negative pin, a communication pin, a control guidance pin, and a proximity detection pin. The high-voltage positive and negative pins are connected to the high-voltage signal input terminal of the high-voltage signal processing unit, respectively. The communication pin connects to the CAN communication interface of the intelligent control module for transmitting battery status monitoring signals. The control guidance pin transmits charging control signals, and the proximity detection pin detects the physical connection status between the connector plug and socket. The BMS connector is electrically connected to the high-voltage signal processing unit, supporting bidirectional transmission of battery status monitoring signals and bidirectional transmission of charging control signals. The pins of the BMS connector are arranged according to the ISO 15118 standard. The high-voltage pins are located in the central area of ​​the connector, while the communication and control guidance pins are located in the peripheral area. The high-voltage pins are shorter than the proximity detection pins to ensure that during connector insertion and removal, the proximity detection pin is connected first and then disconnected, and the high-voltage pin is connected last and then disconnected first. The on / off state of the proximity detection pins is determined by the intelligent control module based on whether a closed loop is formed between the proximity detection pins of the connector. When a closed loop is formed, the intelligent control module determines that the connector is fully inserted, allowing the high-voltage signal processing unit to begin acquiring the high-voltage signal. The signal acquisition unit constructs a multi-dimensional timing signal matrix by combining the low-voltage safety signal and the multi-protocol signal. The low-voltage safety signal is added as a new signal channel to the multi-dimensional timing signal matrix, increasing the row dimension of the multi-dimensional timing signal matrix to [number missing]. Okay, the newly added first The row corresponds to the sampled value sequence of the low-voltage signal channel, and the newly added first row... The row corresponds to the sampling value sequence of the low-voltage current signal channel. After the signal acquisition unit aligns the low-voltage safety signal and the multi-protocol signal with a unified timestamp, it performs synchronous sampling at the same sampling time. The sampling values ​​of all signal channels acquired at the same time are arranged into a column vector in a multi-dimensional time-series signal matrix to ensure the consistency of high-voltage signal data and multi-protocol signal data in the time dimension, so that the artificial intelligence diagnostic module can perform joint time-series analysis of high-voltage signal and multi-protocol signal.

[0077] The connections and signal flow relationships between the aforementioned functional modules follow the system architecture defined in claim 1. The intelligent adapter box body has a signal adapter panel, intelligent control module, safety protection module, and new energy adaptation module fixedly installed inside its aluminum alloy frame. These modules are electrically interconnected via a printed circuit board substrate and standardized cabling inside the box. The intelligent adapter box body serves as a physical support platform, providing structural installation support, electromagnetic shielding, and thermal management pathways for each module. Simultaneously, its integrated sealed box structure and IP54 dustproof and waterproof rating form a unified physical protection boundary. The main trunk of the integrated wiring harness assembly extends from inside the intelligent adapter box body. The input end of the main trunk connects to the signal output end of the modular interface assembly, and the output end connects to the signal input end of the signal acquisition unit in the intelligent control module. The multi-protocol signal cores inside the main trunk are connected one-to-one with the transceivers of each protocol in the signal acquisition unit, enabling external signals received by the modular interface assembly to be transmitted to the signal acquisition unit via the main trunk. The output of the signal acquisition unit is connected to the first core of the multi-core microcontroller via a parallel data bus. The second core of the multi-core microcontroller is connected to the artificial intelligence diagnostic module via an internal bus. The third core of the multi-core microcontroller is connected to the near-field communication reader and the wireless communication unit via a serial peripheral interface. The output of the artificial intelligence diagnostic module is connected to the instruction input of the automatic fault simulation unit. The relay array output of the automatic fault simulation unit is connected to the test link node of the integrated wiring harness assembly via a signal injection line. The overcurrent protection unit, reverse connection protection unit, electrostatic discharge protection unit, surge protection unit, and short circuit protection unit of the safety protection module are connected in series in the power supply line and signal line of the integrated wiring harness assembly. The high-voltage interlock circuit and insulation monitoring unit are connected in series in the high-voltage line of the new energy adapter module. The output of the high-voltage signal processing unit of the new energy adapter module is connected to the analog input channel of the signal acquisition unit via a low-voltage signal line. In summary, based on the above connection relationships, after external signals are connected to the system via modular interface components, they sequentially pass through the integrated wiring harness backbone transmission, the signal acquisition and processing of the intelligent control module, and the fault identification of the artificial intelligence diagnostic module. Finally, the automatic fault simulation unit determines whether to inject a fault signal based on the identification results. Simultaneously, the safety protection module provides real-time protection for the entire signal link. The high-voltage signal from the new energy adaptation module is isolated and converted before being integrated into the main signal link for diagnostic analysis. The signal acquisition unit of the intelligent control module synchronously acquires multi-protocol signals in the test link at a sampling rate of no less than 1kHz. The multi-channel synchronous sample-and-hold circuit inside the signal acquisition unit ensures that each channel completes signal sampling at the same time, avoiding time deviations caused by inconsistent sampling times of different channels. For each sampling moment... The signal acquisition unit collects... The signal values ​​of each signal channel form the sampling vector at that moment. ,in For the first Each signal channel at time The sampled values, in units of V, are indicated by the superscript. This represents the vector transpose. The sampled vector output by the signal acquisition unit. The data is transmitted via a parallel data bus to the first core of the multi-core microcontroller, where the first core receives the sampled vector. The signal configuration parameters are compared with those obtained from the near-field communication card reader. These parameters include the protocol type parameters for each signal channel. and impedance matching parameters ,in For the first The protocol type identifier for each signal channel is a predefined enumeration value, corresponding to CAN protocol, CAN FD protocol, Ethernet protocol and LIN protocol respectively; For the first The target value of the termination matching resistor for each signal channel, in units of This value is determined by the impedance matching parameters recorded in the signal definition mapping table. The first kernel determines this based on the protocol type parameters. Identify the first The signal types for each signal channel include CAN protocol, CAN FD protocol, Ethernet protocol, and LIN protocol. After identifying the signal type, the first kernel calls the corresponding protocol type parameter. The corresponding protocol parsing program analyzes the sampled values. The process involves deframe processing, converting the original physical layer voltage values ​​into digital signals carrying protocol information, including message identifiers, data field content, and checksums. The first kernel then arranges the deframed digital signals from each channel according to their channel numbers to construct a multi-dimensional timing signal matrix. The multi-dimensional timing signal matrix is ​​as follows: OK Column matrix, where The number of signal channels is determined by the signal definition mapping table of the currently connected modular interface component; This represents the number of historical sampling points for each signal channel, dynamically allocated by the multi-core microcontroller based on the current sampling rate. The multi-dimensional timing signal matrix... Line number Column elements are represented as ,in For channel indexing, This serves as an index for historical sampling moments. Each column of the multidimensional time-series signal matrix constitutes the current sliding time window. The state vector of a signal channel at a certain historical sampling moment. Each row constitutes the state vector of a certain signal channel at a certain historical sampling moment. The time series of historical sampling moments. The first core of the multi-core microcontroller transmits the multi-dimensional time-series signal matrix to the second core via shared memory. The second core runs a two-layer stacked long short-term memory neural network for the artificial intelligence diagnostic module. During inference, the two-layer stacked long short-term memory neural network processes the continuous data in the multi-dimensional time-series signal matrix. Perform sliding window analysis on each sampling point, specifically: take the current time... and before The sampled data at each sampling time point forms a sample of size [size missing]. input matrix , where each column vector This matrix, representing all signal channel sample values ​​at a given sampling time, serves as the input to a two-layer stacked Long Short-Term Memory (LSTM) neural network. After processing by the first LSM layer, this input matrix outputs the first layer's hidden state sequence. ,in For the first layer of the Long Short-Term Memory network at time... The hidden state vector, with a dimension of 256, physically represents the feature representation of the first-layer LSTM at the current time step after encoding the input temporal data; the first-layer hidden state sequence. The input is fed into the second layer of the Long Short-Term Memory network, and the output is the sequence of hidden states of the second layer. ,in For the second layer of the Long Short-Term Memory network at time... The hidden state vector, with a dimension of 256, physically represents the higher-order feature representation of the temporal features extracted by the first layer and further abstracted and encoded by the second-layer LSTM at the current time step. The second-layer Long Short-Term Memory network at time step... Hidden state vector The fault category code is output after transformation by the fully connected layer. Fault confidence value and fault location code When the fault confidence value Greater than the preset confidence threshold At that time, the AI ​​diagnostic module outputs valid fault identification results. The automatic fault simulation unit receives the fault category code output by the AI ​​diagnostic module. and fault location coding Then, based on the preset fault type-relay operation mapping table, the sequence of operations to be executed is determined. (Matrix relay array) The horizontal control line connects to the general-purpose input / output interface of the multi-core microcontroller. The column control lines connect to the signal injection nodes of each test link. The relays at each row-column intersection are controlled by the level combination of the corresponding row and column control lines. The automatic fault simulation unit injects fault signals by applying specific level combinations to the selected row and column control lines, causing the relays at the corresponding intersections to turn on or off. For multi-fault superposition injection scenarios, the automatic fault simulation unit arranges high-voltage faults, communication faults, and analog signal faults in a preset priority order, executing the relay operation sequence for each fault type sequentially, with high-voltage faults taking precedence over communication faults, and communication faults taking precedence over analog signal faults. After fault injection is complete, the automatic fault simulation unit injects the corresponding fault signal into the test link through the relay array. This fault signal is superimposed on the original signal and transmitted together to the device under test in the virtual test bench. Throughout the entire signal processing link, the safety protection module monitors the load current in the power supply line in real time. and transient voltage spikes in signal lines, when load current When the overcurrent protection threshold is exceeded or an electrostatic discharge (ESD) pulse or surge pulse occurs, the safety protection module triggers the corresponding protection unit to perform a shutdown or clamping action, protecting subsequent circuits from damage. The new energy adaptation module uses a high-voltage voltage divider resistor network in its high-voltage signal processing unit to convert the high-voltage signal into a low-voltage signal via resistive voltage division. This low-voltage signal is then transmitted to the signal acquisition unit via an isolation amplifier using capacitive or magnetic isolation, participating in the fault identification process of the artificial intelligence diagnostic module along with multi-protocol signals. These modules form a complete closed-loop signal processing and feedback control chain: "signal input → signal distribution and transmission → synchronous acquisition of multi-protocol signals → construction of a multi-dimensional timing signal matrix → LSTM timing feature extraction and fault identification → fault signal injection → real-time safety protection → high-voltage signal isolation conversion and integration into the main link."

[0078] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of disclosure in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the foregoing disclosed concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. An integrated intelligent vehicle virtual bench test harness adapter system, characterized by, It includes the intelligent adapter box body, integrated wiring harness assembly, intelligent control module, modular interface assembly and safety protection module; The intelligent adapter box body is an integrated sealed box-type structure; The integrated wire harness assembly is disposed within the intelligent adapter box body and includes a wire harness backbone, wire harness nodes and several functional wire harness branches. The wire harness backbone adopts a double-layer shielding structure. The intelligent control module is located inside the intelligent adapter box and includes a signal acquisition unit, an artificial intelligence diagnostic module, and an automatic fault simulation unit. The artificial intelligence diagnostic module has a built-in neural network fault identification algorithm. The signal acquisition unit acquires multi-protocol signals in the test link and outputs them to the artificial intelligence diagnostic module; The artificial intelligence diagnostic module generates fault identification results based on the multi-protocol signals; The automatic fault simulation unit injects the corresponding fault signal into the test link through a relay array based on the fault identification result. The modular interface component can be detachably installed on the smart adapter box body via a quick-release structure, including a replaceable interface module, which has a built-in identification chip. The intelligent control module configures the acquisition parameters of the signal acquisition unit according to the reading results of the identification chip; The safety protection module is electrically connected to the integrated wiring harness assembly and the intelligent control module, respectively.

2. The integrated smart car virtual test stand harness patching system of claim 1, wherein, The quick-release structure is a magnetic quick-release structure, including a permanent magnet array and a mechanical anti-drop buckle; The identification chip is a near-field communication chip, and the smart adapter box body is equipped with a near-field communication card reader that matches the near-field communication chip; After the replaceable interface module is connected, the near-field communication reader reads the interface encoding information and signal definition mapping table stored in the near-field communication chip; The intelligent control module retrieves the signal configuration parameters corresponding to the replaceable interface module based on the interface encoding information. The signal configuration parameters include the protocol type parameters and impedance matching parameters for each signal channel; The intelligent control module configures the terminal matching resistor of the corresponding signal link according to the impedance matching parameters.

3. The integrated smart car virtual test stand harness patching system of claim 2, wherein, The intelligent control module also includes a multi-core microcontroller; The first core of the multi-core microcontroller performs signal acquisition and preprocessing; The second core of the multi-core microcontroller runs the neural network fault identification algorithm of the artificial intelligence diagnostic module; The third core of the multi-core microcontroller performs interface identification and wireless communication management. Data is transferred between kernels via shared memory; The signal acquisition unit acquires signals at a sampling rate of not less than 1 kHz, with a sampling error within ±0.5%. The signal acquisition unit supports CAN protocol signal acquisition, CAN FD protocol signal acquisition, Ethernet protocol signal acquisition and LIN protocol signal acquisition; The multi-protocol signals acquired by the signal acquisition unit are preprocessed by the multi-core microcontroller and then constructed into a multi-dimensional timing signal matrix.

4. The integrated smart car virtual test stand harness patching system of claim 3, wherein, The double-layer shielding structure includes an inner aluminum foil shielding layer and an outer woven mesh shielding layer; The main body of the wiring harness is covered with a flame-retardant and heat-resistant protective sleeve. The functional harness branch is connected to the harness node via gold-plated terminals; The wire harness node is equipped with a signal distributor; The signal distributor distributes the multi-protocol signals transmitted by the harness backbone to the corresponding functional harness branches according to the frequency range. The shielding layer of each functional harness branch and the shielding layer of the harness trunk are electrically connected at the harness nodes.

5. The integrated smart vehicle virtual test stand test strip adapter system of claim 1, wherein, The neural network of the artificial intelligence diagnostic module is a double-layer stacked long short-term memory neural network; The input layer of the dual-layer stacked long short-term memory neural network receives the multi-dimensional time-series signal matrix constructed by the signal acquisition unit; The hidden layer of the double-layer stacked long short-term memory neural network extracts temporal features from the multidimensional temporal signal matrix; The output layer of the double-layer stacked long short-term memory neural network outputs fault category code, fault confidence value and fault location code; The relay array of the automatic fault simulation unit is an M-row N-column matrix relay array, where M and N are both integers greater than 1. The matrix relay array supports series injection mode, parallel injection mode and matrix injection mode; The automatic fault simulation unit injects single fault signals or multiple fault superposition signals into the test link through the matrix relay array; During the multi-fault superposition injection, the automatic fault simulation unit performs fault injection according to the priority order of high-voltage faults taking precedence over communication faults, and communication faults taking precedence over analog signal faults.

6. The integrated smart car virtual chassis test daisy chain patching system of claim 5, wherein, The multidimensional time-series signal matrix is ​​a k-row, n-column matrix, where k represents the number of signal channels and n represents the number of historical sampling points for each signal channel. The dual-layer stacked long short-term memory neural network analyzes the multidimensional time-series signal matrix through a sliding window. The window length of the sliding window is w sampling points, and the step size is s sampling points, where w and s are both positive integers and s is less than w. The dual-layer stacked long short-term memory neural network identifies fault modes, including open-circuit fault mode, short-circuit fault mode, signal attenuation fault mode and signal interference fault mode, through sliding window analysis. The number of hidden layer units in the double-layer stacked long short-term memory neural network is 256; The output of the hidden layer is connected to the fully connected layer, and the fully connected layer outputs the fault category code, the fault confidence value, and the fault location code.

7. The integrated smart vehicle virtual chassis test daisy chain tap system of claim 1, wherein, The safety protection module includes an overcurrent protection unit, a reverse connection protection unit, an electrostatic protection unit, a surge protection unit, a short circuit protection unit, a high-voltage interlock circuit, and an insulation monitoring unit. The overcurrent protection threshold of the overcurrent protection unit is adjustable from 5A to 30A; The electrostatic discharge protection level of the electrostatic protection unit is not less than ±8kV for contact discharge and not less than ±15kV for air discharge. The surge protection level of the surge protection unit is not lower than ±2kV; The short-circuit response time of the short-circuit protection unit is no more than 1ms; The high-voltage interlock circuit adopts a low-level loop detection topology, including a high-voltage interlock signal source, a current-limiting resistor, a detection loop, and an isolation unit; The insulation resistance monitoring threshold of the insulation monitoring unit is not less than 1MΩ; When the high-voltage connector is not locked or the loop resistance is greater than the preset resistance threshold, the isolation unit outputs an interrupt signal, and the high-voltage interlock circuit cuts off the high-voltage path according to the interrupt signal. The response time of the high-voltage interlock circuit from detecting the abnormal loop resistance to cutting off the high-voltage path is no more than 10ms.

8. The integrated smart car virtual chassis test daisy chain patching system of claim 7, wherein, The intelligent adapter box body is also equipped with a new energy adaptation module; The new energy adaptation module includes a high-voltage signal processing unit and a dedicated connector for the battery management system. The high-voltage signal processing unit is electrically connected to the high-voltage interlock circuit and the insulation monitoring unit. The dedicated connector for the battery management system is electrically connected to the high-voltage signal processing unit. The high-voltage signal processing unit supports the acquisition and isolated transmission of high-voltage signals of no less than 200V; The high-voltage signal processing unit converts the acquired high-voltage signal into a low-voltage safety signal of 0V to 5V through voltage and current sensors, and then transmits it to the signal acquisition unit. The dedicated connector for the battery management system conforms to the ISO 15118 standard and supports bidirectional transmission of battery status monitoring signals and bidirectional transmission of charging control signals. The signal acquisition unit uses the low-voltage safety signal and the multi-protocol signal to construct the multi-dimensional timing signal matrix.

9. The integrated intelligent vehicle virtual bench test wiring harness adapter system according to claim 8, characterized in that, The intelligent control module also includes a wireless communication unit and a data storage and cloud synchronization unit; The data storage and cloud synchronization unit has a built-in high-speed flash memory with a storage capacity of not less than 64GB. The wireless communication unit supports wireless local area network communication, cellular communication and low-power wide area network communication. The data storage and cloud synchronization unit synchronizes the test data to the cloud server through the wireless communication unit; Before sending the test data to the cloud server, the data storage and cloud synchronization unit uses an encryption algorithm to encrypt the test data. The cloud server stores a dataset of fault characteristics. When the accumulated fault feature data of the cloud server exceeds a preset threshold, the cloud server triggers the retraining of the neural network in the artificial intelligence diagnostic module, and sends the retrained and updated model parameters to the intelligent control module through the wireless communication unit.

10. The integrated intelligent vehicle virtual bench test wiring harness adapter system according to claim 1, characterized in that, The intelligent adapter box body is also equipped with a virtual rack connection port and a signal conversion panel; The signal transfer panel is equipped with banana-shaped sockets arranged in a categorized manner. The panel banana socket includes analog signal sockets, digital signal sockets, pulse signal sockets, power drive signal sockets, CAN communication signal sockets, Ethernet signal sockets, LIN signal sockets, and high voltage signal sockets; The analog signal type socket is marked in blue; The digital signal type socket is marked in green; The pulse signal type socket is marked in yellow; The power drive signal type socket is marked in orange. The CAN communication signal type socket is marked in red; The Ethernet signal type socket is marked in purple. The LIN signal type socket is marked in gray. The high-voltage signal socket is marked in black and has a high-voltage warning label. The different signal types of the panel banana sockets are distinguished by color markings or shape markings, or by a combination of color and shape markings. The banana socket on the panel has a raised structure to prevent misinsertion.

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