Electronic paper module, display panel and display device

By configuring compensation structures on the scan lines and data lines in the irregular display area, the problem of uneven RC load was solved, achieving uniformity of brightness and grayscale in the display area and improving the display effect.

CN123047174APending Publication Date: 2026-11-06JIANGXI XINGTAI TECH INC
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Patent Information

Application Number
CN202611422215.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-14
Publication Date
2026-11-06

AI Technical Summary

Technical Problem

In irregularly shaped display areas, especially circular display areas, uneven RC load on scan lines and data lines leads to poor display phenomena, such as uneven display, blurred edges, and ghosting, which affects the user experience.

Method used

By configuring compensation structures on the scan lines and data lines, including serpentine winding and line width variations, the line length and line width are adjusted to compensate for differences in resistance and capacitance, so that the total parasitic resistance and total parasitic capacitance of each row/column tend to be consistent.

Benefits of technology

It significantly reduces the delay difference of signals on different paths, improves the brightness and grayscale uniformity of the display area, eliminates edge display abnormalities, and enhances display performance.

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Abstract

This invention discloses an electronic paper module, display panel, and display device, belonging to the field of electronic paper display technology. It addresses the problem of uneven RC load caused by varying scan lines and data lines of different lengths, leading to uneven display, blurred edges, and ghosting. The electronic paper module drives pixels in irregularly shaped display areas and includes an array of pixel electrodes, multiple scan lines, multiple data lines, and a common electrode layer. For irregularly shaped display areas, this solution configures a scan line compensation structure with serpentine winding for the scan lines and a data line compensation structure for the data lines. By increasing the trace length and adjusting the line width, the resistance and capacitance differences of traces of different lengths can be compensated, making the total parasitic resistance and capacitance of different scan lines and data lines more consistent. This solution can balance the RC load of irregularly shaped electronic paper displays, eliminate display defects, and is suitable for various irregularly shaped electronic paper products, such as circular ones.
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Description

Technical Field

[0001] This invention relates to the field of electronic paper display technology, specifically to an electronic paper module, display panel, and display device, and is particularly suitable for electronic paper products with irregular shapes. Background Technology

[0002] With the development of electronic paper display technology, people have placed higher demands on the personalized appearance and display performance of display devices. Irregularly shaped displays, such as circular displays, are widely used due to their aesthetic appeal and unique design. However, in irregularly shaped display areas, such as circles, the differences in trace length and number of driving pixels between the edge and center areas are significant, resulting in uneven distribution of the total resistance (RC loading) of the scan lines (gate lines) and data lines (data lines).

[0003] Specifically, for circular display areas, the number of pixels driven by each row of scan lines and each column of data lines gradually decreases from the center to the edge, resulting in unequal parasitic resistance and capacitance in each row / column. This uneven RC load causes different delays and voltage drops in the drive signal at different locations on the screen, leading to uneven display, blurred edges, ghosting, and other undesirable phenomena, severely affecting display quality and user experience.

[0004] Therefore, how to compensate for the traces in irregularly shaped display areas in order to balance the RC load of different scan lines and data lines has become an urgent technical problem to be solved. Summary of the Invention

[0005] The purpose of this invention is to provide an electronic paper module, a display panel, and a display device to solve the problem of poor display caused by uneven RC loads (i.e., uneven resistance and capacitance loads) of scan lines and data lines in irregularly shaped display areas, especially circular display areas.

[0006] To overcome the differences in resistance and capacitance caused by irregular wiring, scan lines, or data lines of varying lengths, the applicant proposes an electronic paper module for driving pixels within an irregularly shaped display area. This module includes multiple pixel electrodes arranged in an array, multiple scan lines, multiple data lines, and a common electrode layer. The common electrode layer and the pixel electrodes form a capacitor. The multiple data lines provide data signals to pixels in corresponding columns, and the multiple scan lines provide scan signals to pixels in corresponding rows. For the irregularly shaped display area, each scan line is configured with a scan line compensation structure to make the total parasitic resistance and total parasitic capacitance of different scan lines tend to be consistent. Each data line is configured with a data line compensation structure to make the total parasitic resistance and total parasitic capacitance of different data lines tend to be consistent. The compensation structure compensates for the resistance and / or capacitance differences caused by scan lines or data lines of different lengths. The scan line compensation structure includes a serpentine winding portion.

[0007] By adding a serpentine winding section, the length of the short resistance wire is compensated for, as well as the difference in capacitance, so that the display driving performance is consistent and the display performance of each part can be balanced.

[0008] In order to compensate for both resistance and capacitance, the applicant proposes that the scan line or data line compensation structure include a line width variation portion.

[0009] Capacitance can be effectively compensated by increasing or decreasing the line width.

[0010] Regarding capacitance, which is mainly generated at the location of the corresponding common electrode layer, the applicant proposes that the electronic paper module includes a display area and a compensation area, the pixel electrodes are distributed in the display area, the common electrode layer covers the display area and the compensation area, and the compensation structure is disposed in the compensation area.

[0011] By setting a corresponding common electrode layer in the compensation area, the compensated scan lines and data lines generate capacitance with the common electrode layer, allowing the compensation capacitance value to be consistent with that of the long line area.

[0012] The overall resistance of a short conductor can be increased by reducing its width; or the overall resistance of a long conductor can be decreased by increasing its width.

[0013] In a circular display device, the capacitance or resistance of long wiring is distributed along the length of the wiring. The applicant proposes that the scan line compensation structure and the data line compensation structure compensate at the near end and far end of the scan line or data line, respectively.

[0014] By setting scan line compensation structures and data line compensation structures at both ends of the wiring, the performance of the short line can be accurately compensated to be consistent with that of the long line. Of course, the lengths of the compensation wires at both ends can be adjusted to make the compensation performance more complete and the symmetry and consistency of the display better.

[0015] After extensive experiments and statistical fitting of data, the applicant proposed that the compensation structure is designed based on the resistance difference ΔR between the edge and center of the irregular display area. The resistance difference ΔR gradually decreases from the middle row to both sides. The resistance compensation amount ΔR = ρ × (L / W), where ε is the dielectric constant of the material, ρ is the surface resistance of the material, d is the material thickness, L is the length of the trace compensation part, and W is the width of the trace compensation part.

[0016] After extensive experiments and data statistical fitting, the applicant proposed that the compensation structure is designed based on the capacitance difference ΔC between the edge and center of the irregular display area. The capacitance difference ΔC gradually decreases from the middle row to both sides. The capacitance compensation amount ΔC = ε × (ΔS / d) ≈ ε × L × W / d, where ε is the dielectric constant of the material, ρ is the surface resistance of the material, d is the material thickness, L is the length of the trace compensation part, and W is the width of the trace compensation part.

[0017] The applicant proposes that the irregularly shaped display area is a circular display area. Rectangular or circular display areas are widely used forms, and with compensation, the display performance of a large number of products can be improved in a circular irregularly shaped display area.

[0018] An electronic paper display panel includes the aforementioned electronic paper module and an electronic paper display layer located on the electronic paper module.

[0019] An electronic paper display device includes the aforementioned electronic paper display panel and a driving circuit electrically connected to the electronic paper module, the driving circuit being used to provide scanning signals and data signals.

[0020] Beneficial effects: Compared with the prior art, the present invention has the following beneficial effects: Improved display uniformity: By addressing the characteristics of irregularly shaped display areas, especially circular ones, resistor and capacitor compensation is applied to each row of scan lines and each column of data lines. This makes the RC load of all scan lines and data lines more consistent, significantly reducing the delay differences of signals on different paths. As a result, the brightness and grayscale uniformity of the entire display area are effectively improved, and edge display abnormalities are eliminated.

[0021] Improved display performance: This solution compensates for performance issues by adjusting the physical dimensions of the traces, including their length and width. The method is simple, the process is mature, and the reliability is high. Both serpentine winding and linewidth adjustment can be completed in the existing photomask design process without adding extra complex process steps or expensive components, making it easy to implement and cost-effective.

[0022] Wide range of applications: This solution is not only applicable to circular electronic paper displays, but also, through its core idea of ​​uniform compensation of RC load, it can be extended to other shapes, such as elliptical, irregular polygonal edges and other irregularly shaped display products, with good versatility and scalability. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of a circular electronic paper module; Figure 2 A schematic diagram of a transistor TFT driving an electronic paper pixel; Figure 3 This is a schematic diagram of the compensation in Example 1; Figure 4 This is a schematic diagram of the compensation in Example 4; Figure 5 This is a schematic diagram of the compensation in Example 5; Figure 6 This is a schematic diagram of a rectangular display area in the prior art. Detailed Implementation

[0024] It should be noted that the following description of preferred embodiments of this application does not constitute any limitation on this application. The description of preferred embodiments is merely an illustration of the general principles of this application. The embodiments described in this application are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0025] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the equipment or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," and technical features numbered with Arabic numerals 1, 2, 3, etc., and designations such as "A" and "B," are used for descriptive purposes only, for ease of explanation, and do not represent a temporal or spatial order; they should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first," "second," and numbered with Arabic numerals 1, 2, 3, etc., may explicitly or implicitly include one or more of that feature. In the description of this application, "several" means two or more, unless otherwise expressly and specifically defined.

[0026] The core of this invention lies in identifying the root cause of uneven RC load in each row / column of irregularly shaped display areas due to the varying number of pixel rows and columns, and proposing an electronic paper structure that compensates for this by adjusting the physical parameters of the traces themselves.

[0027] like Figure 6 In the existing technology, for a rectangular display area, the length and width of each gate line in the display area are equal, and the length and width of each data line in the display area are equal.

[0028] The gate capacitance of a single pixel is cg, and the gate resistance of a single pixel is rg; the data capacitance of a single pixel is cd, and the data resistance of a single pixel is rd; the number of pixels in the 1st row and the i-th row are q and p respectively, the total capacitance of the pixels in the 1st row is Cg1 = q × cg, and the total resistance of the pixels is Rg1 = q × rg; the total capacitance of the pixels in the i-th row is Cgi = p × cg, and the total resistance of the pixels is Rgi = p × rg, that is, Cg1 = Cgi, Rg1 = Rgi.

[0029] The number of pixels in column 1 and column j are x and y respectively. The total capacitance of the pixels in column 1 is Cd1 = x × cd, and the total resistance of the pixels is Rd1 = x × rd. The total capacitance of the pixels in column j is Cdj = y × cd, and the total resistance of the pixels is Rdj = y × rd. When the display area is rectangular: the number of pixels in row 1 and row i are equal, and the number of pixels in column 1 and column j are equal, i.e., q = p, x = y, i.e., Cg1 = Cgi, Rg1 = Rgi, Cd1 = Cdj, Rd1 = Rdj. The total capacitance of pixels in each row is equal, the total resistance of pixels in each row is equal, the total capacitance of pixels in each column is equal, and the total resistance of pixels in each column is equal. The display loading is uniform and the display is normal.

[0030] However, for irregularly shaped display areas, such as circles, ... Figure 1 The number of pixels in the first row and the i-th row are not equal, the number of pixels in the first column and the j-th column are not equal, the total capacitance of pixels in each row is not equal, the total resistance of pixels in each row is not equal, the total capacitance of pixels in each column is not equal, and the total resistance of pixels in each column is not equal. This uneven loading can easily cause display abnormalities. Therefore, it is necessary to perform capacitance and resistance compensation to improve the display effect and performance of electronic paper display devices.

[0031] Figure 1 This is a schematic diagram of a circular electronic paper module. Figure 1 Taking a circular shape as an example, it includes multiple pixel electrodes 1030 arranged in an array, multiple scan lines, multiple data lines, and a common electrode layer 1020; the TFT substrate 1010 is the bottom layer; the common electrode layer 1020 and the pixel electrodes 1030 form a capacitor, and the ink capsule layer of the electronic paper is disposed between the common electrode layer 1020 and the pixel electrodes 1030.

[0032] like Figure 1 In a circular display screen, the wiring in the center line is the longest, and the wiring becomes shorter as it approaches the ends. The wiring length is shortest at the top and bottom ends, where the resistance and capacitance performance are quite different.

[0033] Figure 2 This is a schematic diagram of a transistor TFT driving an electronic paper pixel.

[0034] like Figure 2Multiple data lines 2020 provide data, and multiple scan lines 2010 sequentially select G1 or G2 according to the clock cycle, so that the TFT transistor 2030 is turned on, allowing the capacitor formed between the pixel electrode 2050 and the common electrode layer to charge or discharge, driving the movement of charged particles in the ink capsule layer. The resistance in the data line 2020 or scan line 2010 varies with the line length, which has a significant impact on the current of the charging and discharging circuit. At the same time, the capacitance between the trace and the common electrode layer also affects the circuit's charging and discharging performance.

[0035] Figure 3 This is a schematic diagram of the compensation in Example 1.

[0036] like Figure 3 An electronic paper module for driving pixels within a circular display area includes multiple pixel electrodes arranged in an array, multiple scan lines 3010, multiple data lines 3020, and a common electrode layer 3030; the pixel electrodes Figure 3 Not shown in the diagram; the common electrode layer and the pixel electrode form a capacitor; the multiple data lines are used to provide data signals to the pixels in the corresponding column, and the multiple scan lines are used to provide scan signals to the pixels in the corresponding row; for the irregular display area, each scan line is configured with a scan line compensation structure to make the total parasitic resistance and total parasitic capacitance of different scan lines tend to be consistent; each data line is configured with a data line compensation structure to make the total parasitic resistance and total parasitic capacitance of different data lines tend to be consistent; the compensation structure is used to compensate for the resistance and / or capacitance differences caused by scan lines or data lines of different lengths; the scan line compensation structure includes a serpentine winding portion.

[0037] By adding a serpentine winding section, the length of the short resistance wire is compensated for, as well as the difference in capacitance, so that the display driving performance is consistent and the display performance of each part is balanced.

[0038] To simultaneously compensate for resistance and capacitance, the scan line or data line compensation structure includes a linewidth variation section. By reducing the linewidth of short lines, the overall resistance of the short conductors is increased; or by increasing the linewidth of long lines, the overall resistance of the long lines is reduced; by increasing or decreasing the linewidth, capacitance can be effectively compensated.

[0039] The line width and line length can be combined according to requirements. The compensation structure at each position can be a different combination of line width and line length so that each data line or scan line has a resistance and capacitance value that is as consistent as possible.

[0040] Regarding capacitance, which is mainly generated at the location of the corresponding common electrode layer, the applicant proposes that the electronic paper module includes a display area and a compensation area, the pixel electrodes are distributed in the display area, the common electrode layer covers the display area and the compensation area, and the compensation structure is disposed in the compensation area.

[0041] By setting a corresponding common electrode layer in the compensation area, the compensated scan lines and data lines generate capacitance with the common electrode layer, allowing the compensation capacitance value to be consistent with that of the long line area.

[0042] Figure 4 This is a schematic diagram of compensation in Example 4. Figure 4 At both ends of the data cable, serpentine compensation curves are set respectively. In the figure, the far-end compensation curve 4010 and the near-end compensation curve 4020 are set at both ends of the data cable. As the distance from the circular part is further away from the circular part, the compensation line of the data cable becomes thinner and the serpentine part becomes longer. Figure 4 The reference number 4030 is the common electrode layer.

[0043] like Figure 4 Based on the difference value, the capacitance and resistance of the data are compensated. The overlap area with the com is increased by increasing the data trace length L or increasing the data line width through serpentine winding, so as to compensate for the data resistance and capacitance. The compensation is performed at the near end and the far end respectively. The purpose is to make the data driving delay of the same column of pixels equal and reduce the data driving difference. Finally, after compensation, (Cdm / 2-Cdj) / Cdm / 2×100% and (Rdm / 2-Rdj) / Rdm / 2×100% must be within ±5%. Figure 5 This is a schematic diagram of compensation in Example 5. (As shown...) Figure 5 At both ends of the scan line, serpentine compensation curves are set respectively. In the figure, the far-end compensation curve 5020 and the near-end compensation curve 5010 are set at both ends of the data line. As the distance from the circular part is further away, the compensation line of the data line becomes thinner and the serpentine part becomes longer. Figure 5 The reference number 5030 is the common electrode layer.

[0044] like Figure 5 In some embodiments, gate capacitance and resistance are compensated based on the difference value. The overlap area with com is increased by increasing the gate trace length L or increasing the gate line width through serpentine winding, thereby compensating for the gate resistance and capacitance. The compensation is performed at the near end and the far end respectively. The purpose is to make the gate driving delay of pixels in the same column equal and reduce the gate driving difference. Finally, after compensation, (Cgn / 2-Cgi) / Cgn / 2×100% and (Rgn / 2-Rgi) / Rgn / 2×100% must be within ±5%.

[0045] In a circular display device, the capacitance or resistance of long wiring is distributed along the length of the wiring. The scan line compensation structure and the data line compensation structure compensate for the near and far ends of the scan line or data line, respectively.

[0046] By setting scan line compensation structures and data line compensation structures at both ends of the wiring, the performance of the short line can be accurately compensated to be consistent with that of the long line. Of course, the lengths of the compensation wires at both ends can be adjusted to make the compensation performance even more perfect.

[0047] After extensive experimentation and statistical fitting of data, the compensation structure is designed based on the resistance difference ΔR between the edge and center of the irregular display area. The resistance compensation amount ΔR = ρ × (L / W), where ε is the dielectric constant of the material, ρ is the sheet resistance of the material, d is the material thickness, L is the length of the trace compensation section, and W is the width of the trace compensation section. The differences in resistance or capacitance of the gate in the circular display area, ΔCgi and ΔRgi, are determined to gradually decrease from the middle row (row n / 2) towards both sides (row 1 and row n). The resistance difference ΔR gradually decreases from the middle row towards both sides.

[0048] After extensive experimentation and statistical fitting of data, the compensation structure is designed based on the capacitance ΔC between the edge and center of the irregular display area. The capacitance compensation ΔC = ε × (ΔS / d) ≈ ε × L × W / d, where ε is the dielectric constant of the material, d is the material thickness, L is the length of the compensation trace, and W is the width of the compensation trace. The tolerance value ΔC gradually decreases from the middle row towards both sides. The difference values ​​ΔCdj and ΔRdj between the capacitance or resistance of the circular display area (data) gradually decrease from the middle column (column m / 2) towards both sides (columns 1 and m) are determined.

[0049] The display area is rectangular or circular, which are widely used forms. The circular irregular display area is compensated for, and the display performance of a large number of products can be improved.

[0050] An electronic paper display panel includes the aforementioned electronic paper module and an electronic paper display layer located on the electronic paper module.

[0051] An electronic paper display device includes the aforementioned electronic paper display panel and a driving circuit electrically connected to the electronic paper module, the driving circuit being used to provide scanning signals and data signals.

[0052] The specific calculation of capacitor compensation and resistor compensation can be performed as follows: Step 1: Determine the RC difference values. Based on the circular area design of the display panel, determine the following differences through calculation or simulation: the parasitic resistance (Rg) and parasitic capacitance (Cg) of the scan lines (Gate lines) gradually decreasing from the center to the edge of the display area, ΔRg and ΔCg; and the parasitic resistance (Rd) and parasitic capacitance (Cd) of the data lines gradually decreasing, ΔRd and ΔCd. This process can be completed using EDA design software.

[0053] Step 2: Design the compensation structure. Based on the difference values ​​(ΔR, ΔC) determined in Step 1, reverse design is performed using the capacitance formula ΔC=ε×(ΔS / d)≈ε×L×W / d and the resistance formula ΔR=ρ×(L / W).

[0054] Gate line compensation: For short gate lines located at the edge of a circular area, the length of the trace (L) is artificially increased or the L / W ratio is adjusted by increasing the complexity of its routing path, such as by using serpentine routing or appropriately widening the line width (W), in order to accurately match the required ΔRg and ΔCg compensation amount of the target area.

[0055] Data line compensation: The principle is the same as that of scan lines. For shorter data lines, a serpentine winding section is added or the line width is adjusted during routing to increase the equivalent parasitic resistance and parasitic capacitance, matching the RC value of the longer data lines in the central area.

[0056] Compensation can be performed simultaneously at both the near end (close to the driver chip, signal input end) and the far end of the trace to ensure that the timing (delay) of the received signals from different pixels in the same row (column) is basically consistent. In the design, this can be achieved by adjusting only L, only W, or adjusting both L and W simultaneously. Figure 4 and Figure 5 This is just an example of increasing L by using a serpentine winding method; in actual design, the methods can be flexibly combined and adjusted.

[0057] Step 3: Layout Design and Verification. Integrate the designed compensation trace structure into the layout design of the e-paper module. After completing the layout design, use parasitic parameter extraction tools and timing analysis tools to perform post-simulation verification on the entire display area to confirm that the RC delay differences of all scan lines and data lines after compensation are within an acceptable range, ensuring that display uniformity is effectively improved.

[0058] The above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention.

Claims

1. An electronic paper module, characterized in that, The electronic paper module is used to drive pixels in the irregular display area, including multiple pixel electrodes, multiple scan lines, multiple data lines and a common electrode layer arranged in an array; The common electrode layer forms a capacitor with the pixel electrode; The multiple data lines are used to provide data signals to the pixels in the corresponding column, and the multiple scan lines are used to provide scan signals to the pixels in the corresponding row; For the irregular display area, each scan line is equipped with a scan line compensation structure, which is used to make the total parasitic resistance and total parasitic capacitance of different scan lines tend to be consistent; Each of the data lines is configured with a data line compensation structure, which is used to make the total parasitic resistance and total parasitic capacitance of different data lines tend to be consistent. The compensation structure is used to compensate for the differences in resistance and / or capacitance caused by scan lines or data lines of different lengths; The scan line compensation structure includes a serpentine winding section.

2. The electronic paper module according to claim 1, characterized in that, The scan line or data line compensation structure includes a line width, which can be varied. The overall resistance of a short conductor can be increased by reducing its width; or the overall resistance of a long conductor can be decreased by increasing its width.

3. The electronic paper module according to claim 1, characterized in that, The electronic paper module includes a display area and a compensation area. The pixel electrodes are distributed in the display area, the common electrode layer covers the display area and the compensation area, and the compensation structure is disposed in the compensation area.

4. The electronic paper module according to claim 1, characterized in that, The scan line compensation structure is disposed at the proximal and / or distal end of the scan line to which it is located; the data line compensation structure is disposed at the proximal and / or distal end of the data line to which it is located.

5. The electronic paper module according to claim 1, characterized in that, The compensation structure is designed based on the resistance difference ΔR between the edge and center of the irregular display area. The resistance difference ΔR gradually decreases from the middle row to both sides. The resistance compensation amount ΔR = ρ × (L / W), where ρ is the surface resistance of the material, d is the material thickness, L is the length of the trace compensation part, and W is the width of the trace compensation part.

6. The electronic paper module according to claim 1, characterized in that, The compensation structure is designed based on the capacitance difference ΔC between the edge and center of the irregular display area. The capacitance difference ΔC gradually decreases from the middle row to both sides. The capacitance compensation amount ΔC = ε × (ΔS / d) ≈ ε × L × W / d, where ε is the dielectric constant of the material, d is the material thickness, L is the length of the trace compensation part, and W is the width of the trace compensation part.

7. The electronic paper module according to any one of claims 1-6, characterized in that, The irregularly shaped display area is a circular display area.

8. An electronic paper display panel, characterized in that, It includes an electronic paper module as described in any one of claims 1 to 6, and an electronic paper display layer located on the electronic paper module.

9. An electronic paper display device, characterized in that, It includes the electronic paper display panel as described in claim 8, and a driving circuit electrically connected to the electronic paper module, the driving circuit being used to provide scanning signals and data signals.