Time determination method and apparatus based on clock system

Abstract

This application provides a time determination method and apparatus based on a clock system. The method includes: in response to a time acquisition command, acquiring the current count value of a timer, the current reference time in the clock base, and the current reference count value; determining the count value increment between the current count value and the current reference count value; acquiring the initial clock frequency and interval count value of the timer, and performing frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain a compensated clock frequency; performing time error processing on the count value increment and the compensated clock frequency to obtain a time increment; and determining the current time corresponding to the time acquisition command based on the time increment and the current reference time. This method determines the current time based on the reference time maintained in the clock system during time reading, thereby transforming a "continuous problem" into an "incremental problem," reducing processor resource consumption while ensuring time accuracy.

Description

Technical Field

[0001] This application relates to the field of time synchronization technology, specifically to a time determination method and apparatus based on a clock system. Background Technology

[0002] In high-precision positioning, industrial control, and communication synchronization equipment, a stable clock system is fundamental to ensuring multi-source data fusion, accurate event labeling, and system collaboration. Especially when the equipment supports external PPS signals for time calibration, even higher demands are placed on the continuity, resolution, and long-term stability of the local clock.

[0003] In related technologies, time determination based on clock systems generally employs real-time maintenance via periodic interrupts. This involves the system generating fixed-frequency interrupts (e.g., 1ms) using a hardware timer, and accumulating and updating the global time variable within the interrupt service routine. While simple to implement, this high-frequency interrupt consumes significant CPU resources, increasing system load and scheduling jitter, making it difficult to meet the low-latency requirements of high real-time performance and multi-task concurrency scenarios. Alternatively, time can be read on demand based on hardware counter values. The system directly reads the timer counter value when needed and converts it to time at a fixed frequency. While this reduces CPU overhead, it has significant drawbacks: first, counter overflow requires additional handling, otherwise it can easily cause time jumps; second, when the clock source has frequency offset or dynamic adjustments, fixed-frequency conversion leads to continuous error accumulation, affecting the time alignment accuracy with the external PPS signal.

[0004] Therefore, there is an urgent need for a time determination method that balances low resource consumption and high-precision time maintenance in order to improve the operational stability of clock systems. Summary of the Invention

[0005] To address the aforementioned technical problems, this application proposes a time determination method and apparatus based on a clock system.

[0006] On one hand, embodiments of this application provide a time determination method based on a clock system, wherein the clock system includes a timer and a clock base, and the method includes: In response to a time acquisition command, the current count value of the timer, the current reference time in the clock base, and the current reference count value are acquired; the timer maintains a reference time and a reference count value, and the reference time and the reference count value are configured to be updated in real time based on a preset maintenance strategy library during the operation of the clock system; Determine the increment of the count value between the current count value and the current reference count value; The initial clock frequency and interval count value of the timer are obtained, and the initial clock frequency is compensated based on the interval count value and the current count value to obtain the compensated clock frequency; the interval count value is the difference between the count values ​​corresponding to two adjacent second pulse signals captured by the timer. Time error processing is performed on the count value increment and the compensated clock frequency to obtain the time increment; The current time corresponding to the time acquisition instruction is determined based on the time increment and the current reference time.

[0007] Furthermore, before acquiring the current count value of the timer, the current reference time in the clock base, and the current reference count value in response to the time acquisition instruction, the method further includes: During the operation of the clock system, the input state of the second pulse signal is determined; The target maintenance strategy corresponding to the input state is matched from the preset maintenance strategy library; the preset maintenance strategy library stores the correspondence between different input states and different preset maintenance strategies; The benchmark time and benchmark count value are maintained based on the target maintenance strategy to achieve real-time updates of the benchmark time and benchmark count value.

[0008] Furthermore, when the input state is that the input signal is normal, maintaining the reference time and the reference count value based on the target maintenance strategy to achieve real-time updates of the reference time and the reference count value includes: When the input state is that the input signal is normal, the timer is controlled to acquire the real-time timer count value at the second pulse signal input time, and the reference count value in the clock base is replaced based on the real-time timer count value; Obtain NMEA messages and parse and process the NMEA messages based on the clock base to obtain time message data; The time message data is aligned to obtain new time data; Replace the reference time in the clock base with the new time data; Using the second pulse signal input period as the update period, the operation of replacing the reference time in the clock base based on the new time data is repeated when the input state is that the input signal is normal, so as to realize the real-time update of the reference time and the reference timing value.

[0009] Furthermore, when the input state is that the input signal is lost, maintaining the reference time and the reference count value based on the target maintenance strategy to achieve real-time updates of the reference time and the reference count value includes: When the input signal is lost, the real-time count value of the timer, the real-time reference count value and the real-time reference time in the clock base, the initial clock frequency and the historical interval count value are obtained; the historical interval count value is the interval count value obtained when the input signal is normal. Based on the real-time count value, the real-time reference count value, and the historical interval count value, frequency compensation processing is performed on the initial clock frequency to obtain a new clock frequency; A new reference time is determined based on the real-time count value, the new clock frequency, and the real-time reference time; The current reference time in the clock base is replaced based on the new reference time, and the current reference count value in the clock base is replaced based on the real-time count value; The operation of replacing the current reference count value in the clock base with the real-time timing value is repeated every preset period when the input state is that the input signal is lost, in order to realize the real-time update of the reference time and the reference timing value; the preset period is less than the overflow period of the timer's count value.

[0010] Further, the step of performing frequency compensation processing on the initial clock frequency based on the real-time count value, the real-time reference count value, and the historical interval count value to obtain a new clock frequency includes: Determine the real-time count increment between the real-time count value and the real-time reference count value; The initial clock frequency is compensated based on the historical interval count and the real-time count to obtain the new clock frequency.

[0011] Further, determining the new reference time based on the real-time count value, the new clock frequency, and the real-time reference time includes: The real-time count increment and the new clock frequency are processed by time increment to obtain the real-time time increment; The new reference time is determined based on the real-time reference time and the real-time time increment.

[0012] Further, the step of obtaining the initial clock frequency and interval count value of the timer, and performing frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency, includes: Obtain the initial clock frequency and the interval count value; The interval count value and the initial clock frequency are subjected to count error processing to obtain an error count value; The frequency error is determined based on the initial clock frequency and the error count value; The initial clock frequency is compensated based on the frequency error to obtain the compensated clock frequency.

[0013] Furthermore, after determining the frequency error based on the initial clock frequency and the error count value, the method further includes: Obtain the adjustment weighting factor; The frequency error is compensated based on the adjusted weighting factor to obtain the compensated frequency error. The step of performing frequency compensation processing on the initial clock frequency based on the frequency error to obtain the compensated clock frequency includes: Based on the compensated frequency error, the initial clock frequency is subjected to frequency compensation processing to obtain the compensated clock frequency.

[0014] The method for obtaining the interval count value includes: Obtain the initial interval count value; the initial interval count value is the difference between the timer count value corresponding to the current second pulse signal capture time and the timer count value corresponding to the previous second pulse signal capture time; The validity verification process is performed on the initial interval count value based on the initial clock frequency to obtain the validity verification result. If the validity verification result is a valid value, repeat the operation of obtaining the initial interval count value a preset number of times to obtain a preset number of initial interval count values. The preset number of initial interval count values ​​are filtered to obtain the interval count values.

[0015] On the other hand, embodiments of this application also provide a time determination device based on a clock system, wherein the clock system includes a timer and a clock base, and the device includes: The acquisition module is used to acquire the current count value of the timer, the current reference time in the clock base, and the current reference count value in response to a time acquisition command; the timer maintains a reference time and a reference count value, and the reference time and the reference count value are configured to be updated in real time based on a preset maintenance strategy library during the clock system process; The count increment determination module is used to determine the count value increment between the current count value and the current reference count value; A clock frequency compensation module is used to obtain the initial clock frequency and interval count value of the timer, and to perform frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency; the interval count value is the difference between the count values ​​corresponding to two adjacent second pulse signals captured by the timer; The time increment determination module is used to perform time error processing on the count value increment and the compensated clock frequency to obtain the time increment; The time determination module is used to determine the current time corresponding to the time acquisition instruction based on the time increment and the current reference time.

[0016] Furthermore, the device also includes a reference update module for: During the operation of the clock system, the input state of the second pulse signal is determined; The target maintenance strategy corresponding to the input state is matched from the preset maintenance strategy library; the preset maintenance strategy library stores the correspondence between different input states and different preset maintenance strategies; The benchmark time and benchmark count value are maintained based on the target maintenance strategy to achieve real-time updates of the benchmark time and benchmark count value.

[0017] Furthermore, when the input state is that the input signal is normal, the reference update module is used to: When the input state is that the input signal is normal, the timer is controlled to acquire the real-time timer count value at the second pulse signal input time, and the reference count value in the clock base is replaced based on the real-time timer count value; Obtain NMEA messages and parse and process the NMEA messages based on the clock base to obtain time message data; The time message data is aligned to obtain new time data; Replace the reference time in the clock base with the new time data; Using the second pulse signal input period as the update period, the operation of replacing the reference time in the clock base based on the new time data is repeated when the input state is that the input signal is normal, so as to realize the real-time update of the reference time and the reference timing value.

[0018] Furthermore, in the case where the input state is that the input signal is lost, the reference update module is used to: When the input signal is lost, the real-time count value of the timer, the real-time reference count value and the real-time reference time in the clock base, the initial clock frequency and the historical interval count value are obtained; the historical interval count value is the interval count value obtained when the input signal is normal. Based on the real-time count value, the real-time reference count value, and the historical interval count value, frequency compensation processing is performed on the initial clock frequency to obtain a new clock frequency; A new reference time is determined based on the real-time count value, the new clock frequency, and the real-time reference time; The current reference time in the clock base is replaced based on the new reference time, and the current reference count value in the clock base is replaced based on the real-time count value; The operation of replacing the current reference count value in the clock base with the real-time timing value is repeated every preset period when the input state is that the input signal is lost, in order to realize the real-time update of the reference time and the reference timing value; the preset period is less than the overflow period of the timer's count value.

[0019] Furthermore, the benchmark update module is also used for: Determine the real-time count increment between the real-time count value and the real-time reference count value; The initial clock frequency is compensated based on the historical interval count and the real-time count to obtain the new clock frequency.

[0020] Furthermore, the benchmark update module is also used for: The real-time count increment and the new clock frequency are processed by time increment to obtain the real-time time increment; The new reference time is determined based on the real-time reference time and the real-time time increment.

[0021] Furthermore, the clock frequency compensation module includes: The first acquisition unit is used to acquire the initial clock frequency and the interval count value; An error determination unit is used to perform counting error processing on the interval count value and the initial clock frequency to obtain an error count value; A frequency error determination unit is used to determine the frequency error based on the initial clock frequency and the error count value; The compensation processing unit is used to perform frequency compensation processing on the initial clock frequency based on the frequency error to obtain the compensated clock frequency.

[0022] Furthermore, the clock frequency compensation module also includes a frequency error compensation unit, used for: Obtain the adjustment weighting factor; The frequency error is compensated based on the adjusted weighting factor to obtain the compensated frequency error. The clock frequency compensation module is also used for: Based on the compensated frequency error, the initial clock frequency is subjected to frequency compensation processing to obtain the compensated clock frequency.

[0023] Furthermore, the module also includes an interval count value acquisition module, used for: Obtain the initial interval count value; the initial interval count value is the difference between the timer count value corresponding to the current second pulse signal capture time and the timer count value corresponding to the previous second pulse signal capture time; The validity verification process is performed on the initial interval count value based on the initial clock frequency to obtain the validity verification result. If the validity verification result is a valid value, repeat the operation of obtaining the initial interval count value a preset number of times to obtain a preset number of initial interval count values. The preset number of initial interval count values ​​are filtered to obtain the interval count values.

[0024] On the other hand, embodiments of this application also provide an electronic device, which includes a processor and a memory. The memory stores at least one instruction or at least one program. The at least one instruction or at least one program is loaded and executed by the processor to implement the time determination method based on the clock system as described above.

[0025] On the other hand, embodiments of this application also provide a computer-readable storage medium storing at least one instruction or at least one program, wherein the at least one instruction or at least one program is loaded and executed by a processor to implement the time determination method based on a clock system as described above.

[0026] On the other hand, embodiments of this application also provide a computer program product, which, when executed by a processor, implements the time determination method based on a clock system as described above.

[0027] This application provides a time determination method and apparatus based on a clock system. The method includes: in response to a time acquisition command, acquiring the current count value of a timer, the current reference time in the clock base, and the current reference count value; determining the count value increment between the current count value and the current reference count value; acquiring the initial clock frequency and interval count value of the timer, and performing frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain a compensated clock frequency; performing time error processing on the count value increment and the compensated clock frequency to obtain a time increment; and determining the current time corresponding to the time acquisition command based on the time increment and the current reference time. This method determines the current time based on the reference time maintained in the clock system during time reading, thereby transforming a "continuous problem" into an "incremental problem," reducing processor resource consumption while ensuring time accuracy. Attached Figure Description

[0028] To more clearly illustrate the technical solutions and advantages in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of an application environment provided in an embodiment of this application.

[0030] Figure 2 This is a schematic system block diagram of a clock system provided in an embodiment of this application. Figure 1 .

[0031] Figure 3 This is a flowchart illustrating a time determination method based on a clock system provided in an embodiment of this application.

[0032] Figure 4 This is a schematic system block diagram of a clock system provided in an embodiment of this application. Figure 2 .

[0033] Figure 5 This is a schematic flowchart of a clock frequency compensation method based on PPS signals provided in an embodiment of this application.

[0034] Figure 6 This is a schematic diagram of the core code of a clock frequency compensation method based on PPS signals provided in an embodiment of this application.

[0035] Figure 7 This is a structural block diagram of a time determination device based on a clock system provided in an embodiment of this application.

[0036] Figure 8 This is a hardware structure block diagram of a server for a time determination method based on a clock system provided in an embodiment of this application. Detailed Implementation

[0037] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0038] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of the embodiments of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the present application described herein can be implemented in orders other than those illustrated or described herein. Thus, features defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments, unless otherwise stated, "a plurality of" means two or more. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices.

[0039] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the operating environment for a time determination method based on a clock system provided in this application embodiment. The operating environment includes a server and a terminal. The terminal is equipped with a clock system and other systems. The other systems are those that require time information from the clock system. The clock system can obtain second pulse signals and NAME messages from the server to maintain the reference time and reference count value in the clock system. Optionally, the server 110 and the terminal 120 can communicate with each other via a network. The server 110 and the terminal 120 can be directly or indirectly connected via wired or wireless communication, which is not limited herein.

[0040] The terminal is a navigation system equipped with a clock system, or a device terminal that can connect to an external PPS signal. The server can provide PPS signals to the clock system or PPS receiving device in the terminal. It can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms.

[0041] Figure 2 This is a schematic system block diagram of a clock system provided in an embodiment of this application. Figure 1 ,like Figure 2 As shown, the clock system includes at least a timer and a clock base, wherein the timer and the clock base can communicate with each other.

[0042] Specifically, a 32-bit high-precision timer can be used as the system clock timer. The clock root is configured as an external high-precision crystal oscillator (typically 24MHz), which is multiplied to 240MHz via a PLL phase-locked loop. This multiplied clock is used as the system clock timer's clock frequency, with a clock precision of 4.1 nanoseconds (1 second ÷ 240MHz). The timer's counting range is 0~0xFFFFFFFF, and it counts in a positive cycle (resuming counting from 0 after reaching full). The timer has a rising edge level input capture channel and is configured with a capture input interrupt service (PPS CAPTURE IRQ). The timer's count value is configured as the current value of the hardware counter register, continuously increasing with the main frequency and periodically overflowing. It has no absolute time meaning and is a real-time updated value.

[0043] The clock base is used to maintain a reference point, which includes two elements: reference time and reference moment clock timer count value. It reflects the mapping relationship between the current clock timer count and time data, where the reference time data is in nanoseconds. Clock updates and time data readings are both based on the clock base. Optionally, the reference moment clock timer count value is referred to as the reference count value in this embodiment. Specifically, the reference moment clock timer count value is an instantaneous sample of the current timer count value at the moment a time calibration event or time update event is triggered. The reference moment clock timer count value remains constant until the next trigger or calibration.

[0044] Optionally, a clock base update module is provided between the timer and the clock base, which can be communicatively or electrically connected to both. The clock base update module can acquire external PPS signals and NEMA, thereby updating the reference point in the clock base in conjunction with the timer count value acquired collaboratively by the timer.

[0045] The clock system also includes a time readout interface module, used to read time data from the clock base module and the timer module and output it. Optionally, the time readout interface module can be configured to receive and store the time data output by the clock module and the timer module, but not output it to other modules or the system. The time data will only be output when a time acquisition command is received.

[0046] Figure 3 This is a flowchart illustrating a time determination method based on a clock system provided in an embodiment of this application. The method is applied to a clock system, or can be used in a terminal configured to receive PPS signals. The clock system includes a timer and a clock base. The method includes: S101: In response to a time acquisition command, acquire the current count value of the timer, the current reference time in the clock base, and the current reference count value; the timer maintains a reference time and a reference count value, and the reference time and the reference count value are configured to be updated in real time based on a preset maintenance strategy library during the operation of the clock system.

[0047] In this embodiment of the application, the time acquisition instruction is used to read time data. It is issued by other systems or other modules in the terminal to which the clock system belongs. The issued time acquisition instruction is sent to the clock system and executed by the clock system.

[0048] The timer's count value is configured as the current value of the hardware counter register, continuously increasing with the clock frequency and periodically overflowing. It has no absolute time meaning and is a real-time updated value. The current timer count value is the timer count value acquired at the moment corresponding to the time acquisition instruction. The current reference time in the clock base refers to the reference time in the timer at the moment corresponding to the time acquisition instruction. The current reference count value, also called the current reference moment clock timer count value, refers to the count value stored in the timer acquired at the moment corresponding to the time acquisition instruction. As mentioned earlier, the reference moment clock timer count value is the instantaneous sample value of the timer count value at the moment the time calibration event or time update event is triggered. Therefore, the current reference count value is the instantaneous sample value of the timer at the moment the previous time calibration event or time update event was triggered.

[0049] The timer's function is to maintain the base time and base count value, and it is configured to continuously maintain the clock base based on a preset maintenance strategy library during clock system operation, thereby enabling periodic updates to the clock base. Optionally, the preset maintenance strategy library consists of multiple pre-defined maintenance strategies in the clock system for maintaining the clock base, ensuring that the reference point in the clock base is stably updated under any circumstances.

[0050] S103: Determine the count increment between the current count value and the current reference count value.

[0051] In this embodiment of the application, after obtaining the current count value and the current base count value, the increment of the count value between the two is calculated.

[0052] Specifically, since the timer's count value is updated by overflow, the increment of the count value cannot be determined by direct subtraction. Instead, the difference can be calculated using any of the following methods: unsigned subtraction (using the modulo operation wraparound characteristic), "mask / modulo", or segmented conditional judgment method.

[0053] Optionally, the core idea of ​​unsigned number subtraction is to treat both the current and previous count values ​​of the timer as unsigned integers, and directly subtract the current base count value from the current count value. The principle is that in unsigned integer arithmetic, subtraction naturally follows the modulo 2^N rule (where N is the timer bit width). When the count crosses the overflow point, the subtraction result will automatically "wrap back" to obtain the correct positive increment.

[0054] Optionally, the mask / modulo method, also known as the explicit mask / modulo method, involves first calculating the difference between the current value and the previous value, and then masking the difference (by performing a bitwise AND with 2^N-1) or taking the modulo of 2^N. The principle is to explicitly truncate the high-order bits, forcibly constraining the difference within the effective counting range of the timer, thus simulating circular counting behavior.

[0055] Optionally, the core idea of ​​the segmented conditional judgment method is to first determine whether the current value is greater than or equal to the previous value. If yes, the increment of the count value = the current count value - the current base count value; if no, it means that an overflow has occurred, and the increment of the count value = the current count value + (the maximum count value of the timer + 1 - the current base count value).

[0056] To simplify the logic of incrementing the count value, unsigned subtraction or segmented conditional judgment is generally used.

[0057] S105: Obtain the initial clock frequency and interval count value of the timer, and perform frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency; the interval count value is the difference in count values ​​corresponding to two adjacent second pulse signals captured by the timer.

[0058] In this embodiment, the clock frequency refers to the fundamental frequency of the clock in the synchronization circuit, which is measured in "several cycles per second" using SI units Hertz (Hz). Since the timer is affected by multiple factors such as circuit signal interference and temperature during actual operation, the clock frequency will be affected. The initial clock frequency refers to the theoretical clock frequency of the timer. For example, if the multiplied clock (240MHz) mentioned above is used as the clock frequency of the system clock timer, meaning it generates 240,000,000 counts per second, then the initial clock frequency is 240,000,000. The interval count value refers to the difference between the current count value of the timer when capturing the PPS signal (when the PPS signal is normal) and the count value of the timer when the PPS signal was captured previously. Here, the count value difference refers to the increment of the count value between the corresponding real-time count values ​​when the PPS signal was captured twice.

[0059] In some embodiments, after obtaining the initial clock frequency and the interval count value, the initial clock frequency can be compensated using the interval count value and the current count value to eliminate frequency errors and obtain the compensated clock frequency.

[0060] S107: Perform time error processing on the count value increment and the compensated clock frequency to obtain the time increment.

[0061] In this embodiment, the error time corresponding to the current reference time can be calculated based on the timing value increment and the compensated clock frequency. That is, the error between the current reference time and the correct time, and the obtained error time is recorded as the time increment. In other words, the time increment is a real-time error value relative to the current reference time.

[0062] S109: Determine the current time corresponding to the time acquisition instruction based on the time increment and the current reference time.

[0063] In this embodiment of the application, the current time is obtained by adding a time increment to the current reference time, which corresponds to the time acquisition quality.

[0064] Optionally, after obtaining the current time, it can be output to other systems or other applications through the time reading interface.

[0065] This application's embodiments maintain a reference time and reference count value in the clock base, rather than maintaining a continuous time stream. Thus, when time needs to be read, the increment between the current reference count value and the current count value can be calculated, and the initial clock frequency can be compensated to eliminate frequency errors. Based on the count increment and the compensated clock frequency, the deviation between the current time and the current reference time is determined, yielding the current time. This transforms the "continuous problem" (i.e., maintaining a continuous time stream) into an "incremental problem" (determining the increment between the current time and the current reference time). A simpler data structure reduces reliance on a real-time operating system. While real-time time maintenance is not required, only periodic updates to the clock base are needed, simplifying access, reducing processor resource consumption, and improving the accuracy of the clock system.

[0066] As an optional implementation, prior to method S101 above, before acquiring the current count value of the timer, the current reference time in the clock base, and the current reference count value in response to the time acquisition instruction, the method further includes: S001: During the operation of the clock system, determine the input status of the second pulse signal; S003: Match the target maintenance strategy corresponding to the input state from the preset maintenance strategy library; the preset maintenance strategy library stores the correspondence between different input states and different preset maintenance strategies; S005: Maintain the base time and the base count value based on the target maintenance strategy to achieve real-time updates of the base time and the base count value.

[0067] In this embodiment of the application, during the operation of the clock system, different preset maintenance strategies can be selected to maintain the "reference point" based on whether the second pulse signal is normal. Specifically, during the operation of the clock system, the input state of the second pulse signal is first determined, and then the target maintenance strategy corresponding to the input state is matched from the preset maintenance strategy library.

[0068] The preset maintenance strategy library is a collection of preset maintenance strategies, storing the preset maintenance strategies corresponding to different input states of the second pulse signal. Finally, the reference time and reference count are maintained based on the determined target maintenance strategy, so that the reference time and reference count are continuously maintained and updated during the operation of the clock system.

[0069] It should be noted that the above-mentioned real-time updates refer to periodic updates, and the update cycle is determined according to the target maintenance strategy.

[0070] In an optional embodiment, when the input state is that the input signal is normal, step S005 above, which involves maintaining the reference time and the reference count value based on the target maintenance strategy to achieve real-time updates of the reference time and the reference count value, includes: S0051: When the input state is that the input signal is normal, control the timer to acquire the real-time timer count value at the second pulse signal input time, and replace the reference count value in the clock base based on the real-time timer count value; S0053: Obtain the NMEA message and parse the NMEA message based on the clock base to obtain time message data; S0055: Align the time message data to obtain new time data; S0057: Replace the reference time in the clock base based on the new time data; S0059: Using the second pulse signal input period as the update period, repeat the operation of replacing the reference time in the clock base based on the new time data when the input state is that the input signal is normal, so as to realize the real-time update of the reference time and the reference timing value.

[0071] In the embodiments of this application, it can be based on, as follows Figure 4 The clock system shown updates the "reference point". Normal input signal means the PPS signal is normal; optionally, normal input signal also includes normal NMEA message input.

[0072] In step S0051 above, under normal input conditions of the PPS signal and NMEA message, the input signal is captured based on the "rising edge level input capture channel" of the timer, that is, based on the PPS signal capture channel configured in the timer. When a PPS signal is input, the capture channel records the real-time timer count value of the PPS signal input time in hardware. This real-time timer count value is then read in the capture input interrupt service function and updated to the reference count value of the clock base.

[0073] In step S0053 above, in order to update the reference time, the NMEA message is first obtained, and the NMEA message is parsed in the clock base to extract the time message data.

[0074] In step S0055 above, the time message data is aligned to obtain new time data, which represents real-time time. The alignment process refers to establishing the correspondence between the time dimensions of different data streams to ensure that data from different sensors, modalities or systems can be correlated and analyzed based on a unified time reference. Specifically, in this application, the time data in the NMEA message is aligned with the reference time.

[0075] Optionally, the alignment process can be performed by adding 1 second to the time message data and clearing all parts below the second to zero, thus obtaining the new time data.

[0076] In step S0057 above, the reference time in the clock base is replaced with new time data, thereby completing the maintenance and update of the reference time.

[0077] In step S0059 above, when the PPS signal is in a normal input state, the above steps S0051-S0057 are repeated with the input period of the PPS signal as the update period, so as to update the reference time and reference count value in real time.

[0078] In an optional embodiment, when the input state is that the input signal is lost, step S005 above, which involves maintaining the reference time and the reference count value based on the target maintenance strategy to achieve real-time updates of the reference time and the reference count value, includes: S00501: When the input state is that the input signal is lost, acquire the real-time count value of the timer, the real-time reference count value and the real-time reference time in the clock base, the initial clock frequency and the historical interval count value; the historical interval count value is the interval count value acquired when the input signal is normal. S00503: Based on the real-time count value, the real-time reference count value, and the historical interval count value, perform frequency compensation processing on the initial clock frequency to obtain a new clock frequency; S00505: Determine a new reference time based on the real-time count value, the new clock frequency, and the real-time reference time; S00507: Replace the current reference time in the clock base with the new reference time, and replace the current reference count value in the clock base with the real-time count value; S00509: Repeat the operation of replacing the current reference count value in the clock base based on the real-time timing value every preset period when the input state is that the input signal is lost, so as to realize the real-time update of the reference time and the reference timing value; the preset period is less than the overflow period of the timer's count value.

[0079] In this embodiment of the application, when the input state is that the input signal is lost, that is, when the conditions for updating based on the PPS signal are not available.

[0080] In step S00501 above, when the conditions for updating based on the PPS signal are not met, the real-time count value of the timer, the real-time reference time and real-time reference count value in the clock base, the initial clock frequency and the historical interval count value are obtained. The historical interval count value refers to the interval count value obtained by the input signal under normal conditions.

[0081] Specifically, the method for determining the historical interval count value is as follows: 1. Each interval count value is the timer count value (current pps timecount) when the PPS signal is captured, which is compared with the timer count value (last pps time count) when the PPS signal was captured last time to calculate the PPS signal interval count value (interval counts).

[0082] 2. After obtaining the interval counts, its validity must be judged. If the interval counts exceed the threshold range (i.e., the initial clock frequency) of the initial 1-second count statistics, the PPS signal is considered to have jitter and is skipped without processing. If it is within the threshold range, the PPS signal is considered to be valid.

[0083] 3. Data filtering: Take the 10 consecutive PPS signal interval count values ​​output in step 2, remove the maximum and minimum values, and then calculate the average to obtain the filtered PPS signal interval count value. Then, use the filtered PPS signal interval count value as the historical interval count value.

[0084] In step S00503 above, the initial clock frequency is compensated by the real-time count value, the real-time reference count value, and the historical interval count value to obtain a new clock frequency. Here, the clock frequency compensation is to eliminate the count value error caused by multiple factors such as circuit signal interference and temperature during actual use.

[0085] In an optional embodiment, the step of performing frequency compensation processing on the initial clock frequency based on the real-time count value, the real-time reference count value, and the historical interval count value to obtain a new clock frequency includes: Determine the real-time count increment between the real-time count value and the real-time reference count value; The initial clock frequency is compensated based on the historical interval count and the real-time count to obtain the new clock frequency.

[0086] In this embodiment, the specific method for determining the clock frequency is as follows: First, the real-time count increment between the real-time count value and the real-time reference count value is determined. The calculation method for the count increment is as described above and will not be repeated here. Then, the deviation of the clock frequency is evaluated based on the historical interval count value and the real-time count value, thereby completing the frequency compensation process for the initial clock frequency to obtain the new clock frequency.

[0087] Specifically, the error count is calculated by taking the difference between the historical interval count value (filtered interval) and the initial 1-second count statistics value (i.e., the initial clock frequency) (original counts per second). This difference is then multiplied by 1,000,000 and divided by the initial 1-second count statistics value (original counts per second) to obtain the frequency error (parts per million). Then, the error count is calculated using the historical interval count and the initial clock frequency. Error count = historical interval count - original count per second. Finally, the initial clock frequency error is compensated for. The new clock frequency = error counts * 1e6f / original clock frequency (original counts per second).

[0088] In step S00505 above, the new reference time can be determined based on the real-time count value, the new clock frequency, and the real-time reference time.

[0089] Specifically, determining the new reference time based on the real-time count value, the new clock frequency, and the real-time reference time includes: The real-time count increment and the new clock frequency are processed by time increment to obtain the real-time time increment; The new reference time is determined based on the real-time reference time and the real-time time increment.

[0090] In this embodiment of the application, the real-time count increment obtained in the above steps is divided by the new clock frequency to obtain the real-time time increment; then the real-time time increment is added to the real-time reference time to obtain the new reference time.

[0091] In step S00507 above, the real-time count value obtained in step S005001 above is used to replace the reference count value in the clock base, and the new reference time obtained in step S005005 above is used to replace the current reference time in the clock base, thereby completing the maintenance of the reference value and reference time.

[0092] In step S00509 above, when the system is still experiencing input signal loss, steps S00501-S00507 are repeated every preset time period to achieve real-time updates of the reference time and the reference timing value. The preset period is less than the overflow period of the timer's count value, thus preventing the timer's count value from overflowing.

[0093] Optionally, the preset period can be 1 second.

[0094] Thus, this application discloses two different methods for updating the "reference point," enabling the maintenance and updating of the reference time and reference count value regardless of whether a PPS signal is currently received. Therefore, to read the time at any given time, it is only necessary to calculate the distance (Δcount) between the current count value and the reference point, and then add this difference to the reference time. This is essentially a "space-for-time" approach, using a concise data structure to reduce reliance on the real-time operating system.

[0095] As an optional implementation, this application embodiment also provides a clock frequency compensation method. In step S105 above, obtaining the initial clock frequency and interval count value of the timer, and performing frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency, includes: S1051: Obtain the initial clock frequency and the interval count value; S1053: Perform counting error processing on the interval count value and the initial clock frequency to obtain an error count value; S1055: Determine the frequency error based on the initial clock frequency and the error count value; S1057: Perform frequency compensation processing on the initial clock frequency based on the frequency error to obtain the compensated clock frequency.

[0096] In this embodiment, during the process of outputting the current time based on the reference time, it is necessary to compensate the initial clock frequency to eliminate errors generated during clock operation. The specific compensation method is consistent with the compensation method in the reference count value update process. It should be noted that the clock frequency compensation method described here is a software compensation method, specifically a clock frequency compensation method based on the PPS signal.

[0097] Specifically, first, perform the above step S1053: obtain the initial clock frequency and interval count value.

[0098] Assuming a multiplied clock (240MHz) is used as the clock frequency of the system clock timer, meaning it generates 240,000,000 counts per second, then the initial count value per second is set to the initial clock frequency of the system timer, 240,000,000: original counts per second = 240000000; In the above, "original counts per second" represents the initial clock frequency.

[0099] In some optional embodiments, the method for obtaining the interval count value includes: S401: Obtain the initial interval count value; the initial interval count value is the difference between the timer count value corresponding to the current second pulse signal capture time and the timer count value corresponding to the previous second pulse signal capture time; S403: Perform validity verification processing on the initial interval count value based on the initial clock frequency to obtain the validity verification processing result; S405: If the validity verification result is a valid value, repeat the operation of obtaining the initial interval count value a preset number of times to obtain a preset number of initial interval count values. S407: Filter the preset number of initial interval count values ​​to obtain the interval count values.

[0100] As mentioned earlier, the interval count involves acquisition, calculation, and filtering. Specifically, firstly, the timer count value at the time of PPS signal capture (i.e., the timer count value corresponding to the current second pulse signal capture time) is acquired and compared with the timer count value at the time of the previous PPS signal capture (i.e., the timer count value corresponding to the previous second pulse signal capture time), last pps time count, to calculate the PPS signal interval count, intervalcounts, as the preset interval count value. The validity of the PPS signal interval count is judged, and the validity verification result is one of the following two cases: if the interval count exceeds the threshold range limited by the initial 1-second count statistical value, it is determined that the PPS signal has jitter and is skipped without processing; if it is within the threshold range, the PPS signal is determined to be valid, and the preset interval count value can be compensated and recorded as the valid interval count value. Then, 10 consecutive PPS signal interval counts are taken (i.e., 10 valid interval count values ​​are taken), the maximum and minimum values ​​are removed, and the average is calculated to obtain the filtered PPS signal interval count, filtered interval, which is recorded as the interval count value.

[0101] Optionally, the above embodiments use a preset quantity of 10 as an example for illustration. In actual operation, the preset quantity is not limited to 10. In order to reduce resource consumption, it can be less than 10, such as 6-8. Conversely, in order to improve progress, it can be set to greater than 10.

[0102] It should be noted here that the interval count value is determined in the same way as the historical interval count value mentioned above. The only difference is that the historical interval count value is used in the process of updating the base time and the base count value, while the interval count value is used in the process of obtaining the current time corresponding to the time acquisition command. The different names are only to distinguish the application scenarios.

[0103] In step S1053 above, the difference between the filtered interval and the original clock frequency is calculated, i.e., counting error processing is performed to obtain the error count value errorcounts.

[0104] In step S1055 above, the frequency error ppm is obtained by dividing the error count by 1,000,000 and by the initial count per second. The accuracy of the frequency error is expressed as one part per million.

[0105] In step S1057 above, the compensated clock frequency is calculated using the frequency error and the initial frequency error. That is, the frequency error is added to the initial frequency error to obtain the compensated clock frequency counts per second, i.e., counts per second = original counts per second + error ppm.

[0106] It should be noted that the above clock frequency compensation process is based on the premise that the PPS signal is valid, performing a compensation calculation once per second. When the PPS signal is lost or invalid, the compensation value calculated when the last PPS signal was valid is used. Alternatively, the interval count value before the PPS signal was lost / invalidated is used for compensation.

[0107] Thus, this embodiment of the application compensates for the clock frequency of the system timer by using the interval count value of the PPS signal, thereby eliminating the clock frequency error caused by multiple factors such as circuit signal interference and temperature during actual use. This overcomes the limitations of related technologies that require high-precision oven-controlled crystal oscillators (OCXO) or temperature-compensated crystal oscillators (TCXO) for maintenance. It not only reduces the dependence on oven-controlled crystal oscillators (OCXO) or temperature-compensated crystal oscillators (TCXO), but also reduces costs and power consumption.

[0108] As an optional embodiment, this application embodiment also provides a frequency error compensation method. Specifically, after step S1055 above, in order to ensure that the clock frequency compensation effect is smooth and non-abrupt, this application embodiment uses the following method to compensate for the frequency error. Specifically, after determining the frequency error based on the initial clock frequency and the error count value, the method further includes: S201: Obtain the adjustment weighting factor; S203: The frequency error is compensated based on the adjusted weighting factor to obtain the compensated frequency error.

[0109] In the embodiments of this application, the weighting factor is used to adjust the frequency error to prevent time jumps. The weighting factor can be a fixed value preset in the system or it can be adjusted according to the actual situation. This application does not impose any specific restrictions on this.

[0110] After obtaining the weighting factors, the frequency error is compensated using these factors to obtain the compensated frequency error. This process can be achieved using the following formula: frequency error ppm new=(1-α)*frequency error ppm+α*error ppm; The above formula is a state update formula to be remembered. Specifically, frequency error ppm represents the frequency error, which is the current value (old value), that is, the frequency error after compensation stored in the system before compensation was performed. error ppm represents the frequency error obtained above, which is the current value. α is a weighting factor, and frequency error ppm new represents the new frequency compensation, that is, the frequency error after compensation obtained in this compensation.

[0111] During the calculation process, the CPU first uses the "old value" on the right side for calculation, and then overwrites the "new value" on the left side with the result, thus saving the historical state with a single variable. Specifically, it first retrieves the current value (old value) of frequency error ppm and the current value of error ppm, and then uses (1-α) × old value + α × new error to write the calculation result to the left side, updating frequency error ppm in preparation for the next round.

[0112] Optionally, the weighting factor in this application can be a value between 0.2 and 0.4, preferably 0.3.

[0113] After obtaining the compensated frequency error, calculate the frequency compensation value: frequency compensation= frequency error ppm*original counts persecond / 1e 6 ; In the above formula, frequency compensation is the frequency compensation value, which is an absolute count deviation, and the unit is counts.

[0114] Furthermore, after obtaining the compensated frequency error, compensation can be performed using the compensated frequency error. The step of performing frequency compensation processing on the initial clock frequency based on the frequency error to obtain the compensated clock frequency includes: Based on the compensated frequency error, the initial clock frequency is subjected to frequency compensation processing to obtain the compensated clock frequency.

[0115] In some embodiments, the compensated clock frequency counts per second = original counts per second + frequency compensation.

[0116] In this way, while compensating for the clock frequency, the error frequency can be compensated by setting weights, so that the clock frequency compensation effect can be smooth and non-abrupt, thereby preventing time jumps and further improving the compensation accuracy of the initial clock frequency.

[0117] The following is based on Figure 5 and Figure 6 This application provides an overall description of the frequency compensation method provided in its embodiments. The clock frequency compensation method based on PPS signals designed in this application is not limited to integrated navigation clock systems, but can also be applied to device terminals that can connect to external PPS signals. When the clock crystal oscillator experiences stability issues, a software method is used to compensate for the clock frequency and maintain clock accuracy. Specifically, it includes the following steps: Step 1: Set the initial 1-second count to the initial clock frequency of the system clock timer, which is 240000000. Original counts per second = 240000000; Step 2: Wait for PPS capture interruption. When a PPS signal is captured, obtain the timer count value (current pps time count) at the time of PPS signal capture and compare it with the timer count value (last pps time count) at the time of the last PPS signal capture. Calculate the PPS signal interval count. Determine the validity of the PPS signal interval count. If the interval count exceeds the threshold range limited by the initial 1-second count statistics, it is considered that the PPS signal has jitter, skipped and not processed, and returns to the PPS capture waiting terminal. If it is within the threshold range, the PPS signal is considered valid and compensation calculation can be performed. Step 3: Filtering. Take the interval count of 10 consecutive PPS signals output in Step 2, remove the maximum and minimum values, and then calculate the average to obtain the filtered interval count of the PPS signals. Step 4: Calculate the error count by comparing the filtered interval with the original counts per second. Then multiply this difference by 1,000,000 and divide it by the original counts per second to get the frequency error ppm (parts per million). int32 t error counts = (int32 t)filtered interval - original counts per second (system clock / timer frequency); float error ppm = (float)error counts * 1e6f / (float)original countsper second; To ensure a smooth and non-abrupt clock frequency compensation effect, the adjustment weighting factor is set to 0.3, and the frequency compensation error (ppm) is calculated. frequency error ppm = 0.7f×frequency error ppm + 0.3f×error ppm; Calculate the frequency compensation value: int32 t frequency compensation = (int32 t)( frequency error ppm×original counts per second / 1e6f); After frequency compensation calculation, the actual count per second of the timer clock is: counts per second = original counts per second + frequencycompensation; It should be noted that in the above expressions, `float` and `f` represent real numbers with decimal points, indicating that the corresponding data needs to retain the decimal point. `int32 t` represents a "32-bit signed integer," meaning that the corresponding data is stored according to this width. The `float`, `f`, and `int32 t` mentioned above are constraints on the data format and do not affect the formulas themselves.

[0118] In practical applications Figure 6 The core code implementation shown here, where static uint32_t (a 32-bit unsigned state variable with static storage) represents a 32-bit unsigned counter / state machine with memory function. It only specifies the storage method of the corresponding variable and serves as a "memory anchor" without having any other practical meaning.

[0119] In the core code, it is first specified that Original counts = 240000000, corresponding to Figure 5Step 1 in the process; and record the timer count value when the PPS signal was captured last time as 0, the corresponding code is last_pps_time=0; record the frequency compensation error (i.e. the frequency error after compensation) as 0, i.e. freq error ppm = 0.0f; and record the actual count value as the count value corresponding to the initial clock frequency, i.e. actual counts=240000000, where the actual count value represents the counting range of the timer.

[0120] Then, the code for the frequency compensation calculation process is configured to use the compensation calculation function `Void compensate_pps(uint32_t current_pps)`. Specifically, the interval count value is configured as `uint32 t interval = currentpps - last pps`, which means that when a PPS signal is captured, the timer count value `currentpps time count` at the time of PPS signal capture is obtained and compared with the timer count value `last pps time count` at the time of the last PPS signal capture to calculate the PPS signal interval count `interval counts`. Then, filtering processing is performed, and the corresponding code is configured as `if(abs(interval - original counts)>THRESHOLD)return; / / jitter / / filtering, smoothing, and compensation calculation`, corresponding to step 3 above.

[0121] Finally, the code for the frequency compensation process is configured as actual counts = original counts + comp, corresponding to the actual count per second of the timer clock after the frequency compensation operation in step 4 above: counts per second = original counts per second + frequency compensation.

[0122] It should be noted that, Figure 6 The document shows only a portion of the core code, not all of it, and is merely an example.

[0123] On the other hand, such as Figure 7 As shown in the embodiments of this application, a time determination device based on a clock system is also provided. The clock system includes a timer and a clock base. The device includes: The acquisition module 301 is used to acquire the current count value of the timer, the current reference time in the clock base, and the current reference count value in response to a time acquisition command; the timer maintains a reference time and a reference count value, and the reference time and the reference count value are configured to be updated in real time based on a preset maintenance strategy library during the clock system process; The count increment determination module 303 is used to determine the count value increment between the current count value and the current reference count value; The clock frequency compensation module 305 is used to obtain the initial clock frequency and interval count value of the timer, and to perform frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency; the interval count value is the difference between the count values ​​corresponding to two adjacent second pulse signals captured by the timer. The time increment determination module 307 is used to perform time error processing on the count value increment and the compensated clock frequency to obtain the time increment; The time determination module 309 is used to determine the current time corresponding to the time acquisition instruction based on the time increment and the current reference time.

[0124] Furthermore, the device also includes a reference update module for: During the operation of the clock system, the input state of the second pulse signal is determined; The target maintenance strategy corresponding to the input state is matched from the preset maintenance strategy library; the preset maintenance strategy library stores the correspondence between different input states and different preset maintenance strategies; The benchmark time and benchmark count value are maintained based on the target maintenance strategy to achieve real-time updates of the benchmark time and benchmark count value.

[0125] Furthermore, when the input state is that the input signal is normal, the reference update module is used to: When the input state is that the input signal is normal, the timer is controlled to acquire the real-time timer count value at the second pulse signal input time, and the reference count value in the clock base is replaced based on the real-time timer count value; Obtain NMEA messages and parse and process the NMEA messages based on the clock base to obtain time message data; The time message data is aligned to obtain new time data; Replace the reference time in the clock base with the new time data; Using the second pulse signal input period as the update period, the operation of replacing the reference time in the clock base based on the new time data is repeated when the input state is that the input signal is normal, so as to realize the real-time update of the reference time and the reference timing value.

[0126] Furthermore, in the case where the input state is that the input signal is lost, the reference update module is used to: When the input signal is lost, the real-time count value of the timer, the real-time reference count value and the real-time reference time in the clock base, the initial clock frequency and the historical interval count value are obtained; the historical interval count value is the interval count value obtained when the input signal is normal. Based on the real-time count value, the real-time reference count value, and the historical interval count value, frequency compensation processing is performed on the initial clock frequency to obtain a new clock frequency; A new reference time is determined based on the real-time count value, the new clock frequency, and the real-time reference time; The current reference time in the clock base is replaced based on the new reference time, and the current reference count value in the clock base is replaced based on the real-time count value; The operation of replacing the current reference count value in the clock base with the real-time timing value is repeated every preset period when the input state is that the input signal is lost, in order to realize the real-time update of the reference time and the reference timing value; the preset period is less than the overflow period of the timer's count value.

[0127] Furthermore, the benchmark update module is also used for: Determine the real-time count increment between the real-time count value and the real-time reference count value; The initial clock frequency is compensated based on the historical interval count and the real-time count to obtain the new clock frequency.

[0128] Furthermore, the benchmark update module is also used for: The real-time count increment and the new clock frequency are processed by time increment to obtain the real-time time increment; The new reference time is determined based on the real-time reference time and the real-time time increment.

[0129] Furthermore, the clock frequency compensation module includes: The first acquisition unit is used to acquire the initial clock frequency and the interval count value; An error determination unit is used to perform counting error processing on the interval count value and the initial clock frequency to obtain an error count value; A frequency error determination unit is used to determine the frequency error based on the initial clock frequency and the error count value; The compensation processing unit is used to perform frequency compensation processing on the initial clock frequency based on the frequency error to obtain the compensated clock frequency.

[0130] Furthermore, the clock frequency compensation module also includes a frequency error compensation unit, used for: Obtain the adjustment weighting factor; The frequency error is compensated based on the adjusted weighting factor to obtain the compensated frequency error. The clock frequency compensation module is also used for: Based on the compensated frequency error, the initial clock frequency is subjected to frequency compensation processing to obtain the compensated clock frequency.

[0131] Furthermore, the module also includes an interval count value acquisition module, used for: Obtain the initial interval count value; the initial interval count value is the difference between the timer count value corresponding to the current second pulse signal capture time and the timer count value corresponding to the previous second pulse signal capture time; The validity verification process is performed on the initial interval count value based on the initial clock frequency to obtain the validity verification result. If the validity verification result is a valid value, repeat the operation of obtaining the initial interval count value a preset number of times to obtain a preset number of initial interval count values. The preset number of initial interval count values ​​are filtered to obtain the interval count values.

[0132] It should be noted that the time determination device embodiment based on a clock system provided in this application is based on the same inventive concept as the time determination method embodiment based on a clock system described above.

[0133] This application also provides a time-accurate electronic device based on a clock system. The electronic device includes a processor and a memory. The memory stores at least one instruction or at least one program. The at least one instruction or at least one program is loaded and executed by the processor to implement a time-accurate method based on a clock system as provided in any of the above embodiments.

[0134] Embodiments of this application also provide a computer-readable storage medium that can be disposed in a terminal to store at least one instruction or at least one program for implementing a clock system-based time determination method in the method embodiments. The at least one instruction or at least one program is loaded and executed by a processor to implement the clock system-based time determination method provided in the above method embodiments.

[0135] Optionally, in the embodiments of this specification, the storage medium may be located at at least one of the multiple network servers in a computer network. Optionally, in this embodiment, the storage medium may include, but is not limited to, various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0136] The memory described in this specification can be used to store software programs and modules. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory. The memory may primarily include a program storage area and a data storage area. The program storage area may store the operating system, applications required for functions, etc.; the data storage area may store data created based on the use of the device, etc. Furthermore, the memory may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory may also include a memory controller to provide the processor with access to the memory.

[0137] This application also provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the time determination method based on a clock system provided in the above-described method embodiments.

[0138] The methods and embodiments provided in this application can be executed on a terminal, computer terminal, server, or similar computing device. Taking running on a server as an example, Figure 8 This is a hardware structure block diagram of a server providing a time determination method based on a clock system, according to an exemplary embodiment. (See diagram below.) Figure 8As shown, the server 400 can vary significantly due to different configurations or performance. It may include one or more Central Processing Units (CPUs) 410 (CPUs 410 may include, but are not limited to, microprocessors (MCUs) or programmable logic devices (FPGAs), a memory 430 for storing data, and one or more storage media 420 (e.g., one or more mass storage devices) for storing application programs 423 or data 422. The memory 430 and storage media 420 may be temporary or persistent storage. The program stored in the storage media 420 may include one or more modules, each module may include a series of instruction operations on the server. Furthermore, the CPU 410 may be configured to communicate with the storage media 420 and execute the series of instruction operations stored in the storage media 420 on the server 400. Server 400 may also include one or more power supplies 460, one or more wired or wireless network interfaces 450, one or more input / output interfaces 440, and / or one or more operating systems 421, such as Windows Server™, Mac OS X™, Unix™, Linux™, Free BSD™, etc.

[0139] The input / output interface 440 can be used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the communication provider of server 400. In one example, the input / output interface 440 includes a network interface controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the input / output interface 440 may be a radio frequency (RF) module used for wireless communication with the Internet.

[0140] Those skilled in the art will understand that Figure 8 The structure shown is for illustrative purposes only and does not limit the structure of the aforementioned electronic device. For example, server 400 may also include... Figure 8 The more or fewer components shown, or having the same Figure 8 The different configurations shown.

[0141] It should be noted that the order of the embodiments described above is merely for descriptive purposes and does not represent the superiority or inferiority of the embodiments. Furthermore, specific embodiments have been described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps described in the claims can be performed in a different order than that shown in the embodiments and still achieve the desired result. Additionally, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0142] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the device and server embodiments are basically similar to the method embodiments, so the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0143] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware, or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0144] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A time determination method based on a clock system, characterized in that, The clock system includes a timer and a clock base, and the method includes: In response to a time acquisition command, the current count value of the timer, the current reference time in the clock base, and the current reference count value are acquired; the timer maintains a reference time and a reference count value, and the reference time and the reference count value are configured to be updated in real time based on a preset maintenance strategy library during the operation of the clock system; Determine the increment of the count value between the current count value and the current reference count value; The initial clock frequency and interval count value of the timer are obtained, and the initial clock frequency is compensated based on the interval count value and the current count value to obtain the compensated clock frequency; the interval count value is the difference between the count values ​​corresponding to two adjacent second pulse signals captured by the timer. Time error processing is performed on the count value increment and the compensated clock frequency to obtain the time increment; The current time corresponding to the time acquisition instruction is determined based on the time increment and the current reference time.

2. The method of claim 1, wherein, Before acquiring the current count value of the timer, the current reference time in the clock base, and the current reference count value in response to the time acquisition instruction, the method further includes: During the operation of the clock system, the input state of the second pulse signal is determined; The target maintenance strategy corresponding to the input state is matched from the preset maintenance strategy library; the preset maintenance strategy library stores the correspondence between different input states and different preset maintenance strategies; The benchmark time and benchmark count value are maintained based on the target maintenance strategy to achieve real-time updates of the benchmark time and benchmark count value.

3. The method of claim 2, wherein, When the input state is that the input signal is normal, maintaining the reference time and the reference count value based on the target maintenance strategy to achieve real-time updates of the reference time and the reference count value includes: When the input state is that the input signal is normal, the timer is controlled to acquire the real-time timer count value at the second pulse signal input time, and the reference count value in the clock base is replaced based on the real-time timer count value; Obtain NMEA messages and parse and process the NMEA messages based on the clock base to obtain time message data; The time message data is aligned to obtain new time data; Replace the reference time in the clock base with the new time data; Using the second pulse signal input period as the update period, the operation of replacing the reference time in the clock base based on the new time data is repeated when the input state is that the input signal is normal, so as to realize the real-time update of the reference time and the reference timing value.

4. The method of claim 2, wherein, When the input state is that the input signal is lost, maintaining the reference time and the reference count value based on the target maintenance strategy to achieve real-time updates of the reference time and the reference count value includes: When the input signal is lost, the real-time count value of the timer, the real-time reference count value and the real-time reference time in the clock base, the initial clock frequency and the historical interval count value are obtained; the historical interval count value is the interval count value obtained when the input signal is normal. Based on the real-time count value, the real-time reference count value, and the historical interval count value, frequency compensation processing is performed on the initial clock frequency to obtain a new clock frequency; A new reference time is determined based on the real-time count value, the new clock frequency, and the real-time reference time; The current reference time in the clock base is replaced based on the new reference time, and the current reference count value in the clock base is replaced based on the real-time count value; The operation of replacing the current reference count value in the clock base with the real-time timing value is repeated every preset period when the input state is that the input signal is lost, in order to realize the real-time update of the reference time and the reference timing value; the preset period is less than the overflow period of the timer's count value.

5. The method of claim 4, wherein, The step of performing frequency compensation processing on the initial clock frequency based on the real-time count value, the real-time reference count value, and the historical interval count value to obtain a new clock frequency includes: Determine the real-time count increment between the real-time count value and the real-time reference count value; The initial clock frequency is compensated based on the historical interval count and the real-time count to obtain the new clock frequency.

6. The method according to claim 5, characterized in that, The step of determining a new reference time based on the real-time count value, the new clock frequency, and the real-time reference time includes: The real-time count increment and the new clock frequency are processed by time increment to obtain the real-time time increment; The new reference time is determined based on the real-time reference time and the real-time time increment.

7. The method according to claim 1, characterized in that, The step of obtaining the initial clock frequency and interval count value of the timer, and performing frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency, includes: Obtain the initial clock frequency and the interval count value; The interval count value and the initial clock frequency are subjected to count error processing to obtain an error count value; The frequency error is determined based on the initial clock frequency and the error count value; The initial clock frequency is compensated based on the frequency error to obtain the compensated clock frequency.

8. The method according to claim 7, characterized in that, After determining the frequency error based on the initial clock frequency and the error count value, the method further includes: Obtain the adjustment weighting factor; The frequency error is compensated based on the adjusted weighting factor to obtain the compensated frequency error. The step of performing frequency compensation processing on the initial clock frequency based on the frequency error to obtain the compensated clock frequency includes: Based on the compensated frequency error, the initial clock frequency is subjected to frequency compensation processing to obtain the compensated clock frequency.

9. The method according to any one of claims 1-8, characterized in that, The method for obtaining the interval count value includes: Obtain the initial interval count value; the initial interval count value is the difference between the timer count value corresponding to the current second pulse signal capture time and the timer count value corresponding to the previous second pulse signal capture time; The validity verification process is performed on the initial interval count value based on the initial clock frequency to obtain the validity verification result. If the validity verification result is a valid value, repeat the operation of obtaining the initial interval count value a preset number of times to obtain a preset number of initial interval count values. The preset number of initial interval count values ​​are filtered to obtain the interval count values.

10. A time determination device based on a clock system, characterized in that, The clock system includes a timer and a clock base, and the device includes: The acquisition module is used to acquire the current count value of the timer, the current reference time in the clock base, and the current reference count value in response to a time acquisition command; the timer maintains a reference time and a reference count value, and the reference time and the reference count value are configured to be updated in real time based on a preset maintenance strategy library during the clock system process; The count increment determination module is used to determine the count value increment between the current count value and the current reference count value; A clock frequency compensation module is used to obtain the initial clock frequency and interval count value of the timer, and to perform frequency compensation processing on the initial clock frequency based on the interval count value and the current count value to obtain the compensated clock frequency; the interval count value is the difference between the count values ​​corresponding to two adjacent second pulse signals captured by the timer; The time increment determination module is used to perform time error processing on the count value increment and the compensated clock frequency to obtain the time increment; The time determination module is used to determine the current time corresponding to the time acquisition instruction based on the time increment and the current reference time.

Images