A constant voltage source circuit for BMS current calibration

Abstract

This application discloses a constant voltage source circuit for BMS current calibration. The constant voltage source circuit includes: a control module; a first voltage generation module for generating a first analog voltage; a second voltage generation module for generating a second analog voltage; a reference voltage generation circuit, including a voltage synthesis module and a feedback adjustment module. The voltage synthesis module is used to weight and synthesize the first analog voltage and the second analog voltage according to a first adjustment weight and a second adjustment weight, respectively, to form a target control voltage. The feedback adjustment module is used to adjust the reference voltage according to the deviation between the target control voltage and the feedback amount of the reference voltage; and a voltage divider output circuit for dividing the reference voltage according to a preset voltage division ratio to form a calibration voltage reduced by the preset voltage division ratio between a first calibration output terminal and a second calibration output terminal. This invention improves the adjustment resolution of low-amplitude calibration voltages while meeting the calibration voltage output range requirements.

Description

Technical Field

[0001] This application relates to the field of battery management system technology, and more particularly to a constant voltage source circuit for BMS current calibration. Background Technology

[0002] As energy storage devices develop towards larger capacity and higher power, the requirements for battery management systems (BMS) to detect and protect battery operating status are correspondingly increasing. To improve the reliability of current detection and protection, some BMSs use an analog front end (AFE) and a microcontroller unit (MCU) to detect the charging and discharging current separately, and compare the results of the two detections. Since both the AFE and the MCU determine the charging and discharging current based on the current sampling signal, the accuracy and consistency of the two sampling results directly affect current detection and protection. Therefore, it is usually necessary to calibrate the current sampling channel of the BMS.

[0003] BMS current sensing typically involves detecting the voltage drop across a current-sensing resistor and calculating the charging / discharging current based on the resistor's resistance value. For low-voltage, high-capacity energy storage devices, to reduce power loss and temperature rise caused by large currents flowing through the current-sensing resistor, the resistor value is usually small, and multiple resistors can be connected in parallel. Therefore, the voltage drop across the current-sensing resistor during actual charging and discharging is typically in the millivolt range. During current calibration, a calibration voltage with a defined value can be applied to the BMS's current sampling terminal to simulate the voltage drop generated when different charging / discharging currents flow through the current-sensing resistor, thus avoiding direct calibration using actual large currents.

[0004] For energy storage devices that integrate fuses, current sensing resistors, DC-DC converters, and inverter circuits, the battery-side current may experience power frequency fluctuations during calibration using actual charge and discharge currents. If only the current value at a specific sampling moment is acquired during calibration, this sampled value may deviate from the expected calibration value, thus affecting the current calibration results. Therefore, using a voltage source capable of outputting a definite voltage to simulate the voltage drop of the current sensing resistor is beneficial for providing a relatively stable calibration input for the BMS current sampling channel.

[0005] However, the analog voltage drop required for BMS current calibration is typically low, while the output range of common low-voltage constant voltage sources is usually in the volt range. When using an adjustable voltage source with a large output range to generate a low-amplitude calibration voltage, on the one hand, sufficient voltage adjustment range needs to be maintained to accommodate calibration requirements corresponding to different current sensing resistor values ​​and different calibration currents. On the other hand, when the target output voltage occupies a small range, the limited adjustment resolution of the voltage source itself will restrict the fine setting capability of the low-amplitude voltage, making it difficult to simultaneously achieve both output adjustment range and low-amplitude voltage adjustment resolution.

[0006] Therefore, how to meet the low-amplitude voltage output required for BMS current calibration while taking into account the adjustment range and resolution of the calibration voltage is a technical problem that needs to be solved by existing technologies. Summary of the Invention

[0007] One objective of this application is to address the problem that the calibration voltage amplitude used in the prior art to simulate the voltage drop of the current sensing resistor is low, while conventional voltage sources cannot simultaneously achieve a large voltage regulation range and high low-amplitude voltage regulation resolution.

[0008] To achieve the above objectives, this application provides a constant voltage source circuit for BMS current calibration, comprising: The control module is used to output the first control signal and the second control signal; A first voltage generation module is electrically connected to the control module and is used to generate a first analog voltage according to the first control signal; The second voltage generation module is electrically connected to the control module and is used to generate a second analog voltage according to the second control signal. A reference voltage generation circuit includes a voltage synthesis module and a feedback adjustment module. The voltage synthesis module is used to weight and synthesize a first analog voltage and a second analog voltage according to a first adjustment weight and a second adjustment weight, respectively, to form a target control voltage. The first adjustment weight is less than the second adjustment weight, so that the adjustment range of the first analog voltage on the target control voltage is less than the adjustment range of the second analog voltage on the target control voltage. The feedback adjustment module is used to adjust the reference voltage according to the deviation between the feedback amount of the target control voltage and the reference voltage. The voltage divider output circuit is electrically connected to the reference voltage generation circuit and is used to divide the reference voltage according to a preset voltage division ratio to form a calibration voltage between the first calibration output terminal and the second calibration output terminal after the reference voltage is reduced according to the preset voltage division ratio. The calibration voltage is used to apply the voltage drop across the analog current sensing resistor of the BMS to be calibrated.

[0009] Optionally, the constant voltage source circuit further includes: A reference voltage sampling module is electrically connected to the reference voltage generation circuit and the control module, respectively, and is used to sample the reference voltage and feed the sampling result back to the control module; The control module is also used to correct at least one of the first control signal and the second control signal when the sampling result indicates that there is a deviation between the actual value of the reference voltage and the target reference voltage value.

[0010] Optionally, the control module is configured to, when correcting the reference voltage, preferentially correct the first control signal so that the first voltage generation module changes the first analog voltage and changes the target control voltage based on the first adjustment weight corresponding to the first analog voltage.

[0011] Optionally, the voltage synthesis module includes: The first input branch is connected between the first voltage generation module and the synthesis node; The second input branch is connected between the second voltage generation module and the synthesis node; Wherein, the equivalent resistance of the first input branch is greater than the equivalent resistance of the second input branch, so that the first adjustment weight corresponding to the first analog voltage is less than the second adjustment weight corresponding to the second analog voltage, and the first analog voltage and the second analog voltage form the target control voltage at the synthesis node through the first input branch and the second input branch.

[0012] Optionally, the feedback adjustment module includes: The first operational amplifier has its non-inverting input terminal electrically connected to the output terminal of the voltage synthesis module, and its inverting input terminal used to receive the feedback of the reference voltage. The first transistor has a first terminal for receiving a power supply voltage, a second terminal electrically connected to a reference voltage output terminal for outputting the reference voltage, and a control terminal electrically connected to the output terminal of the first operational amplifier. The first operational amplifier controls the first transistor based on the deviation between the target control voltage and the feedback amount of the reference voltage to adjust the reference voltage.

[0013] Optionally, the feedback adjustment module further includes a feedback sampling unit, the feedback sampling unit comprising: The first sampling branch is connected between the reference voltage output terminal and the non-inverting input terminal of the second operational amplifier; The second sampling branch is connected between the reference voltage input terminal used to input the reference voltage and the inverting input terminal of the second operational amplifier; The feedback branch is connected between the output terminal of the second operational amplifier and the inverting input terminal of the second operational amplifier; The second operational amplifier is used to differentially amplify the voltage between the reference voltage output terminal and the reference voltage input terminal based on the voltage introduced through the first sampling branch and the second sampling branch. The output terminal of the second operational amplifier is electrically connected to the inverting input terminal of the first operational amplifier, and the output voltage of the second operational amplifier constitutes the feedback quantity of the reference voltage.

[0014] Optionally, the first sampling branch includes a first sampling resistor and a first gain resistor. The first sampling resistor is connected between the reference voltage output terminal and the non-inverting input terminal of the second operational amplifier, and the first gain resistor is connected between the non-inverting input terminal of the second operational amplifier and the ground terminal. The second sampling branch includes a second sampling resistor, which is connected between the reference voltage input terminal and the inverting input terminal of the second operational amplifier; The feedback branch includes a first feedback resistor, which is connected between the output terminal of the second operational amplifier and the inverting input terminal of the second operational amplifier. The resistance values ​​of the first sampling resistor, the first gain resistor, the second sampling resistor, and the first feedback resistor are configured to enable the second operational amplifier to differentially amplify the voltage between the reference voltage output terminal and the reference voltage input terminal according to a preset amplification factor.

[0015] Optionally, the voltage divider output circuit includes: The first voltage divider branch is connected between the reference voltage output terminal of the reference voltage generation circuit and the voltage divider node; The second voltage divider branch is connected between the voltage divider node and the reference node used to connect the reference voltage; The first output branch is connected between the voltage divider node and the first calibration output terminal; The second output branch is connected between the reference node and the second calibration output terminal; The equivalent resistance values ​​of the first voltage divider branch and the second voltage divider branch are configured to form the calibration voltage between the voltage divider node and the reference node according to the preset voltage division ratio.

[0016] Optionally, the first output branch includes a first output resistor connected between the voltage divider node and the first calibration output terminal; the second output branch includes a second output resistor connected between the reference node and the second calibration output terminal. The voltage divider output circuit further includes a filtering module, which includes a first output filtering capacitor, a differential filtering capacitor, and a second output filtering capacitor. The first output filtering capacitor is connected between the first calibration output terminal and the ground terminal, the differential filtering capacitor is connected between the first calibration output terminal and the second calibration output terminal, and the second output filtering capacitor is connected between the second calibration output terminal and the ground terminal.

[0017] Optionally, the constant voltage source circuit further includes a zero-point calibration circuit, the zero-point calibration circuit comprising: The shorting module includes a controllable shorting device connected between the first calibration output terminal and the second calibration output terminal; The first driving module is electrically connected to the control module and the controllable shorting device, respectively, and is used to control the controllable shorting device to short-circuit the first calibration output terminal and the second calibration output terminal according to the zero-point calibration control signal output by the control module, so that the calibration voltage between the first calibration output terminal and the second calibration output terminal is zero.

[0018] Optionally, the controllable short-circuiting device is a first relay, the first relay comprising: The first coil has a first end for receiving the coil power supply voltage and a second end for being electrically connected to the first drive module. The first switch contact is connected between the first calibration output terminal and the second calibration output terminal; The first driving module is used to control the first coil to be energized according to the zero-point calibration control signal, so as to close the first switch contact and short-circuit the first calibration output terminal with the second calibration output terminal.

[0019] Optionally, the first driving module includes: The second transistor has a first terminal electrically connected to the second terminal of the first coil, and a second terminal electrically connected to the ground terminal. The first driving resistor is connected between the control module and the control terminal of the second transistor; The first pull-down resistor is connected between the control terminal of the second transistor and the ground terminal; The second transistor is used to turn on according to the zero-point calibration control signal received through the first driving resistor, so that the second end of the first coil is connected to the ground terminal through the second transistor, thereby energizing the first coil.

[0020] Optionally, the constant voltage source circuit further includes a polarity switching circuit, the polarity switching circuit comprising: The polarity switching module includes a controllable switching device, which has a first input terminal electrically connected to the first calibration output terminal, a second input terminal electrically connected to the second calibration output terminal, a first external terminal for connecting to the first current sampling terminal of the BMS to be calibrated, and a second external terminal for connecting to the second current sampling terminal of the BMS to be calibrated. The second drive module is electrically connected to the control module and the controllable switching device respectively, and is used to control the controllable switching device to switch between the first connection state and the second connection state according to the polarity switching control signal output by the control module. In the first connection state, the first input terminal is electrically connected to the first external terminal, and the second input terminal is electrically connected to the second external terminal; in the second connection state, the first input terminal is electrically connected to the second external terminal, and the second input terminal is electrically connected to the first external terminal, so as to switch the polarity of the calibration voltage applied to the BMS to be calibrated.

[0021] Optionally, the controllable switching device is a second relay, the second relay comprising: The second coil has a first end for receiving the coil power supply voltage and a second end for being electrically connected to the second drive module. The first switching contact group includes a first moving contact, a first stationary contact, and a second stationary contact. The first moving contact is electrically connected to the first external terminal, the first stationary contact is electrically connected to the first calibration output terminal, and the second stationary contact is electrically connected to the second calibration output terminal. The second switching contact group includes a second moving contact, a third stationary contact, and a fourth stationary contact. The second moving contact is electrically connected to the second external terminal, the third stationary contact is electrically connected to the second calibration output terminal, and the fourth stationary contact is electrically connected to the first calibration output terminal. The first moving contact and the second moving contact are driven by the second coil in conjunction, so that the first switching contact group and the second switching contact group switch synchronously.

[0022] Optionally, the second drive module includes: The third transistor has its first terminal electrically connected to the second terminal of the second coil, and its second terminal electrically connected to the ground terminal. The second driving resistor is connected between the control module and the control terminal of the third transistor; The second pull-down resistor is connected between the control terminal of the third transistor and the ground terminal; The third transistor is used to turn on according to the polarity switching control signal received through the second driving resistor, so that the second end of the second coil is connected to the ground terminal through the third transistor, thereby energizing the second coil.

[0023] According to the scheme of this application, by setting a first voltage generation module and a second voltage generation module, and using a voltage synthesis module to weight and synthesize the first and second analog voltages according to different first and second adjustment weights, the first and second analog voltages correspond to different voltage adjustment scales. The first analog voltage corresponds to a smaller adjustment amplitude, used to achieve fine adjustment of the target control voltage, while the second analog voltage corresponds to a larger adjustment amplitude, used to provide the main adjustment amount of the target control voltage or cover the main adjustment range. Thus, through the synergistic effect of different adjustment scales, the adjustment resolution of the low-amplitude calibration voltage is improved while meeting the calibration voltage output range requirements. Furthermore, the reference voltage is adjusted by a feedback adjustment module, and the reference voltage is reduced by a voltage divider output circuit according to a preset voltage division ratio, forming a calibration voltage between the first and second calibration output terminals to simulate the voltage drop across the current sensing resistor, thereby achieving a low-amplitude, high-resolution calibration voltage output suitable for BMS current calibration.

[0024] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, the preferred embodiments of this application are described in detail below. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0026] Figure 1 A schematic block diagram of a constant voltage source circuit for BMS current calibration according to an embodiment of this application is shown; Figure 2 A schematic circuit diagram of a first follower circuit according to an embodiment of this application is shown; Figure 3 A schematic circuit diagram of a second follower circuit according to one embodiment of this application is shown; Figure 4 A schematic block diagram of a constant voltage source circuit for BMS current calibration according to another embodiment of this application is shown; Figure 5 A schematic circuit topology diagram of a reference voltage sampling module according to an embodiment of this application is shown; Figure 6A schematic circuit topology diagram of a reference voltage generation circuit according to an embodiment of this application is shown; Figure 7 A schematic circuit topology diagram of a voltage divider output circuit according to an embodiment of this application is shown; Figure 8 A schematic circuit topology diagram of a zero-point calibration circuit for a constant voltage source circuit according to an embodiment of this application is shown; Figure 9 A schematic circuit topology diagram of a polarity switching circuit of a constant voltage source circuit according to an embodiment of this application is shown. Detailed Implementation

[0027] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] Figure 1 A schematic block diagram of a constant voltage source circuit for BMS current calibration according to an embodiment of this application is shown. In this embodiment, the BMS is used to monitor and manage the operating state of the battery system, and generally includes an analog front end (AFE) for acquiring battery state parameters and a microcontroller unit (MCU) for processing the acquired data. Current detection is typically achieved through a current-sensing resistor placed in the battery circuit. The AFE and / or MCU acquire the voltage difference across the current-sensing resistor and determine the corresponding charge / discharge current based on the resistance value of the current-sensing resistor. Therefore, the voltage drop across the current-sensing resistor serves as the input signal for BMS current detection, and its accuracy directly affects the BMS current detection result.

[0029] When performing BMS current calibration, a calibration voltage with a defined amplitude needs to be input to the BMS's current sampling terminal to simulate the voltage drop across the current sensing resistor during actual charging and discharging, thereby calibrating the BMS's current sampling channel. Since the current sensing resistor in low-voltage, high-capacity energy storage devices typically uses a small resistance value to reduce power loss and temperature rise, the voltage drop across it is usually a low-amplitude voltage. Therefore, the constant voltage source used for current calibration needs to be able to output a low-amplitude calibration voltage corresponding to the voltage drop across the current sensing resistor.

[0030] Based on the above requirements, the constant voltage source circuit provided in this embodiment is used to generate a calibration voltage with a set amplitude and output the calibration voltage to the current sampling terminal of the BMS to be calibrated, so as to simulate the voltage drop generated when different charging and discharging currents flow through the current sensing resistor.

[0031] like Figure 1 As shown, the constant voltage source circuit includes a control module 1, a first voltage generation module 2, a second voltage generation module 3, a reference voltage generation circuit 4, and a voltage divider output circuit 5. The control module 1 outputs a first control signal and a second control signal. The first voltage generation module 2 is electrically connected to the control module 1 and generates a first analog voltage based on the first control signal. The second voltage generation module 3 is electrically connected to the control module 1 and generates a second analog voltage based on the second control signal. The reference voltage generation circuit 4 includes a voltage synthesis module 41 and a feedback adjustment module 42. The voltage synthesis module 41 weights and synthesizes the first and second analog voltages according to a first adjustment weight and a second adjustment weight, respectively, to form a target control voltage. The first adjustment weight is less than the second adjustment weight, so that the adjustment range of the first analog voltage on the target control voltage is less than the adjustment range of the second analog voltage on the target control voltage. The feedback adjustment module 42 adjusts the reference voltage based on the deviation between the feedback amount of the target control voltage and the reference voltage. The voltage divider output circuit 5 is electrically connected to the reference voltage generation circuit 4. It is used to divide the reference voltage according to a preset voltage division ratio to form a calibration voltage between the first calibration output terminal and the second calibration output terminal after the reference voltage is reduced according to the preset voltage division ratio. The calibration voltage is used to apply the voltage drop across the analog current sensing resistor of the BMS to be calibrated.

[0032] According to the scheme of this application embodiment, by setting a first voltage generation module 2 and a second voltage generation module 3, and using a voltage synthesis module 41 to weight and synthesize the first and second analog voltages according to different first and second adjustment weights, the first and second analog voltages correspond to different voltage adjustment scales. The first analog voltage corresponds to a smaller adjustment amplitude, used to achieve fine adjustment of the target control voltage, while the second analog voltage corresponds to a larger adjustment amplitude, used to provide the main adjustment amount of the target control voltage or cover the main adjustment range. Thus, through the synergistic effect of different adjustment scales, the adjustment resolution of the low-amplitude calibration voltage is improved while meeting the calibration voltage output range requirements. Furthermore, the reference voltage is adjusted by the feedback adjustment module 42, and the reference voltage is reduced by the voltage divider output circuit 5 according to a preset voltage division ratio, forming a calibration voltage between the first and second calibration output terminals to simulate the voltage drop across the current sensing resistor, thereby achieving a low-amplitude, high-resolution calibration voltage output suitable for BMS current calibration.

[0033] The control module 1 can be implemented using a controller with signal output function, such as a microcontroller unit (MCU), processor, or other programmable control circuit. The control module 1 can generate a first control signal and a second control signal according to the target control requirements.

[0034] Figure 2 A schematic circuit diagram of a first follower circuit according to an embodiment of this application is shown. Figure 1 and 2 As shown, the first voltage generation module 2 includes a first digital-to-analog converter (not shown) and a first follower circuit 21 connected to the first digital-to-analog converter. The first digital-to-analog converter is used to output a corresponding analog voltage UDAC1 according to a first control signal. This first digital-to-analog converter can be integrated into the control module, or it can be independently disposed outside the control module and electrically connected to the control module, or it can be disposed in the first voltage generation module 2 to receive the first control signal and output the analog voltage UDAC1. The first follower circuit 21 is used to buffer the analog voltage UDAC1 output by the first digital-to-analog converter to reduce the influence of the output impedance of the first digital-to-analog converter on the subsequent circuits and output a stable first analog voltage DAC1.

[0035] The first voltage follower circuit 21 includes a first voltage follower U1, a first input resistor R1, a first filter capacitor C1, and a first closed-loop connection resistor R2. The first input resistor R1 is connected between the output terminal of the first digital-to-analog converter (DAC) and the non-inverting input terminal of the first voltage follower U1. The first filter capacitor C1 is connected between the non-inverting input terminal of the first voltage follower U1 and ground, to filter the analog voltage UDAC1 output by the DAC. The first closed-loop connection resistor R2 is connected between the output terminal of the first voltage follower U1 and the inverting input terminal, enabling the first voltage follower U1 to form a voltage follower structure.

[0036] Figure 3 A schematic circuit diagram of a second follower circuit according to one embodiment of this application is shown. Figure 1 and 3 As shown, the second voltage generation module 3 includes a second digital-to-analog converter (not shown) and a second follower circuit 31 connected to the second digital-to-analog converter. The second digital-to-analog converter is used to output a corresponding analog voltage signal UDAC2 according to the second control signal. This second digital-to-analog converter can be integrated into the control module, or it can be independently set outside the control module and electrically connected to the control module, or it can be set in the second voltage generation module 3 to receive the second control signal and output the analog voltage signal UDAC2. The second follower circuit 31 is used to buffer the analog voltage signal UDAC2 output by the second digital-to-analog converter to reduce the influence of the output impedance of the second digital-to-analog converter on the subsequent circuits and output a stable second analog voltage DAC2.

[0037] The second follower circuit 31 includes a second voltage follower U2, a second input resistor R3, a second filter capacitor C2, and a second closed-loop connection resistor R4. The second input resistor R3 is connected between the output terminal of the second digital-to-analog converter and the non-inverting input terminal of the second voltage follower U2. The second filter capacitor C2 is connected between the non-inverting input terminal of the second voltage follower U2 and ground to filter the analog voltage signal UDAC2 output by the second digital-to-analog converter. The second closed-loop connection resistor R4 is connected between the output terminal and the inverting input terminal of the second voltage follower U2, enabling the second voltage follower U2 to form a voltage follower structure.

[0038] It should be understood that the first follower circuit 21 and the second follower circuit 31 are used to buffer and impedance match the corresponding analog voltage signals, and their specific circuit structures are not limited to... Figure 2 and Figure 3 The embodiment shown is illustrated. In other embodiments, the first follower circuit 21 and the second follower circuit 31 may also employ other circuit structures capable of achieving voltage buffering, impedance transformation, or signal isolation functions, such as other forms of operational amplifier follower circuits, buffer amplifier circuits, or integrated voltage buffers. This application does not specifically limit these embodiments.

[0039] In the above embodiment, the reference voltage generation circuit 4 forms the target control voltage by weighted synthesis of the first analog voltage DAC1 and the second analog voltage DAC2, and adjusts the reference voltage based on the deviation between the target control voltage and the reference voltage feedback. However, in practical applications, due to factors such as deviations in circuit device parameters, temperature changes, and power supply fluctuations, the actual reference voltage output by the reference voltage generation circuit 4 may deviate from the target reference voltage value, thus affecting the accuracy of the calibration voltage formed by the reference voltage.

[0040] To detect the actual output state of the reference voltage and further calibrate it based on the detection results, a reference voltage sampling module 6 is also provided in this embodiment. The reference voltage sampling module 6 is electrically connected to the reference voltage generation circuit 4 and the control module 1, and is used to sample the reference voltage and feed the sampling results back to the control module 1. When the sampling results indicate a deviation between the actual value of the reference voltage and the target reference voltage value, the control module 1 corrects at least one of the first control signal and the second control signal to bring the reference voltage closer to the target reference voltage value. It can be understood that when the reference voltage deviation is large, the second analog voltage DAC2 can also be changed by correcting the second control signal. This allows the target control voltage to be quickly changed using the larger adjustment weight of the second analog voltage DAC2, bringing the reference voltage into the target range. Therefore, by coordinating the adjustment of the first and second control signals, both the adjustment speed and accuracy during the reference voltage correction process can be considered.

[0041] Figure 4 A schematic block diagram of a constant voltage source circuit for BMS current calibration according to another embodiment of this application is shown. Figure 5 A schematic circuit topology diagram of a reference voltage sampling module according to one embodiment of this application is shown. Figure 4 and Figure 5 As shown, the reference voltage sampling module 6 includes a differential sampling unit 61, an input filtering unit 62, an analog-to-digital converter 63, and a communication connection unit 64. The differential sampling unit 61 includes a first sampling terminal A1 and a second sampling terminal A2. The first sampling terminal A1 is electrically connected to the reference voltage output terminal of the reference voltage generation circuit 4, and the second sampling terminal is connected to a reference voltage to introduce the differential voltage between the reference voltage and the reference voltage into the analog-to-digital converter 63.

[0042] The input filtering unit 62 is positioned between the differential sampling unit 61 and the analog-to-digital conversion unit 63. It is used to filter the analog sampling signal input to the analog-to-digital conversion unit 63 to reduce noise interference introduced during the sampling process. Figure 5 In the illustrated embodiment, the input filtering unit 62 includes a third input resistor R5, a fourth input resistor R6, a third filter capacitor C3, a fourth filter capacitor C4, and a fifth filter capacitor C5. The third input resistor R5 is connected between the first sampling terminal A1 and the first analog input terminal AIN0 of the analog-to-digital converter unit 63, and the fourth input resistor R6 is connected between the second sampling terminal A2 and the second analog input terminal AIN1 of the analog-to-digital converter unit 63. The third filter capacitor C3 is connected between the first analog input terminal AIN0 and the ground terminal, the fourth filter capacitor C4 is connected between the first analog input terminal AIN0 and the second analog input terminal AIN1, and the fifth filter capacitor C5 is connected between the second analog input terminal AIN1 and the ground terminal. This filtering structure can suppress common-mode noise and high-frequency interference in the differential input voltage, improving the stability of the sampling results.

[0043] The analog-to-digital converter (ADC) unit 63 converts the analog voltage input from the differential sampling unit 61 into a corresponding digital sampling result and sends the digital sampling result to the control module 1. The ADC unit 63 can be implemented using an ADC with differential input functionality. The ADC unit 63 includes a first analog input terminal AIN0, a second analog input terminal AIN1, an address configuration terminal ADDR, a status output terminal ALERT / RDY, a power supply terminal VDD, a ground terminal GND, and a communication interface. As mentioned earlier, the first analog input terminal AIN0 and the second analog input terminal AIN1 are respectively connected to the differential sampling unit 61 to receive the differential sampling voltage between the reference voltage output terminal and the reference voltage input terminal. The address configuration terminal ADDR is used to configure the communication address of the ADC unit 63, the status output terminal ALERT / RDY is used to output the analog-to-digital conversion status signal, the power supply terminal VDD is used to connect to the operating power supply, the ground terminal GND is used to provide a reference ground, and the communication interface includes a serial clock interface SCL and a serial data interface SDA for data interaction with the control module 1 to send the digital sampling result converted by the ADC unit 63 to the control module 1.

[0044] The communication connection unit 64 is used to realize data transmission between the analog-to-digital conversion unit 63 and the control module 1. The communication connection unit 64 includes a communication signal line, a pull-up resistor, and an interface resistor. The pull-up resistor is used to provide a bias voltage for the communication signal, and the interface resistor is used to limit the current and regulate the communication signal.

[0045] The pull-up resistors include a first pull-up resistor R7, a second pull-up resistor R8, and a third pull-up resistor R9. The first pull-up resistor R7 is connected between the power supply terminal and the status output terminal ALERT / RDY of the analog-to-digital converter unit 63. The second pull-up resistor R8 is connected between the power supply terminal and the serial clock interface SCL of the analog-to-digital converter unit 63. The third pull-up resistor R9 is connected between the power supply terminal and the serial data interface SDA of the analog-to-digital converter unit 63. By setting these pull-up resistors, pull-up biases are provided at the status output terminal ALERT / RDY, the serial clock interface SCL, and the serial data interface SDA, ensuring that each communication signal remains at a preset high level when not actively pulled low, thereby guaranteeing the stability of communication between the analog-to-digital converter unit 63 and the control module 1.

[0046] The interface resistors include a first interface resistor R10, a second interface resistor R11, and a third interface resistor R12. The first interface resistor R10 is connected between the status output terminal ALERT / RDY of the analog-to-digital converter (ADC) 63 and the status signal terminal U_RDY of the reference voltage sampling module. The second interface resistor R11 is connected between the serial clock interface SCL of the ADC 63 and the clock signal terminal U_SCL of the reference voltage sampling module. The third interface resistor R12 is connected between the serial data interface SDA of the ADC 63 and the data signal terminal U_SDA of the reference voltage sampling module. By setting these interface resistors, current limiting and signal conditioning can be performed on the status output signal, serial clock signal, and serial data signal to reduce interference during signal transmission and improve the stability of data interaction between the ADC 63 and the control module 1.

[0047] The control module 1 acquires the digital sampling result output by the analog-to-digital converter 63 through the communication connection unit 64, and determines the actual reference voltage value output by the reference voltage generation circuit 4 based on the digital sampling result. The control module 1 compares the actual reference voltage value with the preset target reference voltage value. When there is a deviation between the two, the control module 1 adjusts the first control signal and / or the second control signal according to the direction and magnitude of the deviation to change the first analog voltage DAC1 and / or the second analog voltage DAC2.

[0048] Since the first adjustment weight corresponding to the first analog voltage DAC1 is less than the second adjustment weight corresponding to the second analog voltage DAC2, when the reference voltage has only a small deviation, the control module 1 can prioritize adjusting the first control signal to change the first analog voltage DAC1, and then apply the first adjustment weight to the target control voltage. Compared to directly adjusting the second control signal, adjusting the first control signal can reduce the amplitude of the target control voltage change, thereby avoiding large fluctuations during the reference voltage correction process and improving the precision of the reference voltage adjustment.

[0049] In one embodiment, the range of the target control voltage can be determined based on the preset amplification factor of the feedback sampling unit 421 and the preset voltage division ratio of the voltage divider output circuit 5. The first adjustment weight and the second adjustment weight can be set according to the adjustment range and adjustment accuracy requirements of the target control voltage. By setting different adjustment weights, the first analog voltage and the second analog voltage correspond to different adjustment scales. The ratio of the first adjustment weight to the second adjustment weight can be set according to the adjustment range and adjustment resolution requirements of the target control voltage. For example, the ratio of the first adjustment weight to the second adjustment weight can be any value between 1:5 and 1:31, so that the adjustment amplitude corresponding to the first analog voltage is smaller than the adjustment amplitude corresponding to the second analog voltage. When the ratio of the first adjustment weight to the second adjustment weight is small, the adjustment effect of the first analog voltage on the target control voltage is further reduced, which is beneficial to improving the adjustment accuracy of the target control voltage. When the ratio of the first adjustment weight to the second adjustment weight is large, the second analog voltage can provide a larger adjustment range to meet different calibration voltage output requirements.

[0050] In one specific embodiment, the ratio of the first adjustment weight to the second adjustment weight can be set to 1:15. In this case, the first analog voltage DAC1 and the second analog voltage DAC2 participate in the formation of the target control voltage at a ratio of 1:15. After normalization, the first adjustment weight is 1 / 16, the second adjustment weight is 15 / 16, and the target control voltage V... target It can be represented as: ; For example, the full-scale output voltage of both the first analog voltage DAC1 and the second analog voltage DAC2 is 3300mV. When both the first analog voltage DAC1 and the second analog voltage DAC2 output 3300mV, the target control voltage is: V target =3300mV×1 / 16+3300mV×15 / 16=3300mV.

[0051] When fine-tuning of the target control voltage is required, control module 1 can change the first analog voltage DAC1 by adjusting the first control signal. Since the first analog voltage DAC1 only participates in the formation of the target control voltage with a 1 / 16 adjustment weight, the change in the first analog voltage DAC1 only causes a small change in the target control voltage, thereby achieving fine adjustment.

[0052] When a large range of adjustment to the target control voltage is required, control module 1 can adjust the second control signal to change the second analog voltage DAC2. Since the second analog voltage DAC2 participates in the formation of the target control voltage with a 15 / 16 adjustment weight, it can quickly change the target control voltage to meet a large range of voltage setting requirements.

[0053] Figure 6 A schematic circuit topology diagram of a reference voltage generation circuit according to one embodiment of this application is shown. Figure 6 As shown, the voltage synthesis module 41 of the reference voltage generation circuit 4 includes a first input branch and a second input branch. The first input branch is connected between the first voltage generation module 2 and the synthesis node H, and the second input branch is connected between the second voltage generation module 3 and the synthesis node H. The equivalent resistance of the first input branch is greater than the equivalent resistance of the second input branch, so that the first adjustment weight corresponding to the first analog voltage DAC1 is less than the second adjustment weight corresponding to the second analog voltage DAC2. The first analog voltage DAC1 and the second analog voltage DAC2 form the target control voltage at the synthesis node H through the first input branch and the second input branch.

[0054] In one embodiment, the first input branch and the second input branch may each include at least one resistor. The influence of the first analog voltage DAC1 and the second analog voltage DAC2 on the voltage at the synthesis node H is determined by setting the equivalent resistance values ​​of the first input branch and the second input branch. Let the equivalent resistance value of the first input branch be R. a The equivalent resistance of the second input branch is R. b The input impedance of the subsequent circuit connected at the synthesis node H is much greater than R. a and R b In this case, the input current flowing into the subsequent circuit from the synthesis node H can be ignored, then the target control voltage V formed at the synthesis node H is... target satisfy: ; Further analysis revealed: .

[0055] Therefore, the first adjustment weight corresponding to the first analog voltage DAC1 is R. b / (R a +R b The second adjustment weight corresponding to the second analog voltage DAC2 is R. a / (R a +R b Therefore, when the equivalent resistance R of the first input branch... a Greater than the equivalent resistance R of the second input branch b When the first adjustment weight is less than the second adjustment weight, the change in the first analog voltage DAC1 has a smaller impact on the target control voltage, while the change in the second analog voltage DAC2 has a larger impact on the target control voltage.

[0056] In one specific embodiment, when the ratio of the first adjustment weight to the second adjustment weight is set to 1:15, the ratio of the equivalent resistance of the first input branch to the second input branch can be set to 15:1. That is, when R a =15R b At this time, the first adjustment weight is 1 / 16, the second adjustment weight is 15 / 16, and the target control voltage V is... target Satisfy: V target =DAC1×1 / 16+DAC2×15 / 16. It can be seen that the adjustment weight is inversely related to the equivalent resistance of the corresponding input branch; that is, the larger the equivalent resistance of the input branch, the smaller the adjustment weight of the analog voltage connected to that input branch on the target control voltage. Therefore, the adjustment scale corresponding to the first analog voltage DAC1 and the second analog voltage DAC2 can be configured by adjusting the ratio of the equivalent resistance of the first input branch and the second input branch, without changing the output range of the first voltage generation module 2 and the second voltage generation module 3 themselves.

[0057] exist Figure 6 In the illustrated embodiment, the first input branch may include, for example, a fifth input resistor R13, and the second input branch may include a sixth input resistor R14. The first and second input branches may also be composed of multiple resistors connected in series and / or parallel. As long as the first and second input branches have equivalent resistance values ​​that satisfy a preset adjustment weight relationship, the first analog voltage DAC1 and the second analog voltage DAC2 can form a target control voltage at the synthesis node H according to their corresponding first and second adjustment weights. This application does not limit the specific number and resistance values ​​of the resistors in each input branch.

[0058] In one embodiment, the voltage synthesis module 41 further includes a synthesis filter capacitor C14, which is connected between the synthesis node H and the ground terminal. The synthesis filter capacitor C14 is used to filter the target control voltage formed by the first analog voltage DAC1 and the second analog voltage DAC2 at the synthesis node H, so as to reduce high-frequency fluctuations in the target control voltage.

[0059] In one embodiment, the feedback adjustment module 42 includes a first operational amplifier U3 and a first transistor Q1. The non-inverting input of the first operational amplifier U3 is electrically connected to the output of the voltage synthesis module 41, and the inverting input is used to receive the feedback of the reference voltage. The first terminal of the first transistor Q1 is used to receive the supply voltage, the second terminal is electrically connected to the reference voltage output terminal used to output the reference voltage, and the control terminal is electrically connected to the output of the first operational amplifier U3. The first operational amplifier U3 is used to control the first transistor Q1 according to the deviation between the target control voltage and the feedback of the reference voltage, so as to adjust the reference voltage.

[0060] In one embodiment, the feedback adjustment module 42 further includes a control current-limiting resistor R15, a first compensation resistor R16, a first compensation capacitor C6, a first bleeder resistor R17, and a first current-limiting resistor R18. The control current-limiting resistor R15 is connected between the output terminal of the first operational amplifier U3 and the control terminal of the first transistor Q1, and is used to limit the current output from the first operational amplifier U3 to the control terminal of the first transistor Q1.

[0061] The first compensation resistor R16 and the first compensation capacitor C6 are connected in series between the inverting input and output terminals of the first operational amplifier U3 to form an AC feedback path between them. The first compensation capacitor C6 isolates the DC component, allowing the AC compensation path to primarily feed back the dynamic components during the input and output voltage changes of the first operational amplifier U3, thereby adjusting the dynamic response of the first operational amplifier U3.

[0062] The first bleeder resistor R17 is connected between the control terminal and the second terminal of the first transistor Q1 to provide a current bleedering path between them, so that the control terminal of the first transistor Q1 maintains a defined potential state. The first current-limiting resistor R18 is connected between the power supply terminal and the first terminal of the first transistor Q1 to limit the current flowing through the first transistor Q1.

[0063] Under the control of the first operational amplifier U3, the first transistor Q1 operates in linear amplification mode. The first operational amplifier U3 changes its output voltage based on the deviation between the target control voltage received at its non-inverting input and the reference voltage feedback received at its inverting input. It also adjusts the potential of the control terminal of the first transistor Q1 by controlling the current-limiting resistor R15, thereby changing the conduction level of the first transistor Q1 and consequently changing the reference voltage at its second terminal. Thus, the first transistor Q1 continuously adjusts the reference voltage within its linear operating region.

[0064] In one embodiment, the feedback adjustment module 42 further includes a feedback sampling unit 421. The feedback sampling unit includes a first sampling branch 4211, a second sampling branch 4212, a feedback branch 4213, and a second operational amplifier U4. The first sampling branch 4211 is connected between the reference voltage output terminal AIN0 and the non-inverting input terminal of the second operational amplifier U4. The second sampling branch 4212 is connected between the reference voltage input terminal AIN1 (used for inputting the reference voltage) and the inverting input terminal of the second operational amplifier U4. The feedback branch 4213 is connected between the output terminal of the second operational amplifier U4 and its inverting input terminal. The second operational amplifier U4 is used to differentially amplify the voltage between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 based on the voltage introduced through the first sampling branch 4211 and the second sampling branch 4212. The output terminal of the second operational amplifier U4 is electrically connected to the inverting input terminal of the first operational amplifier U4, and the output voltage of the second operational amplifier U4 constitutes the feedback quantity of the reference voltage.

[0065] In one embodiment, the first sampling branch 4211 includes a first sampling resistor R19, a first gain resistor R20, and a sixth filter capacitor C7. The first sampling resistor R19 is connected between the reference voltage output terminal AIN0 and the non-inverting input terminal of the second operational amplifier U4. The first gain resistor R20 and the sixth filter capacitor C7 are both connected between the non-inverting input terminal of the second operational amplifier U4 and the ground terminal. The second sampling branch 4212 includes a second sampling resistor R21, which is connected between the reference voltage input terminal AIN1 and the inverting input terminal of the second operational amplifier U4. The feedback branch 4213 includes a first feedback resistor R22, which is connected between the output terminal and the inverting input terminal of the second operational amplifier U4. The resistance values ​​of the first sampling resistor R19, the first gain resistor R20, the second sampling resistor R21, and the first feedback resistor R22 are configured to cause the second operational amplifier U4 to differentially amplify the voltage between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 according to a preset amplification factor.

[0066] In one embodiment, the first sampling resistor R19, the first gain resistor R20, the second sampling resistor R21, and the first feedback resistor R22 can be configured according to a preset resistance ratio to determine the differential gain of the second operational amplifier U4. Under DC steady-state conditions, the sixth filter capacitor C7 does not participate in the DC voltage division relationship of the first sampling branch 4211. Let the resistance values ​​of the first sampling resistor R19, the first gain resistor R20, the second sampling resistor R21, and the first feedback resistor R22 be r19, r20, r21, and r22, respectively. When r20 / r19 = r22 / r21 = K, the output voltage V of the second operational amplifier U4 is... outIt can be represented as: V out =K×(V AIN0 -V AIN1 Where K is the preset amplification factor of the feedback sampling unit 421, and V AIN0 The voltage at the reference voltage output terminal AIN0, V AIN1 The voltage at the reference voltage input terminal AIN1 is used. Therefore, by configuring the resistance ratio between the above resistors, the low-amplitude voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 can be amplified according to a preset amplification factor, and a reference voltage feedback quantity can be formed for comparison with the target control voltage.

[0067] In one specific embodiment, the preset amplification factor K can be set to 16, that is, the resistance ratio of the first gain resistor R20 to the first sampling resistor R19 and the resistance ratio of the first feedback resistor R22 to the second sampling resistor R21 are both set to 16:1. At this time, the output voltage of the second operational amplifier U4 satisfies: V out =16×(V AIN0 -V AIN1 ).

[0068] For example, when a 100mV voltage difference is required between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1, the feedback sampling unit 421 differentially amplifies the 100mV voltage difference by a factor of 16, resulting in an output voltage V from the second operational amplifier U4. out It is 1600mV. This output voltage V out The input is given to the inverting input of the first operational amplifier U3 and compared with the target control voltage received at its non-inverting input. When the target control voltage is 1600mV, as the feedback adjustment process proceeds, V... out Approaching 1600mV, the voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 approaches 100mV.

[0069] During the above feedback regulation process, when the output voltage V out When the voltage is lower than the target control voltage, the output of the first operational amplifier U3 changes accordingly, increasing the conduction level of the first transistor Q1, which in turn raises the voltage at the reference voltage output terminal AIN0. This increases the voltage difference between AIN0 and AIN1, and consequently raises the output voltage V. out As it increases; when the output voltage V out When the voltage is higher than the target control voltage, the first operational amplifier U3 reduces the conduction level of the first transistor Q1, thereby reducing the voltage difference between AIN0 and AIN1, and increasing the output voltage V. outThe corresponding voltage is reduced. Therefore, a closed-loop regulation is formed by the first operational amplifier U3, the first transistor Q1, and the feedback sampling unit 421, causing the output voltage V to decrease accordingly. out Approaching the target control voltage.

[0070] In one embodiment, the feedback branch 4213 further includes a second compensation capacitor C8, which is connected in parallel with the first feedback resistor R22 between the output terminal and the inverting input terminal of the second operational amplifier U4. Under steady-state DC conditions, the second compensation capacitor C8 does not participate in determining the aforementioned preset amplification factor K. During dynamic voltage changes, the second compensation capacitor C8 can bypass high-frequency components in the feedback branch to suppress high-frequency disturbances affecting the output voltage V of the second operational amplifier U4. out The impact.

[0071] When the above closed-loop adjustment reaches a stable state, the target control voltage at the non-inverting input terminal of the first operational amplifier U3 and the output voltage V received at the inverting input terminal are... out Since they tend to be consistent, and therefore, neglecting factors such as operational amplifier input offset, the following can be approximately satisfied: V target ≈V out =K×(V AIN0 -V AIN1 Therefore, the voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 can be expressed as: V AIN0 -V AIN1 ≈V target / K. When the preset amplification factor K is 16, for every 16mV change in the target control voltage, the voltage difference between AIN0 and AIN1 changes by approximately 1mV. Therefore, the higher amplitude target control voltage formed by the first analog voltage DAC1 and the second analog voltage DAC2 can be converted into a lower amplitude reference voltage difference through the feedback adjustment module 42, thereby further improving the ability to regulate low amplitude voltages.

[0072] For example, when the maximum target control voltage is 3300mV and the preset amplification factor K is 16, the maximum voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 is approximately 3300mV / 16 = 206.25mV. Therefore, in this specific embodiment, the reference voltage difference between AIN0 and AIN1 can be adjusted within the range of approximately 0-206.25mV.

[0073] Figure 7 A schematic circuit topology diagram of a voltage divider output circuit according to an embodiment of this application is shown. Figure 7As shown, the voltage divider output circuit 5 includes a first voltage divider branch 51, a second voltage divider branch 52, a first output branch 53, and a second output branch 54. The first voltage divider branch 51 is connected between the reference voltage output terminal AIN0 and the voltage divider node J. The second voltage divider branch 52 is connected between the voltage divider node J and the reference node K. The reference node K is electrically connected to the reference voltage input terminal AIN1. The first output branch 53 is connected between the voltage divider node J and the first calibration output terminal SRN. The second output branch 54 is connected between the reference node K and the second calibration output terminal SRP. The equivalent resistance values ​​of the first voltage divider branch 51 and the second voltage divider branch 52 are configured to form a calibration voltage between the voltage divider node J and the reference node K according to a preset voltage division ratio. Specifically, the first voltage divider branch 51 and the second voltage divider branch 52 divide the reference voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 according to a preset voltage division ratio, so that the voltage of the voltage divider node J relative to the reference node K is less than the reference voltage difference. The voltages of the voltage divider node J and the reference node K are led out to the first calibration output terminal SRN and the second calibration output terminal SRP respectively through the first output branch 53 and the second output branch 54, so as to output the calibration voltage to the current sampling terminal of the BMS to be calibrated.

[0074] The first voltage divider branch 51 includes several resistors connected in series. Figure 7 In the illustrated embodiment, the first voltage divider branch 51 includes a first voltage divider resistor R23, a second voltage divider resistor R24, a third voltage divider resistor R25, a fourth voltage divider resistor R26, a fifth voltage divider resistor R27, a sixth voltage divider resistor R28, a seventh voltage divider resistor R29, an eighth voltage divider resistor R30, and a ninth voltage divider resistor R31. The first voltage divider resistors R23 to R31 are connected in series between the reference voltage output terminal AIN0 and the voltage divider node J to form the equivalent resistance of the first voltage divider branch 51. The second voltage divider branch 52 includes a tenth voltage divider resistor R32, which is connected between the voltage divider node J and the reference node K. The equivalent resistance of the first voltage divider branch 51 and the resistance of the tenth voltage divider resistor R32 together determine the voltage division ratio of the voltage divider node J relative to the reference node K.

[0075] In one embodiment, the first voltage divider resistors R23 to the tenth voltage divider resistor R32 can have the same resistance value. In this case, the first voltage divider branch 51 is formed by nine voltage divider resistors of equal resistance connected in series, and its equivalent resistance is nine times the resistance of the tenth voltage divider resistor R32 in the second voltage divider branch 52. Therefore, the ratio of the equivalent resistance values ​​of the first voltage divider branch 51 to the second voltage divider branch 52 is 9:1. Correspondingly, the voltage between voltage divider node J and reference node K is 1 / 10 of the reference voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1, i.e., the preset voltage division ratio is 1 / 10. For example, when the reference voltage difference between the reference voltage output terminal AIN0 and the reference voltage input terminal AIN1 is 206.25mV, after voltage division by the first voltage divider branch 51 and the second voltage divider branch 52, the calibration voltage formed between voltage divider node J and reference node K is approximately 20.625mV. By changing the number of series resistors in the first voltage divider branch 51 and / or the resistance value of each voltage divider resistor, the preset voltage division ratio can be adjusted accordingly to adapt to the calibration voltage range required for different BMS current calibrations.

[0076] The first output branch 53 includes a first output resistor R33, which is connected between the voltage divider node J and the first calibration output terminal SRN, and is used to lead the voltage at the voltage divider node J to the first calibration output terminal SRN. The second output branch 54 includes a second output resistor R34, which is connected between the reference node K and the second calibration output terminal SRP, and is used to lead the voltage at the reference node K to the second calibration output terminal SRP.

[0077] In one embodiment, a shorting connector ST1 is provided between the reference voltage input terminal AIN1 and the reference node K. The shorting connector ST1 is used to electrically connect the reference voltage input terminal AIN1 and the reference node K. Figure 7 In the embodiment shown, by setting a shorting device ST1, the circuit networks in which the reference voltage input terminal AIN1 and the reference node K are located can be distinguished while maintaining the electrical connection between the reference voltage input terminal AIN1 and the reference node K.

[0078] In one embodiment, the voltage divider output circuit 5 further includes a filtering module 55. The filtering module 55 filters the calibration voltage output between the first calibration output terminal SRN and the second calibration output terminal SRP to reduce high-frequency interference in the output signal. Specifically, the filtering module includes a first output filter capacitor C9, a differential filter capacitor C10, and a second output filter capacitor C11. The first output filter capacitor C9 is connected between the first calibration output terminal SRN and the ground terminal, the differential filter capacitor C10 is connected between the first calibration output terminal SRN and the second calibration output terminal SRP, and the second output filter capacitor C11 is connected between the second calibration output terminal SRP and the ground terminal.

[0079] exist Figure 7In the illustrated embodiment, the first output resistor R33, in conjunction with the first output filter capacitor C9, suppresses the high-frequency voltage component at the first calibration output terminal SRN. The second output resistor R34, in conjunction with the second output filter capacitor C11, suppresses the high-frequency voltage component at the second calibration output terminal SRP. The differential filter capacitor C10 is connected between the first calibration output terminal SRN and the second calibration output terminal SRP to filter the high-frequency differential component between the two calibration output terminals. Thus, the calibration voltage formed by the first voltage divider branch 51 and the second voltage divider branch 52 is output to the current sampling terminal of the BMS to be calibrated via the first output branch 53, the second output branch 54, and the filter module 55.

[0080] Figure 8 A schematic circuit topology diagram of a zero-point calibration circuit for a constant voltage source circuit according to an embodiment of this application is shown. Figure 8 As shown, the constant voltage source circuit also includes a zero-point calibration circuit 7, which includes a shorting module and a first drive module 71. The shorting module includes a controllable shorting device RLY1 connected between the first calibration output terminal SRN and the second calibration output terminal SRP. The controllable shorting device RLY1 can be, for example, a first relay, which includes a first coil and a first switch contact. The first end of the first coil is used to connect to the coil power supply voltage, and the second end is electrically connected to the first drive module 71. The first switch contact is connected between the first calibration output terminal SRN and the second calibration output terminal SRP.

[0081] The first drive module 71 is electrically connected to the control module 1 and the controllable shorting device RLY1 respectively. It is used to control the first coil to be energized according to the zero-point calibration control signal U_RLY_SC output by the control module 1, so as to close the first switch contact and short-circuit the first calibration output terminal SRN and the second calibration output terminal SRP, so that the calibration voltage between the first calibration output terminal SRN and the second calibration output terminal SRP is zero.

[0082] exist Figure 8 In the illustrated embodiment, the first driving module includes a second transistor Q2, a first driving resistor R35, and a first pull-down resistor R36. The first terminal of the second transistor Q2 is electrically connected to the second terminal of the first coil, and the second terminal is electrically connected to ground. The first driving resistor R35 is connected between the control module 1 and the control terminal of the second transistor Q2. The first pull-down resistor R36 is connected between the control terminal of the second transistor Q2 and the ground terminal. The second transistor Q2 is turned on according to the zero-point calibration control signal U_RLY_SC received via the first driving resistor R35, so that the second terminal of the first coil is connected to the ground terminal via the second transistor Q2, thereby energizing the first coil.

[0083] In one embodiment, the first drive module 71 further includes a first protection device TVS1 and a first pre-charge capacitor C12, which are connected in parallel across the first coil of the first relay. The first protection device TVS1 is used to suppress the reverse transient voltage generated when the first coil is de-energized, and the first pre-charge capacitor C12 is used to pre-charge the first relay during operation to reduce the possibility of arcing when the first relay contacts operate.

[0084] When zero-point calibration is not performed, control module 1 does not output a valid zero-point calibration control signal U_RLY_SC. The first pull-down resistor R36 holds the control terminal of the second transistor Q2 at a potential that turns the second transistor Q2 off. No drive current flows through the first coil, and the first switch contact remains open. At this time, the calibration voltage formed by the voltage divider output circuit 5 is maintained between the first calibration output terminal SRN and the second calibration output terminal SRP. The constant voltage source circuit can perform current calibration on the BMS to be calibrated according to the set calibration voltage.

[0085] When zero-point calibration is performed, control module 1 outputs a valid zero-point calibration control signal U_RLY_SC. This signal is applied to the control terminal of the second transistor Q2 via the first drive resistor R35, switching Q2 from the off state to the on state. After Q2 is turned on, the second terminal of the first coil is connected to the ground terminal via Q2. A coil drive current path is formed by the coil power supply terminal, the first coil, the second transistor Q2, and the ground terminal, energizing the first coil and driving the first switch contact to close. After the first switch contact closes, the first calibration output terminal SRN and the second calibration output terminal SRP are directly electrically connected, and the potential difference between them approaches zero, thus providing the calibration input corresponding to the zero-current state to the BMS to be calibrated. The original solution involved short-circuiting SRP and SRN by closing a relay to perform zero-point current calibration.

[0086] After the zero-point calibration is completed, the control module 1 cancels the zero-point calibration control signal U_RLY_SC, the second transistor Q2 returns to the cutoff state, the first coil is de-energized, the first switch contact is opened again, the first calibration output terminal SRN and the second calibration output terminal SRP are unshort-circuited, and the constant voltage source circuit returns to the normal calibration voltage output state.

[0087] For example, in an implementation where the zero-point calibration control signal U_RLY_SC is active high, when control module 1 switches U_RLY_SC from low to high, the second transistor Q2 turns on, the first coil is energized, and the first switch contact closes. At this time, SRN and SRP are short-circuited. When U_RLY_SC returns to low, the first pull-down resistor R36 lowers the potential of the control terminal of the second transistor Q2, the second transistor Q2 turns off, the first coil is de-energized, and the first switch contact returns to the open state.

[0088] Figure 9 A schematic circuit topology diagram of a polarity switching circuit for a constant voltage source circuit according to an embodiment of this application is shown. The polarity switching circuit 8 includes a polarity switching module and a second driving module 81. The polarity switching module includes a controllable switching device RLY2, which has a first input terminal electrically connected to a first calibration output terminal SRN, a second input terminal electrically connected to a second calibration output terminal SRP, a first external terminal BMS_SRN for connecting to a first current sampling terminal of the BMS to be calibrated, and a second external terminal BMS_SRP for connecting to a second current sampling terminal of the BMS to be calibrated. The second driving module 81 is electrically connected to both the control module 1 and the controllable switching device RLY2, and is used to control the controllable switching device RLY2 to switch between a first connection state and a second connection state according to the polarity switching control signal U_RLY_SW output by the control module 1. In the first connection state, the first input terminal is electrically connected to the first external terminal BMS_SRN, and the second input terminal is electrically connected to the second external terminal BMS_SRP. In the second connection state, the first input terminal is electrically connected to the second external terminal BMS_SRP, and the second input terminal is electrically connected to the first external terminal BMS_SRN, so as to switch the polarity of the calibration voltage applied to the BMS to be calibrated.

[0089] In one embodiment, the controllable switching device RLY2 is a second relay. The second relay includes a second coil, a first switching contact group, and a second switching contact group. A first end of the second coil is connected to the coil power supply voltage, and a second end is electrically connected to the second drive module 81. The first switching contact group includes a first moving contact, a first stationary contact, and a second stationary contact. The first moving contact is electrically connected to the first external terminal BMS_SRN, the first stationary contact is electrically connected to the first calibration output terminal SRN, and the second stationary contact is electrically connected to the second calibration output terminal SRP. The second switching contact group includes a second moving contact, a third stationary contact, and a fourth stationary contact. The second moving contact is electrically connected to the second external terminal BMS_SRP, the third stationary contact is electrically connected to the second calibration output terminal SRP, and the fourth stationary contact is electrically connected to the first calibration output terminal SRN. The first moving contact and the second moving contact are driven by the second coil in a coordinated manner to ensure synchronous switching between the first and second switching contact groups.

[0090] In one embodiment, the second driving module 81 includes a third transistor Q3, a second driving resistor R37, and a second pull-down resistor R38. A first terminal of the third transistor Q3 is electrically connected to a second terminal of the second coil, and the second terminal is electrically connected to ground. The second driving resistor R37 is connected between the control module and the control terminal of the third transistor Q3. The second pull-down resistor R38 is connected between the control terminal of the third transistor Q3 and the ground terminal. The third transistor Q3 is used to turn on according to the polarity switching control signal U_RLY_SW received via the second driving resistor R37, so that the second terminal of the second coil is connected to the ground terminal via the third transistor Q3, thereby energizing the second coil.

[0091] In one embodiment, the second drive module 81 further includes a second protection device TVS2 and a second pre-charge capacitor C13, which are connected in parallel across the second coil of the second relay. The second protection device TVS2 is used to suppress the reverse transient voltage generated when the second coil is de-energized, and the second pre-charge capacitor C13 is used to pre-charge the relay during operation to reduce the possibility of arcing during relay contact switching. The function of this part of the circuit corresponds to the first protection device TVS1 and the first pre-charge capacitor C12 in the aforementioned zero-point calibration circuit 7.

[0092] During polarity switching, control module 1 changes the state of the polarity switching control signal U_RLY_SW, causing the third transistor Q3 to switch between an on and off state, thereby controlling the second coil to be energized or de-energized. When the state of the second coil changes, the first moving contact and the second moving contact switch synchronously, causing the second relay to switch between a first connection state and a second connection state, thereby changing the corresponding connection relationship between the first calibration output terminal SRN and the second calibration output terminal SRP and the first external terminal BMS_SRN and the second external terminal BMS_SRP.

[0093] In the first connection state, the first calibration output terminal SRN is electrically connected to the first external terminal BMS_SRN, and the second calibration output terminal SRP is electrically connected to the second external terminal BMS_SRP. Therefore, the calibration voltage applied to the BMS to be calibrated maintains the original voltage polarity between the first calibration output terminal SRN and the second calibration output terminal SRP. For example, when the potential of the second calibration output terminal SRP is higher than the potential of the first calibration output terminal SRN, and the calibration voltage between them is 20mV, a 20mV voltage difference in the same direction is formed between the first external terminal BMS_SRN and the second external terminal BMS_SRP. The BMS to be calibrated can recognize this voltage difference as a current sampling signal in one direction.

[0094] In the second connection state, the first calibration output terminal SRN is electrically connected to the second external terminal BMS_SRP, and the second calibration output terminal SRP is electrically connected to the first external terminal BMS_SRN, forming a cross connection between the two calibration output terminals and the two external terminals. Therefore, while the calibration voltage amplitude remains unchanged, the polarity of the calibration voltage applied to the BMS to be calibrated is reversed. Taking the aforementioned 20mV calibration voltage as an example, after switching to the second connection state, the voltage difference between BMS_SRP and BMS_SRN changes from the original positive 20mV to negative 20mV, thereby simulating a current sampling signal in the opposite direction to the first connection state.

[0095] Therefore, the polarity switching circuit 8 does not need to change the amplitude of the calibration voltage generated by the reference voltage generation circuit 4 and the voltage divider output circuit 5. It can switch the polarity of the calibration voltage by simply changing the connection relationship between the first calibration output terminal SRN and the second calibration output terminal SRP and the two current sampling terminals of the BMS to be calibrated, so as to simulate the current sensing resistor voltage drop corresponding to the charging current and the discharging current respectively.

[0096] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0097] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. Therefore, the patent protection scope of this application should be determined by the appended claims.

Claims

1. A constant voltage source circuit for BMS current calibration, characterized in that, include: The control module is used to output the first control signal and the second control signal; A first voltage generation module is electrically connected to the control module and is used to generate a first analog voltage according to the first control signal; The second voltage generation module is electrically connected to the control module and is used to generate a second analog voltage according to the second control signal. A reference voltage generation circuit includes a voltage synthesis module and a feedback adjustment module. The voltage synthesis module is used to weight and synthesize a first analog voltage and a second analog voltage according to a first adjustment weight and a second adjustment weight, respectively, to form a target control voltage. The first adjustment weight is less than the second adjustment weight, so that the adjustment range of the first analog voltage on the target control voltage is less than the adjustment range of the second analog voltage on the target control voltage. The feedback adjustment module is used to adjust the reference voltage according to the deviation between the feedback amount of the target control voltage and the reference voltage. The voltage divider output circuit is electrically connected to the reference voltage generation circuit and is used to divide the reference voltage according to a preset voltage division ratio to form a calibration voltage between the first calibration output terminal and the second calibration output terminal after the reference voltage is reduced according to the preset voltage division ratio. The calibration voltage is used to apply the voltage drop across the analog current sensing resistor of the BMS to be calibrated.

2. The constant voltage source circuit according to claim 1, characterized in that, Also includes: A reference voltage sampling module is electrically connected to the reference voltage generation circuit and the control module, respectively, and is used to sample the reference voltage and feed the sampling result back to the control module; The control module is also used to correct at least one of the first control signal and the second control signal when the sampling result indicates that there is a deviation between the actual value of the reference voltage and the target reference voltage value.

3. The constant voltage source circuit according to claim 2, characterized in that, The control module is used to prioritize correcting the first control signal when correcting the reference voltage, so that the first voltage generation module changes the first analog voltage, and changes the target control voltage based on the first adjustment weight corresponding to the first analog voltage.

4. The constant voltage source circuit according to claim 1, characterized in that, The voltage synthesis module includes: The first input branch is connected between the first voltage generation module and the synthesis node; The second input branch is connected between the second voltage generation module and the synthesis node; Wherein, the equivalent resistance of the first input branch is greater than the equivalent resistance of the second input branch, so that the first adjustment weight corresponding to the first analog voltage is less than the second adjustment weight corresponding to the second analog voltage, and the first analog voltage and the second analog voltage form the target control voltage at the synthesis node through the first input branch and the second input branch.

5. The constant voltage source circuit according to claim 4, characterized in that, The feedback adjustment module includes: The first operational amplifier has its non-inverting input terminal electrically connected to the output terminal of the voltage synthesis module, and its inverting input terminal used to receive the feedback of the reference voltage. The first transistor has a first terminal for receiving a power supply voltage, a second terminal electrically connected to a reference voltage output terminal for outputting the reference voltage, and a control terminal electrically connected to the output terminal of the first operational amplifier. The first operational amplifier controls the first transistor based on the deviation between the target control voltage and the feedback amount of the reference voltage to adjust the reference voltage.

6. The constant voltage source circuit according to claim 5, characterized in that, The feedback adjustment module further includes a feedback sampling unit, which includes: The first sampling branch is connected between the reference voltage output terminal and the non-inverting input terminal of the second operational amplifier; The second sampling branch is connected between the reference voltage input terminal used to input the reference voltage and the inverting input terminal of the second operational amplifier; The feedback branch is connected between the output terminal of the second operational amplifier and the inverting input terminal of the second operational amplifier; The second operational amplifier is used to differentially amplify the voltage between the reference voltage output terminal and the reference voltage input terminal based on the voltage introduced through the first sampling branch and the second sampling branch. The output terminal of the second operational amplifier is electrically connected to the inverting input terminal of the first operational amplifier, and the output voltage of the second operational amplifier constitutes the feedback quantity of the reference voltage.

7. The constant voltage source circuit according to claim 6, characterized in that, The first sampling branch includes a first sampling resistor and a first gain resistor. The first sampling resistor is connected between the reference voltage output terminal and the non-inverting input terminal of the second operational amplifier, and the first gain resistor is connected between the non-inverting input terminal of the second operational amplifier and the ground terminal. The second sampling branch includes a second sampling resistor, which is connected between the reference voltage input terminal and the inverting input terminal of the second operational amplifier; The feedback branch includes a first feedback resistor, which is connected between the output terminal of the second operational amplifier and the inverting input terminal of the second operational amplifier. The resistance values ​​of the first sampling resistor, the first gain resistor, the second sampling resistor, and the first feedback resistor are configured to enable the second operational amplifier to differentially amplify the voltage between the reference voltage output terminal and the reference voltage input terminal according to a preset amplification factor.

8. The constant voltage source circuit according to claim 6, characterized in that, The voltage divider output circuit includes: The first voltage divider branch is connected between the reference voltage output terminal of the reference voltage generation circuit and the voltage divider node; The second voltage divider branch is connected between the voltage divider node and the reference node, and the reference node is electrically connected to the reference voltage input terminal. The first output branch is connected between the voltage divider node and the first calibration output terminal; The second output branch is connected between the reference node and the second calibration output terminal; The equivalent resistance values ​​of the first voltage divider branch and the second voltage divider branch are configured to form the calibration voltage between the voltage divider node and the reference node according to the preset voltage division ratio.

9. The constant voltage source circuit according to claim 8, characterized in that, The first output branch includes a first output resistor, which is connected between the voltage divider node and the first calibration output terminal; the second output branch includes a second output resistor, which is connected between the reference node and the second calibration output terminal. The voltage divider output circuit further includes a filtering module, which includes a first output filtering capacitor, a differential filtering capacitor, and a second output filtering capacitor. The first output filtering capacitor is connected between the first calibration output terminal and the ground terminal, the differential filtering capacitor is connected between the first calibration output terminal and the second calibration output terminal, and the second output filtering capacitor is connected between the second calibration output terminal and the ground terminal.

10. The constant voltage source circuit according to any one of claims 1-9, characterized in that, It also includes a zero-point calibration circuit, which comprises: The shorting module includes a controllable shorting device connected between the first calibration output terminal and the second calibration output terminal; The first driving module is electrically connected to the control module and the controllable shorting device, respectively, and is used to control the controllable shorting device to short-circuit the first calibration output terminal and the second calibration output terminal according to the zero-point calibration control signal output by the control module, so that the calibration voltage between the first calibration output terminal and the second calibration output terminal is zero.

11. The constant voltage source circuit according to claim 10, characterized in that, The controllable short-circuiting device is a first relay, and the first relay includes: The first coil has a first end for receiving the coil power supply voltage and a second end for being electrically connected to the first drive module. The first switch contact is connected between the first calibration output terminal and the second calibration output terminal; The first driving module is used to control the first coil to be energized according to the zero-point calibration control signal, so as to close the first switch contact and short-circuit the first calibration output terminal with the second calibration output terminal.

12. The constant voltage source circuit according to claim 11, characterized in that, The first driving module includes: The second transistor has a first terminal electrically connected to the second terminal of the first coil, and a second terminal electrically connected to the ground terminal. The first driving resistor is connected between the control module and the control terminal of the second transistor; The first pull-down resistor is connected between the control terminal of the second transistor and the ground terminal; The second transistor is used to turn on according to the zero-point calibration control signal received through the first driving resistor, so that the second end of the first coil is connected to the ground terminal through the second transistor, thereby energizing the first coil.

13. The constant voltage source circuit according to any one of claims 1-9, characterized in that, It also includes a polarity switching circuit, which comprises: The polarity switching module includes a controllable switching device, which has a first input terminal electrically connected to the first calibration output terminal, a second input terminal electrically connected to the second calibration output terminal, a first external terminal for connecting to the first current sampling terminal of the BMS to be calibrated, and a second external terminal for connecting to the second current sampling terminal of the BMS to be calibrated. The second drive module is electrically connected to the control module and the controllable switching device respectively, and is used to control the controllable switching device to switch between the first connection state and the second connection state according to the polarity switching control signal output by the control module. In the first connection state, the first input terminal is electrically connected to the first external terminal, and the second input terminal is electrically connected to the second external terminal; in the second connection state, the first input terminal is electrically connected to the second external terminal, and the second input terminal is electrically connected to the first external terminal, so as to switch the polarity of the calibration voltage applied to the BMS to be calibrated.

14. The constant voltage source circuit according to claim 13, characterized in that, The controllable switching device is a second relay, and the second relay includes: The second coil has a first end for receiving the coil power supply voltage and a second end for being electrically connected to the second drive module. The first switching contact group includes a first moving contact, a first stationary contact, and a second stationary contact. The first moving contact is electrically connected to the first external terminal, the first stationary contact is electrically connected to the first calibration output terminal SRN, and the second stationary contact is electrically connected to the second calibration output terminal SRP. The second switching contact group includes a second moving contact, a third stationary contact, and a fourth stationary contact. The second moving contact is electrically connected to the second external terminal, the third stationary contact is electrically connected to the second calibration output terminal SRP, and the fourth stationary contact is electrically connected to the first calibration output terminal SRN. The first moving contact and the second moving contact are driven by the second coil in conjunction, so that the first switching contact group and the second switching contact group switch synchronously.

15. The constant voltage source circuit according to claim 14, characterized in that, The second drive module includes: The third transistor has its first terminal electrically connected to the second terminal of the second coil, and its second terminal electrically connected to the ground terminal. The second driving resistor is connected between the control module and the control terminal of the third transistor; The second pull-down resistor is connected between the control terminal of the third transistor and the ground terminal; The third transistor is used to turn on according to the polarity switching control signal received through the second driving resistor, so that the second end of the second coil is connected to the ground terminal through the third transistor, thereby energizing the second coil.

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