Error margin boosting method, analog computing device, and optical chip

Abstract

This application discloses an error tolerance improvement method, an analog computing device, and an optical chip. The error tolerance improvement method acquires the analog information output by each target output port in the analog computing device; wherein, the target output port refers to multiple output ports corresponding to a target value, and the target value refers to the discrete value output by the analog computing device; the analog information output by each target output port is encoded and calculated to obtain the target value output by the analog computing device. Since the analog computing device uses the analog information from multiple target output ports to map the target value through encoding and calculation according to specific rules, it utilizes the redundancy characteristics of multiple ports to transform the high-precision requirement that traditionally relies on absolute quantization of a single port into a relative relationship determination expressed by multiple ports. Thus, without relying on extremely advanced manufacturing processes, it effectively avoids the inherent errors of analog computing devices and ensures the accuracy of digital output.

Description

Technical Field

[0001] This application relates to the field of optical chip technology, and in particular to an error tolerance improvement method, an analog computing device, and an optical chip. Background Technology

[0002] In most trainable analog computing devices (e.g., diffractive neural networks, Mach-Zehnder interferometer arrays), each digital output typically corresponds to a physical output port. This is characterized by a one-to-one mapping; each digital output corresponds to a physical output port, and the analog physical quantity measured at the physical output port is individually associated with that digital output. This analog physical quantity is then converted into a digital signal (i.e., the digital output) by an analog-to-digital converter (ADC). With this output method, the accuracy of the final digital output is highly dependent on the hardware precision of the analog computing device. Furthermore, because analog computing devices are easily affected by external environmental factors, the accuracy of the digital output is further impacted. Summary of the Invention

[0003] In view of the above problems, this application provides an error tolerance improvement method, an analog computing device, and an optical chip, aiming to improve the accuracy of digital output.

[0004] According to the first aspect of this application, an error tolerance improvement method is provided, comprising:

[0005] The analog information output by each target output port in the analog computing device is obtained; wherein, the target output port refers to multiple output ports corresponding to the target value, and the target value refers to the discrete value output by the analog computing device;

[0006] The analog information output from each of the target output ports is encoded and calculated to obtain the target value output by the analog computing device.

[0007] Optionally, the step of encoding and calculating the analog information output from each of the target output ports to obtain the target value output by the analog computing device includes:

[0008] The target output ports are divided into N target groups, each target group includes Q target output ports, and each target group corresponds to an M-ary position weight, where N and M are integers greater than 1, and Q is an integer greater than or equal to 1.

[0009] For each target group, the corresponding M-ary mapping value is calculated based on the simulation information of each target output port in the target group.

[0010] The target value output by the analog computing device is calculated based on the mapping value corresponding to each target group and the bit weight corresponding to each target group.

[0011] Optionally, when Q equals 1, the step of calculating the M-ary mapping value corresponding to the target group based on the analog information of each target output port in the target group includes:

[0012] Based on the analog information of the target output port in the target group and the preset target judgment range, the corresponding M-ary mapping value of the target group is determined; wherein, the target judgment range includes M order ranges, and each order range includes an allowed band and a forbidden band.

[0013] Optionally, the order range is greater than the error range of the analog computing device.

[0014] Optionally, the range of the forbidden band is larger than the error range of the analog computing device.

[0015] Optionally, when Q equals M, the step of calculating the M-ary mapping value corresponding to the target group based on the simulation information of each target output port in the target group includes:

[0016] The analog information of each target output port in the target group is numerically compared, and the port number of the target output port corresponding to the analog information with the largest value in the target group is used as the M-ary mapping value of the target group.

[0017] Optionally, the step of encoding and calculating the analog information output from each of the target output ports to obtain the target value output by the analog computing device includes:

[0018] Obtain the first attribute value and the second attribute value of each of the target output ports;

[0019] According to the magnitude of the first attribute value of each target output port, sort the target output ports to obtain the sorted port sequence;

[0020] Based on the port sequence and the second attribute value of each target port, Cantor expansion is performed to obtain the target value output by the analog computing device; wherein, the first attribute value is either the analog information of the target output port or the port number of the target output port, and the second attribute value is the other of the analog information of the target output port or the port number of the target output port.

[0021] Optionally, before acquiring the analog information output by each target output port, the method further includes:

[0022] The structural parameters of the analog computing device are trained to obtain the trained analog computing device.

[0023] According to a second aspect of this application, an error tolerance improvement device is provided, comprising:

[0024] An acquisition module is used to acquire the analog information output by each target output port; wherein, the target output port refers to multiple output ports located on the analog computing device corresponding to the target value, and the target value refers to the discrete value output by the analog computing device;

[0025] The encoding and calculation module is used to encode and calculate the analog information output by each of the target output ports to obtain the target value output by the analog computing device.

[0026] According to a third aspect of this application, an analog computing device is provided that uses the aforementioned error tolerance improvement method.

[0027] According to a fourth aspect of this application, an optical chip is provided, comprising at least one of the aforementioned analog computing devices.

[0028] The above-described one or more technical solutions in the embodiments of this application have at least the following technical effects:

[0029] This application provides an error tolerance improvement method, an analog computing device, and an optical chip. The error tolerance improvement method acquires analog information output from each target output port of the analog computing device. The target output port refers to multiple output ports corresponding to a target value, and the target value refers to a discrete value output by the analog computing device. The analog information output from each target output port is encoded and calculated to obtain the target value output by the analog computing device. Since the analog computing device uses the analog information from multiple target output ports and maps it to the target value through encoding calculations according to specific rules, it utilizes the redundancy of multiple ports to transform the traditional high-precision requirement relying on absolute quantization of a single port into a relative relationship determination based on multi-port collaborative expression. This effectively avoids the inherent errors of analog computing devices and ensures the accuracy of digital output without relying on extremely advanced manufacturing processes.

[0030] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0031] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference figures denote the same parts throughout the drawings. In the drawings:

[0032] Figure 1 A flowchart of an error tolerance improvement method according to an embodiment of this application is shown.

[0033] Figure 2 A schematic diagram of target output port reconstruction of an analog computing device according to an embodiment of this application is shown.

[0034] Figure 3 A schematic diagram of target output port reconstruction of another analog computing device in an embodiment of this application is shown.

[0035] Figure 4 A schematic diagram of a target determination range is shown in an embodiment of this application.

[0036] legend:

[0037] 1-Prohibited, 2-Allowed, 3-Level range. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0039] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0040] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0041] In the description of this application, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set up," "install," "connect," and "optical coupling" should be interpreted broadly. For example, they can refer to fixed optical coupling, detachable optical coupling, or integral optical coupling; they can refer to mechanical-optical coupling or electro-optical coupling; they can refer to direct connection or indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0042] Combination Figure 1 As shown, this application provides a method for improving error tolerance, including:

[0043] Step S101: Obtain the analog information output by each target output port in the analog computing device; wherein, the target output port refers to multiple output ports corresponding to the target value, and the target value refers to the discrete value output by the analog computing device.

[0044] Step S102: Encode and calculate the analog information output from each target output port to obtain the target value output by the analog computing device.

[0045] In this embodiment, the target output port is a physical output port on the analog computing device, responsible for outputting analog information (e.g., light intensity, current, or voltage). The target output port is the carrier of this information. In this embodiment, a target value is no longer determined by a single physical output port, but rather by multiple target output ports working together. The target value refers to the final value obtained after the analog computing device performs corresponding encoding calculations; the target value is a discrete value.

[0046] Analog computing devices are hardware devices that utilize the changes in continuous physical quantities and directly perform mathematical operations based on physical laws. Unlike digital devices that process discrete 0s and 1s, the analog computing device in this embodiment processes continuous signals. Analog computing devices include, but are not limited to, MZI arrays (Mach-Zehnder Interferometer Arrays) and diffraction neural networks. This embodiment does not limit the length of the analog computing device or the specific device used.

[0047] In some embodiments, the analog computing device can be an MZI array, which includes multiple cascaded Mach-Zehnder interferometer units (hereinafter referred to as MZI units). Each MZI unit serves as a basic computing node, including two beam splitters and two phase shifters for performing a 2×2 unitary matrix transformation on the input optical signal. By adjusting the phase shifter voltage of each MZI unit in the array, the propagation path of light in the waveguide network and the interference result can be changed, thereby realizing matrix multiplication operations. The target output port of the analog computing device is the multiple optical waveguide ports at the end of the MZI array.

[0048] In some embodiments, the analog computing device can be a diffractive neural network, which includes an input layer, multiple diffraction modulation layers (i.e., hidden layers), and an output layer. Each diffraction modulation layer contains thousands of subwavelength-scale diffraction units (i.e., physical neurons, also known as microstructures), which are fabricated on an optical substrate using micro- and nano-fabrication techniques. During operation, the incident light beam undergoes multiple diffractions and interferences as it passes through each diffraction modulation layer, with each diffraction unit spatially modulating the phase or amplitude of the light field. Ultimately, the light field, after being modulated by multiple diffraction layers, converges at the output layer, forming a specific light intensity distribution. The target output port of the analog computing device is the light intensity detection region on the output plane of this diffractive neural network.

[0049] It should be noted that due to waveguide size errors in each MZI unit during manufacturing and its high environmental sensitivity (e.g., susceptibility to thermal crosstalk), the simulated information output by the MZI array is prone to systematic physical errors. Similarly, since the computational function of the diffraction neural network is highly dependent on the geometric parameters of the physical structure (such as the size, shape, and position of the diffraction units), in actual manufacturing processes, process tolerances in micro / nano fabrication, fluctuations in the refractive index of materials, and temperature drift in the environment can all lead to systematic physical errors between the actual physical structure and the ideal design model. These physical errors are directly introduced into the simulated information output by the diffraction neural network (i.e., the light intensity distribution at each target output port), causing the simulated information output by the diffraction neural network to deviate from the theoretical calculation results, thus generating systematic errors.

[0050] This embodiment reconstructs the output ports of the analog computing device, changing the traditional approach from a single physical output port corresponding to one digital output to multiple target output ports corresponding to one digital output. By encoding and calculating the analog information output from each target output port, the target value (i.e., the digital output) of the analog computing device is obtained.

[0051] In detail, the output ports of traditional analog computing devices are mostly designed according to a one-to-one mapping principle, meaning that each physical output port directly corresponds to a digital output, and the value of the digital output is usually determined by the absolute amplitude of the analog information output by that physical output port. This approach is highly sensitive to the accuracy of the analog information; therefore, any manufacturing errors or amplitude deviations caused by environmental noise can be translated into errors in the digital output.

[0052] This embodiment reconstructs the output ports, transforming the simple mapping of a single physical output port to a single digital output into a redundant mapping where multiple target output ports share a single digital output. It's important to note that this reconstruction is not a simple addition of physical structures, but rather a change in the encoding logic of the output analog information. Instead of relying on the absolute amplitude of the analog information output from a single port, the corresponding digital output is carried by the relative relationships between multiple target output ports (e.g., amplitude ordering, group competition results, differential signal combinations, etc.).

[0053] Combination Figure 2 As shown, taking a single MZI array as an analog computing device as an example, the MZI array has N (N≥2 and is an integer) target output ports, for example, N is 8. The eight target output ports of the MZI array are denoted as target output port 0, target output port 1, target output port 2, ..., target output port 7. Each target output port corresponds to a binary bit weight. The analog information output from the target output ports is converted from analog to digital to obtain digital output, which is located within the target range. The target range is divided into two order ranges (i.e., order 0 and order 1). If the digital output is in the order 0 range, the corresponding target output port outputs a discrete value of 0; if the digital output is in the order 1 range, the corresponding target output port outputs a discrete value of 1. After obtaining the discrete values ​​of the eight target output ports, each is combined with its corresponding binary bit weight using the formula... The target value Y of the MZI array output is obtained by performing a weighted summation, where Y0 to Y7 are the discrete values ​​corresponding to target output ports 0 to 7, and M0 to M7 are the binary bit weights corresponding to target output ports 0 to 7.

[0054] Combination Figure 3As shown, taking N (N≥2 and an integer) MZI arrays as an example of an analog computing device, one of the output ports of each MZI array is used as a target output port of the analog computing device. For ease of understanding and explanation, we take N=8 as an example, then the analog computing device has 8 target output ports, namely target output port 0, target output port 1, target output port 2, ..., target output port 7. Each target output port corresponds to a binary bit weight. The analog information output from the target output ports is converted from analog to digital to obtain the corresponding digital output, which is located within the target range. The target range is divided into two order ranges (i.e., order 0 and order 1). If the digital output is in the order 0 range, the corresponding target output port outputs a discrete value of 0; if the digital output is in the order 1 range, the corresponding target output port outputs a discrete value of 1. After obtaining the discrete values ​​of the 8 target output ports, they are combined with the binary bit weight corresponding to each target output port, and then calculated using the formula... The target value Y output by the analog computing device is obtained by performing a weighted summation, where Y0 to Y7 are the discrete values ​​corresponding to target output ports 0 to 7, and M0 to M7 are the binary bit weights corresponding to target output ports 0 to 7.

[0055] Combination Figure 2 As shown, using a single diffractive neural network as an example of an analog computing device, the diffractive neural network has M (M≥2 and an integer) target output ports. For ease of understanding and explanation, we take M=16 as an example, which are target output ports 0, 1, 2, ..., 15. These 16 target output ports are divided into 8 groups, each group including 2 target output ports: target output port 0 and target output port 1. Target output port 0 corresponds to the discrete value 0, and target output port 1 corresponds to the discrete value 1. Each group of target output ports corresponds to a binary bit weight. For each group of target output ports, the analog information output from the two target output ports in that group is converted from analog to digital to obtain two digital outputs. The digital outputs corresponding to the two target output ports in that group are compared. If the digital output corresponding to target output port 0 in that group is greater than or equal to the digital output corresponding to target output port 1 in that group, then the discrete value of the output of that group of target output ports is 0; if the digital output corresponding to target output port 1 in that group is greater than the digital output corresponding to target output port 0 in that group, then the discrete value of the output of that group of target output ports is 1. After obtaining the discrete values ​​corresponding to the eight groups of target output ports, each group of target output ports is combined with its corresponding binary place value using the formula... The target value Y of the MZI array output is obtained by performing a weighted summation, where Y0 to Y7 are the discrete values ​​corresponding to the first group of target output ports to the eighth group of target output ports, and M0 to M7 are the binary bit weights corresponding to the first group of target output ports to the eighth group of target output ports.

[0056] Those skilled in the art will understand that the above examples are merely illustrations. Without departing from the spirit of this application, encoding calculations can also employ methods such as Cantor expansion sorting coding, group competition coding, differential coding, or pulse position coding. These methods all utilize the relative relationships of multiple target output ports (e.g., group competition or sorting coding) to characterize the target value, thereby decoupling the accuracy of the target value from its dependence on the absolute value of a single physical quantity.

[0057] In summary, this embodiment breaks the traditional one-to-one mapping mode of single port, single value by reconfiguring ports, and establishes a redundant mapping relationship of multiple ports, single value. The target value is represented by the relative relationship of multiple target output ports. Through the number of target output ports and the encoding calculation logic, errors caused by the manufacturing process of analog computing devices and the external environment are smoothed out. As long as the error does not change the relative relationship between the target output ports, the final output target value remains accurate. Therefore, without relying on extremely advanced manufacturing processes, the inherent errors of analog computing devices are effectively avoided, ensuring the accuracy of digital output.

[0058] In an optional embodiment, the analog information output from each target output port is encoded and calculated to obtain the target value output by the analog computing device. Specific steps may include:

[0059] The target output ports are divided into N target groups, each target group includes Q target output ports, and each target group corresponds to an M-ary bit weight, where N and M are integers greater than 1, and Q is an integer greater than or equal to 1.

[0060] For each target group, the corresponding M-ary mapping value is calculated based on the simulation information of each target output port in the target group.

[0061] The target values ​​output by the analog computing device are calculated based on the mapping values ​​corresponding to each target group and the bit weights corresponding to each target group.

[0062] This embodiment groups the target output ports and then uses M-ary bit weights to convert the analog information of multiple physical output ports (i.e., target output ports) into highly robust digital values ​​(i.e., target values).

[0063] Specifically, this embodiment first groups the multiple target output ports of the analog computing device according to a preset topology (e.g., sequential arrangement, cyclic arrangement, etc.), dividing each target output port into N target groups, with the same number of target output ports in each target group. This division method breaks the traditional one-to-one mapping mode of single port single value and establishes a redundant mapping in which multiple ports jointly represent a single value.

[0064] It should be noted that the number of target groups N is an integer greater than 1, meaning there are at least two target groups. The number of target output ports Q in each target group is an integer greater than or equal to 1. There are two cases: one where Q equals 1, and the other where Q equals M, i.e., Q is greater than 1.

[0065] When Q equals 1, there is only one target output port in the target group, and the simulated information output by this single target output port is used to characterize the mapped value.

[0066] When Q is greater than 1, there are multiple target output ports in the target group. The simulation information output by the multiple target output ports in the target group jointly represents the mapped value, which is equivalent to introducing an intra-group competition or comparison mechanism.

[0067] It should be explained that in this embodiment, the mapped value is a digital quantity and a discrete value. Analog information, on the other hand, is a continuous physical quantity (for example, analog information is light intensity, which could be 0.123456mW or 0.123457mW), and theoretically can have infinitely many values. The mapped value is the result of quantizing the analog information. For example, in binary (M=2), the mapped value can only be 0 or 1; in quaternary (M=4), the mapped value can only be 0, 1, 2, or 3. This embodiment, through this discretization encoding process, encodes the continuous analog information output from the target output port of the analog computing device into a digital logic state with strong error resistance, thereby achieving highly robust numerical computation.

[0068] When grouping target output ports, the target output ports can be divided into N target groups according to a preset topology (e.g., sequential arrangement, circular arrangement, etc.).

[0069] For example, all target output ports can be divided in a sequential manner. Assume there are 8 target output ports, numbered P0, P1, P2, P3, P4, P5, P6, and P7. Divide these 8 target output ports into 4 target groups, numbered G0, G1, G2, and G3. Each target group contains 2 target output ports. Specifically, target group G0 includes target output ports P0 and P1; target group G1 includes target output ports P2 and P3; target group G2 includes target output ports P4 and P5; and target group G3 includes target output ports P6 and P7. This method of dividing target groups is logically simple, and the target output ports within a target group are usually adjacent during hardware routing, facilitating the design of analog computing devices.

[0070] For example, all target output ports can be divided in a cyclical manner. Assume there are 8 target output ports, numbered P0, P1, P2, P3, P4, P5, P6, and P7. Divide these 8 target output ports into 4 target groups, numbered G0, G1, G2, and G3. Each target group contains 2 target output ports. When grouping, target output port P0 can be assigned to target group G0, target output port P1 to target group G1, target output port P2 to target group G2, target output port P3 to target group G3, target output port P4 to target group G0, target output port P5 to target group G1, target output port P6 to target group G2, and target output port P7 to target group G3. The final partitioning is as follows: target group G0 includes target output ports P0 and P4; target group G1 includes target output ports P1 and P5; target group G2 includes target output ports P2 and P6; and target group G3 includes target output ports P3 and P7. This partitioning method assigns physically adjacent target output ports to different target groups. If the analog computing device has gradient errors (e.g., light intensity gradually decreases from left to right), this cyclic partitioning method allows each target group to contain one strong signal port and one weak signal port, thus canceling out this systematic gradient error during in-group computation.

[0071] In this embodiment, each target group is assigned an M-ary position weight. The position weight of a target group determines its weight in the final target value calculation.

[0072] For example, if M=2 and N=4, then the position weight of target group 1 is 2. 0 =1, the position weight of target group 2 is 2 1=2, then the position weight of target group 2 is 2. 2 =4, then the position weight of target group 4 is 2. 3 =8.

[0073] For each target group, the analog information of the Q target output ports within that group is first read. Then, based on the Q analog information, an encoding mapping is performed to obtain a discrete M-ary value (i.e., the mapped value). After determining the mapped value corresponding to each target group, the target value output by the analog computing device is obtained by combining the bit weights of each target group and performing a weighted summation.

[0074] In some embodiments, when Q equals 1, there is only one target output port in the target group. In this case, the M-ary mapping value corresponding to the target group can be obtained by performing M-order quantization on the analog information output by a single target output port.

[0075] Specifically, when calculating the mapping value corresponding to the target group, the mapping value in M-ary can be determined based on the simulation information of the target output port in the target group and the preset target judgment range; wherein, the target judgment range includes M order ranges, and each order range includes an allowed band and a forbidden band.

[0076] It should be noted that, due to the lack of redundant ports for relative comparison within the target group, this embodiment discretizes continuous simulation information into M-ary mapped values ​​through a preset target judgment range. Here, the target judgment range refers to the interval range corresponding to the full dynamic range of the simulation information. In this embodiment, the target judgment range is divided into M order ranges, each order range existing independently and not overlapping with other order ranges. Each order range corresponds to a valid value (i.e., a mapped value) in M-ary.

[0077] For example, assuming the value is 8, the target judgment range includes 8 order ranges, denoted as J0-J7. Order range J0 corresponds to the mapping value 0, order range J1 corresponds to the mapping value 1, order range J2 corresponds to the mapping value 2, order range J3 corresponds to the mapping value 3, order range J4 corresponds to the mapping value 4, order range J5 corresponds to the mapping value 5, order range J6 corresponds to the mapping value 6, and order range J7 corresponds to the mapping value 7.

[0078] In this embodiment, each order range includes two parts: the allowable band and the forbidable band. The allowable band is the core region of that order range. If the analog information of the target output port falls into the allowable band, the output of the target output port is in an ideal state, and the corresponding mapped value of the target output port is the valid value corresponding to that order range.

[0079] The forbidden band is a buffer area located next to the allowable band, also known as the fault-tolerant area. If the analog information of the target output port falls into the forbidden band, it means that the output of the target output port is in a non-ideal situation (for example, there are slight manufacturing deviations or environmental noise in the analog computing device, which cause the analog information output by the target output port to deviate), but it has not deviated to other order ranges. At this time, the corresponding mapped value of the target output port is still a valid value corresponding to that order range.

[0080] In this embodiment, the forbidden band serves as a fault-tolerant buffer or protection band. Even if the analog information output from the target output port falls within the forbidden band of the current order range, it is still considered to belong to that order range, and the corresponding valid value is output. It is easy to see that the setting of the forbidden band greatly improves the tolerance of analog computing devices to errors.

[0081] In this embodiment, there are several ways to set the prohibited belt:

[0082] In one implementation, the prohibition band can be set on one side of the allowable band, that is, a step range includes an allowable band and a prohibition band, the prohibition band of the step range is set on one side of the allowable band, and the other side of the prohibition band of the step range is the allowable band of other step ranges.

[0083] In one embodiment, the prohibition band can also be set on both sides of the allowable band, that is, a step range includes one allowable band and two prohibition bands, with the two prohibition bands respectively set on both sides of the allowable band, and the other side of the prohibition band of the step range is adjacent to the prohibition band of other step ranges.

[0084] In one implementation, combined with Figure 4 As shown, the order range 3 (i.e., the top and bottom ends) located at both ends of the target judgment range. Figure 2 The order range corresponding to order M-1 and order 0 includes an allowable band 2 and a prohibitive band 1. The allowable band 2 of this order range 3 is close to the outermost end of the target judgment range, and the prohibitive band 1 of this order range 3 is adjacent to its allowable band 2 and located inside the target judgment range. Other order ranges 3 located inside the target judgment range include one allowable band 2 and two prohibitive bands 1 (i.e., Figure 4 The middle range is defined as follows: the yellow portion of the range is the permissible zone, and the black portion is the prohibited zone. For range 3 located in the middle of the target judgment range, the prohibited zone 1 can be set on both sides of the permissible zone 2. That is, a range 3 includes one permissible zone 2 and two prohibited zones 1, with the two prohibited zones 1 set on the upper and lower sides of the permissible zone 2, respectively.

[0085] In this embodiment, for each target group (i.e., a single target output port), the analog information output by that target output port can be obtained, and then the value corresponding to the analog information is compared with a preset target judgment range. If the value corresponding to the analog information falls within the allowed band of the k-th order range, then the M-ary mapping value corresponding to that target group is determined to be k. If the value corresponding to the analog information falls within the forbidden band of the k-th order range, it is still considered to belong to the k-th order range, and the M-ary mapping value corresponding to that target group is determined to be k. Here, k is greater than or equal to 0 and less than or equal to M-1.

[0086] For example, suppose the output voltage of a target group's output port is 0.1V, and 0.1V falls within the allowable band (0.05V-0.2V range) corresponding to the 0th order. Then the mapped value for this target group is 0. Suppose that due to manufacturing errors or thermal noise, the output voltage of this target group's output port drifts to 0.22V. And 0.22V falls within the forbidden band (0.2V-0.25V) of the 0th order. In this case, although the output of the target port is in a non-ideal situation, it has not crossed into other order ranges, and ultimately the mapped value for this target group remains 0.

[0087] This embodiment introduces a target judgment range with allowable and prohibitable bands, achieving bounded error tolerance even if there is only one target output port in the target group. Compared to the rigid judgment method of a fixed threshold in traditional quantization schemes, this embodiment uses a prohibitive band to fuzzify the threshold. Even if the simulation information deviates and falls into a non-ideal prohibitive band, as long as the deviation is within a certain range (e.g., not exceeding the boundary of that order range), the correct mapped value can still be output. This effectively reduces the jump in calculation results caused by manufacturing errors, external environmental influences, etc., and significantly improves the reliability of analog computing devices.

[0088] In some embodiments, the order range is larger than the error range of the analog computing device. The error of the analog computing device refers to the deviation between the actual output analog information and the theoretically designed analog information, caused by manufacturing defects, environmental interference, etc., at the physical level. Without considering the error of the analog computing device, the analog information output from the physical port is ideal. In a real environment, when the analog computing device has errors, the analog information output from the physical port is biased (including positive and negative biases). Based on actual measurement calculations or theoretical estimations of the analog device, the error ratio can be calculated according to the ratio of the maximum analog error value to the ideal analog value. Based on the error ratio and the target judgment range, the error range can be determined.

[0089] It should be noted that the target judgment range is a numerical interval, the order range is a sub-interval of the target judgment range, and each order range within the target judgment range does not overlap. The error range, on the other hand, is a numerical span calculated based on the error ratio within the target judgment range.

[0090] In this embodiment, the target output port outputs analog information. This embodiment will perform analog-to-digital conversion on the analog information to obtain the corresponding converted value (the converted value is within the target judgment range). Then, based on the position of the converted value within the target judgment range, the mapping value corresponding to the target output port is determined.

[0091] Taking an MZI array as an analog computing device as an example, assuming the MZI array has 8 target output ports, denoted as target output port 0 to target output port 7. Each target output port corresponds to a bit weight in base M (assuming M is 2). During the specific encoding calculation, the analog information output from the target output port is converted from analog to digital to obtain a converted value 'a', which falls within the target judgment range. The target judgment range is the numerical interval from 1 to 100, which is pre-divided into two order ranges (order 0 is the numerical interval from 1 to 50, and order 1 is the numerical interval from 51 to 100). Assuming that the MZI array, through actual measurement and calculation, has an error ratio of 6%, then the numerical span corresponding to the error range is 6, and the order range is larger than the span corresponding to the error range. If the converted value 'a' is in the 0th order range, the target output port outputs a discrete value of 0; if the converted value 'a' is in the 1st order range, the target output port outputs a discrete value of 1; if the converted value 'a' is in the 2nd order range, the target output port outputs a discrete value of 2; and if the converted value 'a' is in the 3rd order range, the target output port outputs a discrete value of 3. After obtaining the discrete values ​​of the 8 target output ports, the target value output by the MZI array is obtained by combining the binary bit weights corresponding to each target output port and performing weighted summation.

[0092] In this embodiment, regarding manufacturing defects, in the MZI array, the width and length of the optical waveguide cannot be absolutely precise during micro-nano fabrication; in the diffraction neural network, the shape and height of the micro-nano structure will have slight deviations.

[0093] Regarding environmental interference, analog computing devices are susceptible to acquired fluctuations due to external environmental factors during operation. These include temperature drift, noise, and interference. Specifically, temperature changes alter the refractive index or resistivity of materials, causing the output signal to shift as the temperature rises or falls. Thermal noise in the circuit, power supply ripple, or thermal crosstalk in the optical path can all cause random jitter in the analog information output from the target output port.

[0094] It's easy to understand that if the order range is smaller than the error range of the analog computing device, even a slight fluctuation in the output analog information will cause it to cross the boundary, and the corresponding mapped value will fall into another order range. This will lead to serious errors in the calculation results and cause misjudgments. If the order range is larger than the error range of the analog computing device, even if the output analog information fluctuates due to errors, it will still fall steadily within the correct order range.

[0095] In some embodiments, the range of the forbidden band is larger than the error range of the analog computing device. The range of the forbidden band refers to the physical span of the buffer region within that order range used to accommodate non-ideal conditions, and also represents the tolerance limit of that order range for analog information deviation. This embodiment configures the range of the forbidden band to be larger than the maximum deviation that the analog computing device may produce at the physical level. This configuration ensures that when the analog computing device experiences maximum fluctuations in analog information due to manufacturing errors, the trajectory of the analog information fluctuations is still completely confined within the current order range (i.e., falling into the forbidden band), and will not cross the forbidden band into adjacent order ranges. This ensures that the analog computing device can still output correct mapped values ​​under non-ideal conditions, avoiding logic jumps when outputting mapped values. Furthermore, this setting of the forbidden band range can improve the tolerance to manufacturing errors of the analog computing device and further improve the yield of the analog computing device. Because absolute precision in physical manufacturing is expensive and difficult to achieve in the production of analog computing devices, by setting the range of the forbidden zone to be larger than the error range of the analog computing device, a safe buffer is built for the physical errors existing in the analog computing device. When the analog information fluctuates due to manufacturing tolerances, its fluctuation trajectory is completely limited within the forbidden zone, making analog computing devices that would have been judged as having excessive deviation and scrapped under traditional standards become good products.

[0096] Taking an MZI array as an analog computing device as an example, assuming the MZI array has 8 target output ports, denoted as target output port 0 to target output port 7. Each target output port corresponds to a bit weight in base M (assuming M is 4). During the specific encoding calculation, the analog information output from the target output port is converted from analog to digital to obtain a converted value 'a', which falls within the target judgment range. The target judgment range is the numerical interval 1-40, pre-divided into 4 order ranges (order 0: 1-10; order 1: 11-20; order 2: 21-30; order 3: 31-40). The range of the forbidden band within each order range corresponds to a numerical span of 6. Assuming the MZI array, through actual measurement and calculation, has an error ratio of 4%, then the numerical span corresponding to the error range is 4, and the forbidden band range is larger than the error range. If the converted value 'a' is in the 0th order range, the target output port outputs a discrete value of 0; if the converted value 'a' is in the 1st order range, the target output port outputs a discrete value of 1. After obtaining the discrete values ​​of the 8 target output ports, the target value output by the MZI array is obtained by combining the binary bit weights corresponding to each target output port and performing weighted summation.

[0097] In some embodiments, when Q equals M, the target output ports in the target group are in a contention comparison mode, requiring the use of the relative relationships between the target output ports within the target group to determine the mapping value corresponding to the target group. When calculating the mapping value corresponding to the target group, the analog information of each target output port in the target group is numerically compared, and the port number of the target output port corresponding to the analog information with the largest value in the target group is taken as the M-ary mapping value corresponding to the target group.

[0098] Specifically, when Q equals the base M, each target group has M target output ports. These M target output ports are configured in a contention-based comparison mode. In this mode, instead of relying on the absolute signal amplitude of a single port, the relative relationships between the target output ports within the target group are used to accurately map the corresponding values ​​for that target group.

[0099] For example, when calculating the M-ary mapping value corresponding to a target group, it is necessary to first synchronously collect and compare the analog information output by the M target output ports within the target group. A maximum value detection algorithm can be used to select the analog information with the largest value from the M analog information as the target analog information, and determine the target output port corresponding to the target analog information. Then, the port number corresponding to the target output port is directly extracted and used as the final M-ary mapping value output by the target group.

[0100] This competitive comparison-based mapping method effectively avoids common-mode noise interference (e.g., fluctuations in overall light source power or drift in overall power supply voltage) common in analog computing devices. Because regardless of changes in the overall signal amplitude, as long as the relative relationships (e.g., magnitude relationships) between the target output ports remain unchanged, the target output port corresponding to the target analog information can be accurately identified, thereby greatly improving the robustness and accuracy of the calculation results in complex physical environments.

[0101] In some embodiments, the analog information output from each target output port is encoded and calculated to obtain the target value output by the analog computing device, including:

[0102] Obtain the first and second attribute values ​​of each target output port.

[0103] The target output ports are sorted according to the magnitude of their first attribute value to obtain a sorted port sequence.

[0104] Based on the port sequence and the second attribute value of each target port, Cantor expansion is performed to obtain the target value output by the analog computing device; wherein, the first attribute value is either the analog information of the target output port or the port number of the target output port, and the second attribute value is the other one of the analog information of the target output port or the port number of the target output port.

[0105] This embodiment proposes a coding calculation method based on Cantor expansion, which can generate unique expanded values ​​by using the relative relationships (e.g., ordering relationships) between analog information instead of relying directly on the absolute amplitude of the analog information for quantization. The corresponding target value is then calculated based on the expanded value, thereby effectively avoiding the physical errors commonly found in analog computing devices.

[0106] Specifically, the first attribute value and the second attribute value correspond to two types of data: the analog information of the target output port and the port number of the target output port, respectively, and the two are different from each other.

[0107] The first attribute value is used to characterize the parameters by which each target output port participates in the sorting. By sorting all target output ports according to the magnitude of their first attribute values, an ordered port sequence can be obtained. In other words, the port sequence is determined based on the magnitude of the first attribute value corresponding to each target output port. This transforms continuous analog information into a discrete sequential relationship.

[0108] The second attribute value is used to characterize the sequence elements participating in the Cantor expansion calculation. This embodiment performs the Cantor expansion calculation based on the port sequence obtained above and the second attribute value of each target port, ultimately obtaining the target value output by the analog computing device. The Cantor expansion is a method that maps all permutations to natural numbers; it can convert a specific permutation corresponding to each target output port into a unique integer.

[0109] The port sequence includes N second attribute values, and the order of these second attribute values ​​is determined by the first attribute value corresponding to each target output port.

[0110] It should be noted that the first attribute value and the second attribute value must be different attribute parameters.

[0111] In one implementation, the first attribute value can be simulation information, and the second attribute value can be a port number.

[0112] For example, suppose the analog computing device has three target output ports, denoted as port number 0, port number 1, and port number 2. The current output light intensity (i.e., analog information) and the corresponding port number are:

[0113] Port number 0 outputs light intensity of 0.5mW, port number 1 outputs light intensity of 0.8mW, and port number 2 outputs light intensity of 0.3mW.

[0114] The target output ports are sorted in descending order of light intensity to obtain the sorted target output ports, namely port number 1, port number 0, and port number 2, and the corresponding port sequence is denoted as [1,0,2].

[0115] The port sequence has a length of 3. Using Cantor expansion, calculate the lexicographical ranking of this port sequence among all possible permutations (3!=6 in total):

[0116] The first digit of the port sequence is 1. Among the remaining selectable numbers, there is one number smaller than 1, which is 0.

[0117] The contribution value is: 1 × (3-1)! = 2.

[0118] The second digit of the port sequence is 0. Among the remaining selectable numbers, there are no numbers smaller than 0, for a total of 0.

[0119] The contribution value is: 0 × (3-2)! = 0.

[0120] The third digit of the port sequence is 2. Among the remaining possible numbers, there are no numbers smaller than 2, for a total of 0.

[0121] The contribution value is: 0 × (3-3)! = 0.

[0122] Final calculation: Add the contribution values ​​together (i.e., 2 + 0 + 0 = 2). Therefore, the target value output by the analog computing device is 2.

[0123] In another implementation, the first attribute value is the port number, and the second attribute value is the simulation information.

[0124] For example, suppose the analog computing device has three target output ports, denoted as port number 0, port number 1, and port number 2. The current output voltage (i.e., analog information) and its corresponding port number are:

[0125] Port number 0 outputs light intensity of 0.5V, port number 1 outputs light intensity of 0.8V, and port number 2 outputs light intensity of 0.3V.

[0126] The target output ports are sorted in ascending order of port number to obtain the sorted target output ports, namely port number 0, port number 1, and port number 2, and the corresponding port sequence is denoted as [0.5, 0.8, 0.3].

[0127] The port sequence has a length of 3. Using Cantor expansion, calculate the lexicographical ranking of this port sequence among all possible permutations (3!=6 in total):

[0128] The first digit of the port sequence is 0.5. Among the remaining possible numbers, there is one number smaller than 0.5: 0.3.

[0129] The contribution value is: 1 × (3-1)! = 2.

[0130] The second digit of the port sequence is 0.8. Among the remaining possible numbers, there is one number smaller than 0.8: 0.3.

[0131] The contribution value is: 1 × (3-2)! = 1.

[0132] The third digit of the port sequence is 0.3. Among the remaining possible numbers, there are no numbers smaller than 0.3, for a total of 0.

[0133] The contribution value is: 0 × (3-3)! = 0.

[0134] Final calculation: Add the contribution values ​​together (i.e., 2 + 1 + 0 = 3). Therefore, the target value output by the analog computing device is 3.

[0135] This embodiment uses a multi-port sorting method combined with Cantor expansion calculation, requiring only that the relative relationships (e.g., size order) between the target output ports be correct. The manufacturing process of analog computing devices allows for larger physical tolerances while still outputting correct results. This directly relaxes the requirements for the physical manufacturing precision of analog computing devices, thereby significantly improving the yield rate.

[0136] Optionally, before acquiring the simulation information output by each target output port, the method further includes:

[0137] The structural parameters of the analog computing device are trained to obtain the trained analog computing device.

[0138] In this embodiment, the analog computing device can be understood as a physical computing unit containing multiple input ports and multiple output ports. By adjusting the internal structural parameters of the analog computing device (e.g., waveguide length, coupling coefficient, resistance value, etc.), the input physical signals (e.g., light intensity, voltage, etc.) can naturally complete complex operations such as matrix multiplication and convolution as they pass through the device, following the laws of physics.

[0139] It should be noted that analog computing devices are physically non-differentiable. Therefore, this embodiment can use the annealing algorithm to train the structural parameters of the analog computing device.

[0140] By introducing a state transition mechanism during parameter training, the non-differentiable discrete decision process is smoothed, enabling analog computing devices to optimize structural parameters using gradient-based optimization algorithms.

[0141] In summary, the training process for the structural parameters of an analog computing device involves first constructing a physical model of the device and initializing its structural parameters. Based on the current training algebra T, annealing parameters (e.g., temperature coefficient) are dynamically adjusted to smoothly transition the device from a continuous analog state to a discrete digital state. When constructing the loss function, a penalty term is introduced on top of the basic loss function (e.g., cross-entropy, mean squared error) to guide the device's output to meet practical requirements. Finally, the gradient is calculated based on the total loss function, and the device's structural parameters are updated.

[0142] For example, when Q equals 1, the mapping value needs to be determined based on the relationship between the simulated information of a single target output port and the preset target judgment range. In the initial stage of parameter training, the annealing parameters are set to maintain the continuity of the output, without performing any discretization operations on the simulated information of the output. At this time, the gradient of the analog computing device can propagate without loss.

[0143] At the end of training, the annealing parameters smoothly transition to discretizing the continuous output, mapping the simulated information of the output to the nearest M-order mapping value. The smooth transition between these two states is achieved using the following formula, ensuring that gradient backpropagation is unaffected:

[0144]

[0145] Among them, Y iLet T be the mapping value corresponding to the i-th target output port, and T be the training algebra number.

[0146] In addition, to prevent misjudgments caused by the output of analog computing devices falling into the forbidden band, an annealing-based penalty mechanism is introduced, which can be constructed using the following formula:

[0147]

[0148] Where λ is a coefficient related to the penalty. The output is the simulated information, where T is the number of training algebras and Loss is the loss function. As a penalty item, This is a basic item.

[0149] In the initial training phase, no penalty is imposed for falling into the forbidden band, allowing the structural parameters to explore freely. In the later training phase, however, a severe penalty is imposed for falling into the forbidden band. The penalty weight coefficient is related to the training generation. As training progresses, the output of the analog computing device is confined within the allowed band, thereby improving its anti-interference capability.

[0150] For example, when Q equals M, the target value is determined based on competitive comparison and the index of the maximum value. During the training of the device structure parameters for simulation calculations, the temperature parameter of the Softmax function is set relatively high in the early stages of parameter training. At this time, the simulation information of the M target output ports is converted into a normalized probability distribution after Softmax processing, and the output is a weighted sum of the port numbers, rather than a discrete order value. Towards the end of parameter training, the temperature parameter of the Softmax function is decreased. The lower the temperature, the closer the output approximates the index of the port with the maximum value.

[0151] To improve the robustness of the decision, it is necessary to widen the gap between the maximum and the second-largest values. A penalty term can be added to the loss function. If the difference between the highest and second-highest values ​​in any set of M target output ports is too small, a penalty is applied, and the weight of this penalty term increases with the number of training generations.

[0152] For example, when calculating target values ​​using multi-port sorting combined with Cantor expansion, considering that the factorial term and counting operation (i.e., counting the number of elements smaller than the current element on the right) in the Cantor expansion calculation are not differentiable, a high-temperature Sigmoid function can be used for approximation during the initial training phase of training to simulate the structural parameters of the computing device. Inputs less than 0 are approximated to 0, and inputs greater than 0 are approximated to 1, while maintaining continuous output values ​​to facilitate gradient calculation. Towards the end of training, the temperature of the Sigmoid function is reduced to approximate a step function, mapping inputs less than 0 to 0 and inputs greater than 0 to 1, resulting in a discrete binary output. The loss function includes a penalty term to increase the absolute value of adjacent elements in the port sequence.

[0153] In addition, this embodiment can also use alternative gradient methods or coordinate descent methods to train the structural parameters of the analog computing device.

[0154] Taking the substitution gradient method as an example, when training analog computing devices, the devices often involve hard physical operations (e.g., outputting 1 if the voltage exceeds a threshold, otherwise outputting 0). These operations are mathematically discontinuous, causing the computer to stall when attempting backpropagation because it cannot find a continuous gradient. If the substitution gradient method trains the analog computing device's structural parameters, during forward computation (i.e., when the analog computing device actually performs its work and outputs signals), it executes real physical hard decisions to ensure accurate results. However, during backpropagation, a smooth, differentiable substitute function (e.g., a gentle sigmoid curve) replaces the original non-differentiable hard operations. In this way, the computer can find the direction and intensity of optimization, thus precisely guiding the update of the internal structural parameters of the analog computing device.

[0155] Taking coordinate descent as an example, during parameter training, when faced with a large number of structural parameters in an analog computing device, coordinate descent first fixes all other structural parameters and selects only one structural parameter for fine-tuning until the optimal value that minimizes the computational error of the analog computing device is found in the current single dimension. After locking this structural parameter, it moves on to the next structural parameter, similarly searching for its optimal solution while fixing all other structural parameters. Then, it adjusts each structural parameter sequentially or randomly in turn, ultimately determining the optimal performance state of the analog computing device.

[0156] In summary, the error tolerance improvement method provided in this application involves acquiring the analog information output by each target output port of an analog computing device. Here, a target output port refers to multiple output ports corresponding to a target value, and the target value refers to the discrete value output by the analog computing device. The analog information output by each target output port is encoded and calculated to obtain the target value output by the analog computing device. Since the analog computing device uses the analog information from multiple target output ports and maps it to the target value through encoding and calculation according to specific rules, the redundancy of multiple ports is utilized. This transforms the traditional high-precision requirement relying on absolute quantization of a single port into a relative relationship determination expressed by multiple ports, thereby effectively avoiding the inherent errors of analog computing devices and ensuring the accuracy of digital output without relying on extremely advanced manufacturing processes.

[0157] Based on the same inventive concept, this application also provides an error tolerance improvement device, comprising:

[0158] The acquisition module is used to acquire the analog information output by each target output port; where the target output port refers to multiple output ports located on the analog computing device corresponding to the target value, and the target value refers to the discrete value output by the analog computing device.

[0159] The encoding and calculation module is used to encode and calculate the analog information output from each target output port to obtain the target value output by the analog computing device.

[0160] In summary, the error tolerance improvement device and method provided in this application obtain analog information output from each target output port of an analog computing device. Here, a target output port refers to multiple output ports corresponding to a target value, and the target value refers to a discrete value output by the analog computing device. The analog information output by each target output port is encoded and calculated to obtain the target value output by the analog computing device. Since the analog computing device uses the analog information from multiple target output ports and maps it to the target value through encoding and calculation according to specific rules, the redundancy of multiple ports is utilized. This transforms the traditional high-precision requirement relying on absolute quantization of a single port into a relative relationship determination based on multi-port collaborative expression. Therefore, without relying on extremely advanced manufacturing processes, the inherent errors of analog computing devices are effectively avoided, ensuring the accuracy of the digital output.

[0161] Based on the same inventive concept, this application provides an analog computing device that uses the aforementioned error tolerance improvement method.

[0162] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific details of the error tolerance improvement method described above can be found in the corresponding content of the foregoing embodiments, and will not be elaborated further here.

[0163] Based on the same inventive concept, this application provides an optical chip including at least one of the aforementioned analog computing devices.

[0164] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific details of the analog computing device described above can be found in the corresponding content of the foregoing embodiments, and will not be elaborated further here.

[0165] The above are merely various embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for improving error tolerance, characterized in that, include: The analog information output by each target output port in the analog computing device is obtained; wherein, the target output port refers to multiple output ports corresponding to the target value, and the target value refers to the discrete value output by the analog computing device; The analog information output from each of the target output ports is encoded and calculated to obtain the target value output by the analog computing device.

2. The error tolerance improvement method according to claim 1, characterized in that, The process of encoding and calculating the analog information output from each of the target output ports to obtain the target value output by the analog computing device includes: The target output ports are divided into N target groups, each target group includes Q target output ports, and each target group corresponds to an M-ary position weight, where N and M are integers greater than 1, and Q is an integer greater than or equal to 1. For each target group, the corresponding M-ary mapping value is calculated based on the simulation information of each target output port in the target group. The target value output by the analog computing device is calculated based on the mapping value corresponding to each target group and the bit weight corresponding to each target group.

3. The error tolerance improvement method according to claim 2, characterized in that, When Q equals 1, the step of calculating the M-ary mapping value corresponding to the target group based on the analog information of each target output port in the target group includes: Based on the analog information of the target output port in the target group and the preset target judgment range, the corresponding M-ary mapping value of the target group is determined; wherein, the target judgment range includes M order ranges, and each order range includes an allowed band and a forbidden band.

4. The error tolerance improvement method according to claim 3, characterized in that, The order range is greater than the error range of the analog computing device.

5. The error tolerance improvement method according to claim 4, characterized in that, The range of the forbidden band is greater than the error range of the analog computing device.

6. The error tolerance improvement method according to claim 2, characterized in that, When Q equals M, the step of calculating the M-ary mapping value corresponding to the target group based on the simulation information of each target output port in the target group includes: The analog information of each target output port in the target group is numerically compared, and the port number of the target output port corresponding to the analog information with the largest value in the target group is used as the M-ary mapping value of the target group.

7. The error tolerance improvement method according to claim 1, characterized in that, The process of encoding and calculating the analog information output from each of the target output ports to obtain the target value output by the analog computing device includes: Obtain the first attribute value and the second attribute value of each of the target output ports; According to the magnitude of the first attribute value of each target output port, sort the target output ports to obtain the sorted port sequence; Based on the port sequence and the second attribute value of each target port, Cantor expansion is performed to obtain the target value output by the analog computing device; wherein, the first attribute value is either the analog information of the target output port or the port number of the target output port, and the second attribute value is the other of the analog information of the target output port or the port number of the target output port.

8. The error tolerance improvement method according to claim 1, characterized in that, Before acquiring the analog information output by each target output port, the method further includes: The structural parameters of the analog computing device are trained to obtain the trained analog computing device.

9. An analog computing device, characterized in that, Use the error tolerance improvement method according to any one of claims 1-8.

10. An optical chip, characterized in that, It includes at least one analog computing device as described in claim 9.

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