A system on chip and a power control method thereof

Abstract

The application provides a system chip and a power control method thereof. The system chip comprises a hardware layer, a firmware layer and an operating system driver layer. The method comprises: the hardware layer counting a counter value corresponding to at least one preset signal of each performance domain; the operating system driver layer determining a preset power distribution strategy and a preset performance window corresponding to an application scenario in which the system chip is located; the firmware layer determining, by using each counter value, the preset power distribution strategy and the preset performance window, to-be-adjusted performance information corresponding to at least one to-be-adjusted performance domain, to generate a first adjustment instruction for each to-be-adjusted performance domain and correspondingly issue the first adjustment instruction to each to-be-adjusted performance domain; and the hardware layer adjusts each to-be-adjusted performance domain according to the first adjustment instruction corresponding to each to-be-adjusted performance domain, to control the power of each to-be-adjusted performance domain.

Description

Technical Field

[0001] This application relates to the field of system-on-a-chip (SoC) technology, and more particularly to a SoC and its power control method. Background Technology

[0002] With the continuous advancement of semiconductor technology, the integration and complexity of System-on-Chips (SoCs) are constantly increasing, leading to their increasingly widespread application in real-time systems such as mobile devices, IoT terminals, autonomous driving, and high-performance computing. However, the power consumption generated by SoCs is also increasing dramatically, becoming a key factor restricting system performance, reliability, and energy efficiency.

[0003] In existing technologies, the operating system driver layer (OS or Driver Layer) periodically sends Operating Performance Point (OPP) adjustment requests to the firmware layer (FW Layer) to request corresponding operating frequency and supply voltage performance points based on load changes, so that the system-on-a-chip (SoC) can operate at those performance points. However, when the firmware layer receives an OPP adjustment request, for safety and stability reasons, it does not directly execute the adjustment action according to the OPP adjustment request. Instead, it adopts an on-demand strategy based on historical utilization, tending to select a statically conservative OPP point to send to the hardware layer (HW), meaning it does not immediately respond to the OPP adjustment request. The hardware layer also does not directly respond to the statically conservative OPP point selected by the firmware layer, but adjusts according to its own conservative strategy. As a result, each layer chooses to reserve margins for performance control in order to maintain stability, causing the SoC to operate under non-full load conditions most of the time, failing to fully utilize the predetermined Thermal Design Power (TDP) and thermal budget, resulting in low overall energy efficiency. In other words, when performing the same task, a system-on-a-chip with lower energy efficiency will take longer to execute due to its operating frequency limitation, and may generate more power consumption. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide at least one system-on-a-chip and its power control method, which solves the technical problem of low energy efficiency caused by the conservative processing of the adjustment signal through multiple levels in the prior art, and achieves the technical effect of improving the energy efficiency ratio of the system-on-a-chip.

[0005] This application mainly includes the following aspects: In a first aspect, embodiments of this application provide a power control method for a system-on-a-chip (SoC). The SoC includes a hardware layer, a firmware layer, and an operating system driver layer. The method includes: the hardware layer counting counter values ​​corresponding to at least one preset signal for each performance domain; the operating system driver layer determining a preset power allocation strategy and a preset performance window corresponding to the application scenario in which the SoC is located; the firmware layer determining adjustable performance information corresponding to at least one adjustable performance domain based on each counter value, the preset power allocation strategy, and the preset performance window, generating a first adjustment instruction for each adjustable performance domain and issuing it to each adjustable performance domain accordingly; and the hardware layer adjusting according to the first adjustment instruction corresponding to each adjustable performance domain to control the power of each adjustable performance domain.

[0006] Optionally, the method further includes: for each performance domain, when the counter value corresponding to the preset signal of the performance domain meets the preset alarm condition, the hardware layer sends an alarm signal for the performance domain to the firmware layer, and the firmware layer responds to the alarm signal to generate a second adjustment command for the performance domain and sends it to the performance domain accordingly.

[0007] Optionally, the preset power allocation strategy is used to indicate the performance allocation priority of at least one first preset performance domain in the application scenario, and / or the preset performance window is used to indicate the performance allocation ratio range of at least one second preset performance domain within a preset time period in the application scenario.

[0008] Optionally, the performance information to be adjusted includes performance parameters to be adjusted and their target parameter values. At least one performance domain to be adjusted is determined by: calculating the current operating status information of each performance domain using at least one counter value corresponding to each performance domain; the current operating status information reflects the current operating status of the performance domain; based on the current operating status information of each performance domain, using the preset power allocation strategy and the preset performance window, determining at least one performance domain to be adjusted and the corresponding performance parameter to be adjusted for each performance domain in all performance domains of the hardware layer, wherein the performance parameter to be adjusted includes at least one of the following: operating frequency, supply voltage, and frequency division ratio; and determining the target parameter value corresponding to the performance parameter to be adjusted based on the preset adjustment strategy and the current parameter value of the performance parameter to be adjusted.

[0009] Optionally, the preset power allocation strategy and preset performance window corresponding to the application scenario in which the system-on-a-chip is located are determined by: identifying the application scenario in which the system-on-a-chip is currently running; determining the preset power allocation strategy corresponding to the application scenario by comparing the application scenario with the power adjustment strategy; and determining the preset performance window corresponding to the application scenario by comparing the application scenario with the performance window.

[0010] Optionally, the hardware layer includes a counter configured for at least one preset signal for each performance domain, wherein the preset signal is a signal that limits the power of the performance domain.

[0011] Optionally, the method further includes: the firmware layer sending the performance information to be adjusted corresponding to each performance domain to be adjusted and the current performance information corresponding to other performance domains besides the performance domain to be adjusted to the operating system driver layer, so that the operating system driver layer can monitor each performance domain in real time.

[0012] Secondly, embodiments of this application also provide a system-on-a-chip (SoC) comprising a hardware layer, a firmware layer, and an operating system driver layer, wherein the SoC performs the steps of the power control method described in the first aspect or any possible implementation thereof.

[0013] Optionally, the system-on-a-chip (SoC) includes at least a power management coprocessor and an application processor, with the firmware layer running on the power management coprocessor and the operating system driver layer running on the application processor.

[0014] Thirdly, embodiments of this application also provide a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the steps of the power control method described in the first aspect or any possible implementation of the first aspect.

[0015] This application provides a system-on-a-chip (SoC) and its power control method. The SoC includes a hardware layer, a firmware layer, and an operating system driver layer. The method includes: the hardware layer counting counter values ​​corresponding to at least one preset signal for each performance domain; the operating system driver layer determining a preset power allocation strategy and a preset performance window corresponding to the application scenario of the SoC; the firmware layer determining adjustable performance information corresponding to at least one adjustable performance domain based on each counter value, the preset power allocation strategy, and the preset performance window, generating a first adjustment instruction for each adjustable performance domain and issuing it to each adjustable performance domain accordingly; and the hardware layer adjusting according to the first adjustment instruction corresponding to each adjustable performance domain to control the power of each adjustable performance domain. By designing counter values ​​corresponding to each preset signal within the hardware layer and determining preset power allocation strategies and preset performance windows based on the application scenario of the system-on-a-chip (SoC) within the operating system driver layer, the firmware layer can determine the adjustable performance information corresponding to at least one adjustable performance domain according to the counter values, preset power allocation strategies, and preset performance windows. This allows each of the at least one adjustable performance domain to perform power adjustment, solving the technical problem of low energy efficiency caused by the conservative processing of adjustment signals through multiple layers in the prior art. This achieves the technical effect of improving the energy efficiency ratio of the SoC.

[0016] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A flowchart of a power control method for a system-on-a-chip provided in an embodiment of this application is shown.

[0019] Figure 2 A flowchart illustrating the steps for determining the adjustable performance information corresponding to at least one adjustable performance domain, as provided in an embodiment of this application, is shown.

[0020] Figure 3 A schematic diagram of a system-on-a-chip provided in an embodiment of this application is shown. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the drawings in this application are for illustrative and descriptive purposes only and are not intended to limit the scope of protection of this application. Furthermore, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of this application. It should be understood that the operations in the flowcharts may not be implemented in sequence, and steps without logical contextual relationships may be reversed or implemented simultaneously. In addition, those skilled in the art, guided by the content of this application, may add one or more other operations to the flowcharts, or remove one or more operations from the flowcharts.

[0022] Furthermore, the described embodiments are merely some, not all, of the embodiments of this application. The components of the embodiments of this application described and illustrated herein can typically be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0023] In existing technologies, especially in real-time systems, task execution has strict time constraints. Power management not only needs to meet performance targets but also ensure that the timing of the system-on-a-chip (SoC) is not affected by timing delays or jitter due to power control. The SoC's operating system driver layer, firmware layer, and hardware layer each have their own adjustment margins. For example, to meet the rated power consumption requirements of thermal design power (TDP), the firmware layer sets the maximum available operating frequency and supply voltage combination allocated to each performance domain of the hardware layer, meaning the firmware layer controls the sum of the power consumption of each performance domain to be less than the rated power consumption. The operating system driver layer performs Intelligent Power Allocation (IPA) to ensure that the node temperature remains below the upper temperature limit even under extreme loads. Furthermore, the margins of the operating system driver layer, firmware layer, and hardware layer are layered, compressing the actual usable dynamic performance space of the SoC, affecting its average performance and leading to lower energy efficiency.

[0024] Based on this, this application provides a system-on-a-chip (SoC) and its power control method. By designing counter values ​​corresponding to various preset signals within the hardware layer, and having the operating system driver layer determine a preset power allocation strategy and a preset performance window based on the application scenario of the SoC, the firmware layer can determine the adjustable performance information corresponding to at least one adjustable performance domain according to the counter values, the preset power allocation strategy, and the preset performance window. This allows each of the at least one adjustable performance domain to perform power adjustment, solving the technical problem of low energy efficiency caused by the conservative processing of adjustment signals through multiple layers in the prior art, and achieving the technical effect of improving the energy efficiency ratio of the SoC. Specifically, as follows: Please see Figure 1 , Figure 1 This is a flowchart illustrating a power control method for a system-on-a-chip (SoC) provided in an embodiment of this application. Figure 1 As shown in the embodiments of this application, the power control method for a system-on-a-chip includes the following steps: S101: The hardware layer counts the counter values ​​corresponding to at least one preset signal in each performance domain.

[0025] The system-on-a-chip includes a hardware layer, a firmware layer, and an operating system driver layer. The firmware layer is located between the hardware layer and the operating system driver layer. The hardware layer and the firmware layer exchange information with each other, and the firmware layer and the operating system driver layer exchange information with each other.

[0026] The hardware layer comprises multiple performance domains, including a Central Processing Unit (CPU) cluster, a Graphics Processing Unit (GPU), a Neural Processing Unit (NPU), and an Image Signal Processor (ISP). Typically, a performance domain draws power from only one power supply module, and all hardware modules within a performance domain use the same power supply voltage and operating frequency.

[0027] Specifically, the hardware layer includes at least one preset signal for each performance domain, which corresponds to a counter. The preset signal is a signal that limits the power of the performance domain.

[0028] In other words, a counter is set for each preset signal in each performance domain. The counter counts the number of effective activity cycles or events of computing units, buses, and memory accesses in the performance domain at an extremely fine time granularity (e.g., microseconds). Furthermore, the preset signal refers to the signal that affects the power generated by the performance domain. The counter value corresponding to the preset signal is used to characterize the workload of the performance domain and the power generated by the performance domain. The larger the counter value corresponding to the preset signal, the higher the workload of the performance domain and the greater the power generated. That is, the counter value corresponding to the preset signal is directly proportional to the power generated by the performance domain.

[0029] The method further includes: for each performance domain, when the counter value corresponding to the preset signal of the performance domain meets the preset alarm condition, the hardware layer sends an alarm signal for the performance domain to the firmware layer, and the firmware layer responds to the alarm signal to generate a second adjustment command for the performance domain and sends it to the performance domain accordingly.

[0030] Furthermore, the hardware layer provides a configurable pre-alarm interrupt mechanism. This mechanism includes preset alarm conditions corresponding to the counter values ​​of each preset signal. Meeting these preset alarm conditions indicates that the counter value corresponding to the preset signal is abnormal and will lead to abnormal power. Specifically, the preset alarm condition for the counter value corresponding to the preset signal is set to a preset upper limit value for that preset signal. That is, for each preset signal, when the counter value corresponding to that preset signal is greater than or equal to the preset upper limit value, the hardware layer sends an alarm signal to the firmware layer for the performance domain in which that preset signal belongs, indicating that the power generated in that performance domain is high, thus providing an opportunity for proactive adjustment.

[0031] The alarm signal includes at least a performance domain identifier, enabling the firmware layer to issue a second adjustment command targeting that performance domain. The alarm signal may also include a counter value corresponding to a preset signal, allowing the firmware layer to consider the counter value when issuing the second adjustment command. In other words, the second adjustment command refers to the power adjustment command issued by the firmware layer when the hardware layer initiates an alarm; the power adjustment method for the second adjustment command may differ depending on the performance domain.

[0032] Furthermore, during the continuous counting phase of the counter corresponding to the preset signal, if the counter value is continuously greater than or equal to the preset upper limit value, the hardware layer can send an alarm signal at preset reporting intervals until the counter value stops counting or the counter value is less than the preset upper limit value, so that the firmware layer can determine whether the hardware layer has responded to the second adjustment command.

[0033] For example, the second adjustment command can be used to instruct the power supply module to stop supplying power to the performance domain corresponding to the performance domain identifier. Alternatively, the second adjustment command can also be used to instruct the power supply module to reduce the supply voltage to the performance domain corresponding to the performance domain identifier and / or control the operating frequency of the performance domain to decrease. That is, in response to the second adjustment command, the hardware layer can reduce the supply voltage according to a preset voltage adjustment amount, that is, control the supply voltage corresponding to the performance domain to decrease by a preset voltage adjustment amount every preset period until the hardware layer stops sending alarm signals. The hardware layer can also select a target operating performance point with a voltage lower than the current supply voltage and / or an operating frequency lower than the current operating frequency among multiple operating performance points to perform power adjustment, thereby reducing the power of the performance domain by reducing the supply voltage and / or operating frequency of the performance domain.

[0034] S102: The operating system driver layer determines the preset power allocation strategy and preset performance window corresponding to the application scenario of the system-on-a-chip.

[0035] The preset power allocation strategy is used to indicate the performance allocation priority of at least one first preset performance domain in the application scenario, and / or the preset performance window is used to indicate the performance allocation ratio range of at least one second preset performance domain within a preset time period in the application scenario.

[0036] Specifically, the preset power allocation strategy and preset performance window corresponding to the application scenario in which the system-on-a-chip is located are determined by the following methods: identifying the application scenario in which the system-on-a-chip is currently running; determining the preset power allocation strategy corresponding to the application scenario by comparing the application scenario with the power adjustment strategy; and determining the preset performance window corresponding to the application scenario by comparing the application scenario with the performance window.

[0037] In other words, the operating system driver layer identifies the application scenario currently running on the system-on-a-chip (SoC). This identification can be done through process names, application programming interface (API) call characteristics, etc., and the corresponding preset power allocation strategy and preset performance window are determined according to a pre-defined mapping relationship. The application scenario reflects the operating status of the smart device where the SoC resides; for example, whether the computer running the SoC is playing a game or using office software. Different operating conditions are matched with different preset power allocation strategies and preset performance windows.

[0038] In other words, technicians pre-configure preset power allocation strategies and preset performance windows based on the participation of each performance domain in all application scenarios of the smart device where the system-on-a-chip resides. Different preset power allocation strategies and preset performance windows are set for different application scenarios. Therefore, after identifying an application scenario, the operating system driver layer determines the preset power allocation strategy corresponding to the current application scenario according to the pre-configured correspondence between application scenarios and preset power allocation strategies, and determines the preset performance window corresponding to the current application scenario according to the pre-configured correspondence between application scenarios and preset performance windows.

[0039] Specifically, for each application scenario, the first preset performance domain corresponding to the application scenario includes at least the most important performance domain involved in the system-on-a-chip running the application scenario, and the second preset performance domain corresponding to the application scenario includes at least the most important performance domain involved in the system-on-a-chip running the application scenario. The first preset performance domain and the second preset performance domain may be the same or different.

[0040] The preset time period can be a future time period, allowing the firmware layer to make better forward-looking resource allocation decisions and reserve power budget for upcoming loads in advance. In other words, since the preset power allocation strategy and preset performance window corresponding to the application mode have already indicated the performance standards of the critical performance domains running this application mode, even if the power of the critical performance domains is low at the current moment, the power reduction of the critical performance domains should not be controlled.

[0041] For example, when a game is detected running on the computer where the system-on-a-chip is located, the first preset performance domain corresponding to this application scenario includes the GPU and NPU, and the second preset performance domain corresponding to this application scenario includes the GPU. The matched preset power allocation strategy is used to indicate that both the GPU and NPU are in high-performance mode, that is, to prioritize the GPU and NPU in performance allocation. Thus, the performance allocation of the GPU and NPU has the highest priority among the multiple performance domains. The matched preset performance window is used to indicate that the GPU performance needs to be no less than 70% of the preset maximum performance within the next 100 milliseconds due to the frame rendering task. The preset performance window of the GPU performance is from 70% of the preset maximum performance of the GPU to the preset maximum performance of the GPU, thereby providing the firmware layer with the high-priority performance domains and their performance windows involved in running the game.

[0042] For example, when it is detected that office software is running on the computer where the system-on-a-chip is located, the first and second preset performance domains corresponding to this application scenario include the CPU. The matched preset power allocation strategy is used to instruct the CPU to be in high-performance mode, that is, to focus on allocating performance to the CPU. Thus, among the multiple performance domains, the CPU performance allocation has the highest priority. Since running office software does not require a lot of performance, the matched preset performance window is used to indicate that the CPU performance needs to be no less than the CPU's preset minimum performance and no more than 70% of the CPU's preset maximum performance within the next 100 milliseconds. This is to provide the firmware layer with the high-priority performance domains and their performance windows involved in running office software.

[0043] S103: The firmware layer determines the adjustable performance information corresponding to at least one adjustable performance domain by using each counter value, the preset power allocation strategy and the preset performance window, so as to generate a first adjustment instruction for each adjustable performance domain and send it to each adjustable performance domain accordingly.

[0044] The performance information to be adjusted includes the performance parameter to be adjusted and its target parameter value. Please refer to [link / reference]. Figure 2 , Figure 2 This is a flowchart illustrating the steps for determining the adjustable performance information corresponding to at least one adjustable performance domain, as provided in an embodiment of this application. Figure 2 As shown, the performance information to be adjusted for at least one performance domain to be adjusted is determined in the following way: S201: Calculate the current operating status information of each performance domain by using at least one counter value corresponding to each performance domain.

[0045] The current operating status information is used to reflect the current operating status of the performance domain.

[0046] S202: Based on the current operating status information of each performance domain, at least one performance domain to be adjusted and the corresponding performance parameters to be adjusted for each performance domain are determined in all performance domains of the hardware layer through the preset power allocation strategy and the preset performance window.

[0047] The performance parameters to be adjusted include at least one of the following: operating frequency, supply voltage, and frequency division ratio.

[0048] S203: Determine the target parameter value corresponding to the performance parameter to be adjusted based on the preset adjustment strategy and the current parameter value of the performance parameter to be adjusted.

[0049] The current operating status information is obtained by filtering, aggregating, and transforming the counter values ​​reported by the hardware layer from the firmware layer. For example, the current operating status information can be module occupancy rate, estimated power consumption, heat accumulation, etc. This processed information eliminates noise and transients in the hardware data, forming a stable and reliable status view. For example, for each performance domain, the module occupancy rate refers to the percentage of time the module is in a non-idle (i.e., executing a task) state per unit time. Therefore, the operating time of the performance domain is reflected by the counter values ​​of various preset signals. The ratio of the counter values ​​of each preset signal in the performance domain to the preset upper limit of the counter value per unit time is calculated, and the maximum ratio is taken as the module occupancy rate of the performance domain. For each performance domain, the module occupancy rate is multiplied by the preset upper limit of the power consumption of the performance domain, and the product is summed with the preset base power consumption of the performance domain to obtain the estimated power consumption value of the performance domain. Alternatively, a fitting function is pre-built between the counter values ​​of each preset signal in the performance domain and the actual power consumption of the performance domain, thereby pre-setting the estimated power consumption value of each preset signal in the performance domain. Suppose that the power consumption estimate for a performance domain can be calculated by substituting the counter value of the signal into a fitting function. For each performance domain, the heat accumulation amount of that performance domain per unit time is obtained by integrating the difference between the power consumption function and the heat dissipation function over time. The heat accumulation amount reflects the heat accumulated in the performance domain per unit time. A positive heat accumulation amount means that the temperature of the performance domain at the end of the unit time is higher than the temperature at the beginning of the unit time, and a negative heat accumulation amount means that the temperature of the performance domain at the end of the unit time is lower than the temperature at the beginning of the unit time. The power consumption function can be constructed by considering the power consumption estimate at each moment within the unit time, and the heat dissipation function can be constructed by considering the spatial arrangement of each performance domain within the system-on-a-chip and the materials of the system-on-a-chip.

[0050] Furthermore, the current operating status information of each performance domain reflects its actual operating condition, and a preset power allocation strategy clarifies the ideal operating condition of each performance domain. This determines whether each performance domain needs performance enhancement or reduction. For performance domains requiring performance enhancement, power needs to be increased; for those requiring performance reduction, power should be decreased. Therefore, increasing at least one of the operating frequency, supply voltage, and division ratio increases the power of a performance domain, while decreasing at least one of these factors reduces its power.

[0051] For example, if the current operating status information reflects that the module occupancy rate of the performance domain is lower than the upper limit of the preset performance window and the preset power allocation strategy indicates that the current application scenario requires the performance domain to maintain a high performance, then it is determined that the performance domain needs to improve its performance. Furthermore, the improved performance of the performance domain should also be within the preset performance window. Therefore, it is determined that at least one of the operating frequency, supply voltage, and frequency division ratio of the performance domain needs to be increased to improve the performance of the performance domain.

[0052] For example, a preset adjustment strategy is used to indicate whether the performance parameter to be adjusted is adjusted by a preset adjustment amount, proportionally, or according to the operating performance. That is, when it is determined that at least one of the operating frequency, supply voltage, and division ratio of the performance domain needs to be increased, a corresponding preset adjustment amount can be added to at least one of the operating frequency, supply voltage, and division ratio to obtain the target parameter value of the performance parameter to be adjusted; or, when it is determined that at least one of the operating frequency, supply voltage, and division ratio of the performance domain needs to be increased, the difference between the current parameter value and the desired parameter value of the performance parameter to be adjusted can be calculated, and the current adjustment amount for the performance parameter to be adjusted can be calculated by multiplying the current parameter value by a preset ratio. The sum of the adjustment amount and the current parameter value of the performance parameter to be adjusted is used as the target parameter value of the performance parameter to be adjusted. The desired parameter value is a preset parameter value used to indicate that the performance of the performance domain at the desired parameter value is adjusted to the optimal performance required by the application scenario. Furthermore, whether adjusting by a preset amount or proportionally, small, gradual adjustments are made, rather than large-scale switching or frequency increases, thus avoiding drastic performance fluctuations. Therefore, the preset adjustment strategy reduces the performance volatility of the system-on-a-chip by limiting the adjustment amount of the performance parameter to be adjusted.

[0053] For example, the preset adjustment strategy can also be used to instruct the adjustment of the performance parameter to be adjusted according to the operating performance pair. Furthermore, when it is determined that at least one of the operating frequency, supply voltage, and division ratio of the performance domain needs to be increased, a target operating performance pair with a higher operating frequency or a higher supply voltage is determined from all operating performance pairs corresponding to the performance domain. The operating frequency and supply voltage of the target operating performance pair are used as the target parameter values ​​of the performance parameter to be adjusted, thereby increasing the power of the performance domain.

[0054] Specifically, when the performance parameters to be adjusted and their target parameter values ​​for each performance domain to be adjusted are determined, a first adjustment instruction for each performance domain to be adjusted is generated. The first adjustment instruction should include at least the performance domain identifier, the performance parameters to be adjusted, and the target parameter values ​​of the performance parameters to be adjusted, and the first adjustment instruction corresponding to each performance domain to be adjusted is sent to the hardware layer.

[0055] S104: The hardware layer adjusts according to the first adjustment instruction corresponding to each performance domain to be adjusted, so as to control the power of each performance domain to be adjusted.

[0056] In other words, after receiving the first adjustment instruction sent by the firmware layer for the performance domain to be adjusted, the hardware layer determines the performance domain to be adjusted according to the performance domain identifier indicated by the first adjustment instruction, and adjusts the performance parameters of the performance domain to be adjusted according to the target parameter values ​​indicated by the first adjustment instruction, so as to control the power of the performance domain to be adjusted.

[0057] The method further includes: the firmware layer sending the performance information to be adjusted corresponding to each performance domain to be adjusted and the current performance information corresponding to other performance domains besides the performance domain to be adjusted to the operating system driver layer, so that the operating system driver layer can monitor each performance domain in real time.

[0058] In other words, after the firmware layer determines the performance information to be adjusted for the performance domain to be adjusted, it promptly reports the performance information to be adjusted for the performance domain to be adjusted and the current performance information corresponding to other performance domains to the operating system driver layer. This allows the operating system driver layer to promptly understand the latest performance parameters and their values ​​for each performance domain. If the performance parameter values ​​of a performance domain do not fall within the preset performance parameter range, the operating system driver layer can promptly issue interrupt control instructions to the hardware layer through the firmware layer to avoid causing system-level chip abnormalities.

[0059] Based on the same concept, this application also provides a system-on-a-chip (SoC) corresponding to the power control method provided in the above embodiments. Since the principle of the SoC in this application is similar to the power control method in the above embodiments, the implementation of the SoC can refer to the implementation of the method, and the repeated parts will not be described again.

[0060] like Figure 3 As shown, Figure 3 This is a schematic diagram of a system-on-a-chip (SoC) provided in an embodiment of this application. The SoC 10 includes a hardware layer 101, a firmware layer 102, and an operating system driver layer 103. The SoC executes the steps of the power control method as described in the above embodiments.

[0061] The system-on-a-chip (SoC) includes at least a power management coprocessor and an application processor. The firmware layer runs on the power management coprocessor, and the operating system driver layer runs on the application processor (AP). The power management coprocessor is typically a low-power digital signal processor (DSP). By placing the firmware and hardware layers on different processors, the firmware layer possesses strong data processing capabilities. The calculation of the adjustable performance parameters and their target values ​​within the adjustable performance domain can be implemented in the firmware layer. The operating system driver layer does not need to perform calculations for the adjustable performance parameters, thus improving the system's computing power. Furthermore, it reduces the number of data transfers between layers, minimizing the probability of clock signal delays or jitter, and avoids the need for the operating system driver layer to retain the adjustment values ​​of the adjustable performance parameters, thereby improving adjustment accuracy.

[0062] Based on the same concept, embodiments of this application also provide a smart device, which includes at least the system-on-a-chip (SoC) described in the above embodiments. The smart device can be a computer, mobile phone, smartwatch, tablet computer, or other device that requires a SoC.

[0063] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems and devices described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division; in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection may be through some communication interfaces; the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms.

[0064] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0065] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0066] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0067] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power control method for a system-on-a-chip, characterized in that, The system-on-a-chip includes a hardware layer, a firmware layer, and an operating system driver layer; the method includes: The hardware layer counts the counter values ​​corresponding to at least one preset signal in each performance domain; The operating system driver layer determines the preset power allocation strategy and preset performance window corresponding to the application scenario of the system-on-a-chip. The firmware layer determines the adjustable performance information corresponding to at least one adjustable performance domain by using each counter value, the preset power allocation strategy, and the preset performance window, so as to generate a first adjustment instruction for each adjustable performance domain and send it to each adjustable performance domain accordingly. The hardware layer adjusts according to the first adjustment instruction corresponding to each performance domain to be adjusted, so as to control the power of each performance domain to be adjusted.

2. The method according to claim 1, characterized in that, The method further includes: For each performance domain, when the counter value corresponding to the preset signal in that performance domain meets the preset alarm condition, the hardware layer sends an alarm signal for that performance domain to the firmware layer. The firmware layer responds to the alarm signal to generate a second adjustment command for the performance domain and sends it to the performance domain accordingly.

3. The method according to claim 1, characterized in that, The preset power allocation strategy is used to indicate the performance allocation priority of at least one first preset performance domain in the application scenario. And / or, The preset performance window is used to indicate the performance allocation ratio range of at least one second preset performance domain within a preset time period in the application scenario.

4. The method according to claim 1 or 3, characterized in that, The performance information to be adjusted includes the performance parameters to be adjusted and their target parameter values. The performance information corresponding to at least one performance domain to be adjusted is determined by the following method: The current operating status information of each performance domain is calculated by using at least one counter value corresponding to each performance domain. The current operating status information is used to reflect the current operating status of the performance domain. Based on the current operating status information of each performance domain, at least one performance domain to be adjusted and the corresponding performance parameter to be adjusted for each performance domain are determined in all performance domains of the hardware layer through the preset power allocation strategy and the preset performance window. The performance parameter to be adjusted includes at least one of the following: operating frequency, supply voltage and frequency division ratio. The target parameter value corresponding to the performance parameter to be adjusted is determined based on the preset adjustment strategy and the current parameter value of the performance parameter to be adjusted.

5. The method according to claim 1, characterized in that, The preset power allocation strategy and preset performance window corresponding to the application scenario of the system-on-a-chip are determined by the following methods: Identify the application scenario currently running on the system-on-a-chip; The preset power allocation strategy corresponding to the application scenario is determined by comparing the application scenario with the power adjustment strategy, and the preset performance window corresponding to the application scenario is determined by comparing the application scenario with the performance window.

6. The method according to claim 1, characterized in that, The hardware layer includes at least one preset signal for each performance domain, which corresponds to a counter. The preset signal is a signal that limits the power of the performance domain.

7. The method according to claim 1, characterized in that, The method further includes: The firmware layer sends the performance information to be adjusted for each performance domain to be adjusted, as well as the current performance information for other performance domains besides the performance domain to be adjusted, to the operating system driver layer so that the operating system driver layer can monitor each performance domain in real time.

8. A system-on-a-chip, characterized in that, The system-on-a-chip includes a hardware layer, a firmware layer, and an operating system driver layer, and the system-on-a-chip performs the steps of the power control method as described in any one of claims 1 to 7.

9. The method according to claim 8, characterized in that, The system-on-a-chip (SoC) includes at least a power management coprocessor and an application processor. The firmware layer runs on the power management coprocessor, and the operating system driver layer runs on the application processor.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, performs the steps of the power control method as described in any one of claims 1 to 7.

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