Data management method, system, device, apparatus, and storage medium

Abstract

This application discloses a data management method, system, device, equipment, and storage medium, relating to the field of data management technology. The method includes: multiple controllers connected to a CXL shared memory disk and a hard disk; a first controller among the multiple controllers, after acquiring first data shared among the multiple controllers, writes the first data to the CXL shared memory disk and asynchronously writes the first data to the hard disk; in response to the completion of writing the first data to the CXL shared memory disk, it acquires a first pointer corresponding to the first controller and a first address of the first data in the CXL shared memory disk; based on the first pointer and the first address, it obtains a first offset, enabling the multiple controllers to address and locate the first data in the CXL shared memory disk based on the first offset.

Description

Technical Field

[0001] This application relates to the field of data management technology, and in particular to a data management method, system, apparatus, device and storage medium. Background Technology

[0002] With the development of storage technology, global caching has become one of the core technologies of data management. In order to further improve availability, data management adopts controller data sharing for data management. In the process of using controller data sharing for data management, controllers can be connected to hard drives, and network connections can be established between controllers. Each time data is stored, any controller needs to write the data to the memory of other controllers through the network connection, and then write the data to the connected hard drive. Although data loss is avoided, data transmission based on the network has transmission latency. Therefore, how to improve the data storage efficiency in the controller data sharing scenario has become an important problem that urgently needs to be solved. Summary of the Invention

[0003] This application provides a data management method, system, apparatus, device, and storage medium to at least solve the problem of low data storage efficiency in the case of multiple controllers sharing data in the related art.

[0004] This application provides a data management method applied to a first controller in a data management system. The data management system includes multiple controllers that compute fast connections to a CXL shared memory disk and a hard disk. The multiple controllers are connected to the CXL shared memory disk and the hard disk. The first controller is any one of the multiple controllers. The method includes: The first data is written to the cxl shared memory disk and asynchronously written to the hard disk; the first data includes data shared among the plurality of controllers; In response to the completion of writing the first data to the cxl shared memory disk, a first pointer corresponding to the first controller and a first address of the first data in the cxl shared memory disk are obtained; the first pointer is obtained after pointer alignment of the plurality of controllers; Based on the first pointer and the first address, a first offset is obtained; the first offset is used by the plurality of controllers to address and locate the first data in the cxl shared memory disk.

[0005] This application also provides a data management device, operating on a first controller in a data management system, the data management system including multiple controllers, computing fast connection CXL shared memory disk and hard disk; the multiple controllers are connected to the CXL shared memory disk, and the multiple controllers are connected to the hard disk; the first controller is any one of the multiple controllers; the device includes: A write module is used to write first data to the cxl shared memory disk and asynchronously write the first data to the hard disk; the first data includes data shared among the plurality of controllers; The acquisition module is configured to, in response to the completion of writing the first data to the cxl shared memory disk, acquire a first pointer corresponding to the first controller and a first address of the first data in the cxl shared memory disk; the first pointer is obtained after pointer alignment of the plurality of controllers; The offset determination module is used to obtain a first offset based on the first pointer and the first address; the first offset is used by the plurality of controllers to address and locate the first data in the cxl shared memory disk.

[0006] This application also provides a data management system, the system comprising: multiple controllers, a CXL shared memory disk and a hard disk; the multiple controllers are connected to the CXL shared memory disk and the multiple controllers are connected to the hard disk; any one of the multiple controllers is used to implement the steps of any of the above data management methods.

[0007] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described data management methods when executing the computer program.

[0008] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described data management methods.

[0009] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described data management methods.

[0010] This application provides a data management system comprising multiple controllers, a CXL shared memory disk, and a hard disk, with all controllers connected to the CXL shared memory disk and the hard disk. During the storage of shared data, any controller writes first data to the CXL shared memory disk, allowing multiple controllers to retrieve this data from the CXL shared memory disk without requiring data transfer between controllers, thus saving latency caused by data transfer between controllers and improving data storage efficiency in multi-controller data sharing scenarios. Simultaneously, the first data is asynchronously written to the hard disk, achieving effective data storage. Furthermore, by storing a status indicator in the CXL shared memory disk marking whether data has been written to the hard disk, the effectiveness of data storage management is improved. Attached Figure Description

[0011] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 A flowchart illustrating a data management method provided in an embodiment of this application; Figure 2 A schematic diagram of pointer processing provided in an embodiment of this application; Figure 3 This is a schematic diagram of an exception handling method provided in an embodiment of this application; Figure 4 A flowchart illustrating a data management method applied in a dual-control data management scenario, provided as an embodiment of this application; Figure 5 A schematic diagram illustrating a data management process applied in a dual-control data management scenario, provided as an embodiment of this application; Figure 6 A schematic diagram of an index alignment process provided in an embodiment of this application; Figure 7 This is a schematic diagram of a fault handling process provided in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of a data management system provided in an embodiment of this application; Figure 9 This is a schematic diagram of the structure of a data management device provided in an embodiment of this application. Detailed Implementation

[0013] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0014] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0015] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0016] The specific application environment architecture or specific hardware architecture on which the execution of the data management method depends is described here.

[0017] The data management methods provided in this document may include, in an exemplary implementation environment, the following: Multiple controllers, with CXL sharing a memory disk and a back-end hard drive; The CXL shared memory disk can be a multi-port shared memory disk, and each controller can connect to the multi-port shared memory disk through the ports configured on the multi-port shared memory disk. Specifically, the multi-port shared memory disk can be a multi-port CXL (Compute Express Link) E3.S (short enterprise storage disk) shared memory disk, which can contain multiple independent CXL ports. The multiple CXL ports can be CXL 3.1 x4 (CXL 3.1 version quad-channel) physical ports.

[0018] For example, multiple controllers include two controllers, namely controller 1 and controller 2. The multi-port shared memory disk can be a dual-port shared memory disk, including a first CXL port and a second CXL port. Controller 1 can establish an independent CXL link with the dual-port shared memory disk through the first CXL port, and controller 2 can establish an independent CXL link with the dual-port shared memory disk through the second CXL port.

[0019] Specifically, each controller can access the globally shared cache data in the CXL shared memory disk through its corresponding CXL port; in addition, each controller can also establish a connection with the back-end hard disk to flush the data that needs to be stored to the back-end hard disk, thereby achieving persistent storage of the data.

[0020] It should be noted that there can be one or more hard drives. Multiple controllers can be connected to the same hard drive for data writing or to different hard drives for data writing. This embodiment does not limit this.

[0021] In practice, the CXL shared memory disk can be replaced with a multi-port CXL shared memory disk, for example, a multi-port CXL shared memory disk; specifically, the CXL shared memory disk can be encapsulated with a control chip, a protocol control unit, a global CXL shared memory disk chip array, a memory cache management unit, a power-down protection module and / or a memory channel drive circuit; Multiple controllers can be connected to the memory disk via ports. The control chip can be used to uniformly aggregate read / write requests from multiple ports, complete memory address routing, and coordinate the collaborative work of the protocol control unit, memory channel driver circuit, and / or power-down protection module. Specifically, the control chip may include a CXL control chip, which can be designed based on the CXL standard and fully support the CXL protocol.

[0022] For example, the control chip can be designed based on the cxl3.1Type3 (Compute Express Link 3.1 version three types of memory extension devices) standard, and fully support the cxl.mem (Compute Express Link Memory Sub-protocol, cxl memory sub-protocol) and cxl.io (Compute Express Link IO Sub-protocol, cxl input / output sub-protocol) protocols.

[0023] In addition, the control chip can be equipped with a physical layer interface and support CXL channels, which can be split into ports. The control chip can also have a built-in dual-channel memory controller to manage all access operations of the memory chip array.

[0024] For example, in a dual-port shared memory disk, the control chip supports 8 CXL channels, which can be split into two groups of four-port channels.

[0025] The protocol control unit may include multiple sub-units, each corresponding to a port. Each port can independently parse requests issued by the connected controller. The complete port has end-to-end training, terminal isolation, and / or traffic isolation to prevent interference between ports. The protocol control unit is used to standardize and encapsulate the requests of the corresponding controller and forward them to the control chip. Correspondingly, it can also reverse the data back to the memory for reading.

[0026] A global CXL shared memory disk array includes a shared data storage area; this storage area may not have private partitions, and each controller can access the same physical memory address through the corresponding port, which can be used to store data.

[0027] The memory cache management unit can be used to maintain relevant information about shared data, such as the data state and data structure of the shared data.

[0028] The power-down protection module can be used to monitor the power supply status of the memory disk in real time. The memory channel driver circuit can be used to bridge the control chip and the global CXL shared memory disk array, providing a high-speed differential signal transmission channel.

[0029] The embodiments of this application provide a data management method, and the method is described in detail below in conjunction with the execution flow of the data management method.

[0030] Reference Figure 1 As shown, this data management method can be applied to the first controller in a data management system, and includes the following steps S11-S13.

[0031] S11: Write the first data to the cxl shared memory disk and asynchronously write the first data to the hard disk.

[0032] The data management method provided in this embodiment can be applied to a first controller in a data management system. This data management system may include multiple controllers, a CXL shared memory disk, and a hard disk. The multiple controllers can be connected to the CXL shared memory disk, and the multiple controllers can also be connected to the hard disk. In this embodiment, the CXL shared memory disk can be a memory disk, as detailed in the relevant content of the above implementation environment.

[0033] The controller in this embodiment can be an independent main control hardware, equipped with a Linux system (operating system) and cache management software, and has the capabilities of host IO (Input / Output Processing), CXL shared memory disk access, hard disk data read / write and / or fault switching control.

[0034] The following description uses the first controller among multiple controllers as an example to illustrate the data management process of each controller. The first controller can be any one of the multiple controllers. Specifically, the first controller can be configured with a first processing module, and the data management process executed by the first controller can be performed through this first processing module.

[0035] It should be noted that in a multi-controller configuration, each controller can be configured with a processing module. Furthermore, each controller can be configured with local memory for data caching.

[0036] In practice, the first controller may first acquire the first data. This first data may include data shared among multiple controllers; optionally, the first data may include globally shared cached data.

[0037] During the process of acquiring the first data, the first controller can acquire the first data carried in the write request if it receives a write request sent by the host.

[0038] Specifically, the controller may include a write cache module and local memory. The first controller may include a first write cache module and first local memory, and in this embodiment, it can be specifically applied to the first write cache module of the first controller.

[0039] In some cases, the first controller may be configured with a first local memory. After the first write cache module obtains the first data, it can store or cache the first data in the first local memory. This achieves local caching of the first data. In addition, since the first controller cannot directly write data to the CXL shared memory disk and / or hard disk, storing the first data in the first local memory allows the first data to be copied from the first local memory to the CXL shared memory disk and / or hard disk. Thus, storing the first data in the first local memory improves the efficiency of writing the first data to the CXL shared memory disk and / or hard disk.

[0040] Specifically, since the controller does not support writing single bytes or blocks of data directly to local memory, in the process of storing the first data into the first local memory, the first data can first be filled into the cache line and stored in the controller's cache, waiting to be flushed to the first local memory in batches.

[0041] After the first controller obtains the first data, it writes the first data to the CXL shared memory disk and asynchronously writes the first data to the hard disk.

[0042] Based on the obtained first data, the process involves two steps: firstly, writing the first data to the CXL shared memory disk to achieve global caching of the first data; and secondly, writing the first data to the hard disk to achieve persistent storage of the first data. In practice, the writing of the first data to the CXL shared memory disk and the writing of the first data to the hard disk can be performed asynchronously, eliminating the need to wait for the first data to be written to the CXL shared memory disk before writing it to the hard disk, thus improving data storage efficiency.

[0043] During the execution process, the first data written to the CXL shared memory disk can be marked with a data status. This data status can be used to indicate whether the data has been written to the hard disk. Therefore, by marking the data status, effective management of whether data is persisted to disk can be achieved. Specifically, since the first data has not yet been written to the hard disk when it is written to the CXL shared memory disk, it can be marked as a first status. This first status can be used to indicate that the first data has not yet been written to the hard disk.

[0044] The CXL shared memory disk in this embodiment includes a memory disk that stores or caches data that can be shared by multiple controllers; that is, a memory disk that performs global caching. Specifically, the CXL shared memory disk can provide multiple ports to connect to multiple controllers, thereby enabling multiple controllers to share the cached data in the CXL shared memory disk. For example, the CXL shared memory disk may include a dual-port CXL shared memory disk; a dual-port CXL shared memory disk can be connected to two controllers, specifically, it can be connected to a first controller through a first port and to a second controller through a second port.

[0045] It should be noted that the port can connect to the corresponding controller via the CXL protocol. In this case, the CXL shared memory disk can be a shared CXL memory.

[0046] The following sections provide detailed explanations of the processes of writing the first data to the CXL shared memory disk, marking the first data in the CXL shared memory disk as the first state, and asynchronously writing the first data to the hard disk.

[0047] S11-1, Write the first data to the cxl shared memory disk.

[0048] In practice, during the process of writing the first data to the cxl shared memory disk, the first data can be copied from the first local memory of the first controller to the shared cache through the copy function.

[0049] For example, the memcpy (memory copy) function is used to copy the first data in the first local memory of the first controller to the cxl shared memory disk.

[0050] During the process of storing the first data in the first local memory, the first data can be temporarily stored in the controller cache, awaiting batch flushing to the first local memory. In this case, during the process of writing the first data to the CXL shared memory disk, if only the first data in the first local memory is copied to the shared content, the data remaining in the controller cache will not be effectively stored, resulting in data loss. Based on this, in an optional implementation provided in this embodiment, the first sub-data can also be written to the CXL shared memory disk through a first system call. In this way, the complete first data is stored in the CXL shared memory disk. The first sub-data includes the data in the first data that remains in the controller cache and has not been stored in the first local memory.

[0051] Optionally, after the first data is written to the CXL shared memory disk, both the first local memory and the CXL shared memory disk store the first data.

[0052] In practice, when writing the first data to the CXL shared memory disk, the first data in the CXL shared memory disk can be marked as the first state.

[0053] In some cases, after writing the first data to the CXL shared memory disk, a storage response for the first data can be initiated. This allows the second controller to share the stored first data based on its connection to the CXL shared memory disk, eliminating the need to synchronize the first data from the first controller to the second controller. Writing the first data directly to the CXL shared memory disk effectively implements a global cache of the first data. Therefore, after writing the first data to the CXL shared memory disk, a storage response is initiated immediately, without waiting for the first data to be shared to the second controller, thus improving storage response efficiency. This storage response can be a global cache response.

[0054] After the first data is written to the cxl shared memory disk, the cxl shared memory disk can store the first data in the storage area corresponding to the first address.

[0055] S11-2, asynchronously write the first data to the hard disk.

[0056] In this embodiment, the hard disk can be a backend non-volatile persistent storage hardware used to store business data for a long time; the controller asynchronously flushes the first data to the hard disk, and the hard disk adopts an independent sector addressing mechanism and does not participate in the shared cache of multiple controllers.

[0057] In practice, while writing the first data to the CXL shared memory disk and marking the first data in the CXL shared memory disk as the first state, the first data can also be written to the hard disk asynchronously. In this way, by asynchronously executing the writing of the first data to the CXL shared memory disk and the implementation of writing to the hard disk, the efficiency of sharing and storing the first data to the disk is improved, without one party waiting for the other to finish before execution.

[0058] In one optional implementation of this embodiment, during the process of writing the first data to the hard disk, the first data in the first local memory can be written to the hard disk, thereby achieving effective writing of the first data to the hard disk.

[0059] S12, in response to the completion of writing the first data to the cxl shared memory disk, obtain the first pointer corresponding to the first controller and the first address of the first data in the cxl shared memory disk.

[0060] In specific implementation, a tree structure can be used for data storage in the CXL shared memory disk to index the data. In one optional implementation of this embodiment, after the first data is written to the CXL shared memory disk, in response to the completion of the writing of the first data to the CXL shared memory disk or hard disk, a first pointer corresponding to the first controller and the first address of the first data in the CXL shared memory disk are obtained. Optionally, the first pointer is obtained after pointer alignment among multiple controllers.

[0061] The first pointer corresponding to the first controller mentioned above includes the pointer corresponding to the first controller, which is used to address and locate the storage area corresponding to the overlapping address of the CXL shared memory disk with other controllers.

[0062] Optionally, the first pointer is obtained after aligning the initial pointers of multiple controllers. In this way, by aligning the initial pointers of multiple controllers, the pointers of each controller are obtained, making the pointers of each controller point to the same storage area in the CXL shared memory disk. The aforementioned first address can be obtained by the first controller from the CXL shared memory disk after the first data is stored in the storage area corresponding to the first address.

[0063] S13, based on the first pointer and the first address, obtain the first offset.

[0064] After obtaining the first pointer and the first address, a first offset is calculated based on the first pointer and the first address, and the first offset is stored in a data structure in the CXL shared memory disk. The first offset can be used by multiple controllers to address and locate the first data in the CXL shared memory disk.

[0065] The aforementioned first offset includes the address distance between the first address and the memory area address corresponding to the first pointer.

[0066] In the specific execution process, after the first data is written to the CXL shared memory disk, the first pointer corresponding to the first controller and the first address of the first data in the CXL shared memory disk are first obtained. Then, the distance between the first address and the first pointer is calculated as the first offset. Furthermore, the first offset can be stored in the data structure in the CXL shared memory disk so that each controller can locate the first data in the CXL shared memory disk according to the first offset in the data structure.

[0067] For example, the first pointer corresponding to the first controller is p1, the first address of the first data in the cxl shared memory disk is q1, q1-p1 is calculated as the first offset, and the first offset is stored in the data structure in the cxl shared memory disk.

[0068] To improve the effectiveness of managing data corresponding to different controllers, the data structure in this embodiment may include a tree structure. Specifically, the tree structure may include multiple subtrees, each corresponding to a controller, thereby achieving effective management of the data corresponding to each controller. Specifically, the subtree corresponding to each controller stores a first set of addresses for that controller. This set of addresses includes the addresses of the data stored by that controller in the CXL shared memory disk. For example, the subtree corresponding to the first controller stores the first set of addresses corresponding to the first controller.

[0069] Specifically, in the process of storing the first offset into the data structure in the cxl shared memory disk, the first offset can be stored in the root node of the tree structure in the cxl shared memory disk. The first offset can be used as a pointer to the data node corresponding to the first data in the first subtree.

[0070] Taking multiple controllers, including two controllers, as an example, the multiple controllers include a first controller and a second controller. The tree structure can be a B+ (Balanced Plus, multi-way balanced ordered search) tree. The first controller corresponds to the left subtree, and the second controller corresponds to the right subtree. The first address set corresponding to the first controller can be stored in the first subtree of the tree structure, and the second address set corresponding to the second controller can be stored in the second subtree of the tree structure.

[0071] If there are two controllers, the first controller corresponds to the left subtree, and q1-p1 is calculated as the first offset, then the first offset is added to the left node of the B+ tree.

[0072] When there are multiple controllers, including three controllers, and the tree structure is a B+ number, the first controller can correspond to the first subtree, the second controller to the second subtree, and the third controller to the third subtree. When there are multiple controllers including even more controllers, the specific partitioning logic is the same as described above; please refer to the relevant content above, and it will not be repeated here.

[0073] In practice, the first pointer can be obtained after aligning the initial pointers of multiple controllers. During execution, pointer alignment between multiple controllers can be performed based on the memory address set corresponding to each controller to obtain the pointers corresponding to each controller. Optionally, the aligned pointers of each controller point to the same storage area in the CXL shared memory disk.

[0074] The following uses two controllers (the first controller and the second controller) as an example to explain the pointer alignment process in detail.

[0075] In one optional implementation of this embodiment, a first memory address set corresponding to the first controller and a second memory address set corresponding to the second controller are first obtained. Based on the first and second memory address sets, pointer alignment between the first and second controllers is performed. Optionally, the first and second memory address sets can be allocated to the first and second controllers via a CXL shared memory disk. Specifically, the first and second pointers after pointer alignment can point to the same storage area in the CXL shared memory disk.

[0076] In the specific execution process, during the pointer alignment between the first controller and the second controller based on the first and second memory address sets, the first controller can first obtain a first overlapping address based on the first and second memory address sets, then obtain a first initial pointer, calculate a second offset based on the first initial pointer and the first overlapping address, and update the first initial pointer based on the second offset to obtain the first pointer corresponding to the first controller. The first initial pointer includes a pointer allocated to the first controller by the operating system that points to a first memory address in the CXL shared memory disk; the updated first pointer can be used by the first controller to access the storage area corresponding to the first overlapping address in the CXL shared memory disk.

[0077] Specifically, in the process of calculating the second offset based on the first initial pointer and the first overlapping address, the distance between the first overlapping address and the first memory address corresponding to the first initial pointer can be calculated as the second offset.

[0078] For example, the first memory address set is addresses 1-15, and the second memory address set is addresses 2-16. Based on the first and second memory address sets, the first overlapping address is determined to be address 2. The first initial pointer allocated by the operating system of the first controller to the first controller is p01, pointing to address 1. The second initial pointer allocated by the operating system of the second controller to the second controller is p02, pointing to address 2. In this case, given that the first overlapping address is address 2, the first controller determines that the distance between address 2 and the first initial pointer is +1, and can determine that the second offset is +1. Based on this second offset, the first initial pointer p01 is updated to obtain the first pointer p1 corresponding to the first controller, which is p01+1.

[0079] Given that q1 is address 14, we can determine that q1-p1=14-(p01+1)=13-p01, and extract 13 as the first offset.

[0080] Correspondingly, if the first overlapping address is determined to be address 2, and the second initial pointer allocated by the operating system of the second controller to the second controller is p02, which points to address 2, the second controller determines that the distance between address 2 and the second initial pointer is 0, then determines that the fourth offset is 0, and updates the second initial pointer p02 based on the fourth offset to obtain the second pointer p2=p02 corresponding to the second controller.

[0081] For example, such as Figure 2 The pointer diagram shown illustrates that the first pointer corresponding to controller 1 is p1, and the second pointer corresponding to controller 2 is p2. Both p1 and p2 are stored at the root of a tree structure in the CXL shared memory disk. This tree structure includes a left subtree and a right subtree, as well as a root node. Nodes in the left subtree can store data written by controller 1, and nodes in the right subtree can store data written by controller 2. Furthermore, the tree structure allows access to the corresponding data by storing the address of the data storage area and the pointer offset.

[0082] The above example of two controllers illustrates the pointer alignment process. In actual execution, if there are more than two controllers, the pointer alignment process is similar to the above-mentioned content and can be referred to. No further limitations are made here.

[0083] In this embodiment, by aligning the pointers of multiple controllers, even when the logical addresses (first initial pointers) of the controllers are different, the pointers of the multiple controllers are aligned to point to the same storage area in the CXL shared memory disk. Based on this, during the global caching of data, the offset of the stored data is used so that each controller can access the corresponding storage area based on the offset after pointer alignment, and then access the data from the storage area. That is, after pointer alignment, different controllers can access data through the same offset, realizing effective sharing of globally cached data in the CXL shared memory disk, improving the effectiveness of storage management, further improving the convenience of subsequent data access, and thus improving data access efficiency.

[0084] In practice, after receiving a read instruction carrying a target data identifier, the second controller obtains the target offset corresponding to the target data identifier from the CXL shared memory disk based on the read instruction, and determines the target storage area corresponding to the target data identifier based on the second pointer of the second controller and the target offset, and reads the target data corresponding to the target data identifier from the target storage area.

[0085] In addition to obtaining the first offset based on the first pointer corresponding to the first controller and the first address of the first data in the CXL shared memory disk in response to the completion of writing the first data to the hard disk, the first state in the CXL shared memory disk can also be updated to the second state in response to the completion of writing the first data to the hard disk. Optionally, the second state is used to mark that the first data has been written to the hard disk.

[0086] In practice, writing the first data to the CXL shared memory disk and writing it to the hard disk are performed in parallel. Therefore, the first data written to the CXL shared memory disk may not necessarily have been written to the hard disk. Based on this, when writing the first data to the CXL shared memory disk, the first data in the CXL shared memory disk can be marked as a first state, which is used to indicate that the first data has not been written to the hard disk. When the writing of the first data to the hard disk is detected to be complete, the first state in the CXL shared memory disk can be updated to a second state, so as to indicate that the first data has been written to the hard disk. In this way, by marking the data state of the first data in the CXL shared memory disk, multiple controllers can share whether the first data has been written to the hard disk through the data state in the CXL shared memory disk to achieve persistent storage and improve the shared awareness of the storage status of the first data.

[0087] In addition to persistent storage by marking whether the first data has been written to the hard disk through data status, the first data in the CXL shared memory disk can also be deleted when the write of the first data to the hard disk is detected to be complete, thereby freeing up the storage space in the CXL shared memory disk.

[0088] During execution, upon detecting the completion of the first data write to the hard drive, a disk write response for the first data can be initiated, thereby enhancing the awareness of data write-to-disk. Specifically, in response to the completion of the first data write to the hard drive, a disk write response for the first data can also be initiated.

[0089] In this embodiment, during the global caching process of the first controller among multiple controllers, the first data is written to the CXL shared memory disk. This enables global caching of the first data without interaction with other controllers, and other controllers can perceive the first data based on the CXL shared memory disk. The storage response for the first data is initiated immediately after writing it to the CXL shared memory disk, without waiting for the first data to be written to the hard disk, thus improving storage response efficiency. Furthermore, the first data is written to the hard disk asynchronously, without waiting for it to be written to the CXL shared memory disk, improving data persistence efficiency. During specific execution, data status marking whether the first data has been written to the hard disk can also be stored in the CXL shared memory disk, achieving effective management of data persistence. In this process, no interaction between controllers is required, and the data writing process can be implemented by executing a copy function, saving system overhead in the data management system's global caching process, thus improving global caching efficiency and reducing system overhead in the global cache.

[0090] The above provides a detailed explanation of data access. In this embodiment, in the event of a controller malfunction, other controllers can assist in writing the malfunctioning controller to the CXL shared memory disk, while data not yet written to the hard disk is written to the hard disk.

[0091] Taking a second controller malfunction as an example, when the first controller detects an malfunction or failure in the second controller, it retrieves second data from the CXL shared memory disk and writes it to the hard drive. In this way, the controller that is not malfunctioning assists the malfunctioning controller in writing data to disk, preventing the loss of data that the second controller needs to cache globally due to the malfunction. The second data may include data written by the second controller in a first state. By introducing the first state, when the first controller assists the malfunctioning second controller in writing data, it only writes the second data that the second controller has written to the CXL shared memory disk but not yet to the hard drive, avoiding the need to rewrite all the data written by the second controller to the CXL shared memory disk to the hard drive. This improves the efficiency of the write assistance and reduces redundant hard drive usage.

[0092] Specifically, in the process of retrieving the second data from the CXL shared memory disk, a third offset can be obtained from the data structure of the CXL shared memory disk based on the second data identifier. Then, based on the first pointer corresponding to the first controller and the third offset, the storage area of ​​the second data in the CXL shared memory disk is determined, and the second data is read from the storage area. Optionally, the third offset is the offset corresponding to the second data.

[0093] For example, when the first controller detects an anomaly in the second controller, it queries the data structure of the CXL shared memory disk for the second data identifier written by the second controller in the first state, obtains the third offset m corresponding to the second data identifier, obtains the first pointer p1 corresponding to the first controller, and obtains the memory address corresponding to the second data based on p1+m. Then, it reads the second data from the storage area corresponding to that memory address. Specifically, m can be 13. According to the calculation, p1+13=p0+14, where p0 corresponds to address 1 and p0+14 corresponds to address 14.

[0094] Specifically, in the process of writing the second data to the hard disk, the second data can first be stored in the first local memory, and then the second data in the first local memory can be written to the hard disk, thereby enabling the second data to be effectively written to the hard disk.

[0095] Similarly, if the first controller malfunctions, the second controller, upon detecting the malfunction or failure of the first controller, retrieves third data from the CXL shared memory disk and writes the third data to the hard disk. Thus, in the event of a first controller malfunction, the second controller assists the first controller in writing the third data (not yet written to the hard disk) from the CXL shared memory disk to the hard disk, achieving persistent storage of the first controller's data. Optionally, the third data may include data written by the first controller in the first state.

[0096] For example, such as Figure 3 The diagram illustrates the exception handling process. After controller 1 fails, controller 2 detects the failure and first obtains the third data identifier written by controller 1 in the first state from the root node of the tree structure of the CXL shared memory disk. Then, it obtains the offset from the child node corresponding to the third data identifier in the tree structure of the CXL shared memory disk, obtains the second pointer corresponding to the second controller, and determines the storage area of ​​the second data in the CXL shared memory disk based on the second pointer and the offset. The third data is then read from this storage area.

[0097] The data identifier of the first state written by controller 1 and obtained by controller 2 is the data identifier of the first data, i.e. the first data identifier. From the tree structure of the CXL shared memory disk, the first offset corresponding to the first data identifier is obtained as 13. The second pointer p2=p02 of the second controller is used. Based on the second pointer and the first offset, p2+13=p02+13 is calculated. The storage area corresponding to address 14 after offsetting 13 from address 2 can be determined. The first data in the storage area corresponding to address 14 can be obtained.

[0098] The above example, using a dual-port CXL shared memory disk, illustrates the process of a controller that is not experiencing an anomaly assisting an abnormal controller in writing data to disk. When there are two or more controllers, if one controller experiences an anomaly, any of the other controllers can assist the abnormal controller in writing data to disk. Alternatively, the controllers that are not experiencing anomalies can be sorted according to their controller metrics to obtain a controller list, and an auxiliary controller that assists the abnormal controller in writing data to disk can be determined from the controller list.

[0099] The aforementioned controller metrics can be at least one or more of the following: the number of controller resources, the current state of the controller, and the controller processing latency. In addition, other metrics that characterize the controller can also be used, which are not limited here.

[0100] In the specific execution process, if any controller is detected to be abnormal, at least one candidate controller is obtained, the controller indicators of each candidate controller are obtained, the at least one candidate controller is sorted based on the controller indicators to obtain a controller list, and the first candidate controller in the controller list is determined as the auxiliary controller.

[0101] Specifically, in the process of sorting at least one candidate controller based on controller metrics to obtain a list of controllers, at least one candidate controller can be sorted in descending order based on the sorting method corresponding to the controller metric to obtain a list of candidate controllers.

[0102] For example, if the controller metric is the number of controller resources, and the corresponding sorting method is descending order, then given the number of controller resources for each candidate controller, at least one candidate controller is sorted in descending order based on its controller resource count to obtain a candidate controller list. Furthermore, the first candidate controller in the candidate controller list can be designated as the auxiliary controller. Thus, the candidate controller with the largest number of controller resources among at least one candidate controller is identified as the auxiliary controller.

[0103] For example, if the controller metric is controller processing latency and the corresponding sorting method is ascending order, then after obtaining the controller processing latency of each candidate controller, at least one candidate controller is sorted in ascending order based on the controller processing latency of each candidate controller to obtain a candidate controller list. Furthermore, the first candidate controller in the candidate controller list can be determined as the auxiliary controller. In this way, the candidate controller with the shortest controller processing latency among at least one candidate controller is determined as the auxiliary controller.

[0104] For example, if the controller metric is the current state of the controller, and the corresponding sorting method is a filtering sorting method, then, given the current state of each candidate controller, candidate controllers whose current state is "working" are filtered out, and auxiliary controllers are determined from the filtered candidate controllers. Specifically, determining the auxiliary controller from the filtered candidate controllers can be done by randomly selecting any of the filtered candidate controllers, or by combining the number of controller resources and / or controller processing latency of the filtered candidate controllers. The specific implementation process of determining the auxiliary controller from the filtered candidate controllers by combining the number of controller resources and / or controller processing latency is similar to the above-mentioned related content, and will not be repeated here.

[0105] It should be noted that the current state of the controller can include abnormal state, working state, and running state; among them, abnormal state is used to characterize controller failure; working state is used to characterize that the controller has not failed and is not running any tasks; running state is used to characterize that the controller is running a task.

[0106] The data management method provided in this embodiment, involving multiple controllers, a shared CXL memory disk, and a hard disk, has two main aspects. First, multiple controllers are connected to the shared CXL memory disk. Based on this connection, each controller can write data to the shared CXL memory disk to achieve global data caching. Furthermore, each controller can also access the globally cached data through its connection to the shared CXL memory disk, enabling multiple controllers to share globally cached data without establishing connections between controllers, thus improving the convenience and efficiency of global caching and data sharing. Second, multiple controllers are connected to the hard disk. Based on this connection, each controller can write data to the hard disk to achieve persistent storage of shared data. Moreover, the processes of writing data to the shared CXL memory disk and writing data to the hard disk can be executed asynchronously, thereby improving the efficiency of shared storage and data persistence.

[0107] With multiple controllers in existence, pointer alignment can be performed on these controllers so that their pointers point to the same storage location on the CXL shared memory disk. This allows multiple controllers to access data based on the same address, improving the convenience of data address storage and eliminating the need for different address configurations on different controllers for data in the same global cache. Based on the pointer alignment of multiple controllers, the offset of any data can be stored. Each controller can then determine the storage area of ​​the data based on its corresponding pointer and the offset, thereby improving the convenience and efficiency of data access.

[0108] In the event of a failure of any one of the multiple controllers, the other controllers can assist the failed controller in writing data to disk. Specifically, if the second controller detects a failure of the first controller, the second controller can write the data that the first controller has written to the CXL shared memory disk but has not yet been written to the hard disk to the hard disk. This prevents the data in the global cache from not being written to disk due to the failure of the first controller, which could lead to data loss.

[0109] The following example illustrates the application of a data management method provided in an embodiment of this application in a dual-control data management scenario. Figure 4 and Figure 5 The data management method provided in the embodiments of this application will be further described below, with reference to... Figure 4 As shown, the data management method applied to the dual-controller data management scenario can be executed by the first controller in the first controller and the second controller, and specifically includes the following steps.

[0110] S401, Obtain the first data.

[0111] S402 writes the first data into the first local memory.

[0112] S403 uses the copy function to copy the first data from the first local memory to the cxl shared memory disk.

[0113] S404 marks the first data in the cxl shared memory disk as the first state.

[0114] S405, after detecting that the first data has been written to the cxl shared memory disk, performs a shared storage response for the first data.

[0115] S406, in response to the completion of writing the first data to the CXL shared memory disk, obtain the first pointer corresponding to the first controller and the first address of the first data in the CXL shared memory disk.

[0116] S407, based on the first pointer and the first address, obtain the first offset.

[0117] S408 stores the first offset into a data structure in the cxl shared memory disk.

[0118] S409 asynchronously writes the first data from the first local memory to the hard disk.

[0119] S410, after detecting that the first data has been written to the hard disk, performs the first data write-to-disk response.

[0120] S411 updates the first state of the first data in the cxl shared memory disk to the second state.

[0121] It should be noted that steps S403 to S408 and steps S409 to S411 can be executed in parallel.

[0122] like Figure 5As shown, the system includes a first controller and a second controller, which are respectively connected to a CXL shared memory disk and a hard disk. The first controller includes a first write cache module and a first local memory, and the second controller includes a second write cache module and a second local memory. After receiving a write request from the host, the first controller's write cache module retrieves the first data from the write request and writes it to the first local memory. Then, it copies the first data from the first local memory to the CXL shared memory disk using a copy function. During the copying process, the first data on the CXL shared memory disk can be marked as a first state. After the copying of the first data to the CXL shared memory disk is completed, a shared storage response for the first data is initiated. In addition, the first data can be asynchronously flushed from the first local memory to the hard disk. After the first data is flushed to the hard disk, a disk write response is initiated, and the first state of the first data in the CXL shared memory disk is updated to a second state.

[0123] It should be noted that the above explanation uses the first controller as an example. Any controller in the data management system can execute the above process. Please refer to the relevant content above for details, which will not be repeated here.

[0124] It should also be noted that any one or more of steps S401 to S411 can be combined with any one or more of steps S11 to S13 to form a new implementation method according to the needs of implementation and deployment. In addition, according to the actual deployment needs, any one or more technical features can be selected in steps S401 to S411 and combined with any one or more technical features provided in steps S11 to S13 to form a new implementation method. Alternatively, any one or more technical features in steps S401 to S411 can be replaced with any one or more technical features provided in steps S11 to S13 to form a new implementation method according to the actual deployment needs. These will not be elaborated on here.

[0125] The following provides a detailed description of the indicator alignment process in the embodiments of this application, with reference to... Figure 6 The indicator alignment process, which can be applied to the first controller among multiple controllers, specifically includes the following steps.

[0126] S61, obtain the memory address set corresponding to each controller.

[0127] S62 determines the overlapping addresses of multiple controllers based on the memory address sets corresponding to each controller.

[0128] S63, obtain the first initial pointer corresponding to the first controller.

[0129] S64, based on the offset of the overlapping address relative to the address corresponding to the first initial pointer.

[0130] S65, based on the offset, updates the first initial pointer to obtain the first pointer corresponding to the first controller.

[0131] It should be noted that during the pointer alignment process, the overlapping address referenced by each controller is the same, which is the overlapping address obtained in S62 above. Different controllers can update their own initial pointers based on this overlapping address, thereby achieving the effect of pointer alignment of multiple controllers, so that after the pointers of multiple controllers are aligned, the pointers of each controller point to the overlapping address.

[0132] It should also be noted that any one or more of steps S61 to S65 can be combined with any one or more of steps S11 to S13 to form a new implementation method according to the needs of implementation and deployment. In addition, according to the actual deployment needs, any one or more technical features can be selected in steps S61 to S65 and combined with any one or more technical features provided in steps S11 to S13 to form a new implementation method.

[0133] The fault handling process in the embodiments of this application is described in detail below, with reference to Figure 7 The fault handling process can be applied to the first controller among multiple controllers, and specifically includes the following steps.

[0134] S71, when detecting an anomaly in the second controller, retrieves the offset of the second data from the cxl shared memory disk.

[0135] S72 determines the storage area of ​​the second data in the cxl shared memory disk based on the offset of the first pointer and the second data corresponding to the first controller.

[0136] S73, reads the second data from the storage area.

[0137] S74 stores the second data in the first local memory.

[0138] S75 writes the first data from the first local memory to the hard disk.

[0139] S76, after detecting that the first data has been written to the hard disk, performs the first data write-to-disk response.

[0140] S77 updates the first state of the first data in the cxl shared memory disk to the second state.

[0141] It should be noted that any one or more of steps S71 to S77 can be combined with any one or more of steps S11 to S13 to form a new implementation method according to the needs of implementation and deployment. In addition, according to the actual deployment needs, any one or more technical features can be selected in steps S71 to S77 and combined with any one or more technical features provided in steps S11 to S13 to form a new implementation method.

[0142] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0143] Embodiments of this application also provide a data management system. Figure 8 A schematic diagram of the structure of a data management system 800 provided for an embodiment of this application is shown below. Figure 8 As shown, the system in this embodiment includes: multiple controllers 81, a shared memory disk 82, and a hard disk 83.

[0144] Among them, multiple controllers are connected to the shared memory disk of CXL, and multiple controllers are connected to the hard disk.

[0145] Any one of the multiple controllers in this data management system can execute the steps in any of the above-described data management method embodiments.

[0146] For a description of the features in the embodiments corresponding to the data management system, please refer to the relevant descriptions in the embodiments corresponding to the data management method, which will not be repeated here.

[0147] Embodiments of this application also provide a data management device. Figure 9 A schematic diagram of the structure of a data management device 900 provided for an embodiment of this application is shown below. Figure 9 As shown, the device 900 of this embodiment can operate on a first controller in a data management system. The data management system includes multiple controllers, a CXL shared memory disk, and a hard disk; the multiple controllers are respectively connected to the CXL shared memory disk and to the hard disk; the first controller is any one of the multiple controllers; the device includes: The write module 910 is used to write the first data to the cxl shared memory disk and asynchronously write the first data to the hard disk; the first data includes data shared among the plurality of controllers; The acquisition module 920 is used to acquire, in response to the completion of the writing of the first data to the cxl shared memory disk, a first pointer corresponding to the first controller and a first address of the first data in the cxl shared memory disk; the first pointer is obtained after pointer alignment of the plurality of controllers; The offset determination module 930 is used to obtain a first offset based on the first pointer and the first address; the first offset is used by the plurality of controllers to address and locate the first data in the cxl shared memory disk.

[0148] As an optional implementation of this application, the device is further configured to: store the first offset into a data structure in the cxl shared memory disk.

[0149] As an optional implementation of this application, the data structure includes a tree structure; the subtrees in the tree structure correspond one-to-one with the controllers; the subtree corresponding to the first controller is used to store the first address set corresponding to the first controller.

[0150] As an optional implementation of this application, the CXL shared memory disk includes a dual-port CXL shared memory disk.

[0151] As an optional implementation of this application, the device is further configured to: obtain a first memory address set corresponding to the first controller and a second memory address set corresponding to the second controller; pre-allocate the first memory address set and the second memory address set to the first controller and the second controller; and perform pointer alignment between the first controller and the second controller based on the first memory address set and the second memory address set.

[0152] As an optional implementation of this application, when the device performs pointer alignment between the first controller and the second controller based on the first memory address set and the second memory address set, it is specifically used to: obtain a first overlapping address based on the first memory address set and the second memory address set; obtain a first initial pointer; calculate a second offset based on the first initial pointer and the first overlapping address; update the first initial pointer based on the second offset to obtain the first pointer corresponding to the first controller; the first pointer is used by the first controller to access the storage area corresponding to the first overlapping address in the cxl shared memory disk.

[0153] As an optional implementation of this application, after the pointers are aligned, the first pointer corresponding to the first controller and the second pointer corresponding to the second controller point to the same storage area in the cxl shared memory disk.

[0154] As an optional implementation of this application, the device is further configured to: in response to writing the first data to the CXL shared memory disk, mark the first data in the CXL shared memory disk as a first state; the first state is used to mark that the first data has not been written to the hard disk; in response to the completion of writing the first data to the hard disk, update the first state in the CXL shared memory disk to a second state; the second state is used to mark that the first data has been written to the hard disk.

[0155] As an optional implementation of this application, the device is further configured to: obtain second data from the cxl shared memory disk when an anomaly of the second controller is detected; the second data includes data written by the second controller and whose data status is a first status; the second controller is any controller other than the first controller among the plurality of controllers; and write the second data to the hard disk.

[0156] As an optional implementation of this application, the device is specifically used to: store the second data in a first local memory; and write the second data in the first local memory to the hard disk.

[0157] As an optional implementation of this application, the device, when obtaining the second data from the CXL shared memory disk, is specifically configured to: obtain a third offset from the data structure of the CXL shared memory disk based on the second data identifier; the third offset is the offset corresponding to the second data; determine the storage area of ​​the second data in the CXL shared memory disk based on the first pointer corresponding to the first controller and the third offset; and read the second data from the storage area.

[0158] As an optional implementation of this application, the first controller is configured with a first local memory; the device is further configured to: store the first data in the first local memory.

[0159] As an optional implementation of this application, the writing module 910 is specifically used to: copy the first data from the first local memory of the first controller to the cxl shared memory disk by means of a copy function.

[0160] As an optional implementation of this application, the device is further configured to: write first sub-data to the cxl shared memory disk via a first system call; the first sub-data includes data in the first data that is retained in the controller cache and not stored in the first local memory.

[0161] As an optional implementation of this application, after writing the first data to the cxl shared memory disk, the writing module 910 is further used to perform a storage response for the first data.

[0162] For a description of the features in the embodiment corresponding to the data management device, please refer to the relevant description in the embodiment corresponding to the data management method, which will not be repeated here.

[0163] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above-described data management method embodiments.

[0164] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described data management method embodiments when it is run.

[0165] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0166] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described data management method embodiments.

[0167] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described data management method embodiments.

[0168] Any of the components, modules, units, parts, methods, and operations described herein can be implemented using software, firmware, hardware (e.g., fixed logic circuitry), manual processing, or any combination thereof. Alternatively or additionally, any functionality described herein can be executed at least in part by one or more hardware logic components, such as, but not limited to, a central processing unit (CPU), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), an application-specific standard product (ASSP), a system-on-a-chip (SoC), a complex programmable logic device (CPLD), a microprocessor (MCU), etc. The terms "system," "computing device," or "apparatus" as used herein encompass various means, devices, and machines for processing data, including, for example, one or more programmable processors, computers, SoCs, or combinations thereof. The apparatus may also include code that creates an execution environment for the computer program in question, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime environment, a virtual machine, or one or more combinations thereof. The aforementioned computer program (also known as a program, software, software application, app, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and can be deployed in any form, including as a standalone program or as a module, component, subroutine, object, or other unit suitable for a computing environment.

[0169] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0170] The data management method, system, apparatus, device, and storage medium provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A data management method, characterized in that, A first controller is applied in a data management system, the data management system including multiple controllers, which compute fast connections to a CXL shared memory disk and a hard disk; the multiple controllers are connected to the CXL shared memory disk and the multiple controllers are connected to the hard disk; The first controller is any one of the plurality of controllers; the method includes: The first data is written to the cxl shared memory disk and asynchronously written to the hard disk; the first data includes data shared among the plurality of controllers; In response to the completion of writing the first data to the cxl shared memory disk, a first pointer corresponding to the first controller and a first address of the first data in the cxl shared memory disk are obtained; the first pointer is obtained after pointer alignment of the plurality of controllers; Based on the first pointer and the first address, a first offset is obtained; the first offset is used by the plurality of controllers to address and locate the first data in the cxl shared memory disk.

2. The data management method according to claim 1, characterized in that, The method further includes: The first offset is stored in the data structure of the cxl shared memory disk.

3. The data management method according to claim 2, characterized in that, The data structure includes a tree structure; each subtree in the tree structure corresponds one-to-one with a controller. The subtree corresponding to the first controller is used to store the first address set corresponding to the first controller.

4. The data management method according to claim 1, characterized in that, The CXL shared memory disk includes a dual-port CXL shared memory disk.

5. The data management method according to claim 1, characterized in that, The method further includes: Obtain the first memory address set corresponding to the first controller and the second memory address set corresponding to the second controller; the first memory address set and the second memory address set are pre-allocated to the first controller and the second controller; Based on the first memory address set and the second memory address set, pointer alignment is performed between the first controller and the second controller.

6. The data management method according to claim 5, characterized in that, The step of performing pointer alignment between the first controller and the second controller based on the first memory address set and the second memory address set includes: Based on the first memory address set and the second memory address set, obtain the first overlapping address; Obtain the first initial pointer, and calculate the second offset based on the first initial pointer and the first overlapping address; Based on the second offset, the first initial pointer is updated to obtain the first pointer corresponding to the first controller; the first pointer is used by the first controller to access the storage area corresponding to the first overlapping address in the cxl shared memory disk.

7. The data management method according to claim 5 or 6, characterized in that, After the pointers are aligned, the first pointer corresponding to the first controller and the second pointer corresponding to the second controller point to the same storage area in the cxl shared memory disk.

8. The data management method according to claim 1, characterized in that, The method further includes: In response to writing the first data to the cxl shared memory disk, the first data in the cxl shared memory disk is marked as a first state; the first state is used to indicate that the first data has not been written to the hard disk. In response to the completion of writing the first data to the hard disk, the first state in the cxl shared memory disk is updated to the second state; the second state is used to mark that the first data has been written to the hard disk.

9. The data management method according to claim 1 or 8, characterized in that, The method further includes: When an anomaly is detected in the second controller, second data is obtained from the cxl shared memory disk; the second data includes data written by the second controller and whose data status is in the first state; the second controller is any controller other than the first controller among the plurality of controllers; Write the second data to the hard disk.

10. The data management method according to claim 9, characterized in that, The step of writing the second data to the hard disk includes: The second data is stored in the first local memory; Write the second data from the first local memory to the hard disk.

11. The data management method according to claim 9, characterized in that, The step of obtaining the second data from the cxl shared memory disk includes: Based on the second data identifier, a third offset is obtained from the data structure of the cxl shared memory disk; the third offset is the offset corresponding to the second data. Based on the first pointer corresponding to the first controller and the third offset, the storage area of ​​the second data in the cxl shared memory disk is determined; Read the second data from the storage area.

12. The data management method according to claim 1, characterized in that, The first controller is configured with a first local memory; the method further includes: The first data is stored in the first local memory.

13. The data management method according to claim 1 or 12, characterized in that, The step of writing the first data to the cxl shared memory disk includes: The first data is copied from the first local memory of the first controller to the cxl shared memory disk using the copy function.

14. The data management method according to claim 13, characterized in that, The method further includes: The first sub-data is written to the cxl shared memory disk via the first system call; the first sub-data includes data in the first data that is retained in the controller cache and not stored in the first local memory.

15. The data management method according to claim 1, characterized in that, After the operation of writing the first data to the cxl shared memory disk is executed, the method further includes: Perform the storage response for the first data.

16. A data management system, characterized in that, The system includes: multiple controllers, a CXL shared memory disk, and a hard disk; the multiple controllers are connected to the CXL shared memory disk, and the multiple controllers are also connected to the hard disk; Any one of the plurality of controllers is configured to implement the steps of the data management method as described in any one of claims 1 to 15.

17. A data management device, characterized in that, A first controller operates within a data management system, which includes multiple controllers that compute fast connections to a CXL shared memory disk and a hard disk; the multiple controllers are connected to the CXL shared memory disk and the hard disk. The first controller is any one of the plurality of controllers; the device includes: A write module is used to write first data to the cxl shared memory disk and asynchronously write the first data to the hard disk; the first data includes data shared among the plurality of controllers; The acquisition module is configured to, in response to the completion of writing the first data to the cxl shared memory disk, acquire a first pointer corresponding to the first controller and a first address of the first data in the cxl shared memory disk; the first pointer is obtained after pointer alignment of the plurality of controllers; The offset determination module is used to obtain a first offset based on the first pointer and the first address; the first offset is used by the plurality of controllers to address and locate the first data in the cxl shared memory disk.

18. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the data management method as described in any one of claims 1 to 15.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the data management method as described in any one of claims 1 to 15.

20. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the data management method as described in any one of claims 1 to 15.

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