A limited precision hardware binary encoding executability evaluation and adjustment method and system

Abstract

The application discloses a limited precision hardware binary encoding executability evaluation and adjustment method and system, comprising: obtaining a constraint optimization problem containing a first type of constraint with homogeneous coefficient structure and a second type of constraint with heterogeneous coefficient structure, performing binary encoding on decision variables according to encoding parameters, constructing a target function and a constraint into a binary optimization model to obtain an encoded coefficient matrix; calculating a dynamic range requirement in a target hardware fixed-point representation format and expressing the dynamic range requirement as a function of the encoding parameters; dividing an encoding parameter space into an executable region, a critical region and an inexecutable region by comparing the dynamic range requirement with a target hardware fixed-point representation bit width, and performing direct mapping, precision adaptation or multi-level encoding adjustment respectively. The application can quantitatively evaluate hardware executability of an encoding scheme before deployment, reduce trial and error and deployment failure, and improve deployment efficiency.

Description

Technical Field

[0001] This invention relates to the field of finite precision hardware coding technology, and to a method and system for evaluating and adjusting the executability of finite precision hardware binary coding. Background Technology

[0002] With the rapid development of quantum heuristic optimization hardware (including coherent Ising machines, quantum annealers, and memristor-based in-memory computation solvers), an increasing number of constrained optimization problems are being transformed into binary optimization models (such as quadratic unconstrained binary optimization (QUBO) models) and deployed on such hardware for solving. In fields such as power system dispatching, logistics route planning, and communication network resource allocation, this "encode-deploy" paradigm has demonstrated a significant speed advantage. However, existing encoding and deployment processes generally employ an open-loop approach of encoding first, then deploying, and finally verifying. Specifically, continuous decision variables are discretized into binary variables using one-hot encoding, and physical constraints are embedded into the objective function through a penalty function. The resulting binary optimization model is then directly submitted to the target hardware for execution. This approach implicitly assumes that as long as the original optimization problem is feasible, it can be faithfully executed on the hardware after encoding. This assumption often fails under finite-precision hardware conditions. When different types of constraints (such as normalization constraints with homogeneous coefficient structures and physical coupling constraints with heterogeneous coefficient structures) are combined into the same binary optimization model, heterogeneous constraint coupling can lead to coefficient diffusion, causing the dynamic range requirement of the model under the target hardware fixed-point representation to increase with the discretization cardinality. When this requirement exceeds the bit width of the target hardware fixed-point representation, even if the original discretization instance is perfectly feasible under exact arithmetic, constraint integrity will be lost after hardware execution.

[0003] Chinese invention patent application CN117742678A proposes a method for constructing a Boolean algebra system for Ising perception computers. This method uses techniques such as NOT gate fusion, chain reduction, tree reduction, and computational intensity reduction to compress the dynamic range of interactions after the Boolean constraint encoding is expanded, thus adapting to the finite precision constraints of the Ising machine. However, this method is a passive "post-encoding optimization" approach: its dynamic range compression operation can only be performed after the complete binary optimization model is generated, making it impossible to predict whether the encoding scheme will lead to a loss of constraint integrity during the encoding parameter selection stage. Furthermore, this method only provides a single algebraic simplification optimization path, lacking a classification and evaluation mechanism for the encoding parameter space and multi-level adjustment capabilities. In scenarios where heterogeneous constraint coupling leads to significant coefficient diffusion, its optimization effect is limited.

[0004] Chinese invention patent application CN122220653A proposes a method for compiling integer linear programming on a quantum Ising machine based on a multi-column adder. This method reduces the number of qubits and the bit width of coefficients by using a constrained multi-column adder architecture to address the issue of compilation results exceeding the allowable range of the Ising machine. However, this method is a bit-width compression at the hardware circuit level. Its technical approach is to passively adapt to hardware constraints by redesigning the adder structure, rather than actively evaluating the hardware executability of the encoding scheme at the encoding algorithm level. Furthermore, this method also lacks a classification and evaluation mechanism for the encoding parameter space, failing to automatically trigger corresponding adjustment strategies based on different value regions of the encoding parameters.

[0005] Currently, no existing technology can assess the feasibility of a binary encoding scheme on target finite-precision hardware before deployment. Engineering practice necessitates a trial-and-error approach, leading to wasted computational resources and deployment failures. In existing encoding deployment processes, penalty weight adjustments affect the energy level after encoding is determined, annealing parameter adjustments affect the hardware operation, and post-processing affects the hardware output; none of these operations incorporate the discretized cardinality. The encoding structure itself serves as an evaluable and selectable representation object before deployment. Summary of the Invention

[0006] The purpose of this invention is to address the aforementioned shortcomings of existing finite-precision hardware coding techniques by providing a method and system for evaluating and adjusting the executability of finite-precision hardware binary coding. This method can quantitatively evaluate the hardware executability of a coding scheme before deployment and automatically adjust the coding strategy when it is not feasible.

[0007] To achieve the above objectives, the present invention provides a method for evaluating and adjusting the executability of finite-precision hardware binary encoding, comprising: A constrained optimization problem is obtained, which includes first-class constraints with homogeneous coefficient structures and second-class constraints with heterogeneous coefficient structures. The decision variables of the constrained optimization problem are binary-coded according to the coding parameters. The objective function and constraints are uniformly constructed into a binary optimization model to obtain the coded coefficient matrix. The dynamic range requirement under the target hardware fixed-point representation format is calculated based on the coding coefficient matrix and expressed as a function of the coding parameters. The dynamic range requirement characterizes the amplitude span of the non-zero coefficients in the coding coefficient matrix. Compare the dynamic range requirement with the target hardware fixed-point representation bit width, and divide the encoding parameter space into executable region, critical region and non-executable region based on the comparison result; The encoding deployment strategy is executed based on the region where the current encoding parameters are located: the binary optimization model determined by the encoding parameters corresponding to the executable region is mapped to the target hardware for execution; the binary optimization model determined by the encoding parameters corresponding to the critical region is mapped to the target hardware for execution after accuracy adaptation; for the encoding parameters corresponding to the non-executable region, the multi-level encoding adjustment strategy is used to adjust them, and the region where the adjusted encoding parameters are located is re-determined, and the encoding deployment strategy continues to be executed.

[0008] As a further improvement to the above technical solution, the encoding parameters include the discretization radix. Encoding method; setting multiple encoding parameter combinations, wherein the multiple encoding parameter combinations are discretization bases. Different encoding methods or combinations thereof are used to distinguish between them; the decision variables of the constrained optimization problem are binary encoded according to each combination of encoding parameters to form a set of candidate binary encoding schemes corresponding to each combination of encoding parameters; the region where each combination of encoding parameters is located is determined, and before submitting to the target hardware for execution, the candidate binary encoding scheme corresponding to the combination of encoding parameters in the executable region or critical region is selected.

[0009] As a further improvement to the above technical solution, the calculation steps for the dynamic range requirement include: when the coding coefficient matrix adopts an upper triangular storage format, performing a consistency check on the coefficient conventions used in the construction and use of the coding coefficient matrix; from the coding coefficient matrix... Extract the absolute value of the largest non-zero coefficient and the absolute value of the smallest non-zero coefficient and in accordance with Calculate the dynamic range requirement, where the unit of the dynamic range requirement is bits.

[0010] As a further improvement to the above technical solution, the dynamic range requirement is related to the discretization cardinality in the encoding parameters. The function is ,in, This represents the configuration parameters, which consist of the combination of penalty weights, the encoding structure, and the mapping rules from QUBO to the Ising model. This refers to the configuration conditional offset constant obtained by selecting multiple representative discretization bases, determining the corresponding dynamic range requirements, and performing fixed slope fitting under the aforementioned configuration parameters.

[0011] As a further improvement to the above technical solution, the executable region satisfies The critical region satisfies The non-executable region satisfies ,in, This indicates the target hardware fixed-point representation bit width. This represents the safety margin preset based on the quantization accuracy and constraint tolerance requirements of the target hardware; the critical discretization cardinality corresponding to the boundary between the critical region and the non-executable region. .

[0012] As a further improvement to the above technical solution, the precision adaptation includes: determining a scaling factor based on the ratio of the maximum absolute value of the coefficients that the target hardware can represent to the maximum absolute value of the non-zero coefficients of the coding coefficient matrix; scaling the coefficients in the coding coefficient matrix proportionally according to the scaling factor and quantizing them to the nearest value that the target hardware can represent, to obtain a quantized coding coefficient matrix; performing non-zero coefficient retention verification and minimum effective coefficient check on the quantized coding coefficient matrix; when all non-zero coefficients in the coding coefficient matrix are retained after quantization and the absolute value of the minimum non-zero coefficient after quantization is not less than the minimum non-zero value that the target hardware can represent, mapping the quantized coding coefficient matrix to the target hardware for execution; otherwise, adjusting the coding parameters according to the multi-level coding adjustment strategy.

[0013] As a further improvement to the above technical solution, the multi-level coding adjustment strategy includes: implementing a first-level adjustment strategy for coding parameters that use one-hot coding and are located in non-executable regions, thereby gradually reducing the discretization cardinality. And after each reduction, the region containing the adjusted coding parameters is redefined; when the discretization cardinality is reduced... The discretization accuracy requirement is not met, or the discretization cardinality is insufficient. When the value has been reduced to the minimum that has practical discretization significance and the adjusted encoding parameters are still in the non-executable region, the second-level adjustment strategy is executed, the encoding method is switched from one-hot encoding to binary encoding, and the region where the adjusted encoding parameters are located is redefined.

[0014] As a further improvement to the above technical solution, when the encoding parameters after executing the second-level adjustment strategy are still located in the non-executable region, a third-level adjustment strategy is executed. The third-level adjustment strategy includes: decoupling the second type of constraint from the binary optimization master problem, decomposing the constraint optimization problem into multiple sub-problems using the Lagrange relaxation method or the alternating direction multiplier method, each sub-problem including the first type of constraint and local terms of the objective function, and introducing the second type of constraint into the iterative process through Lagrange multipliers or augmented Lagrange terms; in each iteration, each sub-problem is independently binary encoded, and the corresponding encoding deployment strategy is executed according to the region where the encoding parameters of each sub-problem are located, and the Lagrange multipliers are updated according to the sub-problem solution results output by the target hardware, until the duality gap and constraint violation amount meet the preset conditions, or the preset maximum number of iterations is reached.

[0015] As a further improvement to the above technical solution, the output of the encoding deployment strategy includes a quantized encoding coefficient matrix and hardware configuration parameters. The coefficients in the quantized encoding coefficient matrix adopt the target hardware fixed-point representation format, and the hardware configuration parameters include the target hardware fixed-point representation bit width, scaling factor, encoding method, and discretization radix. ; When the multi-level encoding adjustment strategy fails to bring the encoding parameters into the executable or critical region, the target output hardware bit width is selected based on whether a safety margin is taken into account: if no safety margin is taken into account, the minimum output bit width is selected. Recommended output bit width when taking safety margin into account. .

[0016] The present invention also provides a finite-precision hardware binary code executability evaluation and adjustment system, comprising: The binary encoding module is used to obtain a constrained optimization problem containing first-type constraints with homogeneous coefficient structures and second-type constraints with heterogeneous coefficient structures. The decision variables of the constrained optimization problem are binary encoded according to the encoding parameters, and the objective function and constraints are uniformly constructed into a binary optimization model to obtain the encoded coefficient matrix. The dynamic range calculation module is used to calculate the dynamic range requirement under the target hardware fixed-point representation format based on the coding coefficient matrix, and express it as a function of the coding parameters. The dynamic range requirement characterizes the amplitude span of the non-zero coefficients in the coding coefficient matrix. The parameter space partitioning module is used to compare the dynamic range requirement with the target hardware fixed-point representation bit width, and divide the encoding parameter space into an executable region, a critical region and a non-executable region according to the comparison result. The encoding deployment module is used to execute an encoding deployment strategy based on the region where the current encoding parameters are located: mapping the binary optimization model determined by the encoding parameters corresponding to the executable region to the target hardware for execution; mapping the binary optimization model determined by the encoding parameters corresponding to the critical region to the target hardware for execution after accuracy adaptation; for the encoding parameters corresponding to the non-executable region, adjusting them according to a multi-level encoding adjustment strategy, and feeding the adjusted encoding parameters back to the binary encoding module, which then reconstructs the binary optimization model, the dynamic range calculation module recalculates the dynamic range requirements, and the parameter space partitioning module redetermines the region where the adjusted encoding parameters are located, and continues to execute the encoding deployment strategy.

[0017] The beneficial effects of the finite-precision hardware binary encoding executability evaluation and adjustment method and system provided by this invention are as follows: (1) The present invention can quantitatively evaluate the feasibility of the binary encoding scheme on the target finite precision hardware before deployment, avoiding the blind trial and error method of deploying first and then verifying, saving computing resources and improving the deployment success rate.

[0018] (2) This invention expresses the dynamic range requirement as a function of encoded parameters through a parameterized model, making the evaluation process computable and repeatable, and applicable to constraint optimization problems of different scales and types.

[0019] (3) The present invention divides the coding parameter space into executable region, critical region and non-executable region, providing a clear classification basis for engineering decision-making and avoiding misjudgment that may be caused by simple binary judgment.

[0020] (4) When the determination result is that the code is not executable, the present invention provides a multi-level coding adjustment strategy, which can automatically find alternative coding schemes that meet hardware constraints and form a complete evaluation-adjustment closed loop.

[0021] (5) The method of the present invention is applicable to a variety of finite precision optimization hardware, including coherent Ising machines, quantum annealers, in-memory computation solvers, etc., and has broad hardware compatibility. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the finite-precision hardware binary encoding executability evaluation and adjustment method in an embodiment of the present invention; Figure 2 This is a structural diagram of the finite-precision hardware binary encoding executability evaluation and adjustment system module in an embodiment of the present invention; Figure 3 This is an overall flowchart of the finite-precision hardware binary encoding executability evaluation and adjustment method in this embodiment of the invention; Figure 4 This is a schematic diagram of the coefficient distribution of the two types of constraints in the coding coefficient matrix in an embodiment of the present invention; Figure 5 This is a schematic diagram of the executable region division of the encoding parameter space in an embodiment of the present invention; Figure 6 This is a flowchart illustrating the operation of the multi-level coding adjustment strategy in an embodiment of the present invention. Figure 7 This is a diagram illustrating the implementation effect of the method in the power system dispatching scenario in this embodiment of the invention. Detailed Implementation

[0023] The present invention will now be clearly and completely described in conjunction with embodiments thereof. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are all within the protection scope of the present invention.

[0024] Example 1 like Figure 1As shown, this embodiment provides a method for evaluating and adjusting the executability of finite-precision hardware binary encoding, including the following steps: Step S1: Obtain a constraint optimization problem containing first-class constraints with homogeneous coefficient structures and second-class constraints with heterogeneous coefficient structures. Binarily encode the decision variables of the constraint optimization problem according to the encoding parameters, and construct the objective function and constraints into a unified binary optimization model to obtain the encoded coefficient matrix.

[0025] Step S2: Calculate the dynamic range requirement under the target hardware fixed-point representation format based on the coding coefficient matrix, and express it as a function of the coding parameters. The dynamic range requirement characterizes the amplitude span of the non-zero coefficients in the coding coefficient matrix.

[0026] Step S3: Compare the dynamic range requirement with the target hardware fixed-point representation bit width, and divide the encoding parameter space into executable region, critical region and non-executable region according to the comparison result.

[0027] Step S4: Execute the encoding deployment strategy according to the region where the current encoding parameters are located: map the binary optimization model determined by the encoding parameters corresponding to the executable region to the target hardware for execution; map the binary optimization model determined by the encoding parameters corresponding to the critical region to the target hardware for execution after accuracy adaptation; for the encoding parameters corresponding to the non-executable region, adjust them according to the multi-level encoding adjustment strategy, and redetermine the region where the adjusted encoding parameters are located, and continue to execute the encoding deployment strategy.

[0028] The above steps S2 and S3 constitute the precision compatibility screening before deployment. Precision compatibility refers to the degree of matching between the dynamic range requirement of the coding coefficients and the fixed-point representation capability of the target hardware. This screening is completed based on the coding coefficient matrix determined by the coding parameters, without the need to execute the corresponding binary optimization model on the target hardware in advance.

[0029] It should be noted that the "executable region," "critical region," and "non-executable region" referred to in this invention are precision compatibility partitions determined based on the relationship between the dynamic range requirements of the coding coefficients and the fixed-point representation capability of the target hardware. If the coding parameters are located in the executable region, or in the critical region and have passed precision adaptation verification, it indicates that the corresponding coding coefficients have the conditions for representation and loading under the target hardware's fixed-point format, which guides the deployment selection of the coding scheme. This partitioning is not equivalent to a pre-guarantee that the target hardware will necessarily obtain a globally optimal solution or that all constraints will necessarily be satisfied; the actual solution result of the hardware is also affected by the solution algorithm and operating parameters used.

[0030] The core of the encoding deployment strategy is not simply adjusting the penalty weights or annealing parameters under a fixed encoding method, but rather selecting the encoding representation or deployment method based on the dynamic range evaluation results; wherein, the encoding representation includes at least the discretized cardinality. And the choice between one-hot encoding and binary encoding.

[0031] The data processed in steps S1 to S4 above all have clear physical meanings and technical attributes: the constrained optimization problem originates from actual engineering scenarios such as power system dispatching, logistics route planning, or communication network resource allocation; the decision variables correspond to physical quantities such as generator output, vehicle route selection, or spectrum allocation; the elements of the coding coefficient matrix reflect technical parameters such as constraint strength, penalty weight, and physical coupling relationship; and the calculation result of the dynamic range requirement directly determines whether the coding scheme can be deployed and executed on the target finite-precision hardware. Therefore, the above method as a whole constitutes a technical solution that utilizes natural laws to solve technical problems, rather than rules and methods for intellectual activities.

[0032] In this invention, binary encoding refers to a general term for encoding methods that map continuous or integer variables to binary variables with values ​​of 0 or 1, including two specific methods: one-hot encoding and binary encoding. One-hot encoding uses... Each binary variable represents Each discretization level has exactly one variable that takes the value 1, while the rest are 0; binary encoding uses... Each binary variable is represented by a weight combination. There are several discretization levels. The binary encoding in step S1 uses one-hot encoding by default. In step S4, the second-level adjustment, "switching to binary encoding" means switching from one-hot encoding to binary encoding to reduce the number of binary variables required.

[0033] The target hardware is optimization solution hardware that uses a fixed-point format to represent the coupling coefficients, including any one of the following: coherent Ising machine, quantum annealer, in-memory computation solver, GPU solver accelerator, and edge optimization chip.

[0034] Example 2 This embodiment, based on Embodiment 1, further explains the formation of candidate binary coding schemes, the calculation of dynamic range requirements, and the division of coding parameter space.

[0035] In this embodiment, the encoding parameters include the discretization radix. Encoding methods; multiple combinations of encoding parameters are set for the same constraint optimization problem, and the multiple combinations of encoding parameters are discretized using different bases. Different encoding methods or combinations thereof are used to distinguish between them; the decision variables of the constrained optimization problem are binary encoded according to each encoding parameter combination to form a set of candidate binary encoding schemes corresponding to each encoding parameter combination; the region where each encoding parameter combination is located is determined, and before submitting to the target hardware for execution, the candidate binary encoding scheme whose encoding parameter combination is located in the executable region or critical region is selected.

[0036] For example, let's set up candidate combinations A, B, and C: combination A uses one-hot encoding and ,correspond Located in an unexecutable region; Combination B uses one-hot encoding and ,correspond Located in the executable region; the combined C uses binary encoding and ,correspond This value was estimated based on the dynamic range of the power balance constraint coefficient decreasing from O(16) to O(4). Since it has not been experimentally verified, the estimated value was used as a candidate executable region. When selecting candidate schemes, combinations located within the executable region were given priority; when multiple combinations were located within the executable region, the discretization base was selected. The largest combination is obtained, and the corresponding quantized coding coefficient matrix and hardware configuration parameters are output.

[0037] Unlike methods that adjust penalty weights and other parameters in a continuous numerical space after fixing the encoding, this invention addresses the same objective optimization problem by adjusting parameters with different discretization bases. Evaluation and selection are performed within a discrete representation structure space composed of and / or encoding methods. Different candidate representations generate different encoding coefficient matrices. This invention completes the pre-deployment selection through a compatibility criterion between dynamic range requirements and hardware bit width, rather than using hardware trial operation results as a prerequisite for candidate encoding selection.

[0038] like Figure 3 As shown in the figure, this embodiment uses the multi-time period scheduling problem of power system as an example to illustrate the above process.

[0039] Step S1: Binary Encoding Construction. Taking the multi-time-period dispatching problem of a power system as an example, the system includes 2 distributed power sources, 1 energy storage unit, and 3 dispatching periods. For each continuous decision variable, one-hot encoding is performed using K=4 discretization levels, generating 72 binary variables, organized into 18 one-hot groups. The operating cost objective function and one-hot normalization constraints (penalty weights) are then used. ) and power balance constraints (penalty weights) The model is uniformly constructed as a QUBO model, resulting in a 72×72 coding coefficient matrix. .in, The energy is determined according to the principle that the penalty energy resulting from violating the one-heat normalization constraint is higher than the maximum benefit obtainable by a single variable in the objective function; The cost is determined according to the principle that the cost of violating the power balance constraint is higher than the sum of the costs of other items. Decide The magnitude, thus affecting absolute value and The value of is taken, but does not change. The term reflects the second order of growth.

[0040] The first type of constraint is the one-hot normalization constraint, whose coefficients belong to the set. The second type of constraint is the power balance constraint, whose coefficient's maximum to minimum ratio varies with the discretization base. The increase according to Significant growth. This represents the penalty weight corresponding to the first type of constraint; This represents the penalty weight for the one-heat normalization constraint. This represents the penalty weight for power balance constraints.

[0041] When the coding coefficient matrix adopts the upper triangular storage form, before entering step S2, the coefficient conventions used for matrix construction, quadratic term expansion, energy calculation and dynamic range extraction are checked for consistency. This is to avoid mixing the full matrix conventions with the upper triangular matrix conventions and to ensure that the energy function expressed by the coding coefficient matrix is ​​consistent with the set of coefficients on which the dynamic range calculation is based.

[0042] Specifically, the consistency check includes: (1) when converting the full matrix into an upper triangular matrix, the non-diagonal terms of the upper triangular matrix are taken as the sum of the two corresponding symmetric terms in the full matrix, while the diagonal terms remain unchanged; (2) select test vectors and calculate energy values ​​according to the two coefficient conventions respectively. When the deviation between the two is less than the preset tolerance, the energy consistency check is determined to be passed; (3) calculate the ratio of the absolute values ​​of the maximum and minimum non-zero coefficients under the two coefficient conventions respectively. When the two are consistent, the dynamic range requirement is determined to be consistent.

[0043] In this coding coefficient matrix, the non-zero coefficients of the one-hot normalization constraint belong to the set The coefficient dynamic range is approximately 1 bit; the coefficients of the power balance constraint range from... Crossing to The dynamic range of the coefficients spans multiple orders of magnitude. The merging of the two types of constraints results in coefficient diffusion.

[0044] in, This indicates the maximum output power of the distributed power source. Indicates the first Load demand for each scheduling period Indicates the scheduling time period number. This indicates the order of magnitude of the corresponding coefficient.

[0045] Step S2: Dynamic range calculation. For example... Figure 4 As shown, Figure 4 (a) shows that the coefficients of the first type of constraint are concentrated in a finite amplitude, with a small coefficient span of about 1 bit; Figure 4(b) shows a coefficient distribution with a wide dynamic range resulting from the expansion of the second type of constraint dependent variable coupling, and the coefficient span increases with the coding parameters. From the coding coefficient matrix... Extract the absolute value of the largest non-zero coefficient and the absolute value of the smallest non-zero coefficient and in accordance with The dynamic range requirement is calculated, and the unit of the dynamic range requirement is bits. The total dynamic range calculated in this embodiment is: The dynamic range requirement is related to the discretization cardinality. The function is ,in, This represents the configuration parameters, which consist of the combination of penalty weights, the encoding structure, and the mapping rules from QUBO to the Ising model. This refers to the configuration conditional offset constant obtained by selecting multiple representative discretization bases, determining the corresponding dynamic range requirements, and performing fixed slope fitting under the aforementioned configuration parameters.

[0046] In this embodiment, the slope of the dynamic range requirement increasing with the discretization cardinality is fixed at 2, and a conditional offset constant is configured. The following calibration procedure is used to determine: Select 3-5 representative discretization bases. And set several representative configuration parameters. Construct the corresponding binary optimization models and calculate the dynamic range of the target hardware fixed-point representation. Under various configuration parameters, the least squares method with a fixed slope was used for fitting. This embodiment selects... Perform a discretized cardinality scan to calculate... The values ​​are 5.66, 7.77, and 9.16 bits respectively; a scan of 9 representative configuration parameters yields... The mean is The coefficient of determination for a fixed slope fitting is This indicates that the fixed slope term can reflect the overall trend of the dynamic range increasing with the discretization base, while different configuration parameters will cause changes in the offset constant.

[0047] in, This indicates the number of representative discretization cards selected. Indicates the discretization cardinality sample number. Indicates the first A representative discretization cardinality Indicates the configuration parameter number. Indicates the first Group configuration parameters, Indicates the configuration parameters are And the discretization cardinality is Dynamic range requirements at time This represents the offset constant under the corresponding configuration parameter. This represents the value of the offset constant that minimizes the sum of squared residuals. This represents the summation of corresponding terms over each discretized cardinality sample. This represents the coefficient of determination.

[0048] This embodiment fixes the coefficient of the scaling law, where the dynamic range grows with the discretization cardinality, to 2. This has a clear theoretical basis: in the quadratic penalty term of a binary optimization model, the penalty weight and the product term of the discretization variables generate a coupling coefficient. For models containing... For a one-hot encoding at each discretization level, the ratio of the maximum to minimum value of the penalty term coefficient in the second type of constraint is proportional to... After taking the logarithm, we get .therefore, The term reflects the dynamic range caused by the secondary coupling of heterogeneous constraints. The dominant law of growth. Configuring conditional offset constants. This is used to absorb configuration differences such as penalty weight combinations, encoding structures, QUBO-Ising model mapping rules, constraint types, and problem sizes. In power dispatching, logistics planning, and communication resource allocation scenarios, the specific physical meanings of the above configuration parameters may differ, but the fixed quadratic growth term remains unchanged and is redefined through the same calibration process. This model provides a calculable design basis for the engineering selection of coding parameters.

[0049] Step S3: Parameter space partitioning. For example... Figure 5 As shown, the executable region satisfies The critical region satisfies The non-executable region satisfies ,in, This indicates the target hardware fixed-point representation bit width. This represents the safety margin preset based on the quantization accuracy and constraint tolerance requirements of the target hardware; the critical discretization cardinality corresponding to the boundary between the critical region and the non-executable region. .

[0050] The target hardware in this embodiment, the CPQC-1000 coherent Ising machine, uses an 8-bit signed integer format, with a fixed-point representation bit width b = 8 bits. A safety margin Δ = 1 bit is set. The selection criteria are as follows: Typically, 0.5-2 bits are used, with the specific value depending on the scaling precision of the target hardware and the tolerance requirements of the constraints. When the hardware uses uniform quantization scaling and the constraint tolerance is relatively strict (e.g., power balance error less than 1%), Take 1-2 bits; when using non-uniform quantization or with a more lenient constraint tolerance, The value can be 0.5-1 bit. In this embodiment, the CPQC-1000 adopts a uniform 8-bit signed integer format, and the power balance constraint requires an error of less than 1%, so Δ = 1 bit is chosen.

[0051] For this embodiment (b=8 bits, Δ=1 bit), based on the actual situation of each candidate coding scheme... Values ​​are used to divide regions: hour Bits, located in the executable region; hour Bits, located in the critical region; hour Bits are located in the non-executable region.

[0052] Critical Discretization Cardinality This value is based on The average reference boundary obtained from the mean value; since changes in configuration parameters will cause changes in the offset constant, the specific candidate coding scheme is still calculated based on its actual coding coefficient matrix. Region determination is performed. In this embodiment, They are located in the executable region, critical region, and non-executable region, respectively.

[0053] Currently, K=4. The encoded parameters are located in the non-executable region.

[0054] Example 3 This embodiment, based on embodiment 2, further explains the precision adaptation, multi-level encoding adjustment strategy, and deployment output in the encoding deployment strategy.

[0055] When the encoding parameters are in the critical region, precision adaptation is performed. Specifically, this is based on the absolute value of the largest coefficient that the target hardware can represent and the absolute value of the largest non-zero coefficient of the encoding coefficient matrix. The scaling factor is determined by the ratio; under the hardware representation convention of this embodiment, all coefficients are multiplied by the scaling factor. This process ensures that the maximum coefficient falls within the fixed-point representation range of the target hardware. Then, the scaled coefficients are rounded to the nearest integer value, quantized to the closest value representable by the target hardware, resulting in the quantized coding coefficient matrix. Since the critical region satisfies... The quantization error introduced by scaling has a uniform impact on all constraints and will not cause systematic destruction of specific constraints. The adapted coding coefficient matrix does not experience structural loss of constraints due to quantization. The 8-bit signed integer format includes 1 sign bit and 7 value bits, and can represent a range of... The maximum positive amplitude is 127; quantization uses rounding, and saturation truncation is applied when overflow occurs. Bit width With the lowest bit width All data are expressed in bits, with the least significant bit width rounded up.

[0056] After precision adaptation is completed, the following verification steps are performed to ensure the validity of the adaptation results: (a) Non-zero coefficient retention verification: Check whether the non-zero coefficients in the original coding coefficient matrix after scaling and rounding are rounded to zero. If non-zero coefficients are eliminated, the structural integrity of the constraint is destroyed; (b) Minimum effective coefficient check: Confirm that the absolute value of the minimum non-zero coefficient after scaling and rounding is not less than 1 (i.e., the minimum representable non-zero value of the target hardware fixed-point format). When all non-zero coefficients in the coding coefficient matrix are retained after quantization and the absolute value of the minimum non-zero coefficient after quantization is not less than the minimum non-zero value that the target hardware can represent, the quantized coding coefficient matrix is ​​mapped to the target hardware for execution; otherwise, the coding parameters are adjusted according to the multi-level coding adjustment strategy.

[0057] The aforementioned "will not lead to the systematic violation of specific constraints" means that, under the condition that the above-mentioned non-zero coefficient retention verification and minimum effective coefficient check both pass, from the perspective of coefficient representability, no non-zero coefficients corresponding to a certain type of constraint are lost due to quantization returning to zero. It does not mean making an unconditional guarantee on the constraint satisfaction rate under arbitrary quantization rules and arbitrary solution parameters. The above-mentioned precision adaptation verification takes whether the non-zero coefficients before and after quantization are retained and whether the minimum non-zero coefficient after quantization reaches the minimum representable non-zero value of the target hardware as the judgment object. Passing the verification indicates that the quantized encoding coefficient matrix has the coefficient representation conditions required for hardware loading, and the constraint satisfaction after the target hardware is executed can be verified according to the constraint tolerance preset in the specific engineering scenario.

[0058] When the encoding parameters are located in an inexecutable region, adjustments are made according to a multi-level encoding adjustment strategy. For example... Figure 6 As shown, a first-level adjustment strategy is implemented for encoding parameters that use one-hot encoding and are located in non-executable regions, gradually reducing the discretization cardinality. And after each reduction, the region containing the adjusted coding parameters is redefined; when the discretization cardinality is reduced... The discretization accuracy requirement is not met, or the discretization cardinality is insufficient. When the value has been reduced to the minimum meaningful for actual discretization and the adjusted encoding parameters are still in the inoperable region, a second-level adjustment strategy is executed. This switches the encoding method from one-hot encoding to binary encoding and redetermines the region containing the adjusted encoding parameters. The discretization accuracy requirement is that the discretization step size does not exceed the allowable error of the decision variables; the minimum effective discretization cardinality is... , It does not have optimization degrees of freedom; when The first-level adjustment is terminated when the value drops to the minimum valid value and is still in the non-executable region.

[0059] Level 1: Attempt to lower Up to 3. Recalculate ,satisfy Located in the critical region; if it meets the preset discretization accuracy and the accuracy adaptation verification passes, the first-level adjustment can be terminated. This embodiment maintains the original... The corresponding scheduling discretization precision, If the preset discretization accuracy requirement is not met, continue to reduce it. Up to 2. Recalculate Located in the executable region, but With only two discretization levels, the scheduling accuracy requirements are still not met. Therefore, the first-level adjustment failed to obtain a one-hot encoding scheme that simultaneously satisfies both hardware accuracy compatibility and scheduling discretization accuracy requirements, triggering the second-level strategy.

[0060] Level 2: Switch to binary encoding. Used when K=4. Four binary variables represent four discretization levels, reducing the number of variables from 72 to 36. The dynamic range is recalculated: the dynamic range of the power balance constraint coefficient is... Down to Based on this estimate This value can be used as a candidate executable region. This value is an estimate obtained from the order of magnitude change of the coefficient and has not been experimentally verified; before actual mapping, it is necessary to recalculate the dynamic range requirement based on the coding coefficient matrix after the coding switch and perform the corresponding verification.

[0061] The binary-encoded binary optimization model is mapped to the CPQC-1000 for execution, and the scheduling decision is output.

[0062] When the encoded parameters after implementing the second-level adjustment strategy are still in the inoperable region, the third-level strategy is triggered: decoupling the second type of constraints (such as power balance constraints) from the main binary optimization problem, and using the Lagrange relaxation method or the Alternating Direction Multiplier Method (ADMM) for iterative solution. Specifically, the original problem is decomposed into several subproblems, each including the first type of constraints and local terms of the original objective function. The second type of constraints are introduced into the iterative process through Lagrange multipliers or augmented Lagrange terms. In each iteration, each subproblem is independently constructed with binary encoding, generating a smaller binary optimization model and a corresponding encoding coefficient matrix, and executing the corresponding encoding deployment strategy according to the region where the encoding parameters of each subproblem are located; the Lagrange multipliers are updated based on the subproblem solution results output by the target hardware. Since each subproblem is no longer coupled with the second type of constraints, coefficient diffusion caused by heterogeneous constraint coupling is avoided, and the dynamic range of each subproblem is significantly lower than that of the original problem. Specifically, the subproblem coding coefficient matrix in this embodiment includes one-hot normalization constraints and local objective function terms. The coefficients belong to a narrowband set with a dynamic range of approximately 1 bit, meeting the target hardware bit width requirements and can be directly mapped to hardware solution. The solutions to each subproblem are coordinated through Lagrange multiplier updates, gradually bringing the solutions of each subproblem closer to the global optimum of the original problem. Specifically, decoupling can be performed according to physical units. Each subproblem includes one-hot normalization constraints and local cost terms. Coupling constraints are introduced through multipliers and coordinated between subproblems. The results are significantly lower than those of the original problem. The iterative convergence criterion is that the dual gap and constraint violation amount meet the preset conditions, or the preset maximum number of iterations is reached; if the iteration converges and the dynamic range of all subproblems satisfies the hardware constraints, then the encoding parameters are successfully migrated to the executable region.

[0063] The output of the encoding deployment strategy includes the following specific forms: (a) Quantized encoding coefficient matrix: all coefficients are integer values ​​that can be represented in the fixed-point format of the target hardware, stored in the form of an upper triangular integer matrix, which can be directly loaded into the hardware for execution; (b) Hardware configuration parameters: including the target hardware bit width. Scaling factor Encoding method (one-hot or binary), discretization radix (c) When the multi-level encoding adjustment strategy fails to bring the encoding parameters into the executable or critical region, the target hardware bit width is selected based on whether the safety margin is taken into account: when the safety margin is not taken into account, the minimum bit width is output. Recommended output bit width when taking safety margin into account. This provides a quantitative basis for selecting or customizing target hardware.

[0064] Example 4 like Figure 2As shown, this embodiment provides a finite-precision hardware binary encoding executability evaluation and adjustment system, including a binary encoding module, a dynamic range calculation module, a parameter space partitioning module, and an encoding deployment module. The four modules are respectively used to execute steps S1 to S4 in embodiment 1.

[0065] Specifically, the binary encoding module receives a constraint optimization problem containing first-type constraints with homogeneous coefficient structures and second-type constraints with heterogeneous coefficient structures, completes the binary encoding of decision variables and the unified construction of objective function and constraints according to the encoding parameters, and outputs the encoding coefficient matrix; the dynamic range calculation module receives the encoding coefficient matrix and outputs the dynamic range requirement with encoding parameters as independent variables under the target hardware fixed-point representation format; the parameter space partitioning module receives the dynamic range requirement and the target hardware fixed-point representation bit width, and outputs the executable region, critical region or non-executable region corresponding to the current encoding parameters; the encoding deployment module receives the binary optimization model and the region it is located in, and performs direct mapping, precision-adapted mapping or multi-level encoding adjustment respectively.

[0066] For non-executable regions, the encoding deployment module feeds back the adjusted encoding parameters to the binary encoding module, which then reconstructs the binary optimization model. The dynamic range calculation module recalculates the dynamic range requirements, and the parameter space partitioning module redetermines the region where the adjusted encoding parameters are located. The encoding deployment module continues to execute the corresponding encoding deployment strategy based on the redetermined region.

[0067] Example 5 like Figure 7 As shown, this embodiment uses an IEEE 33-node active distribution network as an example to verify the effectiveness of the method of the present invention. After determining that the coding parameters are located in the unexecutable region, the binary optimization model is executed on the target hardware and the full-precision software solver, respectively, and the difference between the satisfaction rate of the first type of constraint and the satisfaction rate of the second type of constraint is compared to confirm the root cause of the unexecutability.

[0068] In the above comparison, the full-precision software solver and the target hardware use a binary optimization model derived from the same constrained optimization problem, the same discretization cardinality, the same encoding method, and the same encoding construction rules. The main differences between the two correspond to the precision of the coefficient representation and the execution platform. If the full-precision software solver obtains a feasible solution satisfying both the first and second type of constraints under precise arithmetic, while the target hardware's constraint satisfaction status or satisfaction rate for the same discretization instance is significantly reduced, this difference is used as the verification basis for the mismatch between the encoding dynamic range requirement and the target hardware's finite precision. If the full-precision software solver also cannot obtain a feasible solution satisfying the constraints, the original constrained optimization problem, encoding construction, and parameter settings are checked first, and the hardware precision mismatch is not directly determined based on this. This comparison is used to verify the pre-deployment evaluation results of steps S2 and S3, and does not replace the partitioning judgment between the dynamic range requirement and the target hardware's fixed-point representation bit width.

[0069] Without using the method of this invention (direct deployment of one-hot encoding): the one-hot constraint satisfaction rate after execution by CPQC-1000 hardware is only 47.8%, and the power balance feasibility is 0%. The precise MILP solver confirms that the same discretization instance is completely feasible under precise arithmetic, proving that the infeasibility stems from the mismatch between the encoding and hardware precision.

[0070] After adopting the method of the present invention: prediction is made through step S3. Located in the non-executable region, step S4, level two, switches to binary encoding; estimates are made based on the magnitude change. This can be considered as a candidate executable region. However, this estimate has not been experimentally verified. Before actual mapping, the dynamic range requirement needs to be recalculated based on the coding coefficient matrix after the coding switch, and accuracy compatibility verification must be completed. The aforementioned comparisons used the same problem and the same discretization cardinality. Using the same target hardware, the encoding method is used as the comparison variable.

[0071] In comparison, existing technologies employing the "post-encoding optimization" approach (such as the Boolean algebra simplification method described in CN117742678A) to compress the dynamic range after encoding through techniques like NOT gate fusion and chain reduction. However, for the power system dispatching scenario in this embodiment, heterogeneous constraint coupling (power balance constraint coefficients spanning...) The coefficient diffusion caused by heterogeneous constraints (on several orders of magnitude) is a structural diffusion, not a redundant algebraic expression. Boolean algebraic simplification can only eliminate logical redundancy and cannot fundamentally compress the coefficient span caused by heterogeneous constraint coupling. In this embodiment, the dynamic range requirement of the binary optimization model when K=4 is 9.16 bits. Even with some compression through algebraic simplification, it is still difficult to reduce it to within the 8-bit fixed-point representation width of CPQC-1000. However, this invention, through step S3, predicts the infeasibility of the scheme during the encoding stage and directly triggers a multi-level adjustment strategy to switch to binary encoding, fundamentally avoiding the coefficient diffusion problem caused by heterogeneous constraint coupling and avoiding unnecessary optimization calculations on infeasible encoding schemes.

[0072] Example 6 Reference Figure 5 The division of executable, critical, and non-executable regions can be used for the following engineering design decisions: (a) Given CPQC-1000 (b=8) and the mean value of the conditional offset constant C(θ) of 6.07 in this embodiment, by The average reference boundary is determined; specific candidate schemes are still determined based on the actual calculated dynamic range requirements. In this embodiment, These are located in the executable region, critical region, and non-executable region, respectively. Therefore, for the current K=4 scheme, the accuracy adaptation result of the K=3 scheme can be evaluated first; if it does not meet the preset discretization accuracy requirements, then the second-level strategy can be used to switch to binary encoding. (b) Given K=4 (DR=9.16 bits), what is the minimum required hardware bit width? (Round up to the nearest integer bit width); if a safety margin is considered If the bit width is 11 bits, then a bit width of 11 bits is recommended; (c) Evaluation of different hardware platforms: Under 8-bit CIM, in this embodiment, K=2 is located in the executable region, K=3 is located in the critical region, and K=4 is located in the non-executable region; 12-bit CIM can execute one-hot encoding with K≤7 without considering safety margin (by... The solution yields K ≤ 7.86. Here, CIM represents the in-memory computation solver.

[0073] In addition, the method of the present invention is not limited to power system dispatching, but is also applicable to the following scenarios: (a) logistics vehicle route planning: node access constraints (homogeneous) + load and time window constraints (heterogeneous); (b) communication network resource allocation: orthogonality constraints (homogeneous) + interference and capacity constraints (heterogeneous).

[0074] In the above scenario, the implementation methods of steps S1-S4 are the same, only the constraint types and physical meanings are different.

[0075] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention. The scope of protection of the present invention is defined by the claims.

Claims

1. A limited precision hardware binary coded executability evaluation and adjustment method, characterized by, include: A constrained optimization problem is obtained, which includes first-class constraints with homogeneous coefficient structures and second-class constraints with heterogeneous coefficient structures. The decision variables of the constrained optimization problem are binary-coded according to the coding parameters. The objective function and constraints are uniformly constructed into a binary optimization model to obtain the coded coefficient matrix. The dynamic range requirement under the target hardware fixed-point representation format is calculated based on the coding coefficient matrix and expressed as a function of the coding parameters. The dynamic range requirement characterizes the amplitude span of the non-zero coefficients in the coding coefficient matrix. Compare the dynamic range requirement with the target hardware fixed-point representation bit width, and divide the encoding parameter space into executable region, critical region and non-executable region based on the comparison result; The encoding deployment strategy is executed based on the region where the current encoding parameters are located: the binary optimization model determined by the encoding parameters corresponding to the executable region is mapped to the target hardware for execution; the binary optimization model determined by the encoding parameters corresponding to the critical region is mapped to the target hardware for execution after accuracy adaptation; for the encoding parameters corresponding to the non-executable region, the multi-level encoding adjustment strategy is used to adjust them, and the region where the adjusted encoding parameters are located is re-determined, and the encoding deployment strategy continues to be executed.

2. The method according to claim 1, characterized in that, The encoding parameters include the discretization radix. Encoding method; setting multiple encoding parameter combinations, wherein the multiple encoding parameter combinations are discretization bases. Different encoding methods or combinations thereof are used to distinguish between them; the decision variables of the constrained optimization problem are binary encoded according to each combination of encoding parameters to form a set of candidate binary encoding schemes corresponding to each combination of encoding parameters; the region where each combination of encoding parameters is located is determined, and before submitting to the target hardware for execution, the candidate binary encoding scheme corresponding to the combination of encoding parameters in the executable region or critical region is selected.

3. The method according to claim 1, characterized in that, The calculation steps for the dynamic range requirement include: when the encoding coefficient matrix adopts an upper triangular storage format, performing a consistency check on the coefficient conventions used in the construction and use of the encoding coefficient matrix; from the encoding coefficient matrix... Extract the absolute value of the largest non-zero coefficient and the absolute value of the smallest non-zero coefficient and in accordance with Calculate the dynamic range requirement, where the unit of the dynamic range requirement is bits.

4. The method according to claim 3, characterized in that, The dynamic range requirement relates to the discretization cardinality in the encoding parameters. The function is ,in, This represents the configuration parameters, which consist of the combination of penalty weights, the encoding structure, and the mapping rules from QUBO to the Ising model. This refers to the configuration conditional offset constant obtained by selecting multiple representative discretization bases, determining the corresponding dynamic range requirements, and performing fixed slope fitting under the aforementioned configuration parameters.

5. The method according to claim 4, characterized in that, The executable region satisfies The critical region satisfies The non-executable region satisfies ,in, This indicates the target hardware fixed-point representation bit width. This represents the safety margin preset based on the quantization accuracy and constraint tolerance requirements of the target hardware; the critical discretization cardinality corresponding to the boundary between the critical region and the non-executable region. .

6. The method according to claim 5, characterized in that, The precision adaptation includes: determining a scaling factor based on the ratio of the maximum absolute value of the coefficients that the target hardware can represent to the maximum absolute value of the non-zero coefficients in the coding coefficient matrix; scaling the coefficients in the coding coefficient matrix proportionally according to the scaling factor and quantizing them to the nearest value that the target hardware can represent, to obtain a quantized coding coefficient matrix; performing non-zero coefficient retention verification and minimum effective coefficient check on the quantized coding coefficient matrix; when all non-zero coefficients in the coding coefficient matrix are retained after quantization and the absolute value of the minimum non-zero coefficient after quantization is not less than the minimum non-zero value that the target hardware can represent, mapping the quantized coding coefficient matrix to the target hardware for execution; otherwise, adjusting the coding parameters according to the multi-level coding adjustment strategy.

7. The method according to claim 5, characterized in that, The multi-level coding adjustment strategy includes: applying a first-level adjustment strategy to coding parameters that use one-hot coding and are located in non-executable regions, and gradually reducing the discretization cardinality. And after each reduction, the region containing the adjusted coding parameters is redefined; when the discretization cardinality is reduced... The discretization accuracy requirement is not met, or the discretization cardinality is insufficient. When the value has been reduced to the minimum that has practical discretization significance and the adjusted encoding parameters are still in the non-executable region, the second-level adjustment strategy is executed, the encoding method is switched from one-hot encoding to binary encoding, and the region where the adjusted encoding parameters are located is redefined.

8. The method according to claim 7, characterized in that, If the encoded parameters after executing the second-level adjustment strategy are still in the non-executable region, then the third-level adjustment strategy is executed. The third-level adjustment strategy includes: decoupling the second type of constraint from the binary optimization master problem; decomposing the constraint optimization problem into multiple subproblems using the Lagrange relaxation method or the alternating direction multiplier method; each subproblem includes the first type of constraint and local terms of the objective function; and introducing the second type of constraint into the iterative process through Lagrange multipliers or augmented Lagrange terms; in each iteration, binary encoding is performed independently for each subproblem, and the corresponding encoding deployment strategy is executed according to the region where the encoding parameters of each subproblem are located; the Lagrange multipliers are updated according to the subproblem solution results output by the target hardware, until the duality gap and constraint violation amount meet the preset conditions, or the preset maximum number of iterations is reached.

9. The method according to claim 5, characterized in that, The output of the encoding deployment strategy includes a quantized encoding coefficient matrix and hardware configuration parameters. The coefficients in the quantized encoding coefficient matrix adopt the target hardware fixed-point representation format. The hardware configuration parameters include the target hardware fixed-point representation bit width, scaling factor, encoding method, and discretization cardinality. ; When the multi-level encoding adjustment strategy fails to bring the encoding parameters into the executable or critical region, the target hardware bit width for output is selected based on whether a safety margin is taken into account: if no safety margin is taken into account, the minimum output bit width is selected. ; Recommended output bit width when taking safety margin into account. .

10. A finite-precision hardware binary code executability evaluation and adjustment system, characterized in that, include: The binary encoding module is used to obtain a constrained optimization problem containing first-type constraints with homogeneous coefficient structures and second-type constraints with heterogeneous coefficient structures. The decision variables of the constrained optimization problem are binary encoded according to the encoding parameters, and the objective function and constraints are uniformly constructed into a binary optimization model to obtain the encoded coefficient matrix. The dynamic range calculation module is used to calculate the dynamic range requirement under the target hardware fixed-point representation format based on the coding coefficient matrix, and express it as a function of the coding parameters. The dynamic range requirement characterizes the amplitude span of the non-zero coefficients in the coding coefficient matrix. The parameter space partitioning module is used to compare the dynamic range requirement with the target hardware fixed-point representation bit width, and divide the encoding parameter space into an executable region, a critical region and a non-executable region according to the comparison result. The encoding deployment module is used to execute an encoding deployment strategy based on the region where the current encoding parameters are located: mapping the binary optimization model determined by the encoding parameters corresponding to the executable region to the target hardware for execution; mapping the binary optimization model determined by the encoding parameters corresponding to the critical region to the target hardware for execution after accuracy adaptation; for the encoding parameters corresponding to the non-executable region, adjusting them according to a multi-level encoding adjustment strategy, and feeding the adjusted encoding parameters back to the binary encoding module, which then reconstructs the binary optimization model, the dynamic range calculation module recalculates the dynamic range requirements, and the parameter space partitioning module redetermines the region where the adjusted encoding parameters are located, and continues to execute the encoding deployment strategy.

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