Multi-voltage output circuits and electronic devices based on DC power supply chips

Abstract

This application discloses a multi-voltage output circuit and electronic device based on a DC power supply chip. The multi-voltage output circuit includes a Boost DC-DC converter, a regulated output unit, a negative voltage output unit, and a boost output unit. The Boost DC-DC converter uses a DC power supply chip to convert a first input DC current into a pulsed first DC current. The regulated output unit stores energy in the first DC current and then divides it to obtain a first output DC current. The negative voltage output unit stores energy in the first DC current, converts it into a negative voltage DC current, and then divides it to obtain a second output DC current. The boost output unit stores energy in the first DC current, doubles its voltage, and then divides it to obtain a third output DC current. Since multiple DC currents with different voltage values ​​can be output using only one DC power supply chip, the number of power supply chips in electronic devices is reduced, significantly reducing material costs and electromagnetic compatibility risks.

Description

Technical Field

[0001] This invention relates to the field of DC power supply technology, and more specifically to a multi-voltage output circuit and electronic device based on a DC power supply chip. Background Technology

[0002] DC power supplies are fundamental to the operation of electronic devices. As circuit complexity increases, multiple different voltage supply requirements often exist on the same circuit board. For example, operational amplifiers require positive and negative power supplies, and display drivers require multiple sets of reference voltages. Currently, multi-channel power supplies typically employ a separate design with multiple power chips, meaning that each voltage is provided by a separate power chip. This approach increases the number of components and material costs. Furthermore, due to the presence of multiple power chips, inconsistent operating frequencies and difficulty in optimizing loop area can easily lead to electromagnetic compatibility (EMC) violations, impacting the entire product development and certification cycle. Summary of the Invention

[0003] The main technical problem solved by this invention is how to provide DC power supplies with different voltage values ​​for different electronic circuits on the same PCB board.

[0004] According to the first aspect, one embodiment provides a multi-voltage output circuit based on a DC power supply chip, including a Boost DC-DC conversion unit, a regulated output unit, a negative voltage output unit, and a boost output unit;

[0005] The Boost DC-DC converter includes a DC power supply chip for converting a first input DC voltage Vcc into a first DC voltage SW, and outputting the first DC voltage SW to the regulated output unit, the boost output unit, and the negative voltage output unit; wherein, the DC power supply chip is a Boost-type DC-DC converter chip, and the first DC voltage SW is a pulse electrical signal with a preset amplitude voltage;

[0006] The voltage regulator output unit is used to store the first DC power SW using a voltage divider circuit and then divide the voltage to obtain the first output DC power PP1V.

[0007] The negative voltage output unit is used to store the first DC power SW and convert it into negative DC power, and then divide the negative DC power to obtain the second output DC power PP2V.

[0008] The boost output unit is used to store the first DC power SW and then boost it to double the voltage, and then divide the boosted DC power obtained after boosting to obtain the third output DC power PP3V.

[0009] The first output DC voltage PP1V, the second output DC voltage PP2V, and / or the third output DC voltage PP3V, with three different voltage values, are used as the output power supply of the multi-voltage output circuit.

[0010] In one embodiment, the Boost DC-DC converter further includes an enable control resistor R0, a first inductor L1, and a sampling circuit;

[0011] The sampling circuit is used to sample the first DC current SW to obtain a sampled voltage signal;

[0012] The DC power supply chip U0 includes an IN pin, an EN pin, a GND pin, an LX pin, and an FB pin. The IN pin serves as the power input pin of the DC power supply chip U0, used for inputting the first input DC current Vcc. The EN pin is connected to the IN pin through the enable control resistor R0, serving as the enable control terminal of the DC power supply chip U0. The GND pin is used for grounding. The LX pin is used to output the first DC current SW. The FB pin is used for inputting the sampled voltage signal.

[0013] The first inductor L1 is connected between the IN pin and the LX pin.

[0014] In one embodiment, the Boost DC-DC converter further includes a first diode D1 and a filter capacitor C0;

[0015] The positive terminal of the first diode D1 is connected to the LX pin, and the negative terminal of the first diode D1 is connected to the voltage regulation output unit.

[0016] One end of the filter capacitor C0 is connected to the IN pin, and the other end is grounded;

[0017] The sampling circuit includes a first resistor R1 and a second resistor R2; the first resistor R1 and the second resistor R2 are connected in series, one end of which is connected to the negative terminal of the first diode D1, and the other end of which is grounded; the connection terminal of the first resistor R1 and the second resistor R2 is connected to the FB pin.

[0018] In one embodiment, the regulated output unit includes a first capacitor C1, a second capacitor C2, and a first voltage divider circuit; wherein the first voltage divider circuit includes a third resistor R3 and a fourth resistor R4;

[0019] One end of the first capacitor C1 is connected to the negative terminal of the first diode D1, and the other end is grounded;

[0020] The third resistor R3 and the fourth resistor R4 are connected in series. One end of the series connection is connected to the negative terminal of the first diode D1, and the other end of the series connection is grounded.

[0021] The connection terminals of the third resistor R3 and the fourth resistor R4 are used to output the first output DC voltage PP1V;

[0022] One end of the second capacitor C2 is connected to the connection point of the third resistor R3 and the fourth resistor R4, and the other end is grounded.

[0023] In one embodiment, the negative voltage output unit includes a negative voltage half-wave rectifier circuit and a second voltage divider circuit;

[0024] The negative voltage half-wave rectifier circuit includes a third capacitor C3, a fourth capacitor C4, a second diode D2, and a third diode D3;

[0025] The negative terminal of the second diode D2 is connected to the positive terminal of the third diode D3; the negative terminal of the third diode D3 is grounded.

[0026] The positive terminal of the third capacitor C3 is connected to the Boost DC-DC converter unit and is used as the input of the first DC power SW; the negative terminal of the third capacitor C3 is connected to the negative terminal of the second diode D2.

[0027] One end of the fourth capacitor C4 is connected to the positive terminal of the second diode D2, and the other end is connected to the negative terminal of the third diode D3;

[0028] The second voltage divider circuit includes a fifth resistor R5 and a sixth resistor R6;

[0029] The fifth resistor R5 and the sixth resistor R6 are connected in series. One end of the series connection is connected to the positive terminal of the second diode D2, and the other end is grounded.

[0030] The connection point of the fifth resistor R5 and the sixth resistor R6 is used to output the second output DC voltage PP2V.

[0031] In one embodiment, the negative voltage output unit further includes a fourth diode D4 and a fifth capacitor C5; wherein the fourth diode D4 is a Zener diode;

[0032] The positive terminal of the fourth diode D4 is connected to the connection terminals of the fifth resistor R5 and the sixth resistor R6, and the negative terminal of the fourth diode D4 is grounded.

[0033] One end of the fifth capacitor C5 is connected to the connection point of the fifth resistor R5 and the sixth resistor R6, and the other end is grounded.

[0034] In one embodiment, the boost output unit includes a half-wave rectifier circuit and a third voltage divider circuit;

[0035] The half-wave rectifier circuit includes a seventh resistor R7, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a fifth diode D5, and a sixth diode D6.

[0036] The positive terminal of the fifth diode D5 is connected to the negative terminal of the sixth diode D6;

[0037] The positive terminal of the sixth capacitor C6 is connected to the Boost DC-DC converter unit and is used as the input of the first DC power SW; the negative terminal of the sixth capacitor C6 is connected to the positive terminal of the fifth diode D5.

[0038] One end of the seventh resistor R7 is connected to the positive connection terminal of the sixth diode D6, and the other end is used to output a fourth output DC voltage PP4V, which has the same voltage value as the first DC voltage SW.

[0039] One end of the seventh capacitor C7 is connected to the positive terminal of the sixth diode D6, and the other end is grounded;

[0040] One end of the eighth capacitor C8 is connected to the negative terminal of the fifth diode D5, and the other end is grounded;

[0041] The third voltage divider circuit includes the eighth resistor R8 and the ninth resistor R9;

[0042] The eighth resistor R8 and the ninth resistor R9 are connected in series. One end of the series connection is connected to the negative terminal of the fifth diode D5, and the other end of the series connection is grounded.

[0043] The connection terminals of the eighth resistor R8 and the ninth resistor R9 are used to output the third output DC voltage PP3V.

[0044] In one embodiment, the boost output unit further includes a seventh diode D7 and a ninth capacitor C9; wherein the seventh diode D7 is a Zener diode;

[0045] The negative terminal of the seventh diode D7 is connected to the connection terminals of the eighth resistor R8 and the ninth resistor R9, and the positive terminal of the seventh diode D7 is grounded.

[0046] One end of the ninth capacitor C9 is connected to the connection point of the eighth resistor R8 and the ninth resistor R9, and the other end is grounded.

[0047] In one embodiment, the voltage values ​​of the third output DC power PP3V, the first output DC power PP1V, and the second output DC power PP2V decrease sequentially, and the voltage values ​​of the third output DC power PP3V and the first output DC power PP1V are positive, while the voltage value of the second output DC power PP2V is negative.

[0048] According to a second aspect, one embodiment provides an electronic device including the multi-voltage output circuit described in any embodiment of this application.

[0049] According to the multi-voltage output circuit of the above embodiment, since only one DC power chip is used to output multiple DC voltage values, the number of power chips in the electronic and electrical system is reduced, material costs are greatly reduced, and electromagnetic compatibility risks are reduced. Attached Figure Description

[0050] Figure 1 This is a functional block diagram of a multi-voltage output circuit in one embodiment;

[0051] Figure 2 This is a schematic diagram of the circuit connection between the Boost DC-DC converter and the regulated output unit in one embodiment;

[0052] Figure 3 This is a circuit connection diagram of the negative pressure output unit in one embodiment;

[0053] Figure 4 This is a schematic diagram of the circuit connection of the boost output unit in one embodiment;

[0054] Figure 5 This is a schematic diagram of the output waveform of the first DC power supply in one embodiment. Detailed Implementation

[0055] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings. Similar elements in different embodiments are referred to by associated similar element reference numerals. In the following embodiments, many details are described to facilitate a better understanding of the invention. However, those skilled in the art will readily recognize that some features may be omitted in different situations, or may be replaced by other elements, materials, or methods. In some cases, certain operations related to the present invention are not shown or described in the specification. This is to avoid obscuring the core parts of the invention with excessive description. For those skilled in the art, detailed description of these related operations is not necessary; they can fully understand the related operations based on the description in the specification and general technical knowledge in the art.

[0056] Furthermore, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the steps or actions in the method description can be rearranged or adjusted in a manner obvious to those skilled in the art. Therefore, the various orders in the specification and drawings are only for the clear description of a particular embodiment and do not imply a necessary order, unless otherwise stated that a particular order must be followed.

[0057] The serial numbers assigned to components in this document, such as "first" and "second," are used only to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this invention, unless otherwise specified, include both direct and indirect connections (linkages).

[0058] The multi-voltage output circuit disclosed in this application first uses a square wave pulse electrical signal generated by the SW pin of a DC-DC boost chip, then uses a diode to charge and discharge an electrolytic capacitor to boost or reduce the voltage, and then uses a Zener diode for voltage regulation. Since it can output multiple DC voltages with different values ​​at the same time, it can effectively reduce the cost of PCBA and the EMC certification risk caused by multiple power supplies.

[0059] Please refer to Figure 1 The diagram below shows the functional structure of a multi-voltage output circuit in one embodiment. The multi-voltage output circuit includes a Boost DC-DC converter 10, a regulated output unit 20, a negative voltage output unit 30, and a boost output unit 40. The Boost DC-DC converter 10 includes a DC power supply chip for converting a preset first input DC voltage Vcc into a first DC voltage SW, and outputting the first DC voltage SW to the regulated output unit 20, the boost output unit 30, and the negative voltage output unit 40. The DC power supply chip is a Boost-type DC-DC converter chip, and the first DC voltage SW is a pulse signal with a preset amplitude voltage. The regulated output unit 20 uses a voltage divider circuit to store energy in the first DC voltage SW and then divides it to obtain a first output DC voltage PP1V. The negative voltage output unit 30 stores energy in the first DC voltage SW, converts it into a negative DC voltage, and then divides the negative DC voltage to obtain a second output DC voltage PP2V. The boost output unit 40 is used to store the first DC power SW and then boost it to double its voltage. The boosted DC power obtained after boosting is then divided to obtain the third output DC power PP3V. The three different voltage values ​​of the first output DC power PP1V, the second output DC power PP2V, and the third output DC power PP3V are used as the output power supply of the multi-voltage output circuit.

[0060] Please refer to Figure 2This is a schematic diagram of the circuit connection between the Boost DC-DC converter unit and the regulated output unit in one embodiment. The Boost DC-DC converter unit 10 also includes an enable control resistor R0, a first inductor L1, and a sampling circuit 11. The sampling circuit 11 is used to sample the first DC current SW to obtain a sampled voltage signal. The DC power supply chip U0 includes an IN pin, an EN pin, a GND pin, an LX pin, and an FB pin. The IN pin serves as the power input pin of the DC power supply chip U0, used for the input of the first input DC current Vcc. The EN pin is connected to the IN pin through the enable control resistor R0, serving as the enable control terminal of the DC power supply chip U0. The GND pin is used for grounding. The LX pin is used to output the first DC current SW. The FB pin is used for the input of the sampled voltage signal. The NC pin is left floating. The first inductor L1 is connected between the IN pin and the LX pin.

[0061] In one embodiment, the Boost DC-DC converter 10 further includes a first diode D1 and a filter capacitor C0. The positive terminal of the first diode D1 is connected to the LX pin, and the negative terminal of the first diode D1 is connected to the regulated output unit 20. One end of the filter capacitor C0 is connected to the IN pin, and the other end is grounded. The sampling circuit 11 includes a first resistor R1 and a second resistor R2, which are connected in series. One end of the series connection is connected to the negative terminal of the first diode D1, and the other end is grounded. The connection point of the first resistor R1 and the second resistor R2 is connected to the FB pin.

[0062] In one embodiment, the regulated output unit 20 includes a first capacitor C1, a second capacitor C2, and a first voltage divider circuit 21, wherein the first voltage divider circuit 21 includes a third resistor R3 and a fourth resistor R4. One end of the first capacitor C1 is connected to the negative terminal of the first diode D1, and the other end is grounded. In one embodiment, the connection between the first capacitor C1 and the first diode D1 is also used to output a first regulated DC voltage VCOM. The third resistor R3 and the fourth resistor R4 are connected in series, with one end of the series connection connected to the negative terminal of the first diode D1 and the other end grounded. The connection between the third resistor R3 and the fourth resistor R4 is used to output a first output DC voltage PP1V. One end of the second capacitor C2 is connected to the connection between the third resistor R3 and the fourth resistor R4, and the other end is grounded.

[0063] Please refer to Figure 3This is a circuit connection diagram of a negative voltage output unit in one embodiment. The negative voltage output unit includes a negative voltage half-wave rectifier circuit 31 and a second voltage divider circuit 32. The negative voltage half-wave rectifier circuit 31 includes a third capacitor C3, a fourth capacitor C4, a second diode D2, and a third diode D3. The negative terminal of the second diode D2 is connected to the positive terminal of the third diode D3, and the negative terminal of the third diode D3 is grounded. The positive terminal of the third capacitor C3 is connected to the Boost DC-DC converter unit for the input of the first DC power SW, and the negative terminal of the third capacitor C3 is connected to the negative terminal of the second diode D2. One end of the fourth capacitor C4 is connected to the positive terminal of the second diode D2, and the other end is connected to the negative terminal of the third diode D3. The second voltage divider circuit 32 includes a fifth resistor R5 and a sixth resistor R6, which are connected in series. One end of the series connection is connected to the positive terminal of the second diode D2, and the other end is grounded. The connection between the fifth resistor R5 and the sixth resistor R6 is used to output the second output DC power PP2V. In one embodiment, the negative voltage output unit further includes a fourth diode D4 and a fifth capacitor C5, wherein the fourth diode D4 is a Zener diode. The positive terminal of the fourth diode D4 is connected to the connection terminal of the fifth resistor R5 and the sixth resistor R6, and the negative terminal of the fourth diode D4 is grounded. One end of the fifth capacitor C5 is connected to the connection terminal of the fifth resistor R5 and the sixth resistor R6, and the other end is grounded.

[0064] Please refer to Figure 4This is a circuit connection diagram of a boost output unit in one embodiment. The boost output unit includes a half-wave rectifier circuit 41 and a third voltage divider circuit 42. The half-wave rectifier circuit 41 includes a seventh resistor R7, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a fifth diode D5, and a sixth diode D6. The positive terminal of the fifth diode D5 is connected to the negative terminal of the sixth diode D6. The positive terminal of the sixth capacitor C6 is connected to the Boost DC-DC converter unit and is used as the input of the first DC current SW. The negative terminal of the sixth capacitor C6 is connected to the positive terminal of the fifth diode D5. One end of the seventh resistor R7 is connected to the positive terminal of the sixth diode D6, and the other end is used to output a fourth output DC current PP4V with the same voltage value as the first DC current SW. One end of the seventh capacitor C7 is connected to the positive terminal of the sixth diode D6, and the other end is grounded. One end of the eighth capacitor C8 is connected to the negative terminal of the fifth diode D5, and the other end is grounded. The third voltage divider circuit 42 includes an eighth resistor R8 and a ninth resistor R9, which are connected in series. One end of the series connection is connected to the negative terminal of the fifth diode D5, and the other end is grounded. The connection between the eighth resistor R8 and the ninth resistor R9 is used to output the third output DC voltage PP3V. In one embodiment, the boost output unit also includes a seventh diode D7 and a ninth capacitor C9, wherein the seventh diode D7 is a Zener diode. The negative terminal of the seventh diode D7 is connected to the connection between the eighth resistor R8 and the ninth resistor R9, and the positive terminal of the seventh diode D7 is grounded. One end of the ninth capacitor C9 is connected to the connection between the eighth resistor R8 and the ninth resistor R9, and the other end is grounded.

[0065] In one embodiment, the voltage values ​​of the third output DC power PP3V, the first output DC power PP1V, and the second output DC power PP2V decrease sequentially, and the voltage values ​​of the third output DC power PP3V and the first output DC power PP1V are positive, while the voltage value of the second output DC power PP2V is negative.

[0066] An electronic device is also disclosed in one embodiment of this application, including the multi-voltage output circuit described above.

[0067] To facilitate understanding of the working principle and operation mode of the multi-voltage output circuit disclosed in the embodiments of this application, the following is a description through specific embodiments, including:

[0068] like Figure 2As shown, in one embodiment, the DC power chip U0 is a typical Boost DC-DC power chip, with models such as STI3508, MC34063ADR2G, or LMR64010XMFX / NOPB. Taking the power chip with model SX1308 as an example, the pulse voltage amplitude of the first DC power supply SW is +8V, the voltage of the third output DC power supply PP3V is +12V, and the voltage of the second output DC power supply PP2V is -4.2V.

[0069] Please refer to Figure 5 The diagram shows the output waveform of the first DC power in one embodiment. The LX pin of the SX1308 power chip outputs the first DC power SW as a pulse signal with a pulse width of T and an amplitude voltage of +8V.

[0070] like Figure 3 As shown, the voltage generation principle of the second output DC voltage PP2V is as follows:

[0071] The negative voltage half-wave rectifier circuit is composed of the third capacitor C3, the fourth capacitor C4, the second diode D2, and the third diode D3.

[0072] When the first DC current SW is high, it passes through the third capacitor C3 and the third diode D3, causing the third capacitor C3 to become grounded through the third diode D3 when the pulse is high. Therefore, the third capacitor C3 will start to store charge (i.e., the capacitor is charging, at which time the positive connection terminal of the third capacitor C3 is positive and the negative connection terminal is 0).

[0073] When the first DC current SW is low (which can be considered grounded), the third capacitor C3 is turned on through the second diode D2. Since the capacitor discharge cannot change abruptly, the negative terminal of the third capacitor C3 is at a negative voltage relative to the positive terminal. This means that the charge on the upper end of the fourth capacitor C4 also accumulates, causing the upper end of the fourth capacitor C4 to be at a negative voltage relative to the lower end. After several cycles, this voltage is maintained at the pulse height, meaning the voltage across the fourth capacitor C4 reaches -8V, thus forming a negative voltage generator. After voltage division and current limiting by the fifth resistor R5 and the sixth resistor R6, the fourth diode D4 (Zenyl Regulator Diode) works normally, and the voltage of the second output DC current PP2V remains unchanged at -4.7V.

[0074] like Figure 4 As shown, the principle behind the generation of the third output DC voltage PP3V is as follows:

[0075] The seventh resistor R7, the sixth capacitor C6, the seventh capacitor C7, the eighth capacitor C8, the fifth diode D5, and the sixth diode D6 form a half-wave rectifier circuit with a superimposed +8V voltage. When the fourth output DC voltage PP4V is stable at +8V and there is no waveform, due to the obstruction of the sixth capacitor C6, the fifth diode D5 and the sixth diode D6 are conducting. Therefore, the voltage values ​​at the positive terminal, the negative terminal, and the positive terminal of the sixth diode D6 are all +8V (ignoring diode voltage drop).

[0076] When the first DC voltage SW is at its first low level, the +8V of the fourth output DC voltage PP4V begins to charge the negative terminal of the sixth capacitor C6 through the sixth diode D6.

[0077] When the first high level of the first DC current SW arrives, because the discharge of the sixth capacitor C6 cannot be abrupt, the negative terminal of the sixth capacitor C6 is raised by a certain level relative to the positive terminal. Due to the fast charging of the sixth capacitor C6, the upper end of the eighth capacitor C8 is instantaneously charged, which manifests as a rise in the level of the upper end of the eighth capacitor C8. After several cycles of accumulation, the level of the negative terminal of the sixth capacitor C6 will be raised by the pulse amplitude, i.e., +8V. The negative terminal of the fifth diode D5 eventually stabilizes at +16V. After voltage division and current limiting by the eighth resistor R8 and the ninth resistor R9, the seventh diode D7 (Zenigma regulator diode) works normally, and its voltage remains basically unchanged at 12V.

[0078] In one embodiment, different voltage values ​​for the second output DC PP2V and the third output DC PP3V can be generated by selecting different Zener diodes (fourth diode D4 and seventh diode D7). In another embodiment, different voltage values ​​for the second output DC PP2V and the third output DC PP3V can also be generated by selecting different DC power supply chips.

[0079] The multi-voltage output circuit disclosed in this application includes a Boost DC-DC converter, a regulated output unit, a negative voltage output unit, and a boost output unit. The Boost DC-DC converter uses a DC power supply chip to convert a first input DC current into a pulsed first DC current. The regulated output unit stores energy in the first DC current and then divides it to obtain a first output DC current. The negative voltage output unit stores energy in the first DC current, converts it into a negative DC current, and then divides it to obtain a second output DC current. The boost output unit stores energy in the first DC current, doubles its voltage, and then divides it to obtain a third output DC current. Since multiple DC currents with different voltage values ​​can be output using only one DC power supply chip, the number of power supply chips in electronic and electrical systems is reduced, significantly lowering material costs and reducing electromagnetic compatibility risks.

[0080] This document describes various exemplary embodiments with reference to them. However, those skilled in the art will recognize that changes and modifications can be made to the exemplary embodiments without departing from the scope of this document. For example, various operational steps and components for performing operational steps can be implemented in different ways depending on the specific application or considering any number of cost functions associated with the operation of the system (e.g., one or more steps can be deleted, modified, or combined with other steps).

[0081] While the principles herein have been illustrated in various embodiments, numerous modifications to the structures, arrangements, proportions, elements, materials, and components, particularly suited to specific environments and operational requirements, may be used without departing from the principles and scope of this disclosure. These modifications and other alterations or alterations will be included within the scope of this document. Those skilled in the art will recognize that many changes can be made to the details of the above embodiments without departing from the fundamental principles of the invention.

Claims

1. A multi-voltage output circuit based on a DC power supply chip, characterized in that, It includes a Boost DC-DC converter, a regulated output unit, a negative voltage output unit, and a boost output unit; The Boost DC-DC converter includes a DC power supply chip for converting a first input DC voltage Vcc into a first DC voltage SW, and outputting the first DC voltage SW to the regulated output unit, the boost output unit, and the negative voltage output unit; wherein, the DC power supply chip is a Boost-type DC-DC converter chip, and the first DC voltage SW is a pulse electrical signal with a preset amplitude voltage; The voltage regulator output unit is used to store the first DC power SW using a voltage divider circuit and then divide the voltage to obtain the first output DC power PP1V. The negative voltage output unit is used to store the first DC power SW and convert it into negative DC power, and then divide the negative DC power to obtain the second output DC power PP2V. The boost output unit is used to store the first DC power SW and then boost it to double the voltage, and then divide the boosted DC power obtained after boosting to obtain the third output DC power PP3V. The first output DC voltage PP1V, the second output DC voltage PP2V, and the third output DC voltage PP3V, with three different voltage values, are used as the output power supply of the multi-voltage output circuit.

2. The multi-voltage output circuit as described in claim 1, characterized in that, The Boost DC-DC converter also includes an enable control resistor R0, a first inductor L1, and a sampling circuit. The sampling circuit is used to sample the first DC current SW to obtain a sampled voltage signal; The DC power supply chip U0 includes an IN pin, an EN pin, a GND pin, an LX pin, and an FB pin. The IN pin serves as the power input pin of the DC power supply chip U0, used for inputting the first input DC current Vcc. The EN pin is connected to the IN pin through the enable control resistor R0, serving as the enable control terminal of the DC power supply chip U0. The GND pin is used for grounding. The LX pin is used to output the first DC current SW. The FB pin is used for inputting the sampled voltage signal. The first inductor L1 is connected between the IN pin and the LX pin.

3. The multi-voltage output circuit as described in claim 2, characterized in that, The Boost DC-DC converter unit also includes a first diode D1 and a filter capacitor C0; The positive terminal of the first diode D1 is connected to the LX pin, and the negative terminal of the first diode D1 is connected to the voltage regulation output unit. One end of the filter capacitor C0 is connected to the IN pin, and the other end is grounded; The sampling circuit includes a first resistor R1 and a second resistor R2; the first resistor R1 and the second resistor R2 are connected in series, one end of which is connected to the negative terminal of the first diode D1, and the other end of which is grounded; the connection terminal of the first resistor R1 and the second resistor R2 is connected to the FB pin.

4. The multi-voltage output circuit as described in claim 3, characterized in that, The voltage regulator output unit includes a first capacitor C1, a second capacitor C2, and a first voltage divider circuit; wherein, the first voltage divider circuit includes a third resistor R3 and a fourth resistor R4; One end of the first capacitor C1 is connected to the negative terminal of the first diode D1, and the other end is grounded; The third resistor R3 and the fourth resistor R4 are connected in series. One end of the series connection is connected to the negative terminal of the first diode D1, and the other end of the series connection is grounded. The connection terminals of the third resistor R3 and the fourth resistor R4 are used to output the first output DC voltage PP1V; One end of the second capacitor C2 is connected to the connection point of the third resistor R3 and the fourth resistor R4, and the other end is grounded.

5. The multi-voltage output circuit as described in claim 1, characterized in that, The negative voltage output unit includes a negative voltage half-wave rectifier circuit and a second voltage divider circuit. The negative voltage half-wave rectifier circuit includes a third capacitor C3, a fourth capacitor C4, a second diode D2, and a third diode D3; The negative terminal of the second diode D2 is connected to the positive terminal of the third diode D3; the negative terminal of the third diode D3 is grounded. The positive terminal of the third capacitor C3 is connected to the Boost DC-DC converter unit and is used as the input of the first DC power SW; the negative terminal of the third capacitor C3 is connected to the negative terminal of the second diode D2. One end of the fourth capacitor C4 is connected to the positive terminal of the second diode D2, and the other end is connected to the negative terminal of the third diode D3; The second voltage divider circuit includes a fifth resistor R5 and a sixth resistor R6; The fifth resistor R5 and the sixth resistor R6 are connected in series. One end of the series connection is connected to the positive terminal of the second diode D2, and the other end is grounded. The connection point of the fifth resistor R5 and the sixth resistor R6 is used to output the second output DC voltage PP2V.

6. The multi-voltage output circuit as described in claim 5, characterized in that, The negative voltage output unit also includes a fourth diode D4 and a fifth capacitor C5; wherein, the fourth diode D4 is a Zener diode; The positive terminal of the fourth diode D4 is connected to the connection terminals of the fifth resistor R5 and the sixth resistor R6, and the negative terminal of the fourth diode D4 is grounded. One end of the fifth capacitor C5 is connected to the connection point of the fifth resistor R5 and the sixth resistor R6, and the other end is grounded.

7. The multi-voltage output circuit as described in claim 1, characterized in that, The boost output unit includes a half-wave rectifier circuit and a third voltage divider circuit; The half-wave rectifier circuit includes a seventh resistor R7, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a fifth diode D5, and a sixth diode D6. The positive terminal of the fifth diode D5 is connected to the negative terminal of the sixth diode D6; The positive terminal of the sixth capacitor C6 is connected to the Boost DC-DC converter unit and is used as the input of the first DC power SW; the negative terminal of the sixth capacitor C6 is connected to the positive terminal of the fifth diode D5. One end of the seventh resistor R7 is connected to the positive connection terminal of the sixth diode D6, and the other end is used to output a fourth output DC voltage PP4V, which has the same voltage value as the first DC voltage SW. One end of the seventh capacitor C7 is connected to the positive terminal of the sixth diode D6, and the other end is grounded; One end of the eighth capacitor C8 is connected to the negative terminal of the fifth diode D5, and the other end is grounded; The third voltage divider circuit includes the eighth resistor R8 and the ninth resistor R9; The eighth resistor R8 and the ninth resistor R9 are connected in series. One end of the series connection is connected to the negative terminal of the fifth diode D5, and the other end of the series connection is grounded. The connection terminals of the eighth resistor R8 and the ninth resistor R9 are used to output the third output DC voltage PP3V.

8. The multi-voltage output circuit as described in claim 7, characterized in that, The boost output unit also includes a seventh diode D7 and a ninth capacitor C9; wherein, the seventh diode D7 is a Zener diode; The negative terminal of the seventh diode D7 is connected to the connection terminals of the eighth resistor R8 and the ninth resistor R9, and the positive terminal of the seventh diode D7 is grounded. One end of the ninth capacitor C9 is connected to the connection point of the eighth resistor R8 and the ninth resistor R9, and the other end is grounded.

9. The multi-voltage output circuit as described in claim 1, characterized in that, The voltage values ​​of the third output DC power PP3V, the first output DC power PP1V, and the second output DC power PP2V decrease sequentially, and the voltage values ​​of the third output DC power PP3V and the first output DC power PP1V are positive, while the voltage value of the second output DC power PP2V is negative.

10. An electronic device, characterized in that, Includes the multi-voltage output circuit as described in any one of claims 1 to 9.

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