A multi-chip compatible loRa module general automation production and measurement method and system

Abstract

The application discloses a kind of compatible multi-chip LoRa module general automation production and measurement method and system, it is related to the factory production line automation test field of wireless communication module, this production and measurement method and system are by constructing a set of chip type can run time switching general production and measurement framework, through the layered design of unified chip operation interface layer and bottom driving adaptation layer, the register and pin difference of multiple LoRa chips are completely encapsulated, the chip independence of upper layer test logic is realized, chip identification and two-dimensional threshold matrix are stored using Flash, and serial port instructions are supported without burning switching.Meanwhile, the adaptive DI0 pin integrity detection scheme based on radio frequency protocol interrupt is created, which can identify adjacent pin micro short circuit, overcome the blind area of traditional GPIO level reading, so as to realize adaptive multi-type chip in production and measurement process, without re-burning.

Description

Technical Field

[0001] This invention relates to the field of automated testing of factory production lines for wireless communication modules, and particularly to a universal automated production testing method and system for LoRa modules compatible with multiple chips. Background Technology

[0002] LoRa is a low-power wide-area network physical layer modulation technology based on linear frequency modulation spread spectrum. Its core RF chips are mainly provided by Semtech, including the SX126x series, SX127x series, and derivative models such as LLCC68, LR2021, and LR1121. Different chips have significant differences in register mapping, DIO pin function allocation, power mode switching mechanism, and RF parameter configuration. Module manufacturers design a variety of module products based on the above chips. The production line needs to perform full testing on each module for RF transceiver performance, DIO pin integrity, power consumption current, packet loss rate, and other functional items.

[0003] Existing mainstream technical solutions include:

[0004] I. La RF Production Test System Based on Standard Module Benchmark

[0005] Existing patent number CN2083141330 proposes a simple high-precision RF test system that uses a standard A module as the test reference, replacing expensive RF instruments such as spectrum analyzers and signal generators. Meanwhile, existing patent number CN115168122A discloses a multi-chip package structure and a test / calibration method. Multiple chips are connected to external test devices or calibration resistors through time-division multiplexing of the same pin. Each chip integrates test circuits and calibration circuits. Different chips are distinguished by address decoding or chip identification, realizing multi-chip time-division testing.

[0006] However, the above solution has the following significant problems:

[0007] Firstly, the fragmented firmware across multiple chips leads to low production line switching efficiency. Existing solutions have firmware that is strongly tied to chip models, requiring production lines to re-program the corresponding test firmware when testing modules based on different RF chips. In mixed production lines with multiple product types and small batches, frequent firmware programming significantly increases switching time and the risk of misoperation.

[0008] Secondly, there is a lack of unified firmware-level abstraction for chip differences. The SX126x and SX127x series chips differ in initialization process, SPI command format, DIO pin function reuse, power mode switching, and expected DIO level values ​​for CD interrupt. Existing solutions do not provide a firmware architecture that encapsulates these differences under a unified operation interface layer, resulting in upper-layer test logic being coupled with the details of the underlying chip and unable to be reused.

[0009] Third, production test threshold management relies on external systems or hard coding: different combinations of different chip types and frequency band channels require independent RSSI judgment thresholds and current judgment thresholds. Existing solutions either hard-code the thresholds in the firmware, which requires recompilation every time an adjustment is made, or rely on an external host computer database, lacking a self-management mechanism that automatically indexes in the MCU's internal Flash according to a two-dimensional matrix, is configurable via serial port, and does not lose data when power is off.

[0010] Fourth, the DI0 detection method does not take into account chip differences: the number of DI0 pins, functional definitions, and physical arrangement of adjacent pins are different for different chips. Traditional GPIO level reading or open / short circuit testing cannot effectively detect micro short circuits between adjacent pins. The existing solution does not disclose the method of reading back the DI0 status register using RF protocol interrupts, and it does not involve an adaptive detection strategy that automatically matches different DI0 expected masks for different chip models.

[0011] To address this, a universal automated production testing method and system for LoRa modules compatible with multiple chips is provided. Summary of the Invention

[0012] The purpose of this invention is to provide a universal automated production testing method and system for LoRa modules compatible with multiple chips, so as to solve the problems mentioned in the background art.

[0013] To achieve the above objectives, the present invention provides the following technical solution: a universal automated production testing method for LoRa modules compatible with multiple chips, comprising:

[0014] S1. After the system is powered on, it loads the currently persistent chip type identifier and test frequency band identifier from the Flash memory, and initializes the corresponding reference metal module according to the chip type identifier.

[0015] S2, monitors the pressure detection pin of the production test fixture. When the pressure signal is triggered, the production test main state machine is started.

[0016] S3, the production test master state machine calls the underlying driver adaptation layer that matches the current chip type identifier through the unified chip operation interface layer, and sequentially performs RF transceiver performance test, DIO pin integrity test, packet loss rate test and power consumption current test.

[0017] The DIO pin integrity test includes a DIO pin indirect verification step based on radio frequency protocol interrupts.

[0018] S4 records the results of each test, terminates the test and outputs a failure signal via an indicator when any test item fails, and outputs a pass signal when all test items pass.

[0019] Preferably, the unified chip operation interface layer predefines a set of chip-independent operation interfaces, including an initialization interface, an RF parameter configuration interface, a data transmission interface, a receive start interface, a standby switching interface, a sleep switching interface, and a DIO detection interface;

[0020] The underlying driver adaptation layer includes a first type of driver corresponding to the SX126x series and its compatible variants, a second type of driver corresponding to the SX127x series and its compatible variants, and a reference driver corresponding to the reference metal module.

[0021] Each of the aforementioned operation interfaces routes and distributes requests to the corresponding driver based on the currently loaded chip type identifier.

[0022] Preferably, the indirect verification step of the DIO pin based on the radio frequency protocol interrupt specifically includes:

[0023] Based on the currently loaded chip type identifier, automatically match the corresponding DIO level expectation mask;

[0024] The CAD channel detection or RxTimeout receive timeout detection is initiated through the unified chip operation interface layer, and the actual encoded value of the DI0 pin status register is read back using the RF protocol interrupt.

[0025] The actual encoded value is compared bit by bit with the automatically matched DIO level expectation mask: if they match, the DIO pin is determined to be intact; if they do not match, a pin open circuit or adjacent pin short circuit fault is determined.

[0026] Among them, the SX126x series chips automatically match the DI0 combination encoding based on the CAD_DONE interrupt, and the SX127x series chips automatically match the DIO bit encoding mask based on the RxTimeout interrupt and the CAD_DONE interrupt.

[0027] Preferably, during the production testing process from S1 to S4, when switching the type of production testing chip, the following steps are included:

[0028] Receive chip selection instructions containing the target chip enumeration number via serial port;

[0029] Write the target chip enumeration number as a new chip type identifier into the designated storage area of ​​the MCU's internal Flash, and output a restart prompt;

[0030] After the system restarts, the configuration loading module automatically reads the new chip type identifier from the Flash and completes the GPIO initialization and RF driver redirection loading accordingly, realizing chip type switching without programming.

[0031] Preferably, the power consumption current test includes standby current test and sleep current test; the system acquires the current detection signal after voltage division by dual sampling resistors through dual ADC channels, wherein the first ADC channel is used for mA-level standby current detection and the second ADC channel is used for μA-level sleep current detection, and compares the detected value with the corresponding current judgment threshold read from the Flash threshold matrix.

[0032] A universal automated production testing system for multi-chip compatible LoRa modules, comprising:

[0033] The serial port interaction layer is used to parse externally input test commands, which include at least chip model selection commands, frequency band selection commands, and threshold configuration commands.

[0034] The configuration management module is used to manage the chip type identifier, test frequency band identifier, and chip-frequency band two-dimensional threshold matrix stored in the MCU's internal Flash, and to read, write, and update the identifier and matrix in response to the instructions of the serial port interaction layer;

[0035] The unified chip operation interface layer defines a set of standard operation interfaces that are independent of the chip model, and routes and distributes the standard operation to the corresponding underlying driver according to the currently loaded chip type identifier.

[0036] The chip driver adaptation layer contains driver adaptation modules corresponding to various LoRa RF chip models. Each module encapsulates the SPI register operation, DIO interrupt handling, and RF state machine callback of the corresponding chip.

[0037] The production test task engine runs as a real-time operating system task, which is used to schedule the execution of RF transceiver tests, DIO pin detection, packet loss rate tests and power consumption current tests in a predetermined order, and issue test commands through the unified chip operation interface layer.

[0038] The hardware layer includes at least a reference metal module fixed to the base plate, a test interface for mounting the module under test, a current detection circuit, and a result indicator.

[0039] Preferably, the chip driver adapter layer includes at least:

[0040] The first type of chip driver module is adapted to the SX126x series chips and their compatible variants, and contains the first expected mask of the DIO combination encoding in the corresponding CAD_DONE interrupt;

[0041] The second type of chip driver module is adapted to the SX127x series chips and their compatible variants, and includes a second expected mask for the DIO bit encoding in the corresponding RxTimeout interrupt and the DIO bit encoding in the CAD_DONE interrupt.

[0042] The reference metal detector driver module is used to control the radio frequency testing interaction between the reference metal detector module and the module under test;

[0043] When the unified chip operation interface layer detects a change in the current chip type identifier, it dynamically switches and binds to the corresponding driver module.

[0044] Preferably, the chip-band two-dimensional threshold matrix is ​​stored in Flash memory using linear addressing; wherein the row index of the matrix is ​​calculated according to the following expression:

[0045] Chip type identifier x total number of frequency bands + frequency band identifier

[0046] Each record group has a fixed byte length; each record group includes upper and lower limit fields for transmit RSSI determination threshold, upper and lower limit fields for receive RSSI determination threshold, and reserved extended fields; the configuration management module supports configuring thresholds group by group and full table query via serial port commands.

[0047] Preferably, the production test task engine includes a state machine orchestration unit, and the RF transceiver test, DIO pin detection, packet loss rate test, and power consumption current test are executed in a serial order; the state machine orchestration unit configures a retry counter for each test, and automatically retryes when a single test fails and the number of retries has not been exhausted; when the number of retries is exhausted and the test still fails, the entire process is immediately terminated and the result indicator is driven to display a red light; when all test items pass, the result indicator is driven to display a green light.

[0048] Preferably, the current detection circuit includes a current detection chip, a first sampling resistor, a second sampling resistor, a first ADC channel, and a second ADC channel; the resistance value of the first sampling resistor is adapted to the mA-level current detection range and is connected to the MCU via the first ADC channel; the resistance value of the second sampling resistor is adapted to the A-level current detection range and is connected to the MCU via the second ADC channel; the production test task engine enables the first ADC channel during standby current testing and enables the second ADC channel during sleep current testing.

[0049] The technical effects and advantages of this invention are as follows:

[0050] 1. This universal automated production testing method for LoRa modules compatible with multiple chips covers the entire chip spectrum with a single firmware. One firmware can support full-function automated production testing of various chip and module variants such as 8X126x, 8X127x, LLOC68, LR2021LR1121. When adding a new chip model, only a driver module needs to be added to the driver adaptation layer and a corresponding branch needs to be added to the distribution logic of the interface layer. The system architecture does not need to be reconstructed. Compared with the existing solution, which requires each chip to maintain independent firmware, this method significantly reduces the complexity of firmware version management and the cost of production line switching.

[0051] 2. This multi-chip compatible LoRa module universal automated production testing system allows for chip type switching during runtime with zero programming and zero hardware modifications. When switching the type of the module under test on the production line, only a chip selection command needs to be sent via serial port and the fixture restarted. The system automatically loads the corresponding chip driver logic and a complete set of parameter thresholds. There is no need to connect a programmer, replace the fixture hardware, or operate the host computer database. The switching time is reduced from minutes to seconds.

[0052] 3. This universal automated production and testing system for LoRa modules compatible with multiple chips stores the judgment thresholds for all chip types and frequency band channel combinations in the form of a linear addressing matrix in the internal Flash of the MCU. The data is not lost when power is off. The thresholds can be configured group by group and queried in the whole table through serial port commands. There is no need to rely on an external host computer or network connection. When setting the threshold, the system automatically performs sign conversion and range verification to prevent human misconfiguration.

[0053] 4. This multi-chip compatible LoRa module universal automated production testing system features chip-adaptive DIO integrity detection: It automatically identifies DIO pin states using RF protocol interrupts, taking into account the multiplexing and level differences of DIO functions across different chips. Different chip series automatically match their respective corresponding DIO level expectation masks, thereby detecting micro-short circuits between adjacent pins that cannot be found using traditional GPIO level readings.

[0054] 5. This universal automated production testing system for LoRa modules compatible with multiple chips has upper-layer test logic that is completely independent of the chip: the production testing master state machine and all test subtasks only call a unified operation interface layer and do not directly depend on any chip-specific registers or drivers. When the underlying chip driver is upgraded or new chips are added for support, the upper-layer test logic remains unchanged, ensuring the consistency and traceability of production testing quality. Attached Figure Description

[0055] Figure 1 This is the overall flowchart of the general automated production testing method of the present invention;

[0056] Figure 2 This is a flowchart of chip type switching and adaptive operation in the general automated production testing method of this invention;

[0057] Figure 3 This is a diagram showing the overall architecture of the general automated production testing system of this invention. Detailed Implementation

[0058] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0059] Example 1: The present invention provides as follows Figures 1-2 The method shown is a general automated production testing method for LoRa modules compatible with multiple chips, including:

[0060] S1. After the system is powered on, it loads the currently persistent chip type identifier and test frequency band identifier from the Flash memory, and initializes the corresponding reference metal module according to the chip type identifier.

[0061] S2, monitors the pressure detection pin of the production test fixture. When the pressure signal is triggered, the production test main state machine is started.

[0062] S3, the production test master state machine calls the underlying driver adaptation layer that matches the current chip type identifier through the unified chip operation interface layer, and sequentially performs RF transceiver performance test, DIO pin integrity test, packet loss rate test and power consumption current test;

[0063] The DI0 pin integrity test includes an indirect verification step for the DI0 pin based on RF protocol interrupts.

[0064] S4 records the results of each test, terminates the test and outputs a failure signal via an indicator when any test item fails, and outputs a pass signal when all test items pass.

[0065] The unified chip operation interface layer predefines a set of chip-independent operation interfaces, including initialization interface, RF parameter configuration interface, data transmission interface, receive start interface, standby switching interface, sleep switching interface and DIO detection interface;

[0066] The underlying driver adaptation layer includes a first type of driver corresponding to the SX126x series and its compatible variants, a second type of driver corresponding to the SX127x series and its compatible variants, and a reference driver corresponding to the reference metal module.

[0067] Each operation interface routes and distributes requests to the corresponding driver based on the currently loaded chip type identifier.

[0068] The specific steps for indirect verification of the DIO pin based on RF protocol interrupts include:

[0069] Based on the currently loaded chip type identifier, automatically match the corresponding DIO level expectation mask;

[0070] The CAD channel detection or RxTimeout receive timeout detection is initiated through the unified chip operation interface layer, and the actual encoded value of the DI0 pin status register is read back using the RF protocol interrupt.

[0071] The actual encoded value is compared bit by bit with the automatically matched DIO level expectation mask: if they match, the DI0 pin is determined to be intact; if they do not match, a pin open circuit or adjacent pin short circuit fault is determined.

[0072] Among them, the SX126x series chips automatically match the DI0 combination encoding based on the CAD_DONE interrupt, and the SX127x series chips automatically match the DIO bit encoding mask based on the RxTimeout interrupt and the CAD_DONE interrupt.

[0073] During the production testing process from S1 to S4, when switching the type of chip being tested, the following steps are included:

[0074] Receive chip selection instructions containing the target chip enumeration number via serial port;

[0075] Write the target chip enumeration number as a new chip type identifier into the designated storage area of ​​the MCU's internal Flash, and output a restart prompt;

[0076] After the system restarts, the configuration loading module automatically reads the new chip type identifier from the Flash and completes the GPIO initialization and RF driver redirection loading accordingly, realizing chip type switching without programming.

[0077] The power consumption current test includes standby current test and sleep current test. The system acquires the current detection signal after voltage division by dual sampling resistors through dual ADC channels. The first ADC channel is used for mA-level standby current detection and the second ADC channel is used for μA-level sleep current detection. The detected value is compared with the corresponding current judgment threshold read from the Flash threshold matrix.

[0078] Working principle: The core of this solution lies in building a production test execution logic that combines "data-driven" and "interface abstraction". Its fundamental starting point is to solve the firmware version fragmentation problem caused by different chip models in existing technologies. In traditional solutions, the production test process is deeply coupled with the register operations of specific chips. This means that whenever the production line switches to modules with different chip models, the corresponding test firmware has to be re-flashed. This is not only inefficient, but also carries the risk of batch mistesting due to incorrect firmware flashing. This method separates the "chip model" variable from the firmware code and transforms it into a configuration parameter that is dynamically loaded from Flash when the system starts up, thereby achieving a leap from "compile-time binding" to "runtime adaptation".

[0079] In practical implementation, upon system power-up, the first step is not a fixed hardware initialization sequence, but rather reading the chip type identifier and test frequency band identifier persistently stored in a specific area of ​​the MCU's internal Flash memory. This mechanism breaks the traditional practice of hard-coding chip models in firmware. As a non-volatile storage medium, Flash memory ensures that the chip model previously set by the production line operator via serial port, such as the enumeration value representing SX1262 or the enumeration value representing SX1278, can still be retained after the fixture is completely powered off. Based on the read chip type identifier, the system accurately completes differentiated configuration for subsequent GPIO multiplexing functions, SPI communication timing, and interrupt vectors during the initialization phase, and initializes the reference metal module on the fixture baseboard. This is equivalent to establishing a "test target profile" for the entire test system. All subsequent test behaviors are based on this profile, solving the drawback of existing technologies that have to rely on the host computer to reissue parameters due to the lack of persistent configuration.

[0080] Then, when the operator presses the module under test onto the fixture and triggers the press-down detection pin, the production test master state machine, which runs as a task in the FreeRTOS real-time operating system, is awakened. This state machine is the command center of the production test process, but its unique feature is that it does not care about the specific chip being tested. It only issues test instructions by calling the "unified chip operation interface layer" located in its middle layer.

[0081] The "unified chip operation interface layer" here is the key to achieving chip compatibility. It predefines a set of standardized function interfaces such as initialization, data transmission, and reception startup. This interface is similar to the standard device class protocol in the USB protocol. For the host computer, it only needs to call the standard AP! for "send data", without needing to care whether the underlying implementation is through the SPI command format of SX1262 or the register operation of SX1278. The interface layer internally uses the chip type identifier loaded in step S1 for routing and distribution, accurately dispatching the call request to the corresponding underlying driver adaptation layer. This layered architecture ensures the stability and reusability of the upper-layer test logic. When it is necessary to add support for chips such as LLCC68, only a module needs to be added to the driver adaptation layer, and the upper-layer state machine code is modified without any changes, directly overcoming the defect of "fragmented firmware for multiple chips" in the existing technology.

[0082] Since the DIO pin functions of different LoRa chips are defined differently, traditional fixed-level reading is prone to misjudgment. This solution uses the CAD and RxTimeout interrupts of the RF protocol itself to indirectly verify the integrity of the D10 pin. The system automatically matches the expected mask based on the current chip type; for example, the SX126x series matches the combined code in the CAD_DONE interrupt, and the SX127x series matches the bit code in the RxTimeout interrupt. During execution, the system triggers an RF interrupt and reads back the actual encoded value of the DI0 status register. By comparing it with the expected mask, it can not only determine whether the pin is open, but also detect micro short circuits between adjacent pins. This adaptive verification strategy solves the pain points of existing DIO detection methods that do not consider chip differences and cannot detect micro short circuits between adjacent pins.

[0083] Meanwhile, during the test, if any sub-item fails and the retries are exhausted, the test terminates and a red light illuminates; only if all sub-items pass does the green light illuminate. When the production line needs to switch product models, the operator does not need to touch the programmer; they only need to send an instruction containing the target chip enumeration number via the serial port. The system writes the new number to the Flash and restarts. After restarting, the system executes step S1 again, automatically loading the new chip identifier, completing the driver redirection, and achieving "zero programming" switching. This directly reduces the production line switching time from minutes to seconds and avoids human error, completely covering all the technical problems to be solved mentioned in the background technology.

[0084] This enables adaptive identification of chip types and automatic invocation of corresponding chip driver logic and a full set of parameter thresholds throughout the entire production testing process, thereby achieving multi-type adaptive identification and production testing.

[0085] Example 2, the present invention provides as follows Figure 3 The illustrated general-purpose automated production testing system for multi-chip compatible LoRa modules includes:

[0086] The serial port interaction layer is used to parse externally input test commands. The test commands include at least chip model selection commands, frequency band selection commands, and threshold configuration commands.

[0087] The configuration management module is used to manage the chip type identifier, test frequency band identifier, and chip-frequency band two-dimensional threshold matrix stored in the MCU's internal Flash, and to read, write, and update the identifier and matrix in response to instructions from the serial port interaction layer;

[0088] The unified chip operation interface layer defines a set of standard operation interfaces that are independent of the chip model, and routes and distributes the standard operation to the corresponding underlying driver according to the currently loaded chip type identifier.

[0089] The chip driver adaptation layer contains driver adaptation modules corresponding to various LoRa RF chip models. Each module encapsulates the SPI register operation, DIO interrupt handling, and RF state machine callback of the corresponding chip.

[0090] The production test task engine runs as a real-time operating system task, which is used to schedule the execution of RF transceiver tests, DIO pin detection, packet loss rate tests and power consumption current tests in a predetermined order, and issue test commands through a unified chip operation interface layer.

[0091] The hardware layer includes at least a reference metal module fixed to the base plate, a test interface for mounting the module under test, a current detection circuit, and a result indicator.

[0092] The chip driver adaptation layer includes at least:

[0093] The first type of chip driver module is adapted to the SX126x series chips and their compatible variants, and contains the first expected mask of the DIO combination encoding in the corresponding CAD_DONE interrupt;

[0094] The second type of chip driver module is adapted to the SX127x series chips and their compatible variants, and includes a second expected mask for the DIO bit encoding in the corresponding RxTimeout interrupt and the DIO bit encoding in the CAD_DONE interrupt.

[0095] The gold-plating device driver module is used to control the RF testing interaction between the reference gold-plating device module and the module under test.

[0096] When the unified chip operation interface layer detects a change in the current chip type identifier, it dynamically switches and binds to the corresponding driver module.

[0097] The chip-band two-dimensional threshold matrix is ​​stored in Flash memory using linear addressing; the row index of the matrix is ​​calculated according to the following expression:

[0098] Chip type identifier x total number of frequency bands + frequency band identifier

[0099] Each record group has a fixed byte length; each record group includes upper and lower limit fields for transmit RSSI determination threshold, upper and lower limit fields for receive RSSI determination threshold, and reserved extended fields; the configuration management module supports configuring thresholds group by group and full table query via serial port commands.

[0100] The production test task engine includes a state machine orchestration unit. RF transceiver tests, DIO pin detection, packet loss rate tests, and power consumption and current tests are executed in a serial order. The state machine orchestration unit configures a retry counter for each test. When a single test fails and the number of retries has not been exhausted, it will automatically retry. When the number of retries has been exhausted and the test still fails, the entire process will be terminated immediately and the result indicator will be driven to display a red light. When all test items pass, the result indicator will be driven to display a green light.

[0101] The current detection circuit includes a current detection chip, a first sampling resistor, a second sampling resistor, a first ADC channel, and a second ADC channel. The resistance value of the first sampling resistor is adapted to the mA-level current detection range and is connected to the MCU via the first ADC channel. The resistance value of the second sampling resistor is adapted to the A-level current detection range and is connected to the MCU via the second ADC channel. The production test task engine enables the first ADC channel during standby current testing and enables the second ADC channel during sleep current testing.

[0102] Working Principle: Based on the method implementation, this embodiment constructs a complete hardware and software integrated support system. The core of the system's working principle revolves around "self-management of configuration data" and "hardware decoupling of test tasks." In existing technologies, threshold parameters rely on external host computer database management, which not only increases system complexity but also causes production line shutdowns due to network or communication failures. Furthermore, the hardware layer of existing systems cannot adapt to the current detection requirements of multiple chips with vastly different power consumption. This system, through modular design, decouples configuration management, interface abstraction, task scheduling, and hardware detection, constructing a highly cohesive and loosely coupled automated testing closed loop. Its specific collaborative working principle is as follows:

[0103] After the system powers on, the configuration management module first takes over the read and write control of the MCU's internal Flash memory. This module is responsible for maintaining a "two-dimensional threshold matrix for chip frequency bands". In this embodiment, the matrix adopts a linear addressing method, and the row index is dynamically calculated based on the expression "chip type identifier x total number of frequency bands + frequency band identifier". Each group of records has a fixed length. This design allows for the efficient storage of hundreds of groups of RSSI judgment thresholds and current judgment thresholds for different chips and frequency bands within a limited Flash storage space. Production line engineers send threshold configuration commands through the serial port interaction layer. After receiving the commands, the configuration management module automatically calculates the offset address and performs the write operation. There is no need to connect to the host computer database. When the production test task engine performs the test, it only needs to provide the current chip and frequency band. The configuration management module can directly index the corresponding judgment criteria from the Flash memory within nanoseconds. This achieves device-side self-management of threshold parameters and completely eliminates the dependence on external systems. This is a significant breakthrough over the existing technology of "relying on external databases".

[0104] Secondly, the production testing task engine, acting as the system's brain, runs as a real-time operating system task. Internally, it includes a state machine orchestration unit. The system strictly follows a serial sequence for scheduling tests: "RF transceiver → DIO detection → packet loss rate → power consumption." During this process, all operation requests issued by the task engine do not directly access hardware registers but are instead submitted to a unified chip operation interface layer. Based on the chip type loaded by the configuration management module, the interface layer dynamically binds to specific modules in the chip driver adaptation layer at runtime. This design ensures that regardless of changes in the underlying hardware, the upper-layer task orchestration logic remains absolutely stable, guaranteeing the consistency and traceability of production testing quality.

[0105] Furthermore, in the power consumption and current testing phase, the hardware layer of this embodiment features a sophisticated dual-channel parallel detection circuit. Since the current difference between the LoRa module in standby and sleep states spans three orders of magnitude, corresponding to mA and μA levels respectively, using a single sampling resistor can lead to insufficient resolution due to an insignificant ADC input voltage during sleep state current measurement, or excessive voltage drop across the sampling resistor during standby state current measurement, affecting the module's normal operation. This system adapts to the mA level by setting a first sampling resistor with different resistance values ​​and a second sampling resistor to adapt to the μA level, connecting them to the two independent ADC channels of the MCU respectively. During standby current testing, the first ADC channel is automatically activated to acquire voltage and convert it to mA-level current; during sleep current testing, the system automatically switches to the second ADC channel to acquire μA-level current. This approach ensures high detection accuracy across the entire measurement range, accurately capturing power consumption anomalies. Finally, the analog voltage signal output by the current detection chip is sampled through dual channels and compared with the corresponding judgment threshold read from the Flash threshold matrix by the configuration management module. The judgment result is then output by the result indicator.

[0106] In summary, this system receives instructions through the "serial port interaction layer," manages data through the "configuration management module," isolates hardware differences through the "unified interface and driver adaptation layer," and orchestrates processes through the "production testing task engine." Each module performs its own function and works collaboratively, achieving full compatibility of a single hardware fixture and a single firmware for multi-chip production lines. This effectively solves the long-standing problems of low switching efficiency, high maintenance costs, and limited measurement accuracy in the production testing field.

[0107] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A universal automated production testing method for LoRa modules compatible with multiple chips, characterized in that, include: S1. After the system is powered on, it loads the currently persistent chip type identifier and test frequency band identifier from the Flash memory, and initializes the corresponding reference metal module according to the chip type identifier. S2, monitors the pressure detection pin of the production test fixture. When the pressure signal is triggered, the production test main state machine is started. S3, the production test master state machine calls the underlying driver adaptation layer that matches the current chip type identifier through the unified chip operation interface layer, and sequentially performs RF transceiver performance test, DIO pin integrity test, packet loss rate test and power consumption current test. The DIO pin integrity test includes a DIO pin indirect verification step based on radio frequency protocol interrupts. S4 records the results of each test, terminates the test and outputs a failure signal via an indicator when any test item fails, and outputs a pass signal when all test items pass.

2. The universal automated production testing method for multi-chip compatible LoRa modules according to claim 1, characterized in that, The unified chip operation interface layer predefines a set of chip-independent operation interfaces, including an initialization interface, an RF parameter configuration interface, a data transmission interface, a receive start interface, a standby switching interface, a sleep switching interface, and a DIO detection interface. The underlying driver adaptation layer includes a first type of driver corresponding to the SX126x series and its compatible variants, a second type of driver corresponding to the SX127x series and its compatible variants, and a reference driver corresponding to the reference metal module. Each of the aforementioned operation interfaces routes and distributes requests to the corresponding driver based on the currently loaded chip type identifier.

3. The universal automated production testing method for multi-chip compatible LoRa modules according to claim 2, characterized in that, The indirect verification step based on the RF protocol interrupt specifically includes: Based on the currently loaded chip type identifier, automatically match the corresponding DIO level expectation mask; The CAD channel detection or RxTimeout receive timeout detection is initiated through the unified chip operation interface layer, and the actual encoded value of the DI0 pin status register is read back using the RF protocol interrupt. The actual encoded value is compared bit by bit with the automatically matched DIO level expectation mask: if they match, the DIO pin is determined to be intact; if they do not match, a pin open circuit or adjacent pin short circuit fault is determined. Among them, the SX126x series chips automatically match the DI0 combination encoding based on the CAD_DONE interrupt, and the SX127x series chips automatically match the DIO bit encoding mask based on the RxTimeout interrupt and the CAD_DONE interrupt.

4. The universal automated production testing method for multi-chip compatible LoRa modules according to claim 3, characterized in that, During the production testing process from S1 to S4, when switching the type of chip being tested, the following steps are included: Receive chip selection instructions containing the target chip enumeration number via serial port; Write the target chip enumeration number as a new chip type identifier into the designated storage area of ​​the MCU's internal Flash, and output a restart prompt; After the system restarts, the configuration loading module automatically reads the new chip type identifier from the Flash and completes the GPIO initialization and RF driver redirection loading accordingly, realizing chip type switching without programming.

5. The universal automated production testing method and system for LoRa modules compatible with multiple chips according to claim 1, characterized in that, The power consumption current test includes standby current test and sleep current test; The system acquires the current detection signal after voltage division by dual sampling resistors through dual ADC channels. The first ADC channel is used for mA-level standby current detection and the second ADC channel is used for μA-level sleep current detection. The detected value is compared with the corresponding current judgment threshold read from the Flash threshold matrix.

6. A universal automated production testing system for multi-chip compatible LoRa modules, used to execute the universal automated production testing method for multi-chip compatible LoRa modules as described in any one of claims 1-5, characterized in that, include: The serial port interaction layer is used to parse externally input test commands, which include at least chip model selection commands, frequency band selection commands, and threshold configuration commands. The configuration management module is used to manage the chip type identifier, test frequency band identifier, and chip-frequency band two-dimensional threshold matrix stored in the MCU's internal Flash, and to read, write, and update the identifier and matrix in response to the instructions of the serial port interaction layer; The unified chip operation interface layer defines a set of standard operation interfaces that are independent of the chip model, and routes and distributes the standard operation to the corresponding underlying driver according to the currently loaded chip type identifier. The chip driver adaptation layer contains driver adaptation modules corresponding to various LoRa RF chip models. Each module encapsulates the SPI register operation, DIO interrupt handling, and RF state machine callback of the corresponding chip. The production test task engine runs as a real-time operating system task, which is used to schedule the execution of RF transceiver tests, DIO pin detection, packet loss rate tests and power consumption current tests in a predetermined order, and issue test commands through the unified chip operation interface layer. The hardware layer includes at least a reference metal module fixed to the base plate, a test interface for mounting the module under test, a current detection circuit, and a result indicator.

7. The universal automated production testing method and system for LoRa modules compatible with multiple chips according to claim 6, characterized in that, The chip driver adaptation layer includes at least: The first type of chip driver module is adapted to the SX126x series chips and their compatible variants, and contains the first expected mask of the DIO combination encoding in the corresponding CAD_DONE interrupt; The second type of chip driver module is adapted to the SX127x series chips and their compatible variants, and includes a second expected mask for the DIO bit encoding in the corresponding RxTimeout interrupt and the DIO bit encoding in the CAD_DONE interrupt. The reference metal detector driver module is used to control the radio frequency testing interaction between the reference metal detector module and the module under test; When the unified chip operation interface layer detects a change in the current chip type identifier, it dynamically switches and binds to the corresponding driver module.

8. The universal automated production testing method and system for LoRa modules compatible with multiple chips according to claim 6, characterized in that, The chip-band two-dimensional threshold matrix is ​​stored in Flash memory using linear addressing; the row index of the matrix is ​​calculated according to the following expression: Chip type identifier x total number of frequency bands + frequency band identifier Each record group has a fixed byte length; each record group includes upper and lower limit fields for transmit RSSI determination threshold, upper and lower limit fields for receive RSSI determination threshold, and reserved extended fields; the configuration management module supports configuring thresholds group by group and full table query via serial port commands.

9. A universal automated production testing method and system for LoRa modules compatible with multiple chips, as described in claim 6, is characterized in that... The production testing task engine includes a state machine orchestration unit, and the RF transceiver test, DIO pin detection, packet loss rate test and power consumption current test are executed in a serial order. The state machine orchestration unit configures a retry counter for each test. When a single test fails and the number of retries has not been exhausted, it will automatically retry. When the number of retries is exhausted and the test still fails, the entire process will be terminated immediately and the result indicator will be driven to display a red light. When all test items pass, the result indicator will display a green light.

10. A universal automated production testing method and system for LoRa modules compatible with multiple chips, as described in claim 6, characterized in that, The current detection circuit includes a current detection chip, a first sampling resistor, a second sampling resistor, a first ADC channel, and a second ADC channel; the resistance value of the first sampling resistor is adapted to the mA-level current detection range, and it is connected to the MCU via the first ADC channel; The resistance value of the second sampling resistor is adapted to the Class A current detection range and is connected to the MCU via the second ADC channel; The production testing task engine enables the first ADC channel during standby current testing and enables the second ADC channel during sleep current testing.

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