Message sending method and device for extending interconnected chips and chip interconnection system

Abstract

This invention discloses a message transmission method, apparatus, and chip interconnect system for extended interconnect chips, relating to the field of chip communication technology, and designed to effectively improve message transmission efficiency. The method is applied to a sending-end computing chip and includes: obtaining a domain identifier corresponding to a destination address based on a local routing table, wherein the domain identifier is pre-stored in the local routing table and is used to identify the chip extension architecture type to which the destination address belongs; determining a target processing strategy corresponding to the domain identifier based on the domain identifier; and generating a transaction layer message and sending it to the link layer based on the target processing strategy and the domain identifier, wherein the transaction layer message carries the domain identifier. This invention is applicable to extended interconnect chips.

Description

Technical Field

[0001] This invention relates to the field of chip communication technology, and in particular to a message transmission method, apparatus, chip interconnection system, and electronic device for extending interconnect chips. Background Technology

[0002] With the rapid development of artificial intelligence (AI) and large-scale high-performance computing (HPC), the computing power of a single chip can no longer meet the needs of large model training and inference. It is necessary to connect hundreds or thousands of computing chips such as GPUs and CPUs into large-scale computing clusters through high-speed interconnect technology.

[0003] In existing technologies, a unified interconnection protocol scheme has been proposed to achieve interconnection and interoperability in various network scenarios. For example... Figure 1 As shown, this scheme constructs a complete protocol stack including the physical layer, data link layer, network layer, transport layer, transaction layer, functional layer, and management layer, aiming to seamlessly connect the heterogeneous computing power of the entire cluster into a whole, so that the same protocol can be applied to a variety of interconnection scenarios.

[0004] However, the aforementioned unified interconnection protocol requires all network scenarios to run on the same complete protocol stack. For example, in tightly coupled scenarios such as scale-up networks, the network scope is small and the topology is relatively fixed, so the complex functions of the network layer routing and transport layer are not actually needed. But in order to maintain the integrity of the protocol stack and interoperability, all fields and processing logic of these layers need to be retained. The additional overhead caused by this design is not only reflected in the bandwidth resources occupied by invalid fields in the packet header, but also in the requirement for the chip hardware pipeline to traverse unnecessary protocol layers such as the network layer and transport layer, further increasing the processing burden and reducing packet transmission efficiency. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide a message transmission method, apparatus, chip interconnect system, and electronic device for extending interconnect chips, which can effectively improve message transmission efficiency.

[0006] In a first aspect, embodiments of the present invention provide a message transmission method for an extended interconnect chip, applied to a sending-end computing chip, the method comprising: obtaining a domain identifier corresponding to a destination address based on a local routing table, the domain identifier being pre-stored in the local routing table for identifying the chip extension architecture type to which the destination address belongs; determining a target processing strategy corresponding to the domain identifier based on the domain identifier; and generating a transaction layer message and sending it to the link layer based on the target processing strategy and the domain identifier, wherein the transaction layer message carries the domain identifier.

[0007] In one implementation, the domain identifier is used to identify at least one of the following chip expansion architecture types: vertical interconnection network, horizontal interconnection network, and data center network.

[0008] In one implementation, obtaining the domain identifier corresponding to the destination address based on the local routing table includes: matching the destination address from the local routing table to obtain the domain identifier of the destination address.

[0009] In one implementation, determining the target processing strategy corresponding to the domain identifier based on the domain identifier includes: matching the congestion control strategy and / or link retransmission strategy corresponding to the domain identifier from a pre-configured strategy set based on the domain identifier.

[0010] In one implementation, matching a congestion control policy corresponding to the domain identifier from a pre-configured policy set includes: when the domain identifier corresponds to a vertically connected network, the congestion control policy matching is to skip the processing of the explicit congestion notification field; when the domain identifier corresponds to a horizontally connected network, the congestion control policy matching is to encapsulate the basic explicit congestion notification field; and when the domain identifier corresponds to an inter-datacenter network, the congestion control policy matching is to encapsulate an extended congestion control field.

[0011] In one implementation, matching the link retransmission policy corresponding to the domain identifier from a pre-configured policy set includes: when the domain identifier corresponds to a vertical connection network, the link layer retransmission policy is matched to enable link layer retransmission to ensure lossless transmission; when the domain identifier corresponds to a horizontal connection network or an inter-data center network, the link layer retransmission policy is matched to disable lossless retransmission to reduce latency jitter.

[0012] In one implementation, generating a transaction layer message based on the domain identifier includes: adding a domain field to the transaction layer message header, wherein the value of the domain field corresponds to the domain identifier.

[0013] In one implementation, the domain identifier is generated by a border switch of the chip extension architecture type through pre-configuration or border gateway protocol to collect topology information and stored in the local routing table of each node of the extended interconnect chip.

[0014] Secondly, embodiments of the present invention provide a message forwarding method for extended interconnect chips, applied to a switching chip. The method includes: receiving a transaction layer message, the header of which carries a domain identifier, the domain identifier being used to identify the chip extended architecture type to which the destination address of the transaction layer message belongs; extracting the domain identifier from the header of the transaction layer message; determining a forwarding processing strategy corresponding to the domain identifier based on the domain identifier; and forwarding the transaction layer message according to the forwarding processing strategy.

[0015] In one implementation, the forwarding processing strategy includes performing congestion control marking processing on the transaction layer message when the domain identifier corresponds to a horizontal connection network or an inter-data center network.

[0016] Thirdly, embodiments of the present invention also provide a message sending apparatus for an extended interconnect chip, applied to a sending-end computing chip. The apparatus includes: an acquisition module, configured to acquire a domain identifier corresponding to a destination address based on a local routing table, wherein the domain identifier is pre-stored in the local routing table and is used to identify the chip extension architecture type to which the destination address belongs; a first determination module, configured to determine a target processing strategy corresponding to the domain identifier based on the domain identifier; and a generation module, configured to generate a transaction layer message based on the target processing strategy and the domain identifier and send it to the link layer, wherein the transaction layer message carries the domain identifier.

[0017] In one implementation, the domain identifier is used to identify at least one of the following chip expansion architecture types: vertical interconnection network, horizontal interconnection network, and data center network.

[0018] In one implementation, the acquisition module is specifically used to: match the destination address from the local routing table and obtain the domain identifier of the destination address.

[0019] In one implementation, the first determining module is specifically used to: match the congestion control policy and / or link retransmission policy corresponding to the domain identifier from a pre-configured policy set according to the domain identifier.

[0020] In one implementation, the first determining module is specifically configured to: when the domain identifier corresponds to a vertically connected network, the congestion control policy is matched to skip the processing of the explicit congestion notification field; when the domain identifier corresponds to a horizontally connected network, the congestion control policy is matched to encapsulate the basic explicit congestion notification field; and when the domain identifier corresponds to an inter-datacenter network, the congestion control policy is matched to encapsulate an extended congestion control field.

[0021] In one implementation, the first determining module is specifically used to: when the domain identifier corresponds to a vertically connected network, the link layer retransmission policy is matched to enable link layer retransmission to ensure lossless transmission; when the domain identifier corresponds to a horizontally connected network or an inter-data center network, the link layer retransmission policy is matched to disable lossless retransmission to reduce latency jitter.

[0022] In one implementation, the generation module is specifically used to: add a field to the transaction layer message header, wherein the value of the field corresponds to the field identifier.

[0023] In one implementation, the domain identifier is generated by a border switch of the chip extension architecture type through pre-configuration or border gateway protocol to collect topology information and stored in the local routing table of each node of the extended interconnect chip.

[0024] Fourthly, embodiments of the present invention also provide a message forwarding apparatus for an extended interconnect chip, applied to a switching chip. The apparatus includes: a receiving module for receiving a transaction layer message, the header of which carries a domain identifier, the domain identifier being used to identify the chip extended architecture type to which the destination address of the transaction layer message belongs; an extraction module for extracting the domain identifier from the header of the transaction layer message; a second determining module for determining a forwarding processing strategy corresponding to the domain identifier based on the domain identifier; and a forwarding module for forwarding the transaction layer message according to the forwarding processing strategy.

[0025] In one implementation, the forwarding processing strategy includes performing congestion control marking processing on the transaction layer message when the domain identifier corresponds to a horizontal connection network or an inter-data center network.

[0026] Fifthly, embodiments of the present invention also provide a chip interconnect system, comprising: a transmitting end computing chip for transmitting transaction layer messages, wherein the transmitting end computing chip is a message transmitting device for extending interconnect chips as described in any one of the embodiments of the present invention; a switching chip connected to the transmitting end computing chip for receiving the transaction layer messages transmitted by the transmitting end computing chip and for forwarding the transaction layer messages, wherein the switching chip is a message forwarding device for extending interconnect chips as described in any one of the embodiments; and a receiving end computing chip connected to the switching chip for receiving the transaction layer messages forwarded by the switching chip.

[0027] In a sixth aspect, embodiments of the present invention also provide an electronic device, the electronic device comprising: a processor and a memory, the processor being electrically connected to the memory; the memory being used to store executable program code; the processor running a program corresponding to the executable program code by reading the executable program code stored in the memory, thereby implementing the message transmission method for extending interconnect chips as described in any one of the embodiments of the present invention.

[0028] The message transmission method, apparatus, chip interconnect system, and electronic device for extended interconnect chips provided by embodiments of the present invention can obtain the domain identifier corresponding to the destination address based on a local routing table, determine the target processing strategy corresponding to the domain identifier based on the domain identifier, and generate a transaction layer message and send it to the link layer based on the target processing strategy and the domain identifier, wherein the transaction layer message carries the domain identifier. Since the pre-stored domain identifier is directly obtained from the local routing table, the chip extension architecture type to which the destination address belongs can be obtained, and the target processing strategy corresponding to the domain identifier can be adapted to generate a transaction layer message and send it to the link layer. This avoids protocol redundancy and additional overhead caused by maintaining a unified full-featured protocol stack for compatibility with multiple network scenarios, thereby effectively improving message transmission efficiency. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 For existing chip interconnection scenarios, a unified protocol stack is needed; Figure 2 A flowchart of a message transmission method for extending interconnect chips provided as an embodiment of the present invention; Figure 3 A schematic diagram of chip interconnection in a message transmission method for extending interconnect chips provided in an embodiment of the present invention; Figure 4 A flowchart of a message forwarding method for extending interconnect chips provided as an embodiment of the present invention; Figure 5 A detailed flowchart of a message transmission method for extending interconnect chips provided for embodiments of the present invention; Figure 6 A schematic diagram of a message sending device for expanding interconnect chips provided in an embodiment of the present invention; Figure 7A schematic diagram of a message forwarding device for extending interconnect chips provided in an embodiment of the present invention; Figure 8 A schematic diagram of a chip interconnect system provided for an embodiment of the present invention; Figure 9 A schematic diagram of an electronic device provided as an embodiment of the present invention. Detailed Implementation

[0031] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0032] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0033] In a first aspect, embodiments of the present invention provide a message transmission method for extending interconnect chips, which can effectively improve message transmission efficiency.

[0034] like Figure 2 As shown, the message transmission method for extending interconnect chips provided by embodiments of the present invention is applied to a transmitting end computing chip, and the method may include: S11, Based on the local routing table, obtain the domain identifier corresponding to the destination address. The domain identifier is pre-stored in the local routing table and is used to identify the chip extension architecture type to which the destination address belongs. In this step, before initiating data transmission, the sending-end computing chip determines the network domain category to which the destination address belongs. The domain identifier is a logical-level abstract label used to distinguish different extension dimensions of inter-chip interconnection, such as vertically connected networks, horizontally connected networks, and data center networks. The domain identifier is stored in a local routing table and can be obtained through a mapping relationship maintained internally by the chip. This mapping relationship can originate from static system configuration or be established based on a dynamic learning mechanism; this invention does not impose a single limitation on this. In this implementation, based on the local routing table, the sending-end computing chip obtains the domain identifier corresponding to the destination address without relying on real-time intervention from an external control plane. It quickly identifies the environment to which the receiving end belongs locally on the data plane, thereby providing a decision-making basis for subsequent differentiated protocol processing.

[0035] S12, determine the target processing strategy corresponding to the domain identifier based on the domain identifier; In this step, the corresponding target processing strategy can be determined based on the identified domain identifier. Since the requirements for transmission latency, bandwidth utilization, packet loss tolerance, and congestion feedback speed differ objectively for extended domains corresponding to different domain identifiers, it is permissible to bind independent sets of protocol processing strategies to different domain identifiers. These strategies can include the selection of transaction layer encapsulation formats, the enabling or disabling of end-to-end flow control mechanisms, and the adjustment of link layer retransmission intensity. In this way, strategy switching can be triggered based on the domain identifier, without the need to parse complex network topology or perform hop-by-hop negotiation, thus meeting the low-latency requirements of high-performance computing.

[0036] S13, Based on the target processing strategy and the domain identifier, generate a transaction layer message and send it to the link layer, wherein the transaction layer message carries the domain identifier.

[0037] In this step, the sending end applies the processing strategy determined in step S12 to the packet generation process and carries the domain identifier as an inherent attribute of the packet in the transaction layer for downward transmission. As a core layer in the protocol stack, the transaction layer attaches a domain identifier to its packets, meaning this attribute will accompany the packet throughout the entire protocol stack up to the physical link. This scheme does not limit the specific location of this identifier in the transaction layer packet; it can be a predefined field in the packet header, or a specific type of control primitive or accompanying metadata. By embedding domain information at the packet level, the downstream link layer or physical layer can autonomously adapt to the underlying retransmission and flow control parameters based on this identifier, greatly simplifying the protocol conversion overhead in heterogeneous network convergence scenarios.

[0038] The message transmission method for extended interconnect chips provided in the embodiments of the present invention can obtain the domain identifier corresponding to the destination address based on a local routing table, determine the target processing strategy corresponding to the domain identifier based on the domain identifier, and generate a transaction layer message and send it to the link layer based on the target processing strategy and the domain identifier, wherein the transaction layer message carries the domain identifier. Since the pre-stored domain identifier is directly obtained from the local routing table, the chip extension architecture type to which the destination address belongs can be obtained, and the target processing strategy corresponding to the domain identifier can be adapted to generate a transaction layer message and send it to the link layer. This avoids protocol redundancy and additional overhead caused by maintaining a unified full-featured protocol stack for compatibility with multiple network scenarios, thereby effectively improving message transmission efficiency.

[0039] Specifically, the domain identifier in the embodiments of the present invention can be used to identify at least one of the following chip expansion architecture types: scaleup, scaleout, and scaleacross.

[0040] Vertical interconnect networks refer to intra-node networks where GPUs (Central Processing Units, Graphics Processing Units) and CPUs (CPUs) are directly connected. They are characterized by direct chip output and direct connection to peer chips, with a relatively small network range and extremely low latency requirements. Horizontal interconnect networks refer to intra-data center and inter-supernode networks where CPUs and GPUs are connected via NICs (Network Interface Cards). They are characterized by data transmission via NICs and have certain requirements for latency, bandwidth, and speed, but these are less stringent than those for vertical interconnect networks. Inter-data center networks refer to networks used for AI (Artificial Intelligence) training and inference between data centers, with longer connection distances compared to horizontal interconnect networks.

[0041] For example, such as Figure 3 As shown, the domain identifier in this embodiment of the invention can be a 2-bit field, encoded as follows: 00 represents a vertically connected network domain, 01 represents a horizontally connected network domain, 10 represents an inter-data center network domain, and 11 represents reserved. Thus, when the domain identifier is 00, it indicates that the destination of the current message is a node within the vertically connected network domain; when the domain identifier is 01, it indicates that the destination of the current message is a node within the horizontally connected network domain; and when the domain identifier is 10, it indicates that the destination of the current message is a node in the inter-data center network.

[0042] The embodiments of the present invention can achieve unified identification and differentiated processing of three network scenarios—vertical connection network, horizontal connection network, and inter-data center network—at the protocol stack transaction layer. This avoids the chip area and power consumption overhead caused by maintaining an independent protocol stack for a single scenario, thereby significantly improving the processing efficiency and time expectation certainty of cross-scenario communication while ensuring the utilization rate of chip IO Die resources.

[0043] It should be noted that the domain identifier is not an inherent attribute of the chip or node, but a relative identifier, the value of which depends on the network location relationship between the sender and the destination. In other words, for the same destination node, the domain identifier corresponding to the destination node may be different when the sender is different.

[0044] Specifically, the domain identifier is used to identify the type of chip extension architecture the destination address is in relative to the current sender—that is, whether the destination node is located in the vertical connection network domain, the horizontal connection network domain, or the inter-data center network domain of the current sender. Since different senders are located in different positions in the network topology, their connection relationships with the same destination node may belong to different network domain types. Therefore, the same destination address may correspond to different domain identifier values ​​in the local routing tables of different senders.

[0045] For example, suppose a network includes nodes A, B, and C. Nodes A and B are located within the same supernode and interconnected via direct chip output (vertical connection network domain), while node C is located in another supernode and interconnected with node A's supernode via a NIC (network interface card) (horizontal connection network domain). In this topology, for the sending node A, the destination node B belongs to the vertical connection network domain (domain identifier 00), while the destination node C belongs to the horizontal connection network domain (domain identifier 01). However, for the sending node C, the destination node A belongs to the horizontal connection network domain (domain identifier 01), not the vertical connection network domain.

[0046] This invention also enables the acquisition of accurate domain information without relying on real-time interaction with the control plane. For example, in one embodiment, the domain identifier is generated by a border switch of the chip extension architecture type through pre-configuration or border gateway protocol to collect topology information, and stored in the local routing table of each node of the extended interconnect chip.

[0047] In this embodiment, the domain identifier is generated by the switch (also called a switching chip) at each boundary. For example... Figure 3 As shown, the border switch can directly set the domain identifier through pre-configuration or collect topology information through routing protocols such as Border Gateway Protocol (BGP). After knowing the network domain type between nodes, it generates the corresponding domain identifier.

[0048] Unlike schemes that require real-time querying of domain information through the control plane, this implementation pre-stores domain identifiers in a local routing table. The sending device can directly match the destination address and obtain the domain identifier from the local routing table before sending a packet, thereby reducing latency caused by control plane interactions. The sending device uses the domain identifier to determine the network domain of the receiver, forming clear timing expectations during training and inference, minimizing cross-domain calls, and determining congestion control and retransmission strategies at the transaction and link layers.

[0049] To enable the rapid retrieval of the corresponding domain identifier based on the destination address at the sending end, this embodiment provides an implementation method based on routing table matching. For example, in one implementation, retrieving the domain identifier corresponding to the destination address based on the local routing table may include: matching the destination address from the local routing table to obtain the domain identifier of the destination address.

[0050] In this embodiment, the domain identifier is pre-stored in the local routing table of each node of the extended interconnect chip. The local routing table not only contains conventional routing and forwarding information (such as the mapping relationship between destination address and outgoing interface), but also contains a domain identifier field corresponding to each destination address.

[0051] Specifically, domain identifiers can be generated by the switches at each boundary through pre-configuration or topology information collection protocols such as Border Gateway Protocol (BGP), and distributed to the local routing tables of each node. When the sending-end computing chip sends a packet to the destination address, it can look up the destination address in the local routing table. If a match is found, the domain identifier field corresponding to the destination address is read, thereby determining the chip extension architecture type of the receiver.

[0052] For example, the local routing table stores the domain identifier 00 (within the vertically connected network domain) for destination address A and the domain identifier 01 (within the horizontally connected network domain) for destination address B. When the sending end computing chip sends a message to destination address A, it can look up the local routing table, match the destination address A, and obtain the corresponding domain identifier 00, thus knowing that the receiver is located within the vertically connected network domain.

[0053] Existing technologies rely on the control plane to obtain the scale domain information of the destination address, requiring additional queries or signaling handshakes before each communication, resulting in significant latency and protocol overhead. In this embodiment of the invention, by directly pre-setting the domain identifier in the local routing table and transaction layer messages, the number of pipeline stages in message processing and the number of on-chip memory accesses are reduced, thereby reducing message transmission latency and power consumption and improving chip processing efficiency.

[0054] After obtaining the domain identifier in step S11, the corresponding processing strategy can be determined based on the domain identifier to achieve differentiated adaptation under different network domains. For example, in one embodiment, determining the target processing strategy corresponding to the domain identifier may include: matching the congestion control strategy and / or link retransmission strategy corresponding to the domain identifier from a pre-configured strategy set based on the domain identifier.

[0055] In this embodiment, the pre-configured policy set includes processing policies corresponding to different domain identifiers. Therefore, in this embodiment, the domain identifier is not only used to identify the network domain type, but also serves as an index to indicate the congestion control policy or link layer retransmission policy that the sending device should adopt.

[0056] Specifically, when generating a transaction layer message, the sending end computing chip retrieves and matches the target processing policy corresponding to the acquired domain identifier from the pre-configured policy set. The target processing policy can be a congestion control policy or a link layer retransmission policy.

[0057] The congestion control strategy determines whether the transaction layer message carries an Explicit Congestion Notification (ECN) field and the encapsulation complexity of that field. The link layer retransmission strategy determines whether to enable the link layer retransmission (LLR) function to ensure lossless transmission. By dynamically matching the target processing strategy with domain identifiers, the protocol stack can adaptively adjust its behavior according to the characteristics of different network domains, avoiding redundant overhead in scenarios where certain protocol functions are not needed. This reduces chip implementation complexity while ensuring optimal performance in various scenarios.

[0058] Furthermore, different network domains have different requirements for congestion control mechanisms. This embodiment configures matching congestion control policies for each type of domain. For example, in one implementation, matching a congestion control policy corresponding to the domain identifier from a pre-configured policy set may include: when the domain identifier corresponds to a vertically connected network, the congestion control policy matching is to skip the processing of the explicit congestion notification field; when the domain identifier corresponds to a horizontally connected network, the congestion control policy matching is to encapsulate the basic explicit congestion notification field; when the domain identifier corresponds to an inter-datacenter network, the congestion control policy matching is to encapsulate an extended congestion control field.

[0059] In this embodiment of the invention, the specific congestion control strategy is determined from the pre-configured strategy set based on the value of the domain identifier.

[0060] If the domain identifier corresponds to the vertical connection network (e.g., the domain identifier value is 00), since the vertical connection network is a tightly coupled network directly from the chip, the network range is relatively small and the topology is simple. It does not require a complex congestion control mechanism. Therefore, the congestion control strategy is to skip the processing of the explicit congestion notification field. That is, the transaction layer does not need to pay attention to the explicit congestion notification field when packaging, nor does it need to encapsulate any congestion control information.

[0061] If the domain identifier corresponds to a horizontal connection network (e.g., the domain identifier value is 01), since the horizontal connection network realizes the connection between data centers and supernodes through the NIC network card, it has certain requirements for latency and bandwidth and may be congested. Therefore, the congestion control strategy is to encapsulate the basic explicit congestion notification field. The transaction layer needs to encapsulate the basic explicit congestion notification information in the message.

[0062] If the domain identifier corresponds to the inter-data center network (e.g., the domain identifier value is 10), due to the longer connection distance and more complex network environment of the inter-data center network, more refined congestion control methods are required. Therefore, the congestion control strategy is matched with an encapsulated extended congestion control field, and the transaction layer needs to prepare more complex congestion control information.

[0063] In this way, by matching the congestion control field as an encapsulation extension when the domain identifier corresponds to the inter-data center network, the embodiments of the present invention realize the dynamic adaptation of the congestion control strategy with the network domain type, thereby improving the overall network transmission efficiency.

[0064] In this embodiment of the invention, the link layer retransmission strategy can be configured differently in different network domains to meet their respective requirements for reliability and latency jitter. For example, in one implementation, matching the link retransmission strategy corresponding to the domain identifier from a pre-configured strategy set may include: when the domain identifier corresponds to a vertically connected network, the link layer retransmission strategy is matched to enable link layer retransmission to ensure lossless transmission; when the domain identifier corresponds to a horizontally connected network or an inter-data center network, the link layer retransmission strategy is matched to disable lossless retransmission to reduce latency jitter.

[0065] In this embodiment of the invention, a specific link layer retransmission strategy is determined from a pre-configured strategy set based on the value of the domain identifier.

[0066] If the domain identifier corresponds to the vertical connection network (for example, the domain identifier value is 00), since the vertical connection network is a tightly coupled network directly output from the chip, the reliability requirements are extremely high, and lossless transmission needs to be ensured. Therefore, the link layer retransmission strategy is matched to enable link layer retransmission (LLR) to ensure lossless transmission.

[0067] If the domain identifier corresponds to a horizontal connection network (e.g., the domain identifier value is 01) or an inter-data center network (e.g., the domain identifier value is 10), lossless transmission is not the highest priority in these network scenarios, and enabling lossless retransmission may introduce latency jitter, affecting transmission efficiency. Therefore, the link layer retransmission strategy is matched to disable lossless retransmission to reduce latency jitter.

[0068] In this way, the link layer can dynamically adjust the retransmission strategy according to the domain identifier, so that packets can be reported in a timely manner and processed by the upper layer protocol or application layer, thereby avoiding the uncertain delay caused by lossless retransmission at the link layer.

[0069] After determining the target processing strategy in step S12, the sending end needs to generate a transaction layer message carrying a domain identifier for identification by the link layer and subsequent nodes. For example, in one implementation, generating a transaction layer message based on the domain identifier may include adding a domain field to the transaction layer message header, the value of which corresponds to the domain identifier.

[0070] In this embodiment, the domain identifier is integrated into the transaction layer of the protocol. Specifically, a new domain field is added to the designated reserved bits in the transaction layer header, and the value of this domain field is the encoded value of the domain identifier. When assembling a service message, the sending device writes the corresponding 2-bit extended mode code (00, 01, or 10) into the newly added domain field in the transaction layer header according to the domain identifier obtained from the local routing table. Then, it completes the encapsulation, verification, and transmission of the message according to the original protocol rules, without the need to add a separate signaling message.

[0071] Specifically, the sending end computing chip detects the extended architecture type of the current system during initialization. When sending messages from the transaction layer to the link layer, the corresponding domain identifier is written into the field field of the transaction layer message header. Finally, the transaction layer message carrying the domain identifier is passed to the link layer and lower layers for subsequent encapsulation and transmission processing.

[0072] This embodiment adds a field field to the transaction layer message header to carry the field identifier, enabling the field information to be transmitted as an embedded attribute along with the data packet. Therefore, this embodiment of the invention can carry the field information to the receiving end and switching chip without additional independent signaling messages. The receiving end and intermediate switching nodes can directly extract the field identifier from the message header and perform corresponding policy adaptation during the message parsing stage, without needing to interact with the control plane to obtain context information. This reduces additional interaction latency and signaling overhead in the data path, improving the processing efficiency of the entire interconnection system.

[0073] Secondly, embodiments of the present invention provide a message forwarding method for extended interconnect chips, which, when applied to switching chips, can effectively improve message transmission efficiency.

[0074] like Figure 4 As shown, the packet forwarding method for extended interconnect chips provided by embodiments of the present invention is applied to switching chips, and the method may include: S21, Receive a transaction layer message, the header of which carries a field identifier, which is used to identify the chip extension architecture type to which the destination address of the transaction layer message belongs; S22, Extract the domain identifier from the header of the transaction layer message; S23, determine the forwarding processing strategy corresponding to the domain identifier based on the domain identifier; S24, the transaction layer message is forwarded according to the forwarding processing strategy.

[0075] The packet forwarding method for extended interconnect chips provided in embodiments of the present invention is applied to a switching chip and can receive transaction layer packets. The header of the transaction layer packet carries a domain identifier, which identifies the chip extension architecture type to which the destination address of the transaction layer packet belongs. The domain identifier is extracted from the header of the transaction layer packet, and a forwarding processing strategy corresponding to the domain identifier is determined based on the domain identifier. The transaction layer packet is then forwarded according to the forwarding processing strategy. Because the domain identifier can be extracted from the header of the transaction layer packet, and the forwarding processing strategy corresponding to the domain identifier can be determined based on the domain identifier, and the transaction layer packet can be forwarded according to the forwarding processing strategy, protocol redundancy and additional overhead caused by maintaining a unified full-function protocol stack for compatibility with multiple network scenarios are avoided, thereby effectively improving packet transmission efficiency.

[0076] Specifically, when a switching chip receives a transaction layer message carrying a domain identifier, it can determine the corresponding forwarding strategy based on the domain identifier. For example, in one embodiment, the forwarding strategy may include performing congestion control marking processing on the transaction layer message when the domain identifier corresponds to a lateral connection network or an inter-data center network.

[0077] In this embodiment of the invention, the switching chip extracts the domain identifier field of the transaction layer message header from the received service message, and determines the corresponding forwarding processing strategy based on the value of the domain identifier.

[0078] Specifically, after the switching chip obtains the 2-bit field identifier in the transaction layer message header, it performs corresponding processing based on the vertical connection network corresponding to the field identifier.

[0079] If the domain identifier corresponds to the vertical connection network (with a value of 00), then since the vertical connection network is a tightly coupled network directly output from the chip, the switching chip does not perform congestion control marking processing, but only processes the packet according to the normal forwarding logic; If the domain identifier corresponds to a horizontal connection network (value 01) or an inter-data center network (value 10), then because congestion may occur in these two network scenarios and a congestion control mechanism is required, the switching chip performs congestion control marking processing on the transaction layer message. The congestion control marking processing includes, but is not limited to: marking the explicit congestion notification (ECN) bit in the message, updating congestion status information, performing traffic shaping or queue scheduling, etc.

[0080] Therefore, this embodiment of the invention decentralizes the processing capability of congestion control marking to the switching chip, enabling the receiving end to obtain more accurate end-to-end congestion feedback, while avoiding the processor overhead caused by concentrating all congestion marking processing on the computing chip. This improves the response speed and accuracy of congestion control in long-distance transmission scenarios of horizontal connections and data center networks.

[0081] The following detailed description of the message transmission method for expanding interconnect chips provided by the embodiments of the present invention will be provided through specific examples.

[0082] like Figure 5 As shown, the message transmission method for extending interconnect chips provided by embodiments of the present invention is applied to a transmitting end computing chip, and the method may include: S501. Match the destination address from the local routing table and obtain the domain identifier of the destination address; S502, In the case where the domain identifier corresponds to a vertical connection network, the congestion control policy is matched to skip the processing of the explicit congestion notification field; S503, In the case that the domain identifier corresponds to a horizontal connection network, the congestion control policy is matched to encapsulate the basic explicit congestion notification field; S504. When the domain identifier corresponds to the inter-data center network, the congestion control policy is matched as an encapsulated extended congestion control field. S505. In the case where the domain identifier corresponds to a vertical connection network, the link layer retransmission policy is matched to enable link layer retransmission to ensure lossless transmission. S506. In the case where the domain identifier corresponds to a horizontal connection network or an inter-data center network, the link layer retransmission strategy is matched to disable lossless retransmission to reduce latency jitter. S507. A new field is added to the transaction layer message header, the value of which corresponds to the field identifier, and the message is sent to the link layer, wherein the transaction layer message carries the field identifier.

[0083] The above embodiments are used for message transmission methods of extended interconnect chips, applied to a sending end computing chip. Correspondingly, the embodiments of the present invention can also be used for message forwarding methods of extended interconnect chips, applied to a switching chip. The method may include: receiving a transaction layer message, the header of which carries a domain identifier, the domain identifier being used to identify the chip extended architecture type to which the destination address of the transaction layer message belongs; extracting the domain identifier from the header of the transaction layer message; determining a forwarding processing strategy corresponding to the domain identifier based on the domain identifier; and forwarding the transaction layer message according to the forwarding processing strategy.

[0084] Finally, the computing chip corresponding to the destination address receives the transaction layer message.

[0085] Thirdly, embodiments of the present invention provide a message sending device for extending interconnect chips, applied to a sending end computing chip, which can effectively improve message transmission efficiency.

[0086] like Figure 6As shown, the message sending apparatus for extending interconnect chips provided in the embodiments of the present invention is applied to a sending end computing chip, and the apparatus may include: The acquisition module 31 is used to acquire the domain identifier corresponding to the destination address based on the local routing table. The domain identifier is pre-stored in the local routing table and is used to identify the chip extension architecture type to which the destination address belongs. The first determining module 32 is used to determine the target processing strategy corresponding to the domain identifier based on the domain identifier; The generation module 33 is used to generate a transaction layer message and send it to the link layer based on the target processing strategy and the domain identifier, wherein the transaction layer message carries the domain identifier.

[0087] The message sending apparatus for extended interconnect chips provided in the embodiments of the present invention is applied to a transmitting end computing chip. It can obtain the domain identifier corresponding to the destination address based on a local routing table, determine the target processing strategy corresponding to the domain identifier based on the domain identifier, and generate a transaction layer message based on the target processing strategy and the domain identifier, and send it to the link layer. The transaction layer message carries the domain identifier. Since the pre-stored domain identifier is directly obtained from the local routing table, the chip extension architecture type to which the destination address belongs can be determined, and the target processing strategy corresponding to the domain identifier can be adapted to generate a transaction layer message and send it to the link layer. This avoids protocol redundancy and additional overhead caused by maintaining a unified full-function protocol stack for compatibility with multiple network scenarios, thereby effectively improving message transmission efficiency.

[0088] In one implementation, the domain identifier is used to identify at least one of the following chip expansion architecture types: vertical interconnection network, horizontal interconnection network, and data center network.

[0089] In one implementation, the acquisition module 31 is specifically used to: match the destination address from the local routing table and obtain the domain identifier of the destination address.

[0090] In one implementation, the first determining module 32 is specifically used to: match the congestion control policy and / or link retransmission policy corresponding to the domain identifier from a pre-configured policy set according to the domain identifier.

[0091] In one implementation, the first determining module 32 is specifically configured to: when the domain identifier corresponds to a vertically connected network, the congestion control policy is matched to skip the processing of the explicit congestion notification field; when the domain identifier corresponds to a horizontally connected network, the congestion control policy is matched to encapsulate the basic explicit congestion notification field; and when the domain identifier corresponds to an inter-datacenter network, the congestion control policy is matched to encapsulate an extended congestion control field.

[0092] In one implementation, the first determining module 32 is specifically configured to: when the domain identifier corresponds to a vertical connection network, the link layer retransmission policy is matched to enable link layer retransmission to ensure lossless transmission; when the domain identifier corresponds to a horizontal connection network or an inter-data center network, the link layer retransmission policy is matched to disable lossless retransmission to reduce latency jitter.

[0093] In one implementation, the generation module 33 is specifically used to: add a field to the transaction layer message header, wherein the value of the field corresponds to the field identifier.

[0094] In one implementation, the domain identifier is generated by a border switch of the chip extension architecture type through pre-configuration or border gateway protocol to collect topology information and stored in the local routing table of each node of the extended interconnect chip.

[0095] Fourthly, embodiments of the present invention also provide a message forwarding device for extending interconnect chips, which, when applied to switching chips, can effectively improve message transmission efficiency.

[0096] like Figure 7 As shown, the packet forwarding device for extending interconnect chips provided in the embodiments of the present invention is applied to a switching chip, and the device may include: The receiving module 41 is used to receive transaction layer messages, the header of which carries a field identifier, which is used to identify the chip extension architecture type to which the destination address of the transaction layer message belongs; Extraction module 42 is used to extract the domain identifier from the header of the transaction layer message; The second determining module 43 is used to determine the forwarding processing strategy corresponding to the domain identifier based on the domain identifier; The forwarding module 44 is used to forward the transaction layer message according to the forwarding processing strategy.

[0097] The packet forwarding apparatus for extended interconnect chips provided in embodiments of the present invention is applied to a switching chip and is capable of receiving transaction layer packets. The header of the transaction layer packet carries a domain identifier, which identifies the chip extension architecture type to which the destination address of the transaction layer packet belongs. The domain identifier is extracted from the header of the transaction layer packet, and a forwarding processing strategy corresponding to the domain identifier is determined based on the domain identifier. The transaction layer packet is then forwarded according to the forwarding processing strategy. Because the domain identifier can be extracted from the header of the transaction layer packet, and the forwarding processing strategy corresponding to the domain identifier can be determined based on the domain identifier, and the transaction layer packet can be forwarded according to the forwarding processing strategy, protocol redundancy and additional overhead caused by maintaining a unified full-function protocol stack for compatibility with multiple network scenarios are avoided, thereby effectively improving packet transmission efficiency.

[0098] In one embodiment, the forwarding processing strategy includes performing congestion control marking processing on the transaction layer message when the domain identifier corresponds to a lateral connectivity network or an inter-data center network. Fifthly, embodiments of the present invention also provide a chip interconnect system that can effectively improve message transmission efficiency.

[0099] like Figure 8 As shown, the chip interconnect system 60 provided in the embodiments of the present invention may include: a sending end computing chip 61, used to send transaction layer messages, wherein the sending end computing chip 61 is a message sending device for extending interconnect chips as described in any of the embodiments of the present invention; a switching chip 62, connected to the sending end computing chip 61, used to receive the transaction layer messages sent by the sending end computing chip 61 and to forward the transaction layer messages, wherein the switching chip 62 is a message forwarding device for extending interconnect chips as described in any of the embodiments; and a receiving end computing chip 63, connected to the switching chip 62, used to receive the transaction layer messages forwarded by the switching chip 61.

[0100] Sixthly, embodiments of the present invention also provide an electronic device that can effectively improve message transmission efficiency.

[0101] like Figure 9 As shown, the electronic device provided in the embodiments of the present invention may include: a processor 71 and a memory 72, wherein the processor 71 is connected to the memory 72; the memory 72 is used to store executable program code; the processor 71 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 72, so as to implement any of the message transmission methods for expanding interconnect chips provided in the foregoing embodiments.

[0102] The specific execution process of the above steps by the processor 71, as well as the steps further executed by the processor 71 by running executable program code, can be found in the description of the foregoing embodiments, and will not be repeated here.

[0103] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0104] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0105] In particular, the device embodiment is basically similar to the method embodiment, so the description is relatively simple. For relevant details, please refer to the description of the method embodiment.

[0106] For ease of description, the above apparatus is described by dividing it into various functional units / modules. Of course, in implementing this invention, the functions of each unit / module can be implemented in one or more software and / or hardware.

[0107] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the methods described above. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0108] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A message sending method for extending an interconnection chip, characterized by, The method, applied to a transmitting end computing chip, includes: Based on the local routing table, obtain the domain identifier corresponding to the destination address. The domain identifier is pre-stored in the local routing table and is used to identify the chip extension architecture type to which the destination address belongs. Based on the domain identifier, determine the target processing strategy corresponding to the domain identifier; Based on the target processing strategy and the domain identifier, a transaction layer message is generated and sent to the link layer, wherein the transaction layer message carries the domain identifier.

2. The message sending method for extended interconnect chips according to claim 1, wherein, The domain identifier is used to identify at least one of the following chip extension architecture types: vertical connection network, horizontal connection network, and data center network.

3. The message sending method for extended interconnect chips of claim 1, wherein, The step of obtaining the domain identifier corresponding to the destination address based on the local routing table includes: From the local routing table, match the destination address to obtain the domain identifier of the destination address.

4. The message sending method for extended interconnect chips of claim 1, wherein, The step of determining the target processing strategy corresponding to the domain identifier based on the domain identifier includes: Based on the domain identifier, a congestion control policy and / or link retransmission policy corresponding to the domain identifier are matched from a pre-configured policy set.

5. The message sending method for extended interconnect chips according to claim 4, wherein, The step of matching the congestion control policy corresponding to the domain identifier from the pre-configured policy set includes: In the case where the domain identifier corresponds to a vertically connected network, the congestion control policy is matched to skip the processing of the explicit congestion notification field; In the case where the domain identifier corresponds to a lateral connectivity network, the congestion control policy is matched by encapsulating the underlying explicit congestion notification field; When the domain identifier corresponds to the inter-datacenter network, the congestion control policy is matched as an encapsulated extended congestion control field.

6. The message transmission method for extending interconnect chips according to claim 4, characterized in that, The step of matching the link retransmission policy corresponding to the domain identifier from the pre-configured policy set includes: In the case where the domain identifier corresponds to a vertical connection network, the link layer retransmission policy is matched to enable link layer retransmission to ensure lossless transmission; When the domain identifier corresponds to a horizontally connected network or an inter-data center network, the link layer retransmission policy is matched to disable lossless retransmission to reduce latency jitter.

7. The message transmission method for extending interconnect chips according to claim 1, characterized in that, The generation of transaction layer messages based on the domain identifier includes: A new field is added to the transaction layer message header, and the value of the field corresponds to the field identifier.

8. The message transmission method for extending interconnect chips according to claim 1, characterized in that, The domain identifier is generated by the border switch of the chip extension architecture type through pre-configuration or border gateway protocol to collect topology information and stored in the local routing table of each node of the extended interconnect chip.

9. A message forwarding method for extending interconnect chips, characterized in that, Applied to a switching chip, the method includes: Receive transaction layer messages, the header of which carries a field identifier, which is used to identify the chip extension architecture type to which the destination address of the transaction layer message belongs; Extract the domain identifier from the header of the transaction layer message; Based on the domain identifier, determine the forwarding processing strategy corresponding to the domain identifier; The transaction layer message is forwarded according to the forwarding processing strategy.

10. The message forwarding method for extending interconnect chips according to claim 9, characterized in that, The forwarding processing strategy includes performing congestion control marking processing on the transaction layer message when the domain identifier corresponds to a horizontal connection network or an inter-data center network.

11. A message transmitting apparatus for extending interconnect chips, characterized in that, The device, applied to a transmitting end computing chip, includes: The acquisition module is used to acquire the domain identifier corresponding to the destination address based on the local routing table. The domain identifier is pre-stored in the local routing table and is used to identify the chip extension architecture type to which the destination address belongs. The first determining module is used to determine the target processing strategy corresponding to the domain identifier based on the domain identifier; The generation module is used to generate a transaction layer message and send it to the link layer based on the target processing strategy and the domain identifier, wherein the transaction layer message carries the domain identifier.

12. The apparatus according to claim 11, characterized in that, The domain identifier is used to identify at least one of the following chip extension architecture types: vertical connection network, horizontal connection network, and data center network.

13. The apparatus according to claim 11, characterized in that, The acquisition module is specifically used for: From the local routing table, match the destination address to obtain the domain identifier of the destination address.

14. The apparatus according to claim 11, characterized in that, The first determining module is specifically used for: Based on the domain identifier, a congestion control policy and / or link retransmission policy corresponding to the domain identifier are matched from a pre-configured policy set.

15. The apparatus according to claim 14, characterized in that, The first determining module is specifically used for: In the case where the domain identifier corresponds to a vertically connected network, the congestion control policy is matched to skip the processing of the explicit congestion notification field; In the case where the domain identifier corresponds to a lateral connectivity network, the congestion control policy is matched by encapsulating the underlying explicit congestion notification field; When the domain identifier corresponds to the inter-datacenter network, the congestion control policy is matched as an encapsulated extended congestion control field.

16. The apparatus according to claim 14, characterized in that, The first determining module is specifically used for: In the case where the domain identifier corresponds to a vertical connection network, the link layer retransmission policy is matched to enable link layer retransmission to ensure lossless transmission; When the domain identifier corresponds to a horizontally connected network or an inter-data center network, the link layer retransmission policy is matched to disable lossless retransmission to reduce latency jitter.

17. The apparatus according to claim 13, characterized in that, The generation module is specifically used for: A new field is added to the transaction layer message header, and the value of the field corresponds to the field identifier.

18. The apparatus according to claim 13, characterized in that, The acquisition module is specifically used for: Obtain the domain identifier stored in the local routing table, wherein the domain identifier is generated by the border switch of the chip extended architecture type through pre-configuration or border gateway protocol to collect topology information and stored in the local routing table of each node of the extended interconnect chip.

19. A message forwarding device for extending interconnect chips, characterized in that, The device, applied to a switching chip, includes: The receiving module is used to receive transaction layer messages, the header of which carries a field identifier, which is used to identify the chip extension architecture type to which the destination address of the transaction layer message belongs; An extraction module is used to extract the domain identifier from the header of the transaction layer message; The second determining module is used to determine the forwarding processing strategy corresponding to the domain identifier based on the domain identifier; The forwarding module is used to forward the transaction layer messages according to the forwarding processing strategy.

20. The message forwarding apparatus for extending interconnect chips according to claim 19, characterized in that, The forwarding processing strategy includes performing congestion control marking processing on the transaction layer message when the domain identifier corresponds to a horizontal connection network or an inter-data center network.

21. A chip interconnect system, characterized in that, include: A transmitting end computing chip is used to transmit transaction layer messages, wherein the transmitting end computing chip is a message transmitting device for extending interconnect chips as described in any one of claims 11 to 18 above; A switching chip, connected to the control module of the memory, is used to receive the transaction layer message sent by the sending end computing chip and to forward the transaction layer message. The switching chip is the message forwarding device for expanding the interconnect chip according to any one of claims 19 to 20. The receiving end computing chip is connected to the switching chip and is used to receive the transaction layer messages forwarded by the switching chip.

22. An electronic device, characterized in that, The electronic device includes: a processor and a memory, wherein the processor is electrically connected to the memory; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to implement the message transmission method for expanding interconnect chips according to any one of claims 1 to 8.

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