Mesh encoding method, bitstream storage or transmission method, electronic device, and storage medium

Abstract

The present disclosure provides a mesh coding method, a bitstream storage or transmission method, an electronic device and a storage medium. The mesh coding method comprises: receiving a mesh comprising a plurality of vertices; when a first condition is satisfied, selecting a first type of connection relationship regularization (CR) to code the mesh; when the first condition is not satisfied and a second condition is satisfied, selecting a second type of CR to code the mesh; when the first condition is not satisfied and the second condition is not satisfied, coding the mesh without selecting the first type of CR and without selecting the second type of CR; and generating a bitstream comprising the coded mesh.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 800,380, filed May 5, 2025, and U.S. Provisional Application No. 19 / 576,106, filed March 24, 2026, the disclosures of which are incorporated herein by reference in their entirety. Technical Field

[0003] This disclosure relates to a set of advanced video encoding and decoding techniques. Specifically, it relates to lattice coding methods, stream storage or transmission methods, electronic devices, and storage media. Background Technology

[0004] Polygonal meshes are typically composed of several connected components (CCs), which may have different characteristics. Therefore, dividing these CCs into different CC groups (referred to as slices in this disclosure) based on their characteristics facilitates adaptive and efficient compression. Content creation tools typically export quadrilateral meshes as triangular meshes for transmission and rendering. The triangulation process splits quadrilaterals into pairs of triangles, often resulting in irregular connections with vertex degrees between 4 and 8. Connectivity regularization (CR) is commonly used to improve the encoding efficiency of polygonal meshes. However, there is currently no mechanism for adaptively enabling / disabling CR or selecting CR types. Summary of the Invention

[0005] According to one aspect of this disclosure, a method executed by at least one processor in an encoder includes: receiving a mesh comprising a plurality of vertices; when a first condition is met, selecting a first type of connection relation regularization (CR) to encode the mesh; when the first condition is not met but a second condition is met, selecting a second type of CR to encode the mesh; when neither the first condition nor the second condition is met, encoding the mesh without selecting either the first type of CR or the second type of CR; and generating a bitstream comprising the encoded mesh.

[0006] According to one aspect of this disclosure, an encoder includes: a memory storing program code, and at least one processor, the processor being configured to read the program code and operate according to the instructions of the program code, the program code including: receiving code for causing the at least one processor to receive a mesh comprising a plurality of vertices; a first selection code for causing the at least one processor to select a first type of connection relation regularization (CR) to encode the mesh when a first condition is met; a second selection code for causing the at least one processor to select a second type of CR to encode the mesh when the first condition is not met but the second condition is met; an encoding code for causing the at least one processor to encode the mesh without selecting either the first type of CR or the second type of CR when neither the first condition nor the second condition is met; and generating code for causing the at least one processor to generate a bitstream comprising the encoded mesh.

[0007] According to one aspect of this disclosure, a non-volatile computer-readable medium stores program instructions and a bitstream, the program instructions being executed by a processor to generate the bitstream according to methods of various embodiments. Attached Figure Description

[0008] Further features, properties, and various advantages of the disclosed subject matter will become more apparent from the following detailed description and accompanying drawings, wherein:

[0009] Figure 1 This is a schematic block diagram of a communication system according to an embodiment of the present disclosure.

[0010] Figure 2 This is a schematic block diagram of a streaming system according to an embodiment of the present disclosure.

[0011] Figure 3 This is a schematic diagram of an example mesh encoder according to an embodiment of this disclosure.

[0012] Figure 4 An example of triangulation in a mesh is shown, according to an embodiment of this disclosure.

[0013] Figure 5 An example of edge flipping in a grid is shown, according to an embodiment of this disclosure.

[0014] Figure 6 An example of edge removal in a grid is shown, according to an embodiment of this disclosure.

[0015] Figure 7 A flowchart outlining one aspect of the grid coding method (700) of this disclosure is shown.

[0016] Figure 8A An example process is shown in which the direction of the removed diagonal side is indicated by a signal according to an embodiment of this disclosure.

[0017] Figure 8BAn example process is shown in which the direction of the removed diagonal edge of the non-initial face of the connection component (CC) is represented by a signal in a two-degree geometric coding according to an embodiment of the present disclosure.

[0018] Figure 9 An example of the decoding process of an embodiment of this disclosure is shown.

[0019] Figure 10 An example process for selecting the context for encoding the removed diagonal side, as shown in an embodiment of this disclosure, is illustrated.

[0020] Figures 11 to 13 The lossless result of fixed type 1 connection regularization of an embodiment of this disclosure relative to the default configuration (cfgs) of TM v9.0 is shown.

[0021] Figures 14 to 16 The non-destructive results of a fixed type 1 CR according to an embodiment of this disclosure are shown relative to a per-mesh configuration of TM v9.0.

[0022] Figures 17 to 19 The lossless result of type 2 CR in an embodiment of this disclosure relative to a fixed type 1 CR with default configuration is shown.

[0023] Figures 20 to 22 The non-destructive result of a type 2 CR according to an embodiment of the present disclosure is shown relative to a fixed type 1 CR with a per-mesh configuration.

[0024] Figure 23 An example of a computer system according to an embodiment of this disclosure is shown. Detailed Implementation

[0025] The following detailed description of the embodiments is with reference to the accompanying drawings. The same reference numerals in different drawings may identify the same or similar elements.

[0026] The foregoing disclosure provides illustrations and descriptions, but is not intended to be exhaustive or to limit the implementation to the specific forms disclosed. In view of the above disclosure, modifications and variations are possible, or modifications and variations may be obtained from the practice of the implementation. Furthermore, at least one feature or component of one embodiment may be incorporated into or combined with another embodiment (or at least one feature of another embodiment). Additionally, in the flowcharts and descriptions of operations provided below, it should be understood that at least one operation may be omitted, at least one operation may be added, at least one operation may be performed simultaneously (at least partially), and the order of at least one operation may be switched.

[0027] It is evident that the systems and / or methods described herein can be implemented in various forms of hardware, firmware, or combinations of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods is not a limitation on the implementation. Therefore, this document describes the operation and behavior of the systems and / or methods without reference to any specific software code—it should be understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0028] Even though specific combinations of features are listed in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of possible embodiments. In fact, many of these features can be combined in ways not specifically listed in the claims and / or disclosed in the specification. Although each dependent claim listed below may be directly subordinated to only one claim, the disclosure of possible embodiments includes combinations of each dependent claim with each other claim in the claim set.

[0029] The elements, actions, or instructions used herein should not be construed as critical or essential unless explicitly stated otherwise. Furthermore, as used herein, the articles “a” and “an” are intended to include at least one item and may be used interchangeably with “at least one.” Where only one item is referred to, the term “one” or similar language is used. Furthermore, as used herein, the terms “has,” “have,” “having,” “include,” “including,” etc., are intended to be open-ended terms. Additionally, the phrase “based on” is intended to mean “at least partially based on” unless explicitly stated otherwise. Furthermore, expressions such as “at least one of [A] and [B]” or “at least one of [A] or [B]” should be understood to include only A, only B, or both A and B.

[0030] Throughout this specification, references to "an embodiment," "embodiment," or similar language mean that a particular feature, structure, or characteristic described in connection with the indicated embodiment is included in at least one embodiment of this solution. Therefore, the phrases "in one embodiment," "in an embodiment," and similar language throughout this specification may, but do not necessarily, refer to the same embodiment.

[0031] Furthermore, the features, advantages, and characteristics described herein can be combined in any suitable manner in at least one embodiment. Based on the description herein, those skilled in the art will recognize that this disclosure can be practiced without at least one specific feature or advantage of a particular embodiment. In other instances, additional features and advantages that may not be present in all embodiments of this disclosure may be recognized in certain embodiments.

[0032] Embodiments of this disclosure relate to adaptively enabling / disabling connection regularization and selecting the regularization type used for polygon mesh compression.

[0033] refer to Figures 1 to 2 The present disclosure describes at least one embodiment of the encoding and decoding structures for implementing the present disclosure.

[0034] Figure 1 A simplified block diagram of a communication system 100 according to an embodiment of the present disclosure is shown. System 100 may include at least two terminals 110 and 120 interconnected via a network 150. For unidirectional data transmission, the first terminal 110 may encode video data (which may include grid data) locally for transmission to the other terminal 120 via the network 150. The second terminal 120 may receive the encoded video data from the other terminal from the network 150, decode the encoded data, and display the recovered video data. Unidirectional data transmission is common in media service applications, etc.

[0035] Figure 1 A second pair of terminals 130, 140 is shown for supporting bidirectional transmission of encoded video, for example, during video conferencing. For bidirectional data transmission, each terminal 130, 140 can encode video data captured at a local location for transmission to the other terminal via network 150. Each terminal 130, 140 can also receive encoded video data transmitted from the other terminal, decode the encoded data, and display the recovered video data on a local display device.

[0036] exist Figure 1 In this context, terminals 110 to 140 can be, for example, servers, personal computers, and smartphones, and / or any other type of terminal. For example, terminals (110 to 140) can be laptops, tablets, media players, and / or dedicated video conferencing equipment. Network 150 refers to any number of networks transmitting encoded video data between terminals 110 to 140, including, for example, wired and / or wireless communication networks. Communication network 150 can exchange data in circuit-switched and / or packet-switched channels. Representative networks include telecommunications networks, local area networks (LANs), wide area networks (WANs), and / or the Internet. For the purposes of this discussion, unless explained below, the architecture and topology of network 150 may be irrelevant to the operation of this disclosure.

[0037] Figure 2 The diagram illustrates how video encoders and decoders can be deployed in a streaming environment, serving as examples of how the disclosed topics can be applied. The disclosed topics can be used with other video-enabled applications, including, for example, video conferencing, digital television, and compressed video stored on digital media including CDs, DVDs, Memory Sticks, etc.

[0038] like Figure 2 As shown, the streaming system 200 may include a shooting subsystem 213, which includes a video source 201 and an encoder 203. The streaming system 200 may also include at least one streaming server 205 and / or at least one streaming client 206.

[0039] Video source 201 can be created, for example, stream 202, including a 3D mesh and metadata associated with the 3D mesh. Video source 201 may include, for example, a 3D sensor (e.g., a depth sensor) or a 3D imaging technology (e.g., at least one digital camera), and a computing device for generating the 3D mesh using data received from the 3D sensor or 3D imaging technology. Sample stream 202 (which may have a larger data volume compared to an encoded video stream) may be processed by encoder 203 coupled to video source 201. Encoder 203 may be an electronic device including hardware, software, or a combination thereof to implement or enforce aspects of the disclosed subject matter as described in more detail below. Encoder 203 may also generate encoded video stream 204. Encoded video stream 204 (which may have a smaller data volume compared to uncompressed stream 202) may be stored on local storage devices of encoder 203 and / or on streaming server 205 for future use. At least one streaming client 206 and 207 can access streaming server 205 to retrieve video streams 208 and 209, respectively, which may be copies of the encoded video stream 204.

[0040] Streaming client 207 may include video decoder 210 and display 212. Video decoder 210 may, for example, decode video stream 209 (an incoming copy of encoded video stream 204) and create outgoing video sample stream 211 that can be rendered on display 212 or another rendering device (not depicted). In some streaming systems, video streams 204, 208, and 209 may be encoded according to certain video encoding / compression standards.

[0041] Figure 3 An example of a trellis encoder 300 is shown. Encoder 300 can perform the V-DMC process for decimation and reparameterization before encoding the bitstream. For example... Figure 3As shown, the input mesh can be simplified (302) and UV reparameterized (304). Subsequently, geometric reparameterization (306) is performed, which includes base mesh refinement and displacement generation. The output of the base mesh refinement is provided to the Draco encoder (308) to generate base mesh binary data. The output of the displacement generation is provided to the displacement encoder (310) to generate displacement binary data. The output of the displacement encoder (310) is provided to the texture transfer encoder (312) and the image encoder (314) to generate texture binary data. The base mesh binary data, texture binary data, and displacement binary data can be included in the bitstream (316). In at least one example, texture coordinates or UV coordinates (often simply referred to as UV) map the positions of each vertex onto the texture through a process called “UV mapping.” UV defines the 2D position of each vertex in the mesh in texture space.

[0042] Figure 4 An example of mesh triangulation is shown. In at least one example, the triangulation process divides the quadrilateral into pairs of triangles, typically resulting in irregular connections with vertex degrees ranging from 4 to 8, such as... Figure 4 As shown. However, since the connection relationships of triangulated meshes are usually irregular, it is necessary to regularize the connection relationships to make the vertex degree more uniform and improve the encoding efficiency.

[0043] According to embodiments of this disclosure, at least two types of connection regularization (CR) can exist: Type 1 and Type 2. In at least one example, Type 1 CR flips the edges to make the vertex degree 6, such as... Figure 5 As shown. In at least one example, type 2 CR removes some edges to restore the original quadrilateral mesh and sets the vertex degree to 4, as... Figure 6 As shown.

[0044] In at least one example, the algorithm for performing Type 1 CR can be substantially similar to the algorithm for performing Type 2 CR, where instead of recording whether diagonal edges need to be flipped, the direction of each removed diagonal edge is recorded. For example, an array "removedEdges" can be used to record the directions of the removed edges, where for each quadrilateral face generated by removing diagonal edges, a value of 0 can be used to indicate one direction of the removed edge, and a value of 1 can be used to indicate the other direction. In "removedEdges", any original face not generated by CR can be represented as -1.

[0045] Connection regularization is commonly used to improve the encoding efficiency of polygon meshes. Since there are at least two types of connection regularization (CR), it is necessary to adaptively enable / disable CR and select the appropriate CR type.

[0046] Embodiments of this disclosure relate to several algorithms for adaptively enabling / disabling CR and selecting the type of CR. These embodiments can be applied individually or in combination in any form.

[0047] Figure 7 A flowchart outlining one aspect of the grid coding method (700) of this disclosure is shown. Figure 7 The method (700) can be used in electronic devices (e.g., grooving encoders). In various aspects, the method (700) is executed by processing circuitry, such as processing circuitry that performs the functions of the encoder (203). In some aspects, the method (700) is implemented by software instructions, so that when the processing circuitry executes the software instructions, the processing circuitry executes the method (700). The method begins at (S701) and proceeds to (S702).

[0048] At (S702), a mesh comprising multiple vertices is received.

[0049] At (S703), when the first condition is met, the first type of connection relation regularization (CR) is selected to encode the mesh.

[0050] At (S704), when the first condition is not met but the second condition is met, the second type of CR is selected to encode the mesh.

[0051] At (S705), when neither the first condition nor the second condition is met, the grid is encoded without selecting either the first type of CR or the second type of CR.

[0052] At (S706), a bitstream including the encoded grid is generated.

[0053] Then, the method proceeds to (S799) and terminates.

[0054] Method (700) can be adjusted appropriately. At least one step in method (700) can be modified and / or omitted. At least one additional step can be added. Any suitable execution order can be used.

[0055] In at least one example, the following procedure can be used to adaptively enable / disable CR and select the type of CR.

[0056] Operation 1: Try regularizing the connections using Type 2 CR. If Type 2 meets criteria 1, 2, and 3 below, then select Type 2 CR to encode the mesh.

[0057] Operation 2: If Type 2 CR in Operation 1 fails, then attempt to regularize the connections using Type 1 CR. If Type 1 meets criteria 1 and 2 below, then Type 1 CR is selected to encode the mesh.

[0058] Operation 3: If Type 1 CR in step 2 also fails, disable CR and encode the mesh without regularization.

[0059] In at least one example, the following guidelines can be used to enable CR.

[0060] Criterion 1: At least 90% of the triangular faces in the original mesh are in the quadrilaterals detected by the CR process.

[0061] Criterion 2: No more than 1% of the diagonal sides of the detected quadrilaterals are seam edges.

[0062] Rule 3: At least 95% of the regularized quadrilaterals are rectangles, where the regularized quadrilaterals are generated by type 2 CR.

[0063] In at least one example, all regularized quadrilaterals are detected quadrilaterals, but not all detected quadrilaterals are regularized quadrilaterals, because if the diagonal side of a detected quadrilateral is a seam side, a pair of triangular faces within that detected quadrilateral cannot be merged into a regularized quadrilateral.

[0064] In at least one example, the seam edge can be defined according to different attributes: (I) for the corner attribute, the seam edge is the edge in the geometry that corresponds to multiple associated edges within the corner attribute; (ii) for the face attribute, the seam edge is the edge in the geometry where the face attribute values ​​are different on both sides; or (iii) for sparse attributes such as the crease attribute, the seam edge is the edge in the geometry that constitutes the crease.

[0065] In at least one example, if the diagonal side of a quadrilateral detected in CR is a seam edge, that edge is neither flipped (for type 1 CR) nor removed (for type 2 CR). Note that if the corner attribute has an implicit index, all edges with that attribute are seam edges, and therefore CR will not be enabled.

[0066] In at least one example, the CR method can be adaptively selected. The disclosed CR method can be applied to all grid categories, and the average coding gain value is in the range of -0.01% to -0.83%.

[0067] like Figure 4 As shown, many triangular meshes are obtained by triangulating the quadrilateral dominant mesh, and the triangulation process often introduces irregular connections with non-uniform vertex degrees.

[0068] To achieve a more uniform vertex degree and thus higher encoding efficiency, the current PMC TM v9.0 regularizes connectivity by flipping edges (e.g., type 1 CR) to achieve a vertex degree of 6. Figure 5 As shown. Figure 6 As shown, the CR with edges removed (e.g., type 2 CR) aims to restore the original quadrilateral dominant mesh and achieve a vertex degree of 4.

[0069] If Type 2 CR is successfully applied, most quadrilateral faces will be recovered, which allows the use of several coding tools that are enabled or available only for quadrilateral-dominant meshes, such as dual-degree geometry coding, within-parallelogram predictions, quad-tromino predictions, etc.

[0070] In at least one example, the same flood fill algorithm as Type 1 CR can be used to perform Type 2 CR. The only difference is that for each detected quadrilateral, Type 1 CR records whether the diagonal sides need to be flipped, while Type 2 CR records the direction of the removed diagonal sides.

[0071] Figure 8A This illustrates an example process of using signals to represent the direction of the removed diagonal sides in a polygonal-sector geometry encoding.

[0072] Figure 8B This illustrates an example process for representing the direction of the removed diagonal edge of a non-initial face of a CC using signals in two-degree geometry encoding. Figure 8A and Figure 8B The difference between the two-dimensional encoding and the two-dimensional encoding lies in the fact that in two-dimensional encoding, it is necessary to check whether the quadrilateral face is a dummy face, and it is not necessary to use a signal to indicate the direction of the removed diagonal edges in the dummy face, while there are no dummy faces in polygon-sector encoding. In two-dimensional encoding, if the initial face of the CC is a non-dummy quadrilateral face, then a signal is used to indicate whether the initial face is a regularized quadrilateral face or a primitive quadrilateral face. If the initial face is a regularized quadrilateral face, it is not necessary to use a signal to indicate the direction of the removed diagonal edges, because the encoder never rotates the vertex indices of the initial face of the CC. Therefore, the decoder knows the direction of the removed diagonal edges without using a signal, such as... Figure 9 As shown.

[0073] In at least one example, the context used to encode the flipped edge can be reused to encode the removed diagonal edge without adding a new context. Furthermore, the context for encoding the removed diagonal edge is selected based on the orientation of the last two removed diagonal edges, such as... Figure 10 As shown.

[0074] An example of an adaptive method for enabling / disabling CR and selecting the CR type can be performed as follows:

[0075] 1. First, try regularizing the join relationship using Type 2 CR. If successful (meeting all three of the following criteria), then choose Type 2 CR.

[0076] 2. If type 2 CR in step 1 fails, try type 1 CR to regularize the join relationship. If successful (meeting criteria 1 and 2 below), then choose type 1 CR.

[0077] 3. If Type 1 CR in step 2 also fails, then disable CR and encode the mesh without regularization.

[0078] The three criteria for enabling CR are as follows:

[0079] Criterion 1: At least 90% of the triangular faces in the original mesh are in the quadrilaterals detected by the CR process.

[0080] Criterion 2: No more than 1% of the diagonal sides of the detected quadrilaterals are seam edges.

[0081] Rule 3: At least 95% of the regularized quadrilaterals are rectangles, where the regularized quadrilaterals are generated by type 2 CR.

[0082] Figures 11 to 13 The lossless results of fixed type 1 join relation regularization relative to the default configuration (cfgs) in TM v9.0 are shown. Figures 14 to 16 The results for fixed type 1 CR relative to TM v9.0 with per-mesh configuration are shown. Figures 17 to 19 The lossless results of type 2 CR are shown relative to the fixed type 1 CR with the default configuration. Figures 20 to 22 The lossless results of type 2 CR are shown relative to fixed type 1 CR with per-mesh configuration.

[0083] The above-described techniques can be implemented as computer software using computer-readable instructions and physically stored on at least one computer-readable medium. For example, Figure 23 A computer system 2300 suitable for implementing certain embodiments of the present disclosure is shown.

[0084] Computer software can be coded using any appropriate machine code or computer language. These machine codes or computer languages ​​can be assembled, compiled, linked, and other mechanisms to create code that includes instructions. These instructions can be executed directly by the computer's central processing unit (CPU), graphics processing unit (GPU), or through interpretation, microcode execution, or other methods.

[0085] The instructions can be executed on various types of computers or their components, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, Internet of Things devices, etc.

[0086] Figure 23 The components shown for computer system 2300 are examples and are not intended to imply any limitation on the use or scope of functionality of computer software implementing embodiments of this disclosure. The configuration of the components should also not be construed as having any dependency or requirement on any component or combination thereof illustrated in a non-limiting embodiment of computer system 2300.

[0087] Computer system 2300 may include certain human-machine interface input devices. Such human-machine interface input devices may respond to input from at least one human user via, for example, tactile input (such as: button presses, swipes, data glove movements), audio input (such as: voice, clapping), visual input (such as: gestures), and olfactory input (not depicted). Human-machine interface devices may also be used to capture certain media that are not necessarily directly related to conscious human input, such as audio (such as: voice, music, ambient sounds), images (such as: scanned images, photographic images obtained from a still image camera), and video (such as two-dimensional video, three-dimensional video including stereoscopic video).

[0088] The input human-machine interface device may include at least one of the following (only one of each is depicted): keyboard 2301, mouse 2302, touchpad 2303, touch screen 2310, data glove, joystick 2305, microphone 2306, scanner 2307, and camera 2308.

[0089] Computer system 2300 may also include certain human-machine interface (HMI) output devices. Such HMI output devices can stimulate the senses of at least one human user through, for example, tactile output, sound, light, and smell / taste. Such HMI output devices may include tactile output devices (e.g., tactile feedback via touchscreen 2310, data gloves, or joystick 2305, but tactile feedback devices that are not used as input devices may also exist). For example, such devices may be audio output devices (such as speakers 2309, headphones (not depicted)), visual output devices (such as screen 2310, virtual reality glasses (not depicted), holographic displays, and smoke boxes (not depicted)), and printers (not depicted). Screen 2310 includes CRT screens, LCD screens, plasma screens, and OLED screens, each with or without touchscreen input capability, and each with or without tactile feedback capability. Some of these screens may be able to output two-dimensional visual output or more than three-dimensional output in a manner such as stereoscopic output.

[0090] Computer system 2300 may also include human-accessible storage devices and their associated media, such as optical media 2321 including CD / DVD ROM / RW 2320 with media such as CD / DVD, thumb drive 2322, removable hard disk or solid-state drive 2323, conventional magnetic media such as magnetic tape and floppy disk (not shown), devices based on dedicated ROM / ASIC / PLD such as security dongles (not shown), etc.

[0091] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the presently disclosed subject matter does not cover transmission media, carrier waves, or other volatile signals.

[0092] Computer system 2300 may also include an interface to at least one communication network. The network can be wireless, wired, or optical. The network can further be a local area network (LAN), wide area network (WAN), metropolitan area network (MAN), vehicular and industrial network, real-time network, delay-tolerant network, etc. Examples of networks include LANs such as Ethernet and wireless LANs, cellular networks including GSM, 3G, 4G, 5G, LTE, etc., TV wired or wireless wide area digital networks including cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial networks including CAN buses, etc. Some networks typically require external network interface adapters attached to certain general-purpose data ports or peripheral buses 2349 (such as, for example, USB ports of computer system 2300); other networks are typically integrated into the core of computer system 2300 via connections to system buses (e.g., Ethernet interfaces connected to PC computer systems or cellular network interfaces connected to smartphone computer systems). Using any of these networks, computer system 2300 can communicate with other entities. Such communication can be unidirectional (receive-only, e.g., broadcasting TV), unidirectional (transmit-only, e.g., CAN bus to certain CAN bus devices), or bidirectional, e.g., to other computer systems using a local area network or wide area digital network. Such communication can include communication to a cloud computing environment 2355. As mentioned above, certain protocols and protocol stacks can be used on each of these networks and network interfaces.

[0093] The aforementioned human-machine interface device, human-accessible storage device, and network interface 2354 can be attached to the kernel 2340 of the computer system 2300.

[0094] The kernel 2340 may include at least one central processing unit (CPU) 2341, a graphics processing unit (GPU) 2342, a dedicated programmable processing unit 2343 in the form of a field-programmable gate array (FPGA), a hardware accelerator 2344 for certain tasks, etc. These devices, along with read-only memory (ROM) 2345, random access memory 2346, and internal mass storage 2347 such as an internal non-user-accessible hard disk drive (SD drive) or an SSD, may be connected via a system bus 2348. In some computer systems, the system bus 2348 may be accessed as at least one physical connector to allow for expansion by adding CPUs, GPUs, etc. Peripheral devices may be directly attached or connected to the kernel's system bus 2348 via a peripheral bus 2349. Peripheral bus architectures include PCI, USB, etc. A graphics adapter 2350 may be included in the kernel 2340.

[0095] The CPU 2341, GPU 2342, FPGA 2343, and accelerator 2344 can execute certain instructions, which, when combined, constitute the aforementioned computer code. This computer code can be stored in ROM 2345 or RAM 2346. Transient data can also be stored in RAM 2346, while permanent data can be stored, for example, in internal mass storage 2347. Fast storage and retrieval of any memory device can be achieved by using a cache memory, which can be closely associated with at least one CPU 2341, GPU 2342, mass storage 2347, ROM 2345, RAM 2346, etc.

[0096] Computer-readable media may have computer code thereon for performing various computer-implemented operations. The media and computer code may be media and computer code specifically designed and constructed for the purposes of this disclosure, or they may be of types known and available to those skilled in the art of computer software.

[0097] By way of example and not limitation, a computer system having architecture 2300, particularly kernel 2340, can be functionally provided by at least one processor (including CPU, GPU, FPGA, accelerator, etc.) executing software embodied in at least one tangible computer-readable medium. Such a computer-readable medium may be a medium associated with user-accessible mass storage as described above, and some storage of kernel 2340 having non-volatile properties, such as kernel internal mass storage 2347 or ROM 2345. Software implementing various embodiments of this disclosure may be stored in such a device and executed by kernel 2340. Depending on specific needs, the computer-readable medium may include at least one memory device or chip. The software may cause kernel 2340, and particularly the processors therein (including CPU, GPU, FPGA, etc.), to execute specific processes or specific portions of specific processes described herein, including defining data structures stored in RAM 2346 and modifying such data structures according to software-defined processes. Alternatively or concurrently, a computer system may be provided with functionality by hard-wired circuitry (e.g., accelerator 2344) or logic otherwise embodied, which may replace or operate with software to perform the specific process or a specific portion of the specific process described herein. Where appropriate, references to software may cover logic, and vice versa. Where appropriate, references to computer-readable media may cover circuitry (such as integrated circuits (ICs)) storing software for execution, circuitry embodying logic for execution, or both. This disclosure covers any suitable combination of hardware and software.

[0098] While this disclosure has described several non-limiting embodiments, variations, substitutions, and various alternative equivalents fall within the scope of this disclosure. Therefore, it should be understood that those skilled in the art will be able to design numerous systems and methods that, while not expressly shown or described herein, embody the principles of this disclosure and are therefore within its spirit and scope.

[0099] The above disclosure also covers the following listed embodiments:

[0100] (1) A method executed by at least one processor in an encoder includes: receiving a mesh comprising a plurality of vertices; when a first condition is met, selecting a first type of connection relation regularization (CR) to encode the mesh; when the first condition is not met but a second condition is met, selecting a second type of CR to encode the mesh; when neither the first condition nor the second condition is met, encoding the mesh without selecting either the first type of CR or the second type of CR; and generating a bitstream comprising the encoded mesh.

[0101] (2) According to the method of feature (1), the first type of CR is the type of CR that performs edge removal.

[0102] (3) According to the method of feature (1) or (2), the second type of CR is a type of CR that performs edge flipping to achieve a vertex degree of 6.

[0103] (4) According to any one of the features (1) to (3), when attempting to use the first type of CR to regularize the connection relationship of the mesh, the first condition is satisfied when the first criterion, the second criterion and the third criterion are satisfied; when attempting to use the second type of CR to regularize the connection relationship of the mesh, the second condition is satisfied when the first criterion and the second criterion are satisfied.

[0104] (5) According to the method of feature (4), wherein the first criterion indicates that a predetermined percentage of the triangular faces in the mesh are located in the quadrilaterals detected when performing CR.

[0105] (6) According to the method of feature (5), wherein the predetermined percentage is 90%.

[0106] (7) The method according to any one of features (4) to (6), wherein the second criterion indicates that no more than a predetermined percentage of the diagonal sides of the quadrilateral detected during CR are seam sides.

[0107] (8) According to the method of feature (7), wherein the predetermined percentage is 1%.

[0108] (9) The method according to any one of features (4) to (8), wherein the third criterion indicates that at least a predetermined percentage of the regularized quadrilaterals generated by performing the first type of CR are rectangles.

[0109] (10) According to the method of feature (9), wherein the predetermined percentage is 95%.

[0110] (11) An encoder includes: a memory storing program code; and at least one processor for reading the program code and operating according to the instructions of the program code, the program code including: receiving code for causing the at least one processor to receive a mesh including a plurality of vertices; a first selection code for causing the at least one processor to select a first type of connection relation regularization (CR) to encode the mesh when a first condition is met; a second selection code for causing the at least one processor to select a second type of CR to encode the mesh when the first condition is not met but the second condition is met; an encoding code for causing the at least one processor to encode the mesh without selecting the first type of CR and without selecting the second type of CR when neither the first condition nor the second condition is met; and a generation code for causing the at least one processor to generate a bitstream including the encoded mesh.

[0111] (12) The encoder according to feature (11), wherein the first type of CR is the type of CR that performs edge removal.

[0112] (13) The encoder based on feature (11) or (12), wherein the second type of CR is a type of CR that performs edge flipping to achieve a vertex degree of 6.

[0113] (14) An encoder based on any one of features (11) to (13), wherein when attempting to regularize the connection relationship of the mesh using a first type of CR, the first condition is satisfied when the first criterion, the second criterion and the third criterion are satisfied; when attempting to regularize the connection relationship of the mesh using a second type of CR, the second condition is satisfied when the first criterion and the second criterion are satisfied.

[0114] (15) An encoder based on feature (14), wherein a first criterion indicates that a predetermined percentage of triangular faces in the mesh are located in the quadrilaterals detected when performing CR.

[0115] (16) The encoder according to feature (15), wherein the predetermined percentage is 90%.

[0116] (17) An encoder according to any one of features (14) to (16), wherein the second criterion indicates that no more than a predetermined percentage of the diagonal sides of the quadrilateral detected during CR are seam edges.

[0117] (18) The encoder according to feature (17), wherein the predetermined percentage is 1%.

[0118] (19) An encoder based on any one of features (14) to (18), wherein the third criterion specifies that at least a predetermined percentage of regularized quadrilaterals generated by performing CR according to the first type are rectangles.

[0119] (20) A non-volatile computer-readable medium storing a bitstream generated by a processor in an encoder, the processor performing a method comprising: receiving a mesh comprising a plurality of vertices; encoding the mesh by selecting a first type of connection relation regularization (CR) when a first condition is satisfied; encoding the mesh by selecting a second type of CR when the first condition is not satisfied but a second condition is satisfied; encoding the mesh without selecting the first type of CR and without selecting the second type of CR when neither the first condition nor the second condition is satisfied; and generating a bitstream comprising the encoded mesh.

Claims

1. A lattice encoding method, executed by at least one processor in an encoder, characterized in that, The term includes: Receives a mesh containing multiple vertices; When the first condition is met, the first type of connection regularization (CR) is selected to encode the mesh; When the first condition is not met but the second condition is met, the second type of CR is selected to encode the mesh; When neither the first condition nor the second condition is met, the mesh is encoded without selecting either the first type of CR or the second type of CR. and Generate a bitstream that includes the encoded grid.

2. The method according to claim 1, characterized in that, The first type of CR is the type of CR that performs edge removal.

3. The method according to claim 1, characterized in that, The second type of CR is a type of CR that performs edge flipping to achieve a vertex degree of 6.

4. The method according to any one of claims 1-3, characterized in that, in, When attempting to regularize the mesh connectivity using the first type of CR, the first condition is satisfied when the first, second, and third criteria are met, and... When attempting to regularize the connection relationships of the mesh using the second type of CR, the second condition is satisfied when both the first and second criteria are met.

5. The method according to claim 4, characterized in that, The first criterion indicates that a predetermined percentage of the triangular faces in the grid are located in the quadrilaterals detected during CR.

6. The method according to claim 5, characterized in that, The predetermined percentage is 90%.

7. The method according to claim 4, characterized in that, The second criterion indicates that no more than a predetermined percentage of the diagonal sides of the quadrilateral detected during CR are seam edges.

8. The method according to claim 7, characterized in that, The predetermined percentage is 1%.

9. The method according to claim 4, characterized in that, The third criterion indicates that at least a predetermined percentage of the regularized quadrilaterals generated by performing the first type of CR are rectangles.

10. The method according to claim 9, characterized in that, The predetermined percentage is 95%.

11. A method for storing or transmitting a code stream, characterized in that, include: The method according to any one of claims 1-10 generates the bitstream; Store or send the bitstream.

12. An electronic device, characterized in that, include: Memory that stores program code; and At least one processor is configured to read the program code and execute the method according to any one of claims 1-11 as instructed by the program code.

13. A non-volatile computer-readable medium for storing program code and a bitstream, characterized in that, The program code is executed by the processor to generate the bitstream according to any one of claims 1-11.

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