Circuit board and semiconductor package including the same

Abstract

A circuit board according to an embodiment includes: a multilayer insulating layer including a plurality of insulating layers stacked in a vertical direction; a wiring portion including a plurality of via electrodes respectively disposed in the plurality of insulating layers of the multilayer insulating layer; and a through-hole electrode penetrating the multilayer insulating layer, wherein the through-hole electrode includes: a first portion whose width in the horizontal direction increases along a direction from the upper surface of the multilayer insulating layer toward the lower surface of the multilayer insulating layer; a second portion disposed on the first portion whose width in the horizontal direction decreases along a direction from the upper surface of the multilayer insulating layer toward the lower surface of the multilayer insulating layer; and a base disposed between the first portion and the second portion, wherein at least one of the plurality of via electrodes of the wiring portion is connected to the base.

Description

Technical Field

[0001] The embodiments relate to circuit boards and semiconductor packages including the circuit board. Background Technology

[0002] With the improvement of the performance of electrical / electronic products, technologies for placing a larger number of semiconductor devices on semiconductor packaging substrates with limited size have been proposed and studied. However, since conventional semiconductor packaging is based on mounting a single semiconductor device, it has limitations in achieving the desired performance.

[0003] Therefore, semiconductor packages that utilize multiple substrates to arrange multiple semiconductor devices have recently been provided. Such semiconductor packages have a structure in which the multiple semiconductor devices are interconnected with respect to the substrates in a horizontal and / or vertical direction. Consequently, semiconductor packages offer the advantages of efficient utilization of the semiconductor device mounting area and the ability to transmit high-speed signals through short signal transmission paths between the semiconductor devices.

[0004] Furthermore, as the number of semiconductor devices increases and / or the size of each semiconductor device grows in accordance with the trend of high integration, or as the functional parts of semiconductor devices are divided, semiconductor packaging used in products providing the Internet of Things (IoT), autonomous vehicles, high-performance servers, etc., is expanding to include semiconductor chiplets.

[0005] As the number of semiconductor devices and / or semiconductor chips mounted in a semiconductor package increases, the area of ​​the semiconductor package tends to increase.

[0006] Therefore, as the area of ​​semiconductor packages increases, the warpage of the semiconductor packages also increases. Furthermore, as the number of semiconductor devices and / or semiconductor chiplets increases, heat generation becomes more severe, thus requiring further improvement in heat dissipation characteristics.

[0007] Meanwhile, circuit boards used in conventional semiconductor packages include heat dissipation components that perform heat dissipation functions. Here, the heat dissipation component can be a structure inserted into the circuit board, such as a heat sink. However, when a heat dissipation component such as a heat sink is placed in the circuit board, there are problems such as limitations on product design and increased product cost, and there are limitations in improving heat dissipation characteristics.

[0008] Furthermore, the aforementioned heat dissipation component can be one of the via electrodes disposed in the circuit board. For example, conventionally, at least one of a plurality of via electrodes passing through at least a portion of the circuit board is configured to perform a heat dissipation function. However, the width of the via electrode performing the heat dissipation function in the horizontal direction and / or the thickness in the vertical direction is greater than that of the via electrode transmitting general signals. Therefore, conventionally, there is a problem that the process of forming the via electrode performing the heat dissipation function is complex, leading to a decrease in product yield. For example, conventionally, a process of forming a chemical copper plating layer in the via and a process of forming an electrolytic plating layer using the chemical copper plating layer are performed. At this time, the chemical copper plating layer is disposed on the sidewalls of the via and the bottom surface of the via (preferably, the upper surface of the pad exposed by the via). Therefore, when electrolytic plating for forming the electrolytic plating layer is performed, electrolytic plating is performed on the sidewalls of the via and the bottom surface of the via, so that due to the resulting isotropic plating, the upper surface of the via electrode may have an uneven height. For example, conventional via electrodes may have protrusions such as burrs, thus requiring a planarization process to make the upper surface of the via electrode uniform in height.

[0009] Therefore, a new method is needed that can simplify the manufacturing process of circuit boards while further improving their heat dissipation characteristics and increasing product yield. Summary of the Invention

[0010] Technical issues

[0011] The embodiments provide a circuit board with a novel structure and a semiconductor package including the circuit board.

[0012] Furthermore, the embodiments provide a circuit board with improved heat dissipation characteristics and a semiconductor package including the same.

[0013] Furthermore, the embodiments provide a circuit board with improved warp characteristics and a semiconductor package including the same.

[0014] Furthermore, the embodiments provide a circuit board including via electrodes with uniform height on the upper surface and a semiconductor package including the same.

[0015] The technical problems to be solved by the proposed embodiments are not limited to those described above. Other technical problems not mentioned can be clearly understood by those skilled in the art from the following description.

[0016] Technical solution

[0017] The circuit board according to an embodiment includes: a multilayer insulating layer including a plurality of insulating layers stacked in a vertical direction; a wiring portion including a plurality of via electrodes respectively disposed in the plurality of insulating layers of the multilayer insulating layer; and a through-via electrode passing through the multilayer insulating layer, wherein the through-via electrode includes: a first portion whose width in the horizontal direction increases in a direction from the upper surface of the multilayer insulating layer toward the lower surface of the multilayer insulating layer; a second portion disposed on the first portion whose width in the horizontal direction decreases in a direction from the upper surface of the multilayer insulating layer toward the lower surface of the multilayer insulating layer; and a base disposed between the first portion and the second portion, and at least one of the plurality of via electrodes of the wiring portion is connected to the base.

[0018] In addition, the laminated insulating layer includes: an upper laminated insulating layer disposed on the upper surface of the base and including a plurality of upper insulating layers stacked in a vertical direction; and a lower laminated insulating layer disposed on the lower surface of the base and including a plurality of lower insulating layers stacked in a vertical direction.

[0019] Furthermore, the first portion of the through-hole electrode integrally penetrates multiple lower insulating layers of the lower stacked insulating layer in a vertical direction, and the second portion of the through-hole electrode integrally penetrates multiple upper insulating layers of the upper stacked insulating layer in a vertical direction.

[0020] In addition, the wiring section also includes a plurality of intermediate pads disposed between a plurality of via electrodes, and the wiring section includes a first wiring section, the first wiring section including a plurality of via electrodes and a plurality of intermediate pads, wherein the plurality of via electrodes of the first wiring section includes via electrodes connected to a base, and electrically connected to a first portion and a second portion through the via electrodes via the base.

[0021] In addition, the wiring section also includes a second wiring section, which is spaced further away from the through-hole electrode than the first wiring section. The first wiring section is disposed horizontally between the second wiring section and the through-hole electrode, and the second wiring section is electrically isolated from the first wiring section and the through-hole electrode.

[0022] Furthermore, the grains penetrating the first or second part of the through-hole electrode are different from the grains of the base.

[0023] Furthermore, the size of the grains in at least one region of the base is smaller than the size of the grains penetrating the first or second portion of the through-hole electrode.

[0024] Furthermore, the first or second portion of the through-hole electrode includes: a first region that contacts the inner wall of the through-hole of the multilayer insulating layer; and a second region disposed inside the through-hole and further away from the inner wall than the first region, wherein the grain size of the first region is the same as the grain size of the second region.

[0025] Furthermore, the interface between the first portion of the through-hole electrode and the stacked insulating layer is located between the lower surface of the lower stacked insulating layer and the lower surface of the base, and the interface between the second portion of the through-hole electrode and the upper stacked insulating layer is located between the upper surface of the upper stacked insulating layer and the upper surface of the base.

[0026] In addition, the first wiring portion includes: a lower wiring portion disposed on the lower surface of the base and arranged along the circumferential direction of the first portion of the through-hole electrode; and an upper wiring portion disposed on the lower surface of the base and arranged along the circumferential direction of the second portion of the through-hole electrode.

[0027] Furthermore, the multiple via electrodes of the lower wiring portion include multiple lower via electrodes, which are respectively disposed in multiple lower insulating layers and spaced apart from each other along the circumferential direction of the first portion of the via electrode. The multiple via electrodes of the upper wiring portion include multiple upper via electrodes, which are respectively disposed in multiple upper insulating layers and spaced apart from each other along the circumferential direction of the second portion of the via electrode.

[0028] Furthermore, at least one of the plurality of via electrodes in the upper wiring portion and the plurality of via electrodes in the lower wiring portion has a width in the horizontal direction that is greater than the width in the horizontal direction of at least one of the plurality of via electrodes in the second wiring portion.

[0029] Furthermore, at least one of the plurality of via electrodes in the lower wiring portion and the plurality of via electrodes in the upper wiring portion has a closed-loop shape surrounding a first portion or a second portion of the via electrode.

[0030] Furthermore, the lower wiring portion includes a lower pad portion disposed on the lower surface of the lower stacked insulating layer, the upper wiring portion includes an upper pad portion disposed on the upper surface of the upper stacked insulating layer, and the through-hole electrode includes a lower through-hole electrode pad portion disposed on the lower surface of the first portion and an upper through-hole electrode pad portion disposed on the upper surface of the second portion, and the lower pad portion and the lower through-hole electrode pad portion or the upper pad portion and the upper through-hole electrode pad portion are integrally formed.

[0031] Furthermore, each of the upper wiring portion and the lower wiring portion has multiple intermediate pad portions that are horizontally spaced from the first portion and the second portion of the through-hole electrode.

[0032] Furthermore, the first and second portions of the through-hole electrode have symmetrical shapes relative to the base.

[0033] Furthermore, at least one of the first portion and the second portion of the through-hole electrode includes a first-1 portion and a first-2 portion spaced apart from each other in the horizontal direction, and the first wiring portion includes a first-1 wiring portion arranged in the circumferential direction along the first-1 portion and a first-2 wiring portion arranged in the circumferential direction along the first-2 portion.

[0034] Furthermore, the central axis of the first part of the through-hole electrode in the horizontal direction is offset from the central axis of the second part of the through-hole electrode in the horizontal direction.

[0035] Furthermore, the lower wiring portion is disposed on one side of the first part of the through-hole electrode, and the upper wiring portion is disposed on the other side of the second part of the through-hole electrode, and the upper wiring portion and the lower wiring portion do not overlap each other in the vertical direction.

[0036] Beneficial effects

[0037] The circuit board according to an embodiment includes a plurality of insulating layers stacked in a vertical direction, wiring portions disposed in the plurality of insulating layers, and through-hole electrodes integrally penetrating the plurality of insulating layers. In this case, the wiring portions include a plurality of through-hole electrodes respectively disposed in the plurality of insulating layers, and a plurality of pad portions connected to the plurality of through-hole electrodes. In this case, according to an embodiment, the through-hole electrodes can be electroplated using a portion of the wiring portions including the through-hole electrodes and the pad portions. For example, the wiring portions may include a first wiring portion disposed adjacent to the through-hole electrodes, and the plurality of pad portions of the first wiring portion may include a base portion connected to the through-hole electrodes and a second pad portion spaced apart from the through-hole electrodes. Here, the fact that the plurality of pad portions of the first wiring portion include a base portion connected to the through-hole electrodes means that the pad portions of the first wiring portion and the through-hole electrodes can be used as seed layers for electroplating the through-hole electrodes.

[0038] In other words, the current used for electroplating the through-hole electrode can be uniformly supplied in the vertical direction through the base. Therefore, according to the embodiment, plating can be performed to a uniform height in the vertical direction relative to the upper surface of the base, thereby improving the flatness of the through-hole electrode. Therefore, according to the embodiment, the manufacturing process of the through-hole electrode can be simplified. For example, according to the embodiment, the through-hole corresponding to the through-hole electrode can be completely filled in a single plating process while the upper surface of the through-hole electrode is flat. Therefore, according to the embodiment, grinding processes can be omitted, thereby simplifying the manufacturing process and reducing manufacturing costs. Furthermore, according to the embodiment, grinding processes can be omitted, thereby preventing the electrodes disposed on the circuit board from being damaged by the grinding process. Therefore, according to the embodiment, product yield can be further improved.

[0039] Furthermore, the grain size of the through-hole electrode can differ from the grain size of the wiring portion. For example, the grain size of the through-hole electrode can differ from the grain size in at least one region of the base. That is, the base may include a chemically plated copper layer and an electrolytic plating layer. In contrast, the through-hole electrode may only have an electrolytic plating layer. Therefore, according to the embodiment, since the through-hole electrode only includes an electrolytic plating layer, the upper through-hole electrode can achieve uniform plating growth in the vertical direction relative to the base, and the flatness of the through-hole electrode surface can be further improved. Furthermore, according to the embodiment, the through-hole electrode may only include an electrolytic plating layer with dense grains, thereby having high thermal conductivity characteristics and more effectively dissipating the heat generated by the semiconductor device.

[0040] Therefore, the through-hole electrode can have a uniform grain size throughout its entire region. For example, the through-hole electrode may include a first region in contact with the inner wall of a via integrally penetrating the plurality of insulating layers, and a second region disposed within the through-hole electrode and further away from the inner wall of the via than the first region. Furthermore, the grain size in the first and second regions of the through-hole electrode can be the same. That is, in the comparative example, the through-hole electrode can be formed by performing electrolytic plating. However, for this purpose, a chemically plated copper layer must be disposed on the inner wall of the via, thus the grain sizes of the first and second regions of the through-hole electrode in the comparative example are different from each other. In contrast, according to the embodiment, the first and second regions of the through-hole electrode can have a uniform grain size, thereby improving the flatness of the through-hole electrode while providing high heat dissipation characteristics.

[0041] Furthermore, the tilt angle of the through-hole electrode can differ from that of the through-hole electrode in the wiring section. For example, the tilt angle of the through-hole electrode relative to the upper surface of the multilayer insulating layer can be closer to 90 degrees than the tilt angle of the through-hole electrode in the wiring section relative to the upper surface of the multilayer insulating layer. Therefore, the volume of the through-hole electrode in the multilayer insulating layer can be increased. This allows for maximizing the effect of the through-hole electrode according to its function. For example, when the through-hole electrode is used as a heat dissipation electrode performing a heat dissipation function, its volume can be maximized, thereby further improving heat dissipation characteristics. Consequently, the semiconductor device can operate more stably, thereby further improving product reliability.

[0042] Furthermore, a sub-via electrode having interconnected portions can be provided on at least two of the multiple sides of the through-via electrode. Therefore, according to the embodiment, the current used for plating the upper through-via electrode can be applied uniformly, thereby further ensuring the flatness of the upper through-via electrode. Additionally, according to the embodiment, the area of ​​the first wiring portion can be increased to further improve heat dissipation, thereby allowing the circuit board and semiconductor package to operate more stably.

[0043] Furthermore, the upper and lower through-hole electrodes can have asymmetrical shapes relative to the base. For example, the width of the upper through-hole electrode in the horizontal direction and / or the thickness in the vertical direction can differ from the width and / or thickness of the lower through-hole electrode in the horizontal direction. For example, the width of the upper through-hole electrode in the horizontal direction can differ from the width of the lower through-hole electrode in the horizontal direction. For example, the width of the upper through-hole electrode in the horizontal direction can be smaller than the width of the lower through-hole electrode in the horizontal direction. Therefore, according to the embodiment, heat can be transferred from the upper through-hole electrode, which has a relatively smaller width in the horizontal direction, to the lower through-hole electrode, which has a relatively larger width in the horizontal direction. That is, according to the embodiment, the direction of heat transfer can be controlled by making the widths of the upper and lower through-hole electrodes different from each other, thereby providing a more efficient heat dissipation function.

[0044] Furthermore, multiple through-hole electrodes can be provided, spaced apart from each other in the horizontal direction. For example, the through-hole electrodes may include a first through-hole electrode integrally penetrating multiple insulating layers of the upper insulating layer, and a second through-hole electrode integrally penetrating multiple insulating layers of the upper insulating layer and spaced apart from the first through-hole electrode in the horizontal direction. Therefore, the first and second through-hole electrodes can transfer heat through mutually branching paths. Thus, according to the embodiment, heat dissipation can be performed through multiple paths instead of a single path, thereby further improving heat dissipation characteristics. Furthermore, multiple semiconductor devices can be disposed on the circuit board, and the first through-hole electrode can be disposed in the area where the first semiconductor device is arranged. Furthermore, the second through-hole electrode can be disposed in the area where the second semiconductor device is arranged. That is, according to the embodiment, through-hole electrodes can be provided to correspond to each of the multiple semiconductor devices disposed on the circuit board. Therefore, according to the embodiment, the heat dissipation characteristics in a semiconductor package including multiple semiconductor devices can be further maximized.

[0045] Furthermore, the first wiring portion may include an upper wiring portion disposed only on one side of the upper through-hole. Additionally, the first wiring portion may include a lower wiring portion disposed only on the other side of the lower through-hole. Therefore, according to the embodiment, the volume of the upper through-hole electrode and / or the lower through-hole electrode can be further increased within an area equal to the circuit board area. Therefore, according to the embodiment, heat dissipation characteristics can be further improved. Attached Figure Description

[0046] Figure 1 This is a cross-sectional view of a circuit board according to the first embodiment.

[0047] Figure 2aThis is a view used to illustrate problems in the manufacturing method of the through-hole electrode of the circuit board according to the comparative example.

[0048] Figure 2b and Figure 2c Is with Figure 2a A comparative illustration of the through-hole electrode according to an embodiment.

[0049] Figure 3 yes Figure 1 Enlarged view of the upper part of the base.

[0050] Figure 4 It is a plan view of the area where the third base is located.

[0051] Figure 5 It is along Figure 3 A sectional view taken by line A-A'.

[0052] Figure 6 This is a view showing the shape of the via electrode of the first wiring portion according to the first embodiment.

[0053] Figure 7 This is a view showing the shape of the via electrode of the first wiring portion according to the second embodiment.

[0054] Figure 8 This is a view showing the shape of the via electrode of the first wiring section according to the third embodiment.

[0055] Figure 9 This is a cross-sectional view of a circuit board according to the second embodiment.

[0056] Figure 10 This is a cross-sectional view of a circuit board according to a third embodiment.

[0057] Figure 11 This is a cross-sectional view of a circuit board according to the fourth embodiment.

[0058] Figure 12 This is a cross-sectional view of a circuit board according to the fifth embodiment.

[0059] Figure 13 This is a cross-sectional view of a circuit board according to the sixth embodiment.

[0060] Figure 14 This is a view showing a semiconductor package according to a first embodiment.

[0061] Figure 15 This is a view showing a semiconductor package according to a second embodiment.

[0062] Figures 16 to 20 This is a cross-sectional view showing the manufacturing method of a circuit board according to an embodiment, arranged in process order. Detailed Implementation

[0063] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0064] However, the spirit and scope of this disclosure are not limited to the embodiments described herein, but can be implemented in various other forms, and one or more elements of the embodiments can be selectively combined and rearranged within the spirit and scope of this disclosure.

[0065] Furthermore, unless otherwise explicitly defined and described, the terms (including technical and scientific terms) used in the embodiments of this disclosure may be interpreted as having the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains, and terms such as those defined in common dictionaries may be interpreted as having the same meaning as their meaning in the relevant technical context.

[0066] Furthermore, the terminology used in the embodiments of this disclosure is for describing embodiments and is not intended to limit this disclosure. In this specification, singular forms may also include plural forms unless the context clearly indicates otherwise, and when described as “at least one (or more) of A, B, and C,” it may include at least one of all possible combinations of A, B, and C. Additionally, terms such as first, second, A, B, (a), and (b) may be used when describing elements of embodiments of this disclosure.

[0067] These terms are used only to distinguish an element from other elements, and they are not limited to the nature, order, or sequence of elements. Furthermore, when an element is described as being “connected,” “linked,” or “in contact” with another element, this can include not only cases where the element is directly “connected,” “linked,” or “in contact” with another element, but also cases where the element is “connected,” “linked,” or “in contact” with that other element through another element situated between them.

[0068] Furthermore, when described as forming or setting on each element "above" or "below", "above" or "below" can include not only the case where two elements are in direct contact with each other, but also the case where one or more other elements are formed or set between the two elements. Additionally, when expressed as "above" or "below", it can include not only the upward direction based on an element, but also the downward direction.

[0069] The terminology used in this application is for describing particular embodiments only and is not intended to limit the invention. Unless the context clearly indicates otherwise, singular expressions include plural expressions. In this application, terms such as “comprising” or “having” are intended to indicate the presence of features, quantities, steps, operations, components, parts, or combinations thereof described in the specification, and should be understood to not exclude the presence or addition of one or more other features, quantities, steps, operations, components, parts, or combinations thereof.

[0070] Unless otherwise defined, all terms used herein (including technical or scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms as defined in common dictionaries shall be interpreted as having the same meaning as they have in the relevant technical context, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0071] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Regardless of the reference numerals used, the same or corresponding components will be given the same reference numerals, and repeated descriptions thereof will be omitted.

[0072] Before describing the embodiments, a semiconductor-packaged electronic device (not shown) will be briefly described as an application embodiment. The electronic device may be a smartphone, personal digital assistant, digital camcorder, digital still camera, vehicle, high-performance server, network system, computer, monitor, tablet computer, laptop, netbook, television, video game, smartwatch, automotive equipment, etc. However, the electronic device is not limited to these and may be any other electronic device capable of processing data.

[0073] The electronic device includes a motherboard (not shown). The motherboard can be physically and / or electrically connected to various components. For example, the motherboard can be electrically connected to a semiconductor package according to an embodiment. Furthermore, the semiconductor package includes a circuit board, a semiconductor device, a bonding portion for electrically connecting the semiconductor device and the circuit board, a resin portion for filling the space between the semiconductor device and the circuit board, and a molding portion surrounding the semiconductor device.

[0074] Semiconductor devices can include active and / or passive devices and can have a variety of functions. Active devices can be in the form of integrated circuits (ICs) with hundreds to millions or more transistors integrated in a single semiconductor device, such as logic chips or memory chips. For example, a logic chip can be an application processor (AP) device that includes at least one of a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor, a cryptographic processor, a microprocessor, and a microcontroller, or it can be an analog-to-digital converter, an application-specific integrated circuit (ASIC), or a group of devices that includes a specific combination of the components listed above. Memory chips can be stacked memories such as HBM. Furthermore, memory chips can include volatile memories (e.g., DRAM), non-volatile memories (e.g., ROM), flash memory, etc.

[0075] The semiconductor package of the embodiment may be any one of chip-scale packaging (CSP), flip chip-to-chip-scale packaging (FC-CSP), flip chip ball grid array (FC-BGA), stacked package (POP), and system-in-package (SIP), but is not limited thereto.

[0076] Figure 1 This is a cross-sectional view of a circuit board according to the first embodiment. Figure 2a This diagram illustrates a problem in the manufacturing method of the through-hole electrode of the circuit board according to the comparative example. Figure 2b and Figure 2c Is with Figure 2a A comparative illustration of the through-hole electrode according to the embodiment. Figure 3 yes Figure 1 Enlarged view of the upper part of the middle base. Figure 4 This is a plan view of the area where the third base is located. Figure 5 It is along Figure 3 A sectional view taken along line A-A'. Figure 6 This is a diagram showing the shape of the via electrode of the first wiring portion according to the first embodiment. Figure 7 This is a diagram showing the shape of the via electrode of the first wiring portion according to the second embodiment. Figure 8 This is a diagram showing the shape of the via electrode of the first wiring portion according to the third embodiment. Figure 9 This is a cross-sectional view of a circuit board according to the second embodiment. Figure 10 This is a cross-sectional view of a circuit board according to a third embodiment. Figure 11 This is a cross-sectional view of a circuit board according to the fourth embodiment. Figure 12 This is a cross-sectional view of a circuit board according to the fifth embodiment. Figure 13 This is a cross-sectional view of a circuit board according to the sixth embodiment. Figure 14 This is a diagram illustrating a semiconductor package according to a first embodiment, and Figure 15This is a diagram illustrating a semiconductor package according to a second embodiment.

[0077] The following will refer to Figures 1 to 15 A circuit board and a semiconductor package including the circuit board are described in detail according to an embodiment.

[0078] Reference Figure 1 The circuit board 100 includes a multilayer insulating layer 110, a first protective layer 120, a second protective layer 130, wiring portions 140, and through-hole electrodes 170. The multilayer insulating layer 110 includes a plurality of insulating layers stacked in a vertical direction. The first protective layer 120 may be disposed on one surface of the multilayer insulating layer 110. The second protective layer 130 may be disposed on another surface of the multilayer insulating layer 110. Here, "disposed on one surface and another surface" should not be construed as limited to a configuration in direct contact with the one surface and the other surface, but should be understood to include a configuration in which another component exists between one surface of the multilayer insulating layer 110 and the first protective layer 120, and between the other surface of the multilayer insulating layer 110 and the second protective layer 130. The wiring portion 140 may include a plurality of via electrodes 160 disposed in the plurality of insulating layers of the multilayer insulating layer 110, and a plurality of pad portions 150 disposed between the plurality of via electrodes 160. The through-hole electrode 170 can be configured to integrally penetrate at least two of the plurality of insulating layers of the multilayer insulating layer 110. In this case, the via electrode 160 is similar to the through-hole electrode 170 in that both are configured to penetrate at least a portion of the multilayer insulating layer 110 in the vertical direction. However, the via electrode 160 and the through-hole electrode 170 can be distinguished from each other based on at least one of the following: width in the horizontal direction, thickness in the vertical direction, planar area, and volume. For example, the width of the via electrode 160 in the horizontal direction may be smaller than the width of the through-hole electrode 170 in the horizontal direction. Alternatively, the thickness of the via electrode 160 in the vertical direction may be smaller than the thickness of the through-hole electrode 170 in the vertical direction. Alternatively, the planar area of ​​the via electrode 160 may be smaller than the planar area of ​​the through-hole electrode 170. Alternatively, the volume of the via electrode 160 may be smaller than the volume of the through-hole electrode 170. For example, the through-hole electrode 170 may have a width in the horizontal direction, a thickness in the vertical direction, a planar area, and a volume greater than that of the through-hole electrode 160. For example, the through-hole electrode 170 may refer to a through-hole electrode with a relatively large area.

[0079] Specifically, the multilayer insulating layer 110 may have a structure in which multiple insulating layers are stacked in the vertical direction.

[0080] The stacked insulating layer 110 may include an upper stacked insulating layer 111 and a lower stacked insulating layer 112. The upper stacked insulating layer 111 includes a plurality of insulating layers 113, 114, and 115 stacked in a vertical direction, and the lower stacked insulating layer 112 includes a plurality of insulating layers 116, 117, and 118 stacked in a vertical direction and disposed below the upper stacked insulating layer 111. The upper stacked insulating layer 111 and the lower stacked insulating layer 112 may be distinguished from each other based on the position of the pads that serve as a reference for forming the through-hole electrode 170.

[0081] For example, the upper stacked insulating layer 111 and the lower stacked insulating layer 112 can be distinguished from each other based on the through-hole electrode 170. The through-hole electrode 170 may include a first portion 171, a second portion 172, and a base 173 located between the first portion 171 and the second portion 172. The base 173 may refer to a base pad that serves as a reference for forming the through-hole electrode 170. The first portion 171 of the through-hole electrode 170 may be a through-hole electrode disposed below the base 173, and the second portion 172 of the through-hole electrode 170 may be a through-hole electrode located above the base 173.

[0082] Therefore, the upper stacked insulating layer 111 can refer to the insulating layer located above the base 173, which serves as a reference, and the lower stacked insulating layer 112 can refer to the insulating layer located below the base 173. The upper stacked insulating layer 111 can refer to the insulating layer that is entirely penetrated by the second portion 172 of the through-hole electrode 170, and the lower stacked insulating layer 112 can refer to the insulating layer that is entirely penetrated by the first portion 171 of the through-hole electrode 170.

[0083] The multilayer insulating layer 110 described above may not include a core layer. For example, the circuit board 100 including the multilayer insulating layer 110 may be a coreless substrate. However, the embodiments are not limited to this, and the circuit board 100 may be a core-containing substrate including a core layer. In this case, the multilayer insulating layer 110 may be disposed on each of the upper and lower surfaces of the core layer. Specifically, when the circuit board 100 is a core-containing substrate including a core layer, the upper multilayer insulating layer 111 of the multilayer insulating layer 110 may be disposed on the upper surface of the core layer, and the lower multilayer insulating layer 112 of the multilayer insulating layer 110 may be disposed on the lower surface of the core layer.

[0084] The upper insulating layer 111 may include: a first insulating layer 113, which is closest to the first protective layer 120 in the vertical direction; a second insulating layer 114, which is further away from the first protective layer 120 in the vertical direction than the first insulating layer 113; and a third insulating layer 115, which is further away from the first protective layer 120 in the vertical direction than the second insulating layer 114.

[0085] The lower laminated insulating layer 112 may include: a fourth insulating layer 116, which is closest to the first protective layer 120 and / or the upper laminated insulating layer 111 in the vertical direction; a fifth insulating layer 117, which is further away from the first protective layer 120 or the upper laminated insulating layer 111 in the vertical direction than the fourth insulating layer 116; and a sixth insulating layer 118, which is further away from the first protective layer 120 or the upper laminated insulating layer 111 in the vertical direction than the fifth insulating layer 117.

[0086] In this context, although each of the upper stacked insulating layer 111 and the lower stacked insulating layer 112 has been described as comprising three insulating layers, the embodiments are not limited thereto. For example, the upper stacked insulating layer 111 and / or the lower stacked insulating layer 112 may have a structure with two or fewer stacked insulating layers. As another example, the upper stacked insulating layer 111 and / or the lower stacked insulating layer 112 may have a structure with four or more stacked insulating layers.

[0087] Furthermore, although the upper laminated insulating layer 111 and the lower laminated insulating layer 112 have been described as having the same number of layers, the embodiments are not limited thereto. For example, the upper laminated insulating layer 111 and the lower laminated insulating layer 112 may have an asymmetrical structure. For example, the number of insulating layers in at least one of the upper laminated insulating layer 111 and the lower laminated insulating layer 112 may be greater than or less than the number of insulating layers in the other of the upper laminated insulating layer 111 and the lower laminated insulating layer 112.

[0088] The first to sixth insulating layers 113, 114, 115, 116, 117, and 118 of the upper and lower stacked insulating layers 111 and 112 are configured to provide vertical insulation between the pad portions 150 of the wiring portion 140, which will be described below. For example, for the first to sixth insulating layers 113, 114, 115, 116, 117, and 118, a thermosetting insulating material containing inorganic fillers in a resin can be used, and ABF (Ajinomoto Build-up Film) manufactured by Ajinomoto Co., Inc. can be used. However, the embodiments are not limited to this, and photocurable insulating materials (photoimaging dielectrics, PIDs) for forming fine patterns can be used.

[0089] At least one of the first to sixth insulating layers 113, 114, 115, 116, 117, and 118 may include an insulating material different from at least one of them. For example, at least one of the first to sixth insulating layers 113, 114, 115, 116, 117, and 118 may include a reinforcing member (not shown). In one embodiment, the reinforcing member may refer to glass fiber. In another embodiment, the reinforcing member may refer to GCP (Glass Core Primer). The reinforcing member may be disposed in at least one of the first to sixth insulating layers 113, 114, 115, 116, 117, and 118 to improve the rigidity of the circuit board 100. The reinforcing member can prevent the circuit board 100 from warping significantly in a certain direction, thereby improving the vertical alignment between the pad portion 150 and the via electrode 160, and thus improving the electrical and / or mechanical reliability of the circuit board 100 and the semiconductor package. Furthermore, the reinforcing member increases the rigidity of the circuit board 100, thereby improving the manufacturability and product yield in the process of mounting semiconductor devices on the circuit board 100. Therefore, the reinforcing member enables the semiconductor devices to be stably mounted on the circuit board 100 and to operate stably. Consequently, electronic products (e.g., servers) using this semiconductor package can operate stably, thereby improving operational reliability. For example, the reinforcing member can be alternately disposed in the first to sixth insulating layers 113, 114, 115, 116, 117, and 118 in the vertical direction. For example, the reinforcing member can be disposed in the odd-numbered insulating layers of the first to sixth insulating layers 113, 114, 115, 116, 117, and 118, or it can be disposed in the even-numbered insulating layers of the first to sixth insulating layers 113, 114, 115, 116, 117, and 118.

[0090] The wiring section 140 may include pad sections 150 and via electrodes 160. Pad sections 150 may be disposed on the upper and / or lower surfaces of the first to sixth insulating layers 113, 114, 115, 116, 117, and 118, respectively. Via electrodes 160 may be disposed between multiple pad sections 150, and can electrically connect multiple pad sections disposed on different layers. Pad sections 150 may be divided into upper pad sections disposed in the upper stacked insulating layer 111 and lower pad sections disposed in the lower stacked insulating layer 112.

[0091] The upper pad portion of the pad portion 150 may include: a first upper pad portion 151 that is closest to the first protective layer 120 in the vertical direction, a second upper pad portion 152 that is further away from the first protective layer 120 than the first upper pad portion 151, a third upper pad portion 153 that is further away from the first protective layer 120 than the second upper pad portion 152, and a fourth upper pad portion 154 that is further away from the first protective layer 120 than the third upper pad portion 153.

[0092] Furthermore, the lower pad portion of the pad portion 150 may include: a first lower pad portion 155 further away from the first protective layer 120 than the fourth upper pad portion 154, a second lower pad portion 156 further away from the first protective layer 120 than the first lower pad portion 155, and a third lower pad portion 157 further away from the first protective layer 120 than the second lower pad portion 156. Here, the pad portion 150 may refer to wiring that overlaps with or is physically directly connected to the via electrode 160 of the wiring portion 140 in the vertical direction. In this case, although not shown in the figures, the wiring portion 140 may also include traces that overlap horizontally with at least one of the first to fourth upper pad portions 151, 152, 153 and 154 and the first to third lower pad portions 155, 156 and 157. Traces may refer to wiring lines that electrically connect multiple pads that overlap horizontally. Here, the pad portion and the via electrode can be distinguished from each other based on their width in the horizontal direction, their thickness in the vertical direction, and their side slope. For example, the width of the pad portion in the horizontal direction can be greater than the width of the via electrode in the horizontal direction. Alternatively, the thickness of the pad portion in the vertical direction can be less than the thickness of the via electrode in the vertical direction. Alternatively, the side slope of the pad portion can be closer to being perpendicular to the upper or lower surface of the multilayer insulating layer 110 than the side slope of the via electrode. Therefore, at least one of the width in the horizontal direction, the thickness in the vertical direction, and the side slope can be used to distinguish the pad portion and the via electrode from each other. Furthermore, a trace can refer to a signal line that electrically connects multiple pad portions. In this case, the trace and the pad portion can be distinguished from each other based on their width in the horizontal direction. For example, the width of the trace in the horizontal direction can be less than the width of the pad portion in the horizontal direction. Furthermore, the trace and the pad portion can be distinguished from each other based on whether they overlap with the via electrode in the vertical direction. For example, pads may overlap with via electrodes in the vertical direction and may be physically and / or electrically connected to the via electrodes, while traces may not overlap with via electrodes in the vertical direction. Traces can electrically connect multiple pads in the horizontal direction.

[0093] Furthermore, the first to fourth upper pad portions 151, 152, 153, and 154, and the first to third lower pad portions 155, 156, and 157, can serve to electrically connect to semiconductor devices disposed on the circuit board 100. Each of the first to fourth upper pad portions 151, 152, 153, and 154, and the first to third lower pad portions 155, 156, and 157 can be freely designed taking impedance into account.

[0094] In the first to fourth upper pad portions 151, 152, 153, and 154 and the first to third lower pad portions 155, 156, and 157, the fourth upper pad portion 154 is disposed between the upper stacked insulating layer 111 and the lower stacked insulating layer 112. In this case, the base 173 of the through-hole electrode 170, which will be described below, may be a part of the fourth upper pad portion 154.

[0095] In other words, multiple fourth upper pad portions 154 may be arranged spaced apart from each other in the horizontal direction. Among the fourth upper pad portions 154, the pad portion physically and / or electrically connected to the first portion 172 and the second portion 171 of the through-hole electrode 170 may be referred to as a base portion 173, which electrically connects a portion of the aforementioned wiring portion 140 to the through-hole electrode 170. The base portion 173 may electrically connect another upper pad portion / via electrode of the wiring portion 140 to the second portion 171 of the through-hole electrode to simplify the manufacturing process and further improve product yield while improving the physical and / or electrical reliability of the first portion 172 and the second portion 171 of the through-hole electrode 170, as described below. Furthermore, the base portion 173 may electrically connect another lower pad portion / via electrode of the wiring portion 140 to the first portion 172 of the through-hole electrode. For example, as described above, the wiring portion 140 may include multiple pad portions 150 and multiple via electrodes 160. At least some of the plurality of pad portions 150 and the plurality of via electrodes 160 can be used as signal wiring for signal transmission. Furthermore, some of the remaining plurality of pad portions 150 and the plurality of via electrodes 160 can be electrically connected to the first portion 172 and the second portion 171 of the through-hole electrode 170, thus performing the same functions as those performed by the first portion 172 and the second portion 171. For example, when the first portion 172 and the second portion 171 of the through-hole electrode 170 perform a heat dissipation function, at least some of the plurality of pad portions 150 and the plurality of via electrodes 160 of the wiring portion 140 can be physically and electrically connected to the first portion 172 and / or the second portion 171 of the through-hole electrode, thereby performing a heat dissipation function. Furthermore, the pad portions 150 and the via electrodes 160 of the wiring portion 140 electrically connected to the first portion 172 and the second portion 171 of the through-hole electrode can be used as seed layers to facilitate electroplating of the first portion 172 and / or the second portion 171 of the through-hole electrode. Detailed structures will be described below.

[0096] The via electrode 160 may be configured to electrically connect the first to fourth upper pad portions 151, 152, 153 and 154 and the first to third lower pad portions 155, 156 and 157 to each other. The via electrode 160 may include the first to sixth via electrodes 161, 162, 163, 164, 165 and 166.

[0097] The first via electrode 161 may be disposed between the first upper pad portion 151 and the second upper pad portion 152. The second via electrode 162 may be disposed between the second upper pad portion 152 and the third upper pad portion 152. The third via electrode 163 may be disposed between the third upper pad portion 153 and the fourth upper pad portion 154. The fourth via electrode 164 may be disposed between the fourth upper pad portion 154 and the first lower pad portion 155. The fifth via electrode 165 may be disposed between the first lower pad portion 155 and the second lower pad portion 156. The sixth via electrode 166 may be disposed between the second lower pad portion 156 and the third lower pad portion 157.

[0098] The first to sixth via electrodes 161, 162, 163, 164, 165, and 166 can be formed simultaneously in the process of setting the first to fourth upper pad portions 151, 152, 153, and 154 and the first to third lower pad portions 155, 156, and 157. For example, in the process of setting the first upper pad portion 151, a through-hole can be formed in the first insulating layer 113 to expose a portion of the second upper pad portion 152. Therefore, the first upper pad portion 151 can be formed together with the first via electrode 161 that fills the through-hole of the first insulating layer 113. Thus, the first via electrode 161 can be distinguished as a protruding portion of the first upper pad portion 151.

[0099] Since the first to fourth upper pads 151, 152, 153, and 154 are stacked sequentially on the lower stacked insulating layer 112 in the vertical direction, the tilt directions of the first to third via electrodes 161, 162, and 163 can be the same as each other. For example, each of the first to third via electrodes 161, 162, and 163 can have a tilt that increases its width toward the second protective layer 130.

[0100] Since the first to third lower pad portions 155, 156, and 157 are stacked sequentially below the upper insulating layer 111 in the vertical direction, the tilt directions of the fourth to sixth via electrodes 164, 165, and 166 can be the same. For example, each of the fourth to sixth via electrodes 164, 165, and 166 can have a tilt that increases its width toward the first protective layer 120.

[0101] The tilting direction of the first to third via electrodes 161, 162, and 163 may differ from the tilting direction of the fourth to sixth via electrodes 164, 165, and 166. For example, the tilting direction of the first to third via electrodes 161, 162, and 163 may be opposite to the tilting direction of the fourth to sixth via electrodes 164, 165, and 166. For example, the first to third via electrodes 161, 162, and 163 may have a shape symmetrical to the fourth to sixth via electrodes 164, 165, and 166.

[0102] The through-hole electrode 170 is configured to penetrate both the upper stacked insulating layer 111 and the lower stacked insulating layer 112. The through-hole electrode 170 includes a base 173 and may include a first portion 172 disposed below the base 173 and a second portion 171 disposed on the base 173. Therefore, for ease of description, the first portion 172 of the through-hole electrode 170 is referred to as the lower through-hole electrode 172 of the through-hole electrode 170 disposed on the lower surface of the base 173, and the second portion 171 of the through-hole electrode 170 is referred to as the upper through-hole electrode 171 of the through-hole electrode 170 disposed on the upper surface of the base 173.

[0103] That is, the through-hole electrode 170 may include: an upper through-hole electrode 171 that passes through the upper stacked insulating layer 111 in the vertical direction, a lower through-hole electrode 172 that passes through the lower stacked insulating layer 112 in the vertical direction, and a base 173 disposed between the upper through-hole electrode 171 and the lower through-hole electrode 172.

[0104] The through-hole electrode 171 may be configured to integrally penetrate the upper stacked insulating layer 111. For example, the through-hole electrode 171 may integrally penetrate the first to third insulating layers 113, 114 and 115 of the upper stacked insulating layer 111.

[0105] For example, the width of the through-hole electrode 171 in the horizontal direction can decrease along the direction from the upper surface of the multilayer insulating layer 110 toward the lower surface of the multilayer insulating layer 110.

[0106] The tilt direction of the upper through-hole electrode 171 can be the same as the tilt direction of the first to third through-hole electrodes 161, 162 and 163. That is, the width of each of the upper through-hole electrode 171 and the first to third through-hole electrodes 161, 162 and 163 in the horizontal direction can decrease in the direction from the upper surface of the multilayer insulating layer 110 toward the lower surface of the multilayer insulating layer 110.

[0107] In this case, the tilt angle of the through-hole electrode 171 may differ from the tilt angles of the first to third via electrodes 161, 162, and 163. For example, the through-hole electrode 171 may be configured to have a relatively large width in the horizontal direction while integrally passing through the first to third insulating layers 113, 114, and 115, while the first to third via electrodes 161, 162, and 163 may be configured to have a relatively small width in the horizontal direction while respectively passing through the first to third insulating layers 113, 114, and 115. Therefore, the tilt angle of the through-hole electrode 171 may be closer to vertical than the tilt angle of each of the first to third via electrodes 161, 162, and 163. For example, the tilt angle of the side of the through-hole electrode 171 relative to the upper surface of the upper-layer insulating layer 111 may be closer to vertical than the tilt angle of the side of each of the first to third via electrodes 161, 162, and 163 relative to the upper surface of the upper-layer insulating layer 111. Therefore, the volume of the through-hole electrode 171 within the upper-layer insulating layer 111 can be increased. This maximizes the effectiveness of the through-hole electrode 171 according to its function. For example, when the through-hole electrode 171 is used as a heat dissipation electrode performing a heat dissipation function, its volume can be maximized, thereby further improving heat dissipation characteristics. Consequently, the semiconductor device can operate more stably, further improving product reliability.

[0108] The through-hole electrode 172 may be configured to integrally penetrate the lower stacked insulating layer 112. For example, the through-hole electrode 172 may integrally penetrate the fourth to sixth insulating layers 116, 117 and 118 of the lower stacked insulating layer 112.

[0109] For example, the width of the through-hole electrode 172 in the horizontal direction can be increased in the direction from the upper surface of the multilayer insulating layer 110 toward the lower surface of the multilayer insulating layer 110.

[0110] The tilt direction of the through-hole electrode 172 can be the same as the tilt direction of the fourth to sixth via electrodes 164, 165 and 166. That is, the width of each of the through-hole electrode 172 and the fourth to sixth via electrodes 164, 165 and 166 in the horizontal direction can increase in the direction from the upper surface of the multilayer insulating layer 110 toward the lower surface of the multilayer insulating layer 110.

[0111] The tilt angle of the through-hole electrode 172 may differ from the tilt angles of the fourth to sixth via electrodes 164, 165, and 166. For example, the through-hole electrode 172 may be configured to have a relatively large width in the horizontal direction while integrally passing through the fourth to sixth insulating layers 116, 117, and 118, while the fourth to sixth via electrodes 164, 165, and 166 may be configured to have a relatively small width in the horizontal direction while passing through the fourth to sixth insulating layers 116, 117, and 118, respectively. Therefore, the tilt angle of the through-hole electrode 172 may be closer to vertical than the tilt angle of each of the fourth to sixth via electrodes 164, 165, and 166. For example, the tilt angle of the side of the through-hole electrode 172 relative to the lower surface of the underlying insulating layer 112 can be closer to perpendicular than the tilt angle of the side of each of the fourth to sixth via electrodes 164, 165, and 166 relative to the lower surface of the underlying insulating layer 112. Therefore, the volume of the through-hole electrode 172 within the underlying insulating layer 112 can be increased. Thus, the effect of the through-hole electrode 172 according to its function can be maximized. For example, when the through-hole electrode 172 is used as a heat dissipation electrode performing a heat dissipation function, the volume of the through-hole electrode 172 can be maximized, thereby further improving heat dissipation characteristics. Therefore, the semiconductor device can operate more stably, thereby further improving product reliability.

[0112] The first protective layer 120 may be disposed on the upper surface of the upper stacked insulating layer 111, and the second protective layer 130 may be disposed on the lower surface of the lower stacked insulating layer 112. The first protective layer 120 and the second protective layer 130 protect the first upper pad portion 151 and / or the upper surface of the upper stacked insulating layer 111 from external moisture or contaminants. Furthermore, when semiconductor devices are mounted on the circuit board 100 using materials such as solder, the first protective layer 120 prevents short circuits between solders due to its low wettability with the solder. The first protective layer 120 may use a photocurable insulating material, such as a solder resist layer. However, the embodiments are not limited to this; the first protective layer 120 may include the same thermosetting insulating material as the insulating material of the stacked insulating layer 110. The first protective layer 120 may include the same insulating material as the stacked insulating layer 110, and may, for example, be ABF (Ajinomoto Build-up Film) manufactured by Ajinomoto Co., Inc.

[0113] The circuit board 100 requires a heat dissipation function to ensure stable operation of the semiconductor devices. Here, heat dissipation function can mean easily dissipating the heat generated by the semiconductor devices mounted on the circuit board 100 to the outside of the circuit board.

[0114] For example, according to an embodiment, the heat generated by the semiconductor device disposed on the circuit board can be discharged in the downward direction of the circuit board using the upper through-hole electrode 171 and the lower through-hole electrode 172 disposed in the upper stacked insulating layer 111 and the lower stacked insulating layer 112.

[0115] In this case, the wiring section 140 of this application may have the following structure: it can simplify the manufacturing process of the upper through-hole electrode 171 and / or the lower through-hole electrode 172, improve the electrical characteristics of the upper through-hole electrode 171 and / or the lower through-hole electrode 172, and further improve the product yield. To this end, the wiring section 140 may include a wiring section electrically connected to the upper through-hole electrode 171 and / or the lower through-hole electrode 172 and performing a heat dissipation function together with the upper through-hole electrode 171 and / or the lower through-hole electrode 172. That is, the wiring section 140 may include a wiring section electrically connected to the upper through-hole electrode 171 and / or the lower through-hole electrode 172, such that a current for electrolytic plating of the upper through-hole electrode 171 and / or the lower through-hole electrode 172 is applied thereto.

[0116] Before describing the embodiments, a through-hole electrode formed by electroplating according to a comparative example will be described.

[0117] Reference Figure 2a The circuit board according to the comparative example includes a multilayer insulating layer 10. The multilayer insulating layer 10 includes a via TH. The multilayer insulating layer 10 includes a plurality of insulating layers stacked in a vertical direction, and the via TH is configured to integrally penetrate the plurality of insulating layers.

[0118] In this case, according to a comparative example, a mask 20 having an opening overlapping the via TH in the vertical direction is formed on the multilayer insulating layer 10, and then a process of plating a first metal layer 30 and a second metal layer 40 is performed. In this case, the first metal layer 30 is a seed layer for forming the second metal layer 40, and may be, for example, a chemically plated copper layer. The second metal layer 40 is an electrolytically plated layer formed by electrolytic plating using the first metal layer 30 as a seed layer.

[0119] The first metal layer 30 is formed on the inner wall of the via TH and the bottom surface of the via TH (preferably, the upper surface of the lower pad exposed through the via). Therefore, when the second metal layer 40 is formed by electroplating, plating is performed on the inner wall of the via TH and on the upper surface of the lower pad. For example, according to the comparative example, since the first metal layer 30 is used as a seed layer for electroplating, the second metal layer 40 is isotropically plated. In this case, the second metal layer 40 is formed to fill the opening of the via TH and the mask 20. In this case, a portion of the second metal layer 40 disposed in the opening of the mask 20 may exceed the target thickness before the via TH is completely filled by the second metal layer 40.

[0120] Therefore, in the comparative example, multiple plating processes are required to completely fill the via TH with the second metal layer 40. For example, in the comparative example, a process is performed to form the second metal layer 40 once in the opening of the via TH and the mask 20. Subsequently, in the comparative example, a process is performed to remove a portion of the second metal layer 30 that excessively protrudes above the opening of the mask 20 by grinding. Subsequently, in the comparative example, a process is performed to form the second metal layer 40 a second time in the opening of the second via TH and the mask 20. In this case, the plating process described above can be repeated, and the number of plating processes can be increased according to the depth of the via TH in the vertical direction.

[0121] Therefore, the comparative example has the following problems: the time required to completely fill the via TH with the second metal layer 40 is increased, and the manufacturing process becomes more complicated.

[0122] Furthermore, the upper surface of the ultimately formed second metal layer 40 is uneven and has irregularities. For example, the upper surface of the second metal layer 40 includes a protrusion 40T1 protruding in the upward direction and a recess 40T2 recessed in the downward direction. Therefore, in the prior art, a process is performed to ultimately planarize the upper surface of the second metal layer 40. Consequently, in the prior art, the following problems exist: the manufacturing process becomes complex due to the grinding process, manufacturing costs increase during the grinding process, and thus product yield decreases.

[0123] Specifically, in the comparative example, since the first metal layer 30 formed on the sidewall of the via TH is used as a seed layer for isotropic plating, there is a problem that the flatness difference between the protrusion 40T1 and the recess 40T2 becomes larger. Specifically, in the comparative example, the height difference between the protrusion 40T1 and the recess 40T2 exceeds 150 μm, 180 μm, or 200 μm. Therefore, in the comparative example, a polishing process of at least 150 μm is required to achieve consistent flatness between the protrusion 40T1 and the recess 40T2.

[0124] In comparison, refer to Figure 2b and Figure 2c According to an embodiment, the upper through-hole electrode 171 and the lower through-hole electrode 172 are formed without forming a separate seed layer such as a chemically plated copper layer. In this case, the upper through-hole electrode 171 and the lower through-hole electrode 172 can be formed by filling with a material such as a conductive paste; however, in this case, the heat dissipation characteristics of the circuit board and semiconductor package may deteriorate due to the relatively low heat transfer characteristics.

[0125] Therefore, in this embodiment, electroplating is performed to form the upper through-hole electrode 171 and the lower through-hole electrode 172, which have excellent heat dissipation characteristics. Furthermore, according to this embodiment, electroplating of the upper through-hole electrode 171 and the lower through-hole electrode 172 can be performed without forming a separate seed layer, such as a chemically plated copper layer, for electroplating the upper through-hole electrode 171 and the lower through-hole electrode 172. For example, the upper through-hole electrode 171 and the lower through-hole electrode 172 may consist only of electroplated layers, and the electroplated layers of the upper through-hole electrode 171 and the lower through-hole electrode 172 may be in direct contact with the inner wall of the via of the stacked insulating layer 110.

[0126] Preferably, according to an embodiment, a portion of the pad portion 150 and the via electrode 160 constituting the wiring portion 140 is used as a seed layer for electrolytic plating of the upper through-hole electrode 171 and the lower through-hole electrode 172. Therefore, in an embodiment, when the upper through-hole electrode 171 and the lower through-hole electrode 172 are formed by electrolytic plating, the upper through-hole electrode 171 and the lower through-hole electrode 172 may be formed to include only an electrolytic plating layer; furthermore, a chemical copper plating layer may not be provided between the electrolytic plating layer of the upper through-hole electrode 171 and the lower through-hole electrode 172 and the inner wall of the via of the stacked insulating layer 110.

[0127] However, as Figure 2b As shown, unlike the comparative example, even when an anisotropic plating method using the first wiring portion 140A, described below, is applied without forming a separate seed layer on the inner wall of the through-hole, protrusions A may still exist on the upper through-hole electrode 171 and / or the lower through-hole electrode 172. However, it has been confirmed that the thickness of protrusion A according to the embodiment is similar to... Figure 2a The flatness difference was significantly reduced compared to the comparative example. In particular, it was confirmed that the flatness difference was less than 100 μm, less than 80 μm, or less than 50 μm, which could be removed by a conventional simple grinding process.

[0128] In addition, such as Figure 2c As shown, no separate seed layer is provided between the inner wall of the upper stacked insulating layer 111 and the upper through-hole electrode 171. Therefore, it can be confirmed that, compared with the comparative example, the interface IS between the inner wall of the upper stacked insulating layer 111 and the upper through-hole electrode 171 can be clearly distinguished. Furthermore, according to the embodiment, a small gap can be provided at the interface IS between the inner wall of the upper stacked insulating layer 111 and the upper through-hole electrode 171. Therefore, the transfer of heat via the upper through-hole electrode 171 to the upper stacked insulating layer 111 can be minimized, thereby further improving the electrical and / or physical reliability of the circuit board.

[0129] The structure of the wiring portion 140 and the through-hole electrode 170 according to the embodiment will be described in more detail below. For ease of description, the wiring portion 140 and the upper through-hole electrode 171 disposed in the upper stacked insulating layer 111 will be described with reference to the stacked insulating layer 110. However, the description of the wiring portion 140 and the upper through-hole electrode 171 below can also be applied accordingly to the wiring portion 140 and the lower through-hole electrode 172 disposed in the lower stacked insulating layer 112.

[0130] Reference Figures 3 to 5 The circuit board according to an embodiment includes an upper stacked insulating layer 111. The upper stacked insulating layer 111 includes a plurality of insulating layers 113, 114 and 115 stacked in a vertical direction.

[0131] Furthermore, the wiring portion 140, including the pad portion 150 and the via electrode 160, may be disposed in a plurality of insulating layers 113, 114 and 115 of the upper-layer insulating layer 111. In addition, the upper-through-via electrode 171 may be configured to integrally pass through the plurality of insulating layers 113, 114 and 115.

[0132] In this configuration, the wiring section 140 includes a first wiring section 140A and a second wiring section 140B. Each of the first wiring section 140A and the second wiring section 140B may include pad portions 151, 152, 153, and 154 and via electrodes 161, 162, and 163. Furthermore, according to an embodiment, the pad portions 151, 152, 153, and 154 of the first wiring section 140A and the via electrodes 161, 162, and 163 are connected to the upper through-hole electrode 171 and the lower through-hole electrode 172 via a base 173, while the pad portions 151, 152, 153, and 154 of the second wiring section 140B and the via electrodes 161, 162, and 163 are electrically isolated from the first wiring section 140A, the upper through-hole electrode 171, the lower through-hole electrode 172, and the base 173.

[0133] The first wiring portion 140A can refer to the wiring closest to the upper through-hole electrode 171. For example, the first wiring portion 140A can refer to the wiring portion closest to the upper through-hole electrode 171 in the horizontal direction. For example, the first wiring portion 140A can refer to the wiring portion arranged closer to the upper through-hole electrode 171 than the second wiring portion 140B. The first wiring portion 140A can be electrically connected to the upper through-hole electrode 171. The second wiring portion 140B can be electrically isolated from the upper through-hole electrode 171. The second wiring portion 140B can be electrically isolated from the first wiring portion 140A. For example, the second wiring portion 140B can refer to the wiring portion that is further away from the upper through-hole electrode 171 than the first wiring portion 140A. That is, the first wiring portion 140A can be arranged between the second wiring portion 140B and the upper through-hole electrode 171.

[0134] The second wiring section 140B may be wiring that performs a different function than the first wiring section 140A.

[0135] The second wiring portion 140B can be a signal transmission electrode for transmitting signals. For example, the second wiring portion 140B can be a communication line for transmitting signals to or receiving signals transmitted from a semiconductor device disposed on a circuit board. In contrast, the first wiring portion 140A can be used as a line other than a signal transmission line. For example, the first wiring portion 140A can be used as a heat transfer path for transferring heat. For example, the first wiring portion 140A can be an electrode that performs a heat dissipation function together with the through-hole electrode 171, but is not limited thereto.

[0136] For example, the through-hole electrode 171 can perform functions other than heat dissipation, and correspondingly, the first wiring portion 140A can perform a function corresponding to another function of the through-hole electrode 171. However, since the first wiring portion 140A is electrically connected to the through-hole electrode 171, it can be used as a current transmission path for transmitting the plating current applied to the through-hole electrode 171 for electrolytic plating. For example, the through-hole electrode 171 can be an electrolytic plating layer electrolytically plated by the current flowing through the first wiring portion 140A.

[0137] Specifically, during the manufacturing process of forming the upper through-hole electrode 171 and the lower through-hole electrode 172, the first wiring portion 140A can be used as a power line for applying plating current to the upper through-hole electrode 171 and the lower through-hole electrode 172 during electrolytic plating. Furthermore, after the circuit board 100 is manufactured, the first wiring portion 140A, together with the upper through-hole electrode 171, the lower through-hole electrode 172, and the base 173, can be used as a grounding electrode for grounding, or as a heat dissipation line for heat dissipation.

[0138] The first wiring section 140A includes: a plurality of via electrodes 160A1, which are respectively disposed in a plurality of insulating layers 113, 114 and 115 in the vertical direction; and pad sections 150A2 and 150A3, which are respectively disposed between the plurality of via electrodes 160A1.

[0139] Correspondingly, the second wiring section 140B includes: a plurality of via electrodes 160B, which are respectively disposed in a plurality of insulating layers 113, 114 and 115 in the vertical direction; and a pad section 150B, which is respectively disposed between the plurality of via electrodes 160B.

[0140] Here, the plurality of via electrodes 160A1 and pad portions 150A2 and 150A3 of the first wiring portion 140A may have substantially the same shape and / or structure as the plurality of via electrodes 160B and pad portions 150B of the second wiring portion 140B. However, the plurality of via electrodes 160A1 and pad portions 150A2 and 150A3 of the first wiring portion 140A have a structure that is electrically connected to the through-hole electrode 171. In contrast, the plurality of via electrodes 160B and pad portions 150B of the second wiring portion 140B have a structure that is electrically isolated from the first wiring portion 140A and the through-hole electrode 171. For example, the plurality of via electrodes 160A1 and pad portions 150A2 and 150A3 of the first wiring portion 140A may be electrically connected to the through-hole electrode 171 and may be used as a seed layer for supplying plating current during the electroplating process of the through-hole electrode 171. In contrast, the plurality of via electrodes 160B and pad portion 150B of the second wiring portion 140B are electrically isolated from the first wiring portion 140A and the through via electrode 171, and can therefore be used as signal wiring for transmitting substantially electrically valid signals.

[0141] In this case, the base 173 of the through-hole electrode 170 may refer to one of the pad portions of the first wiring portion 140A, and preferably, it may refer to the base pad that electrically connects the through-hole electrode 170 to the first wiring portion 140A.

[0142] The base 173 can electrically connect the plurality of via electrodes 160A1 of the first wiring section 140A to the upper through via electrode 171.

[0143] That is, the base 173 can be electrically and physically connected to the upper through-hole electrode 171, and simultaneously electrically and physically connected to the plurality of via electrodes 160A1 of the first wiring section 140. In addition, the base 173 can also be electrically and physically connected to the lower through-hole electrode 172, while simultaneously being electrically and physically connected to the plurality of via electrodes 160A1 of the first wiring section 140.

[0144] For example, the base 173 may include: a first overlapping portion that overlaps with a plurality of via electrodes 160A in the vertical direction; and a second overlapping portion that overlaps with an upper through-hole electrode 171 in the vertical direction.

[0145] That is, the width of the base 173 in the horizontal direction can be greater than the width of the upper through-hole electrode 171 in the horizontal direction. Furthermore, the width of the base 173 in the horizontal direction can be greater than the width of the lower through-hole electrode 172 in the horizontal direction. For example, the width of the base 173 in the horizontal direction can be greater than the sum of the widths of the upper through-hole electrode 171 and the through-hole electrode 160A1 in the horizontal direction.

[0146] The base 173 may refer to the pad portion closest to the lower surface of the upper through-hole electrode 171. For example, the base 173 may be a pad portion that contacts the lower surface of the upper through-hole electrode 171. For example, the base 173 may be a pad portion that contacts the lowermost of the plurality of via electrodes 160A1 of the first wiring portion 140A. The base 173 may be in direct contact with the via electrodes 160A1 of the first wiring portion 140A, and may also be in direct contact with the upper through-hole electrode 171. Here, direct contact may mean that the upper surface of the base 173 is in direct contact with the lower surface of the lowermost via electrode 160A1 and the lower surface of the upper through-hole electrode 171. Accordingly, the base 173 may electrically connect the via electrodes 160A1 of the first wiring portion 140A to the upper through-hole electrode 171. The planar area of ​​the base 173 may be larger than the planar area of ​​the upper through-hole electrode 171. For example, as Figure 4 As shown, the base 173 can overlap in the vertical direction with each of the plurality of via electrodes 160A1 of the first wiring portion 140A and the through-hole electrode 171. The base 173 electrically connects the first wiring portion 140A to the through-hole electrode 171, thereby allowing electroplating of the through-hole electrode 171 using the first wiring portion 140A. That is, the first wiring portion 140A can be used as a seed layer for electroplating the through-hole electrode 171, and can further be used as a heat dissipation electrode for heat dissipation together with the through-hole electrode.

[0147] The base 173 may overlap with the upper through-hole electrode 171 in the vertical direction, but not in the horizontal direction. This means that, in terms of the position where the base 173 is arranged, the upper through-hole electrode 171 is arranged on the base 173 in a state where the lower surface of the upper through-hole electrode 171 is in direct contact with the upper surface of the base 173.

[0148] The upper surface of the base 173 may include: a first upper surface that contacts the lower surface of the through-hole electrode 171 in a vertical direction; and a second upper surface that contacts a plurality of via electrodes 160A1 of the first wiring portion 140A in a vertical direction. In this case, a plurality of via electrodes 160A1 may be provided, which are spaced apart from each other in a horizontal direction. Accordingly, the second upper surface may be divided into a plurality of sub-parts spaced apart from each other in a circumferential direction along the first upper surface.

[0149] The base 173 can be a reference pad for distinguishing between the upper and lower insulating layers. The upper surface of the base 173 is in direct contact with the lower surface of the upper through-hole electrode 171, and the lower surface of the base 173 is in direct contact with the upper surface of the lower through-hole electrode 172.

[0150] In summary, the base 173 is a single, plate-shaped pad, and a plurality of via electrodes 160A1 and an upper through-hole electrode 171 of the first wiring portion 140A are arranged on the base 173. The base 173 can electrically connect a plurality of intermediate pad portions 150A2, a plurality of upper pad portions 150A3, and a plurality of via electrodes 160A1 of the first wiring portion 140A that overlap with the upper through-hole electrode 171 in the horizontal direction.

[0151] For example, the via electrodes 160A1 of the first wiring portion 140A are disposed in each of the plurality of insulating layers of the upper stacked insulating layer 111. For example, the plurality of via electrodes 160A1 of the first wiring portion 140A are disposed in the first insulating layer 114, and are spaced apart from each other along the circumferential direction of the upper through-hole electrode 171. For example, the plurality of via electrodes 160A1 of the first wiring portion 140A are disposed in the second insulating layer 115, and are spaced apart from each other along the circumferential direction of the upper through-hole electrode 171. For example, the plurality of via electrodes 160A1 of the first wiring portion 140A are disposed in the third insulating layer 116, and are spaced apart from each other along the circumferential direction of the upper through-hole electrode 171. Furthermore, the intermediate pad portion 150A2 of the first wiring portion 140A can electrically and / or physically connect the via electrodes 160A1 of the first wiring portion 140A disposed on different layers to each other. In this configuration, the intermediate pad portion 150A2 can be spaced horizontally from the via electrode 160A1 of the first wiring portion 140. Accordingly, the via corresponding to the through-hole electrode 171 can be easily machined while the via electrode 160A1 of the first wiring portion 140 and the intermediate pad portion 150A2 are formed, thereby further improving the process characteristics for forming the through-hole electrode 171.

[0152] Accordingly, the via electrodes 160A1 of the first wiring portion 140A arranged on different layers are electrically connected to each other through intermediate pad portions 150A2, and can further be electrically connected to the upper through-hole electrode 171 through the base 173. Accordingly, the plurality of via electrodes 160A1 and the plurality of intermediate pad portions 150A2 of the first wiring portion 140A can be electrically connected to the upper through-hole electrode 171 through the base 173.

[0153] Accordingly, the first wiring portion 140 can be used as a seed layer for electrolytic plating of the through-hole electrode 171, thereby allowing anisotropic plating to be performed on the through-hole electrode 171. Here, anisotropic plating can mean that plating is performed vertically from the bottom surface of the via, rather than plating on each of the inner wall and the bottom surface of the via. Specifically, no electroless copper plating layer is provided on the inner wall of the via corresponding to the through-hole electrode 171. A portion of the base 173 can be exposed through the via corresponding to the through-hole electrode 171. Accordingly, when electrolytic plating is performed using the first wiring portion 140A, plating growth can occur from the upper surface of the base 173 in an upward direction. Accordingly, in the embodiment, the electrolytic plating for forming the through-hole electrode 171 can be performed using the current flowing through the first wiring portion 140A, thereby omitting the process of separately forming an electroless copper plating layer. Accordingly, in the embodiment, the first wiring portion 140A can be used to provide current for electroplating the upper through-hole electrode 171. Furthermore, according to the embodiment, the first wiring portion 140A can be used to provide a uniform current for electroplating the upper through-hole electrode 171, thereby allowing uniform plating growth in the vertical direction during the plating process of the upper through-hole electrode 171.

[0154] The current used for electroplating the through-hole electrode 171 can be uniformly provided in the vertical direction through the base 173. Accordingly, in an embodiment, the plating can be performed at a uniform height in the vertical direction relative to the upper surface of the base 173, thereby improving the flatness of the through-hole electrode 171. Accordingly, in an embodiment, the manufacturing process of the through-hole electrode 171 can be simplified. For example, in an embodiment, the via corresponding to the through-hole electrode 171 can be completely filled by a single plating process, while its upper surface is flat. Accordingly, in an embodiment, grinding processes, etc., can be omitted, thereby simplifying the manufacturing process and reducing manufacturing costs. Furthermore, according to an embodiment, grinding processes, etc., can be omitted, thereby preventing the electrodes disposed in the circuit board from being damaged by the grinding process. Accordingly, in an embodiment, product yield can be further improved.

[0155] Accordingly, the interface between the through-hole electrode 171 and the upper stacked insulating layer 111 can be located between the upper surface of the base 173 and the upper surface of the upper stacked insulating layer 111. This is likely because the through-hole electrode 171 is formed by electrolytic plating performed in the via through the upper stacked insulating layer 111 using the current flowing between the upper pad portion 150A3 arranged on the upper surface of the upper stacked insulating layer 111 and the base 173.

[0156] Furthermore, the interface between the through-hole electrode 172 and the lower stacked insulating layer 112 can be located between the lower surface of the base 173 and the lower surface of the lower stacked insulating layer 112. This is likely because the through-hole electrode 172 is formed by electrolytic plating through the via through the lower insulating layer 111 using current flowing between the pad portion (not shown) provided on the upper surface of the lower stacked insulating layer 112 and the base 173.

[0157] The grain size of the upper through-hole electrode 171 may differ from that of the wiring portion 140. Furthermore, the grain size of the upper through-hole electrode 171 may differ from that of the base 173. Correspondingly, the grain size of the lower through-hole electrode 172 may differ from that of the wiring portion 140. Furthermore, the grain size of the lower through-hole electrode 172 may differ from that of the base 173. In this case, the grain size of the upper through-hole electrode 171 may be the same as that of the lower through-hole electrode 172. In this case, the term "grain size" may refer to the grain size.

[0158] In other words, the size of the grains in the through-hole electrode 171 can be different from the size of the grains in the wiring portion 140. For example, the size of the grains in the through-hole electrode 171 can be different from the size of the grains in at least one region of the wiring portion 140. The size of the grains in the through-hole electrode 171 can be different from the size of the grains in at least one region of the base 173. That is, the base 173 may include a chemically plated copper layer and an electrolytic plating layer. In contrast, the through-hole electrode 171 may only have an electrolytic plating layer. Therefore, in the embodiment, since the through-hole electrode 171 only includes an electrolytic plating layer, the through-hole electrode 171 can undergo uniform plating growth in the vertical direction relative to the base 173, thereby further improving the surface flatness of the through-hole electrode 171. Furthermore, according to the embodiment, the through-hole electrode 171 may only include an electrolytic plating layer with dense grains, thereby having high thermal conductivity characteristics and dissipating heat generated by the semiconductor device more efficiently.

[0159] Therefore, the through-hole electrode 171 can have a uniform grain size over its entire area.

[0160] For example, the through-hole electrode 171 may include a first region that contacts the inner wall of a via integrally formed through the upper insulating layer, and a second region located inside the through-hole electrode 171 and further away from the inner wall of the via than the first region. The grain size in the first and second regions of the through-hole electrode 171 may be the same. That is, in the comparative example, the through-hole electrode can be formed by electrolytic plating. However, for this purpose, a chemically plated copper layer must be provided on the inner wall of the via; therefore, the grain sizes of the first and second regions of the through-hole electrode in the comparative example are different from each other. In contrast, according to the embodiment, the first and second regions of the through-hole electrode 171 can have uniform grain sizes, thereby improving the flatness of the through-hole electrode 171 while providing high heat dissipation characteristics.

[0161] Furthermore, the grain size of the through-hole electrode 172 may differ from the grain size of the wiring portion 140. For example, the grain size of the through-hole electrode 172 may differ from the grain size in at least one region of the wiring portion 140. The grain size of the through-hole electrode 172 may also differ from the grain size in at least one region of the base 173. That is, the base 173 may include a chemically plated copper layer and an electrolytic plating layer. In contrast, the through-hole electrode 172 may only have an electrolytic plating layer. Therefore, in the embodiment, since the through-hole electrode 172 only includes an electrolytic plating layer, the through-hole electrode 172 can undergo uniform plating growth in the vertical direction relative to the base 173, thereby further improving the surface flatness of the through-hole electrode 172. Furthermore, according to the embodiment, the through-hole electrode 172 may only include an electrolytic plating layer with dense grains, thereby having high thermal conductivity characteristics and dissipating heat generated by the semiconductor device more efficiently.

[0162] Therefore, the through-hole electrode 172 can have a uniform grain size over the entire area of ​​the through-hole electrode 172.

[0163] For example, the through-hole electrode 172 may include a first region that contacts the inner wall of a via integrally formed through the lower insulating layer, and a second region located inside the through-hole electrode 172 and further away from the inner wall of the via than the first region. The grain size in the first and second regions of the through-hole electrode 172 may be the same. That is, in the comparative example, the through-hole electrode can be formed by electrolytic plating; however, for this purpose, a chemically plated copper layer must be provided on the inner wall of the via, therefore, the grain sizes of the first and second regions of the through-hole electrode in the comparative example are different from each other. In contrast, according to the embodiment, the first and second regions of the through-hole electrode 172 can have uniform grain sizes, thereby improving the flatness of the through-hole electrode 172 while providing high heat dissipation characteristics.

[0164] The first wiring section 140A also includes an upper pad section 150A3. The upper pad section 150A3 may refer to the pad section of the first wiring section 140A that is closest to the first protective layer 120. The upper pad section 150A3 can be used as a plating input pad, to which the current for electrolytic plating of the through-hole electrode 171 is applied.

[0165] Furthermore, a through-hole electrode pad 171P can be disposed on the upper through-hole electrode 171. The through-hole electrode pad 171P can be formed together with the upper through-hole electrode 171 during the formation of the upper through-hole electrode 171.

[0166] In this configuration, the upper pad portion 150A3 can be physically spaced apart from the through-hole electrode pad 171P, without being directly connected to it. In this configuration, the upper pad portion 150A3 and the through-hole electrode pad 171P can be spaced apart from each other on the upper surface of the upper-layer insulating layer 111, without direct contact in the horizontal direction. In this configuration, the upper pad portion 150A3 and the through-hole electrode pad 171P can be electrically connected to each other via the via electrode 160A1 of the first wiring portion 140A, the base 173, the intermediate pad portion 150A2, and the upper through-hole electrode 171. Furthermore, when the upper pad portion 150A3 and the through-hole electrode pad 171P are spaced apart from each other in the horizontal direction, the heat dissipation path can branch into multiple paths, thereby further improving heat dissipation characteristics.

[0167] At the same time, such as Figure 1 As shown, the first wiring portion 140A can be disposed together with the lower through-hole electrode 172 below the base 173. For example, the first wiring portion and the upper through-hole electrode disposed above the base 173 can be symmetrical with respect to the base 173 with respect to the first wiring portion and the lower through-hole electrode disposed below the base 173.

[0168] In addition, according to Figure 5 In one embodiment, the plurality of via electrodes 160A1 of the first wiring portion 140A can be configured to be spaced apart from each other along the circumferential direction of the upper through-hole electrode 171. For example, the plurality of via electrodes 160A1 of the first wiring portion 140A can be configured to be spaced apart from each other along the circumferential direction of the upper through-hole electrode 171 in each of the insulating layers 113, 114 and 114 of the upper stacked insulating layer 111.

[0169] Specifically, the via electrode 160A1 of the first wiring portion 140A may include a plurality of first via electrodes disposed in the first insulating layer 113 and spaced apart from each other along the circumferential direction of the via electrode 171. Furthermore, the via electrode 160A1 of the first wiring portion 140A may include a plurality of second via electrodes disposed in the second insulating layer 114 and spaced apart from each other along the circumferential direction of the via electrode 171. Additionally, the via electrode 160A1 of the first wiring portion 140A may include a plurality of third via electrodes disposed in the third insulating layer 115 and spaced apart from each other along the circumferential direction of the via electrode 171.

[0170] In this case, the plurality of via electrodes 160A1 of the first wiring section 140A can be arranged along the circumferential direction of the via electrode 171 while having a circular planar shape.

[0171] In addition, according to Figure 6 In one embodiment, the plurality of via electrodes 160A1 of the first wiring portion 140A can be configured to be spaced apart from each other along the circumferential direction of the upper through-hole electrode 171. In this case, the plurality of via electrodes 160A1 of the first wiring portion 140A can be arranged along the circumferential direction of the upper through-hole electrode 171 while having a quadrilateral planar shape.

[0172] In this case, according to Figure 5 and Figure 6In one embodiment, the via electrodes 160A1 of the first wiring portion 140A can be configured to be horizontally spaced apart from each other in each insulating layer of the upper stacked insulating layer 111. In this case, from a planar view, the through-hole electrode 171 can include a plurality of sides. For example, the through-hole electrode 171 can include a first side and a second side opposite to each other. Furthermore, the through-hole electrode 171 can include a third side and a fourth side located between the first side and the second side configured to be opposite to each other. In this case, the plurality of via electrodes 160A1 of the first wiring portion 140A can be spaced apart from each other and respectively disposed in regions adjacent to the first side, second side, third side, and fourth side of the through-hole electrode 171. For example, the plurality of via electrodes 160A1 of the first wiring portion 140A can be spaced apart from each other at the first side of the through-hole electrode 171. For example, the plurality of via electrodes 160A1 of the first wiring portion 140A can be spaced apart from each other at the second side of the through-hole electrode 171. For example, a plurality of via electrodes 160A1 of the first wiring portion 140A may be provided at a third side of the upper through-hole electrode 171, spaced apart from each other. For example, a plurality of via electrodes 160A1 of the first wiring portion 140A may be provided at a fourth side of the upper through-hole electrode 171, spaced apart from each other. Specifically, the plurality of via electrodes 160A1 of the first wiring portion 140A may be provided in each of the insulating layers 113, 114, and 115 of the upper stacked insulating layer 111, spaced apart from each other along the circumferential direction of the upper through-hole electrode 171. For example, the via electrodes 160A1 of the first wiring portion 140A may include a plurality of first sub-via electrodes provided at a first side of the upper through-hole electrode 171 and spaced apart from each other. Furthermore, the via electrodes 160A1 of the first wiring portion 140A may include a plurality of second sub-via electrodes provided at a second side of the upper through-hole electrode 171 and spaced apart from each other. Furthermore, the via electrode 160A1 of the first wiring portion 140A may include a plurality of third sub-via electrodes disposed on the third side of the upper through-via electrode 171 and spaced apart from each other. Furthermore, the via electrode 160A1 of the first wiring portion 140A may include a plurality of fourth sub-via electrodes disposed on the fourth side of the upper through-via electrode 171 and spaced apart from each other. The plurality of first sub-via electrodes, the plurality of second sub-via electrodes, the plurality of third sub-via electrodes, and the plurality of fourth sub-via electrodes of the via electrode 160A1 of the first wiring portion 140A are electrically connected to the upper through-via electrode 171 through the base portion 173 and the intermediate pad portion 150A2. Therefore, in this embodiment, the plating current for electroplating the upper through-via electrode 171 can be uniformly provided through a plurality of plating lines including the plurality of first sub-via electrodes, the plurality of second sub-via electrodes, the plurality of third sub-via electrodes, and the plurality of fourth sub-via electrodes.

[0173] Furthermore, the via electrodes 160A1 of the first wiring portion 140A are respectively disposed in a plurality of insulating layers 113, 114 and 115 of the upper stacked insulating layer 111, and the via electrodes 160A1 of the first wiring portion 140A disposed in a plurality of insulating layers 113, 114 and 115 may include the plurality of first sub-via electrodes, the plurality of second sub-via electrodes, the plurality of third sub-via electrodes and the plurality of fourth sub-via electrodes.

[0174] according to Figure 7 The embodiments, and Figure 5 and Figure 6 In a different embodiment, only one of the via electrodes 160A1 of the first wiring portion 140A extending in the circumferential direction may be provided at each side of the through-hole electrode 171.

[0175] For example, the via electrode 160A1 of the first wiring portion 140A may include a first sub-via electrode 160A11 disposed on the first side portion of the through-via electrode 171. For example, the first sub-via electrode 160A11 may have according to Figure 6 The embodiment has a structure in which multiple first sub-via electrodes are integrally formed.

[0176] The first sub-via electrode 160A11 may have a strip-shaped shape that extends in the horizontal direction. In this case, although the first sub-via electrode 160A11 is shown in the figures as having a quadrilateral planar shape, the embodiment is not limited to this. For example, the planar shape of the first sub-via electrode 160A11 may be circular or elliptical, and may extend in a particular horizontal direction.

[0177] For example, the via electrode 160A1 of the first wiring portion 140A may include a second sub-via electrode 160A12 disposed on the second side of the upper through-via electrode 171. For example, the second sub-via electrode 160A12 may have according to Figure 6 The embodiment describes a structure in which multiple second sub-via electrodes are integrally formed. The second sub-via electrode 160A12 may have a strip shape extending in the horizontal direction. In this case, although the second sub-via electrode 160A12 is illustrated in the drawings as having a quadrilateral planar shape, the embodiment is not limited to this. For example, the planar shape of the second sub-via electrode 160A12 may have a circular or elliptical shape, and may extend in a specific horizontal direction.

[0178] For example, the via electrode 160A1 of the first wiring portion 140A may include a third sub-via electrode 160A13 disposed on the third side of the upper through-via electrode 171. For example, the third sub-via electrode 160A13 may have according to Figure 6 The embodiment describes a structure in which multiple third sub-via electrodes are integrally formed. The third sub-via electrode 160A13 may have a strip shape extending in the horizontal direction. In this case, although the third sub-via electrode 160A13 is illustrated in the drawings as having a quadrilateral planar shape, the embodiment is not limited to this. For example, the planar shape of the third sub-via electrode 160A13 may have a circular or elliptical shape, and may extend in a particular horizontal direction.

[0179] For example, the via electrode 160A1 of the first wiring portion 140A may include a fourth sub-via electrode 160A14 disposed on the fourth side of the upper through-via electrode 171. For example, the fourth sub-via electrode 160A14 may have according to Figure 6 The embodiment describes a structure in which multiple fourth sub-via electrodes are integrally formed. The fourth sub-via electrode 160A14 may have a strip shape extending in the horizontal direction. In this case, although the fourth sub-via electrode 160A14 is illustrated in the drawings as having a quadrilateral planar shape, the embodiment is not limited to this. For example, the planar shape of the fourth sub-via electrode 160A14 may have a circular or elliptical shape, and may extend in a specific horizontal direction.

[0180] Therefore, according to Figure 7 In one embodiment, the via electrode of the first wiring section 140A can provide a plating current for uniform electrolytic plating of the through-hole electrode 171 through a plating line including a first sub-via electrode, a second sub-via electrode, a third sub-via electrode and a fourth sub-via electrode.

[0181] Furthermore, a sub-via electrode having portions that are physically and directly connected to each other can be disposed on at least two of the plurality of sides of the through-via electrode 171. For example, the first sub-via electrode 160A11 and the third sub-via electrode 160A13 can have an integrally connected structure, and the second sub-via electrode 160A12 and the fourth sub-via electrode 160A14 can have an integrally connected structure. Therefore, according to the embodiment, the current for plating the through-via electrode 171 can be uniformly applied, thereby further ensuring the flatness of the through-via electrode 171. In addition, according to the embodiment, the area of ​​the first wiring portion 140A can be increased to further improve the heat dissipation function, thereby enabling the circuit board and semiconductor package to operate more stably.

[0182] However, although Figure 6 The illustration shows four sub-via electrodes spaced apart from each other in the circumferential direction on the side of the through-hole electrode 171, but the embodiment is not limited to this.

[0183] Furthermore, the via electrode 160A1 of the first wiring portion 140A according to the embodiment can also be made of Figures 4 to 6 The combination of via electrodes shown is used to achieve this.

[0184] For example, Figures 5 to 7 The via electrode 160A1 shown in any of the diagrams can be disposed in the first insulating layer 113 of the upper stacked insulating layer 111, and Figures 5 to 7 The via electrode shown in the attached figure, which is different from the via electrode disposed in the first insulating layer 113, can be disposed in the second insulating layer 114.

[0185] In addition, according to Figure 8 In one embodiment, the via electrode 160A1 of the first wiring portion 140A can be arranged in a closed-loop shape along the circumferential direction of the via electrode 171. For example, the via electrode 160A1 of the first wiring portion 140 can be arranged in a ring shape along the circumferential direction of the via electrode 171 within an insulating layer. In this case, the intermediate pad portion 150A2, which is physically and directly connected to the via electrode 160A1 of the first wiring portion 140, can be arranged in a closed-loop shape instead of being arranged in a structure correspondingly connected to the via electrode 160A1. In this case, according to the embodiment, the volume of the first wiring portion 140A can be further increased, thereby further improving the heat dissipation characteristics.

[0186] Furthermore, the via electrode 160A1 of the first wiring portion 140A according to the embodiment can also be made of Figures 5 to 8 The combination of via electrodes shown is used to achieve this.

[0187] For example, Figures 5 to 8 The via electrode shown in any of the diagrams can be disposed in the first insulating layer 113 of the upper stacked insulating layer 111. Figures 5 to 8 The via electrode shown in the other figure can be disposed in the second insulating layer 114 of the upper stacked insulating layer 111, and Figures 5 to 8 The via electrode shown in the next diagram can be disposed in the third insulating layer 115 of the upper stacked insulating layer 111.

[0188] In addition, according to Figure 9 In one embodiment, the through-hole electrode pad 171P1 can be disposed on the upper through-hole electrode 171. The through-hole electrode pad 171P can be formed together with the upper through-hole electrode 171 during the formation of the upper through-hole electrode 171.

[0189] In this configuration, the upper pad portion 150A3 can be physically and / or electrically connected to the through-hole electrode pad 171P1. For example, the upper pad portion 150A3 and the through-hole electrode pad 171P1 can be physically and directly connected to each other to form a single pad. For example, the upper pad portion 150A3 and the through-hole electrode pad 171P1 can be integrally formed. This can be achieved by adjusting the opening size of the mask provided on the upper stacked insulating layer 111 during the formation of the upper through-hole electrode 171.

[0190] Therefore, according to the embodiment, the heat dissipation characteristics of the semiconductor device disposed on the upper pad portion 150A3 and the through-hole electrode pad 171P1 can be further improved, thereby enabling the semiconductor device to operate more stably.

[0191] In the following, various embodiments of the first wiring portion and the through-hole electrode according to the embodiments will be described.

[0192] Before describing various embodiments of the first wiring portion and the through-hole electrode, the structure of the foregoing embodiments is briefly described below.

[0193] The circuit board includes a wiring portion and through-hole electrodes. The wiring portion includes a first wiring portion connected to the through-hole electrodes and a second wiring portion spaced apart from the through-hole electrodes. The first wiring portion includes a plurality of through-hole electrodes disposed in a plurality of insulating layers stacked in a vertical direction, and a plurality of pad portions disposed between the plurality of through-hole electrodes. In this case, the circuit board may include a base. The base may be a component of the through-hole electrodes and may be a component of the first wiring portion. Preferably, the base may be a base pad electrically connecting a first portion and / or a second portion of the through-hole electrodes to the first wiring portion. The base is electrically connected to the plurality of through-hole electrodes and also to the through-hole electrodes. Therefore, the first wiring portion and the through-hole electrodes are electrically connected to each other. In this case, the through-hole electrodes include an upper through-hole electrode disposed on the base and a lower through-hole electrode disposed below the base. Furthermore, the first wiring portion includes an upper wiring portion disposed along the circumferential direction of the upper through-hole electrode and a lower wiring portion disposed along the circumferential direction of the lower through-hole electrode. In this case, the upper through-hole electrode and the lower through-hole electrode in the aforementioned embodiment have shapes that are symmetrical to each other with respect to the base. Furthermore, the upper wiring portion and the lower wiring portion have shapes that are symmetrical to each other with respect to the base.

[0194] according to Figure 10 The circuit board of the embodiment includes: an upper stacked insulating layer 211 including a plurality of insulating layers stacked in a vertical direction; and a lower stacked insulating layer 212 including a plurality of insulating layers stacked in a vertical direction. A first protective layer 220 is disposed on the upper stacked insulating layer 211. In addition, a second protective layer 230 is disposed below the lower stacked insulating layer 212.

[0195] In addition, an upper through-hole electrode 250 is integrally provided through the upper stacked insulating layer 211, and multiple insulating layers are stacked in the upper stacked insulating layer 211. In addition, a lower through-hole electrode 260 is integrally provided through the lower stacked insulating layer 212, and multiple insulating layers are stacked in the lower stacked insulating layer 212.

[0196] Furthermore, the wiring portion of the circuit board includes multiple via electrodes and pad portions. In this case, the wiring portion includes first wiring portions 242 and 243 electrically connected to the upper through-via electrode 250 and / or the lower through-via electrode 260. Additionally, the wiring portion includes a second wiring portion 244 electrically and physically spaced apart from the upper through-via electrode 250 and the lower through-via electrode 260.

[0197] The first wiring portions 242 and 243 include an upper wiring portion 242 disposed along the circumferential direction of the upper through-hole electrode 250. The first wiring portions 242 and 243 include a lower wiring portion 243 disposed along the circumferential direction of the lower through-hole electrode 260.

[0198] In this case, the upper through-hole electrode 171 and the lower through-hole electrode 172 in the aforementioned embodiment have shapes that are symmetrical to each other.

[0199] In contrast, the upper through-hole electrode 250 and the lower through-hole electrode 260 can have asymmetrical shapes relative to the base 241. For example, the horizontal width and / or vertical thickness of the upper through-hole electrode 250 can differ from the horizontal width and / or vertical thickness of the lower through-hole electrode 260. For example, the horizontal width of the upper through-hole electrode 250 can differ from the horizontal width of the lower through-hole electrode 260. For example, the horizontal width of the upper through-hole electrode 250 can be smaller than the horizontal width of the lower through-hole electrode 260. Therefore, according to the embodiment, heat can be transferred from the upper through-hole electrode 250, which has a relatively smaller horizontal width, to the lower through-hole electrode 260, which has a relatively larger horizontal width. That is, according to the embodiment, the direction of heat transfer can be controlled by making the widths of the upper through-hole electrode 250 and the lower through-hole electrode 260 different from each other, thereby providing a more efficient heat dissipation function.

[0200] according to Figure 11 The circuit board of the embodiment includes: an upper stacked insulating layer 311 including a plurality of insulating layers stacked in a vertical direction; and a lower stacked insulating layer 312 including a plurality of insulating layers stacked in a vertical direction. A first protective layer 320 is disposed on the upper stacked insulating layer 311. In addition, a second protective layer 330 is disposed below the lower stacked insulating layer 312.

[0201] In addition, an upper through-hole electrode 350 is integrally provided through the upper stacked insulating layer 311, and multiple insulating layers are stacked in the upper stacked insulating layer 311. In addition, a lower through-hole electrode 360 ​​is integrally provided through the lower stacked insulating layer 312, and multiple insulating layers are stacked in the lower stacked insulating layer 312.

[0202] In this case, multiple through-hole electrodes 350 can be provided, and these through-hole electrodes 350 are spaced apart from each other in the horizontal direction.

[0203] For example, the upper through-hole electrode 350 may include a first upper through-hole electrode 351 integrally penetrating multiple insulating layers of the upper insulating layer 311, and a second upper through-hole electrode 352 integrally penetrating multiple insulating layers of the upper insulating layer 311 and spaced apart from the first upper through-hole electrode 351 in the horizontal direction. The first upper through-hole electrode 351 and the second upper through-hole electrode 352 may be referred to as the first sub-through-hole electrode and the second sub-through-hole electrode of the upper through-hole electrode 350, which are spaced apart from each other in the horizontal direction.

[0204] For example, the first through-hole electrode 351 and the second through-hole electrode 352 can transfer heat through paths that branch off from each other. Therefore, according to the embodiment, heat can be dissipated through multiple paths instead of a single path, thereby further improving the heat dissipation characteristics.

[0205] In this case, multiple semiconductor devices can be arranged on the circuit board. For example, a first semiconductor device and a second semiconductor device can be arranged on the circuit board, spaced apart from each other in the horizontal direction.

[0206] The first through-hole electrode 351 can be disposed in the region where the first semiconductor device is disposed. Furthermore, the second through-hole electrode 352 can be disposed in the region where the second semiconductor device is disposed. That is, according to the embodiment, through-hole electrodes can be disposed to correspond to each of the multiple semiconductor devices disposed on the circuit board. Therefore, according to the embodiment, the heat dissipation characteristics in a semiconductor package including multiple semiconductor devices can be further maximized.

[0207] Furthermore, the wiring portion of the circuit board includes multiple via electrodes and pad portions. In this case, the wiring portion includes first wiring portions 342 and 343 electrically connected to the upper through-hole electrode 350 and / or the lower through-hole electrode 360. Additionally, the wiring portion includes a second wiring portion 344 spaced apart from the upper through-hole electrode 350 and the lower through-hole electrode 360.

[0208] The first wiring portions 342 and 343 include an upper wiring portion 342 disposed along the circumferential direction of the upper through-hole electrode 350. The first wiring portions 342 and 343 include a lower wiring portion 343 disposed along the circumferential direction of the lower through-hole electrode 360.

[0209] The upper wiring portion 342 may include a first upper wiring portion 342a disposed along the circumferential direction of the first upper through-hole electrode 351. Furthermore, the upper wiring portion 342 may include a second upper wiring portion 342b disposed along the circumferential direction of the second upper through-hole electrode 352. That is, according to the embodiment, the upper through-hole electrode 350 may include a first upper through-hole electrode 351 and a second upper through-hole electrode 352 spaced apart from each other in the horizontal direction, and the upper wiring portion 342 may include a first upper wiring portion 342a and a second upper wiring portion 342b disposed along the circumferential direction of each upper through-hole electrode. Therefore, according to the embodiment, the first upper through-hole electrode 351 and the second upper through-hole electrode 352 may each be uniformly plated.

[0210] according to Figure 12 The circuit board of the embodiment includes: an upper stacked insulating layer 411 comprising a plurality of insulating layers stacked in a vertical direction, and a lower stacked insulating layer 412 comprising a plurality of insulating layers stacked in a vertical direction. A first protective layer 420 is disposed on the upper stacked insulating layer 411. Furthermore, a second protective layer 430 is disposed below the lower stacked insulating layer 412.

[0211] In addition, an upper through-hole electrode 450 is provided integrally through an upper stacked insulating layer 411 in which multiple insulating layers are stacked. In addition, a lower through-hole electrode 460 is provided integrally through a lower stacked insulating layer 412 in which multiple insulating layers are stacked.

[0212] Furthermore, the wiring portion of the circuit board includes multiple via electrodes and pad portions. In this case, the wiring portion includes first wiring portions 442 and 443 electrically connected to the upper through-hole electrode 450 and / or the lower through-hole electrode 460. Additionally, the wiring portion includes a second wiring portion 444 spaced apart from the upper through-hole electrode 450 and the lower through-hole electrode 460.

[0213] The first wiring portions 442 and 443 include an upper wiring portion 442 disposed on one side of the circumference of the upper through-hole electrode 450. The first wiring portions 442 and 443 include a lower wiring portion 443 disposed on the other side of the circumference of the lower through-hole electrode 460.

[0214] In this case, in the aforementioned embodiment, each of the upper wiring portion and the lower wiring portion is configured to surround the circumference of the upper through-hole electrode or the lower through-hole electrode.

[0215] In contrast, the upper wiring portion 442 can be disposed on one side of the upper through-hole electrode 450, and the lower wiring portion 443 can be disposed on the other side of the lower through-hole electrode 460. In this case, the current used to plate the upper through-hole electrode 450 and the lower through-hole electrode 460 can flow through the path formed by the upper wiring portion 442, the base portion 441, and the lower wiring portion 443. Therefore, according to the embodiment, compared with the aforementioned embodiment, the volume of the upper through-hole electrode 450 and / or the lower through-hole electrode 450 can be further increased without increasing the circuit board area. Therefore, according to the embodiment, the heat dissipation characteristics can be further improved. In this case, at least a portion of the upper through-hole electrode 450 can overlap with the lower wiring portion 443 in the vertical direction, and at least a portion of the lower through-hole electrode 460 can overlap with the upper wiring portion 442 in the vertical direction.

[0216] Furthermore, the central axis of the lower through-hole electrode 460 in the horizontal direction and the central axis of the upper through-hole electrode 450 in the horizontal direction can be offset from each other.

[0217] Meanwhile, in the aforementioned embodiment, the via electrodes of each of the upper and lower wiring portions are arranged in a position that overlaps with each other in the vertical direction. In contrast, the via electrodes of each of the upper and lower wiring portions can be arranged in a position that is staggered with each other in the vertical direction.

[0218] according to Figure 13 In one embodiment, the circuit board may include an upper wiring portion 542 and a lower wiring portion 543 disposed at positions offset from each other in the vertical direction. Figure 13 It is along Figure 1 The cross-sectional view taken along line B-B', and specifically, the cross-sectional view in the vertical direction at the location where the upper wiring portion and the lower wiring portion are provided.

[0219] The circuit board includes an upper stacked insulating layer 511 comprising multiple insulating layers stacked in a vertical direction, and a lower stacked insulating layer 512 comprising multiple insulating layers stacked in a vertical direction. A first protective layer 520 is disposed on the upper insulating layer 511. Furthermore, a second protective layer 530 is disposed below the lower stacked insulating layer 512.

[0220] In addition, an upper through-hole electrode (not shown) is provided integrally through an upper stacked insulating layer 511 in which multiple insulating layers are stacked. In addition, a lower through-hole electrode 560 is provided integrally through a lower stacked insulating layer 512 in which multiple insulating layers are stacked.

[0221] Furthermore, the wiring portion of the circuit board includes multiple via electrodes and pad portions. In this case, the wiring portion includes first wiring portions 542 and 543 electrically connected to the upper through-hole electrode and / or the lower through-hole electrode. Additionally, the wiring portion includes a second wiring portion (not shown) spaced apart from the upper and lower through-hole electrodes.

[0222] The first wiring portions 542 and 543 include an upper wiring portion 542 disposed along the circumferential direction of the upper through-hole electrode. The first wiring portions 542 and 543 also include a lower wiring portion 543 disposed on the other side of the circumference of the lower through-hole electrode.

[0223] In this configuration, the upper wiring portion 542 includes via electrodes disposed in multiple insulating layers of the upper stacked insulating layer 511, and these via electrodes can be positioned offset from each other in the vertical direction. Similarly, the lower wiring portion 543 includes via electrodes disposed in multiple insulating layers of the lower stacked insulating layer 512, and these via electrodes can also be positioned offset from each other in the vertical direction. Therefore, according to the embodiment, the current supplied for electroplating the upper and lower through-hole electrodes can flow along a zigzag path in the vertical direction, rather than along a single vertical line. Thus, according to the embodiment, a more uniform current can be supplied along the circumferential direction of the through-hole electrodes, thereby further improving the flatness of the through-hole electrode surface.

[0224] according to Figure 14 In some embodiments, the semiconductor package may include Figures 1 to 13 At least one circuit board in the circuit board shown. For example, a semiconductor package may include, for example, Figure 3 The circuit board 600 shown.

[0225] The first connecting portion 610 and the second connecting portion 620 can be disposed on the circuit board 600. The first connecting portion 610 can overlap with the through-hole electrode disposed in the circuit board 600 in the vertical direction. Preferably, the first connecting portion 610 can be disposed on the upper surface of the pad portion located on the through-hole electrode disposed in the circuit board 600. Furthermore, the second connecting portion 620 can be disposed on the uppermost pad portion of the second wiring portion disposed in the circuit board 600.

[0226] Semiconductor device 630 may be disposed on the first connection portion 610 and the second connection portion 620. Semiconductor device 630 may be electrically connected to circuit board 600 via the first connection portion 610 and the second connection portion 620. For example, semiconductor device 630 may be thermally connected to through-hole electrode of circuit board 600 via the first connection portion 610. Therefore, heat generated from semiconductor device 630 may be dissipated through through-hole electrode of circuit board 600 via the first connection portion 610.

[0227] In addition, the semiconductor device 630 includes a terminal 640, and the terminal 640 of the semiconductor device 630 can be electrically connected to the pad portion of the second wiring portion of the circuit board via the second connection portion 620.

[0228] according to Figure 15 In some embodiments, the semiconductor package may include Figures 1 to 13 At least one circuit board in the circuit board shown. For example, a semiconductor package may include, for example, Figure 3 The circuit board shown is 700.

[0229] The connection portion 710 may be disposed on the circuit board 700. The connection portion 710 may overlap with a through-hole electrode disposed in the circuit board 700 in the vertical direction. Preferably, the connection portion 710 may be disposed on the upper surface of a pad portion located on the through-hole electrode disposed in the circuit board 700. For example, a semiconductor device 730 may be thermally connected to the through-hole electrode of the circuit board 700 via the connection portion 710. Therefore, heat generated from the semiconductor device 730 can be dissipated through the through-hole electrode of the circuit board 700 via the connection portion 710.

[0230] Furthermore, the semiconductor device 730 may include terminals 740 on its upper surface, and a connection member 720, such as a lead, may electrically connect the terminals 740 of the semiconductor device 730 to the pad portion of the second wiring portion of the circuit board.

[0231] In the following, a method for manufacturing a circuit board according to an embodiment will be described.

[0232] Figures 16 to 20 This is a cross-sectional view showing the manufacturing method of a circuit board according to an embodiment, arranged in process order.

[0233] Reference Figure 16 According to an embodiment, a process can be performed to form a multilayer insulating layer 110 and a wiring portion 140 including a plurality of via electrodes and a plurality of pads in the multilayer insulating layer 110, wherein the upper multilayer insulating layer 111 and the lower multilayer insulating layer 112 in the multilayer insulating layer 110 are stacked in a vertical direction. In this case, the wiring portion 140 may include a first wiring portion 140A and a second wiring portion 140B. The first wiring portion 140 may include a base 173 as part of a through-hole electrode 170.

[0234] Next, refer to Figure 17According to an embodiment, a process can be performed to form an upper through-hole VH1 that integrally penetrates the upper laminated insulating layer 111. In this case, according to an embodiment, the process of forming the upper through-hole VH1 can be performed using the base 173 as a blocking member. Therefore, with the formation of the upper through-hole VH1, the upper surface of the base 173 can be exposed. Furthermore, according to an embodiment, a process can be performed to form a lower through-hole VH2 that integrally penetrates the lower laminated insulating layer 112. In this case, according to an embodiment, the process of forming the lower through-hole VH2 can be performed using the base 173 as a blocking member. Therefore, with the formation of the lower through-hole VH2, the lower surface of the base 173 can be exposed.

[0235] Next, refer to Figure 18 According to an embodiment, a process for forming a first mask M1 on the upper stacked insulating layer 111 can be performed. In this case, the first mask M1 may include an opening that overlaps with the upper via VH1 in the vertical direction. Furthermore, the opening of the first mask M1 can expose the side surface of the uppermost pad portion of the first wiring portion 140A. Therefore, the upper pad portion of the upper through-hole electrode and the upper pad portion of the first wiring portion 140A can then be physically and directly connected to each other. Furthermore, according to an embodiment, a process for forming a second mask M2 on the lower stacked insulating layer 112 can be performed. In this case, the second mask M2 may include an opening that overlaps with the lower via VH2 in the vertical direction. Furthermore, the opening of the second mask M2 can expose the side surface of the lowermost pad portion of the first wiring portion 140A. Therefore, the lower pad portion of the lower through-hole electrode and the lower pad portion of the first wiring portion 140A can then be physically and directly connected to each other. Subsequently, according to an embodiment, a process can be performed to form an electrolytic plating layer 171A on the upper surface of the base 173 by performing electrolytic plating using the first wiring portion 140A as a seed layer. In this case, according to the embodiment, the electrolytic plating layer 171A can be formed using the first wiring portion 140A, thus achieving plating growth to a uniform height along the vertical direction. According to an embodiment, a process can be performed to form an electrolytic plating layer 172A on the lower surface of the base 173 by performing electrolytic plating using the first wiring portion 140A as a seed layer. In this case, according to the embodiment, the electrolytic plating layer 172A can be formed using the first wiring portion 140A, thus achieving plating growth to a uniform height along the vertical direction.

[0236] Next, refer to Figure 19 According to an embodiment, a process for forming the upper through-hole electrode 171 and the upper pad portion of the upper through-hole electrode 171 can be performed. Furthermore, according to an embodiment, a process for forming the lower through-hole electrode 172 and the lower pad portion of the lower through-hole electrode 172 can be performed. Next, according to an embodiment, a process for removing the first mask M1 and the second mask M2 can be performed.

[0237] Next, refer to Figure 20 According to the embodiment, a process for forming a first protective layer 120 and a second protective layer 130 can be performed.

[0238] Furthermore, when the circuit board with the above-described features is used in IT equipment or home appliances such as smartphones, server computers, or televisions, it can stably perform functions such as signal transmission or power supply. For example, when the circuit board with the features of this invention performs semiconductor packaging functions, it can safely protect the semiconductor chip from external moisture or contaminants, and can solve problems such as leakage current, electrical short circuits between terminals, or electrical open circuits at the terminals supplying power to the semiconductor chip. In addition, when the circuit board performs signal transmission functions, noise problems can be solved. Thus, the circuit board with the above-described features of this invention maintains the stable function of IT equipment or home appliances, and therefore the entire product and the circuit board using this invention can achieve functional integrity or technical interoperability with each other.

[0239] When a circuit board with the above-described features is used in transportation equipment such as vehicles, it can solve the problem of signal distortion transmitted to the transportation equipment, or safely protect the semiconductor chips controlling the transportation equipment from external influences, and solve problems such as leakage current, electrical short circuits between terminals, or electrical open circuits at terminals supplying power to the semiconductor chips, thereby further improving the stability of the transportation equipment. Therefore, the transportation equipment and the circuit board using this invention can achieve functional integrity or technical interoperability with each other.

[0240] The features, structures, and effects described in the above embodiments are included in at least one embodiment, but are not limited to one embodiment. Furthermore, the features, structures, and effects shown in the embodiments can be combined or modified by those skilled in the art for other embodiments. Therefore, it should be understood that content related to such combinations and modifications is included within the scope of the embodiments.

[0241] The above description focuses on embodiments, but these are merely exemplary and do not limit the scope of the embodiments. Those skilled in the art will understand that various modifications and applications, not shown above, can be made without departing from the essential characteristics of the embodiments. For example, the components specifically shown in the embodiments can be implemented with modifications. Furthermore, it should be understood that differences associated with such changes and applications are included within the scope of the embodiments as defined in the appended claims.

Claims

1. A circuit board, comprising: A laminated insulating layer includes multiple insulating layers stacked in a vertical direction; The wiring section includes a plurality of via electrodes respectively disposed in the plurality of insulating layers of the multilayer insulating layer; as well as Through-hole electrode, penetrating the multilayer insulating layer, The through-hole electrode comprises: a first portion, the width of which in the horizontal direction increases from the upper surface of the multilayer insulating layer toward the lower surface of the multilayer insulating layer; a second portion disposed on the first portion, the width of which in the horizontal direction decreases from the upper surface of the multilayer insulating layer toward the lower surface of the multilayer insulating layer; and a base disposed between the first portion and the second portion. In this configuration, at least one of the plurality of via electrodes in the wiring section is connected to the base.

2. The circuit board of claim 1, wherein, The multilayer insulating layer includes: An upper insulating layer is disposed on the upper surface of the base and includes a plurality of upper insulating layers stacked in the vertical direction; and A lower insulating layer is disposed on the lower surface of the base and includes a plurality of lower insulating layers stacked in the vertical direction.

3. The circuit board of claim 2, wherein, The first portion of the through-hole electrode integrally penetrates the plurality of lower insulating layers in the vertical direction, and Wherein, the second portion of the through-hole electrode integrally penetrates the plurality of upper insulating layers of the upper stacked insulating layer in the vertical direction.

4. The circuit board of claim 3, wherein, The wiring section also includes a plurality of intermediate pads disposed between the plurality of via electrodes. The wiring section includes a first wiring section, which includes multiple via electrodes and multiple intermediate pads. The plurality of via electrodes in the first wiring portion includes via electrodes connected to the base, and electrically connected to the first portion and the second portion of the via electrodes through the base.

5. The circuit board according to claim 4, wherein, The wiring portion further includes a second wiring portion, which is spaced further away from the through-hole electrode than the first wiring portion. Wherein, the first wiring portion is disposed in the horizontal direction between the second wiring portion and the through-hole electrode, and The second wiring portion is electrically isolated from the first wiring portion and the through-hole electrode.

6. The circuit board according to claim 1, wherein, The grains of the first or second portion of the through-hole electrode are different from the grains of the base.

7. The circuit board according to claim 6, wherein, The size of the grains in at least one region of the base is smaller than the size of the grains in the first or second portion of the through-hole electrode.

8. The circuit board according to claim 6, wherein, The first portion or the second portion of the through-hole electrode includes: The first region is in contact with the inner wall of the through-hole of the multilayer insulating layer; and The second region is located inside the through hole and is further away from the inner wall than the first region. The size of the grains in the first region is the same as the size of the grains in the second region.

9. The circuit board according to claim 4, wherein, The interface between the first portion of the through-hole electrode and the stacked insulating layer is located between the lower surface of the lower stacked insulating layer and the lower surface of the base, and The interface between the second portion of the through-hole electrode and the upper stacked insulating layer is located between the upper surface of the upper stacked insulating layer and the upper surface of the base.

10. The circuit board according to claim 5, wherein, The first wiring section includes: A lower wiring portion is disposed on the lower surface of the base and is disposed along the circumferential direction of the first portion of the through-hole electrode; and The upper wiring portion is disposed on the lower surface of the base and is disposed along the circumferential direction of the second portion of the through-hole electrode.

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