LED structure and manufacturing process thereof

Abstract

In one embodiment, an element is provided. The element includes a light emitting diode (LED) panel and a photodetector array. The LED panel includes a backplane including a backplane electrode disposed in or on the backplane, a plurality of LEDs, each LED including an LED electrode, wherein the backplane electrode is coupled to the LED electrode, and a reflective layer disposed on a sidewall of each LED. The photodetector array includes a plurality of photodetectors.

Description

Technical Field

[0001] The embodiments of this disclosure generally relate to elements and methods of manufacturing elements. Background Technology

[0002] Light-emitting diode (LED) devices utilize LED arrays with individually controllable LEDs. Such devices are used in computers, touch panel components, personal digital assistants (PDAs), mobile phones, television monitors, photodiodes, and the like. LED devices using micrometer-scale LEDs (also known as micro-LEDs) based on III-V semiconductor technology offer several advantages over organic light-emitting diodes (OLEDs), such as higher energy efficiency, brightness, and lifespan, as well as fewer material layers in the display stack, simplifying manufacturing. However, manufacturing micro-LED devices presents challenges. Therefore, there is a need in the art for LED devices and methods for manufacturing them. Summary of the Invention

[0003] In one embodiment, an element is provided. The element includes a light-emitting diode (LED) panel and a photodetector array. The LED panel includes: a backplate containing backplate electrodes disposed in or on the backplate; a plurality of LEDs, each LED including an LED electrode, wherein the backplate electrodes are coupled to the LED electrodes; and a reflective layer disposed on a sidewall of each LED. The photodetector array includes a plurality of photodetectors.

[0004] In another embodiment, an element is provided. The element includes a backplane, a plurality of LEDs, a plurality of photodetectors, and a reflective layer. The backplane includes backplane electrodes disposed on or in the backplane. Each LED includes an LED electrode, and each LED electrode is coupled to a corresponding backplane electrode. Each photodetector includes a detector electrode, and each detector electrode is coupled to a corresponding backplane electrode. The reflective layer serves as the detector electrode, and each detector electrode is coupled to a corresponding backplane electrode.

[0005] In yet another embodiment, a method is provided. The method includes: bonding a plurality of LEDs to a backplane, each LED including a reflective layer and an LED electrode disposed on a sidewall of each LED, wherein the plurality of LEDs are coupled to the backplane electrode on or in the backplane; forming a subpixel isolation (SI) structure layer disposed on an upper surface of the plurality of LEDs; and patterning the SI structure layer to form a plurality of SI structures defining a well above each LED. Attached Figure Description

[0006] Figure 1A This is a schematic cross-sectional view of the interconnecting elements according to the embodiment.

[0007] Figure 1B This is a schematic cross-sectional view of the interconnecting elements according to the embodiment.

[0008] Figures 2A to 2C This is a schematic cross-sectional view of an LED panel according to an embodiment.

[0009] Figure 3 This is a flowchart of an LED panel manufacturing method according to an embodiment.

[0010] Figures 4A to 4J This is a schematic cross-sectional view of a backplate during a method for forming an LED panel, according to some embodiments.

[0011] Figure 5 This is a cross-sectional view of an LED panel according to an embodiment.

[0012] Figure 6 This is a flowchart of an LED panel manufacturing method according to an embodiment.

[0013] Figures 7A to 7E This is a schematic cross-sectional view of the backplate during the manufacturing process of an LED panel according to an embodiment.

[0014] Figure 8 This is a flowchart of an LED panel manufacturing method according to an embodiment.

[0015] Figures 9A to 9C This is a schematic cross-sectional view of the backplate during the manufacturing process of an LED panel according to an embodiment.

[0016] For ease of understanding, the same reference numerals are used as much as possible to indicate common elements in the figures. It is contemplated that elements and features of one embodiment can be advantageously incorporated into other embodiments without further description. Detailed Implementation

[0017] Embodiments of this disclosure generally relate to an element and a method of manufacturing the element. The element includes a light-emitting diode (LED) panel and a photodetector array. The LED panel includes: a backplate containing a backplate electrode disposed in or on the backplate; a plurality of LEDs, each LED including an LED electrode, wherein the backplate electrode is coupled to the LED electrode; and a reflective layer disposed on a sidewall of each LED. The photodetector array includes a plurality of photodetectors.

[0018] Figure 1AThis is a schematic cross-sectional view of interconnect element 100a. Interconnect element 100a may be a photonic interconnect element. Photonic interconnect elements are components that allow high-density communication between a microprocessor system and memory. In some embodiments, the integrated circuit includes an interposer layer 101. In some embodiments, the integrated circuit includes at least two separate interposers 101 on which various electrical components are disposed. In some embodiments, the interposer layer 101 is made of silicon. However, it is also contemplated that the interposer layer 101 may be made of organic materials. Interconnect element 100a includes an application-specific integrated circuit (ASIC) 102 disposed on each interposer layer 101. In addition to the ASIC 102, each interposer layer 101 also includes an LED panel disposed thereon. The LED panel 200 includes a plurality of LEDs 204 disposed on a backplane 205. The LEDs 204 may be microLEDs (hereinafter referred to as “microLEDs”). The LEDs 204 described herein are LEDs or microLEDs. In some embodiments, the plurality of LEDs 204 are arranged in an array on the backplane 205. Furthermore, a transimpedance amplifier (TIA) 106 is disposed on each interposer layer 101. An array of photon detectors (or "photodetectors") 207 is disposed on the TIA 106 to form a photodetector array. Each photodetector 207 disposed on an interposer layer 101 is coupled to a corresponding LED 204 disposed on a different interposer layer 101 of the interconnect element 100a. The photodetectors 207 can be coupled to the LEDs 204 via at least one of a waveguide or a bundle of optical fibers 108. In some embodiments, the photodetectors 207 can be deposited directly between the LEDs 204 on the backplane 205, such as... Figure 1B As shown. Therefore, LED 204 is connected to photodetector 207 via the same backplane 205, rather than connecting LED 204 to different backplanes or TIA106 having photodetectors 207. In some embodiments, each photodetector 207 may be disposed between LEDs 204 on the same backplane 205, such as Figure 1B As shown.

[0019] Figure 1B This is a schematic cross-sectional view of interconnect element 100b. Interconnect element 100b includes an LED panel 200, which has photodetectors 207 disposed between LEDs 204 on the same backplate 205. Interconnect element 100b may also include an optical fiber bundle 108.

[0020] LED panel 200 includes a backplane 205. The backplane 205 may include one or more backplane electrodes 213. The backplane 205 may also include one or more integrated circuits, such as driver circuitry 209 and transimpedance amplifier (TIA) 210. In some embodiments, the backplane 205 includes an electrode layer 211 and an integrated circuit layer 212. The electrode layer 211 is disposed on top of the integrated circuit layer 212. The electrode layer 211 includes backplane electrodes 213. In some embodiments, the backplane electrodes 213 are disposed within the backplane 205, such as... Figure 1B As shown. In some embodiments, backplane electrodes 213 are disposed on backplane 205. Integrated circuit layer 212 includes one or more integrated circuits.

[0021] Multiple LEDs 204 are coupled to a backplane electrode 213 by LED electrodes 214. The LEDs 204 may be microLEDs (hereinafter referred to as "microLEDs"). Multiple photodetectors 207 may also be coupled to the backplane electrode 213 by photodetector electrodes 215. In some embodiments, the interconnect element 100b may also include an SI structure 216 disposed between the LEDs 204 and the photodetectors 207. An optical fiber 108 is configured to receive light emitted from the LEDs 204 and transmit the light to the photodetectors 207 on the same backplane 205. A reflective layer 222 is formed above the sidewalls of the LEDs 204. The reflective layer 222 disposed on the sidewalls of the LEDs 204 is reflective to reduce and / or eliminate crosstalk between the LEDs 204 and the photodetectors 207. The reflective layer 222 comprises a reflective metal. The reflective layer 222 comprising the reflective metal has a reflectivity greater than 90%. The reflective metal includes, but is not limited to, aluminum, silver, gold, copper, or combinations thereof.

[0022] Figures 2A to 2C This is a schematic cross-sectional view of the LED panel 200. In some embodiments, the LED panel 200 includes, for example: Figure 2B and Figure 2C The arrangement 216a of the SI structure 216 is shown. In some embodiments, the LED panel 200 does not include, for example, the arrangement 216a of the SI structure 216. Figure 2A The SI structure 216 is shown. In some embodiments, the LED panel 200 includes a color conversion material 218 disposed in the wells 219 between the SI structures 216, such as... Figure 2C As shown.

[0023] LED panel 200 includes LED 204. Although shown as having only LED 204, it will be understood that LED panel 200 may include similar components. Figure 1BThe photodetector 207 is shown. LED 204 can be an LED or a microLED (hereinafter referred to as "microLED"). The diameter of the microLED ranges from 1 micrometer (μm) to 100 μm. The LED panel 200 can be fabricated on a backplate 205. The backplate 205 can include a backplate surface 205a. The backplate surface 205a can include one or more pairs of backplate electrodes 213 disposed thereon. A plurality of LEDs 204 can be coupled to each pair of backplate electrodes 213 disposed on the backplate 205. In some embodiments, the first and second backplate electrodes can be coupled to the microLED via the backplate surface 205a in a lateral chip or "flip-chip" configuration. While the figures may show a lateral chip or "flip-chip" configuration, other embodiments may mount the first backplate electrode to the backplate surface 205a and the second backplate electrode to the opposite side of the microLED, referred to as "vertical chip" orientation, which is compatible with all embodiments described herein utilizing reflective layers and / or dielectric materials.

[0024] In some embodiments, LED 204 includes at least one LED electrode 214 coupled to at least one backplate electrode 213 disposed on or in a backplate 205. LED 204 may be a patterned sapphire substrate (PSS) microLED or a planar microLED. LED 204 of LED panel 200 is depicted as a planar microLED. PSS microLEDs and planar microLEDs may be interchangeable in LED panel 200.

[0025] In some embodiments, dielectric material 220 is disposed on LED 204, for example, on the emitting surface 221 of LED 204 or on the sidewall of LED 204, or on a backplate 205 between one or more LEDs 204. In some embodiments, dielectric material 220 may absorb one or more wavelengths of light, such as UV light, IR light, blue light, or combinations thereof, generated by LED 204. In some embodiments, dielectric material 220 may also absorb other wavelengths while transmitting visible light emitted by LED 204 to prevent color cross-contamination in LED panel 200. Without being bound by theory, dielectric material 220 disposed on the emitting surface 221 of LED 204 may also provide enhanced protection for LED 204. Furthermore, without being bound by theory, dielectric material may prevent short circuits between reflective layer 222 and LED 204. In some embodiments, dielectric material comprises SiN. x SiO2, SiOxNy, Al2O3, AlN, HfO2 or combinations thereof.

[0026] In some implementations, such as Figures 2B to 2CAs shown, the LED panel 200 includes sub-pixel isolation (SI) structures 216 disposed on the upper surface of the reflective layer 222, as described in this disclosure, wherein the SI structures 216 are disposed between the LEDs 204. The reflectivity of the SI structures 216 is greater than 90%. The high optical density of the SI structures 216 provides optical isolation between each LED 204. The SI structures 216 define wells 219 of sub-pixels 223.

[0027] In some implementations, such as Figure 2C As shown, sub-pixels 223 have a color conversion material 218 disposed in well 219a. Sub-pixels 223 include a red sub-pixel 218a with red color conversion material 218a disposed in well 219a of red sub-pixels 223a, a green sub-pixel 223b with green color conversion material 218b disposed in well 219b of green sub-pixels 223b, and a blue sub-pixel 223c with blue color conversion material 218c disposed in well 219c of blue sub-pixels 223c. When the LED 204 of the red sub-pixel 223a is turned on, the red color conversion material converts the light emitted from the LED 204 into red light. When the LED 204 of the blue sub-pixel 223c is turned on, the blue color conversion material 218c converts the light emitted from the LED 204 into blue light.

[0028] In some embodiments, in each LED 204 of the LED panel 200, the SI structure 216 may extend above the height of the LED 204. In some embodiments, the SI structure 216 may extend close to and below the contact area of ​​the electrode 214 of the LED 204, and may further extend downward to the backplate 205 of the LED panel 200. In some embodiments, the SI structure 216 may be made of a reflective and / or conductive material (e.g., metal) and may be surrounded by an electrically insulating dielectric material to prevent the SI structure 216 from short-circuiting the electrodes of any microLED structure. For example, the SI structure 216 may contain a dielectric material. The dielectric material may include one or more of the following: silicon oxide, silicon nitride, silicon carbide, photoresist materials, or other dielectric organic polymers.

[0029] The height of SI structure 216 may be greater than or approximately 2.5 μm, greater than or approximately 5 μm, greater than or approximately 7.5 μm, greater than or approximately 10 μm, greater than or approximately 12.5 μm, greater than or approximately 15 μm, greater than or approximately 17.5 μm, greater than or approximately 20 μm, or greater. The width of SI structure 216 may be greater than or approximately 1 μm, greater than or approximately 2 μm, greater than or approximately 3 μm, greater than or approximately 4 μm, greater than or approximately 5 μm, greater than or approximately 6 μm, greater than or approximately 7 μm, greater than or approximately 8 μm, greater than or approximately 9 μm, greater than or approximately 10 μm, or greater. The aspect ratio of SI structure 216 may be greater than or approximately 1.5:1, greater than or approximately 2:1, greater than or approximately 2.5:1, greater than or approximately 3:1, greater than or approximately 3.5:1, greater than or approximately 4:1, greater than or approximately 4.5:1, greater than or approximately 5:1, or greater.

[0030] In some embodiments, the reflective layer 222 is disposed on the backplate 205 above the SI structure 216 or between one or more LEDs 204. In some embodiments, the reflective layer 222 may substantially cover the sidewalls of the SI structure 216 to prevent light leakage from the sidewalls. For example, substantially covering the sidewalls of the SI structure 216 may comprise more than or about 80% of the surface area of ​​the sidewalls of the SI structure 216. In other embodiments, the reflective layer 222 may cover about 100% of the surface area, more than or about 90% of the surface area, more than or about 70% of the surface area, more than or about 60% of the surface area, more than or about 50% of the surface area, more than or about 40% of the surface area, and so on.

[0031] In some embodiments, the reflective layer 222 may be disposed above the dielectric material 220, such that the reflective layer 222 restricts light emission through the lateral portions of the dielectric material 220 and / or the conversion material 218, thereby allowing emission through the central portion of the conversion material 218. For example, the reflective layer 222 may cover the lateral portions of the dielectric material 220 near the SI structure 216 while exposing the emitting surface 221 of the LED 204 to allow light emission through the central portion of the conversion material 218. In some embodiments, the reflective layer 222 may be disposed on the dielectric material 220, which is disposed on one or more sidewalls 224 of the LED 204. Without being bound by theory, the reflective layer 222 covering the SI structure 216 and / or one or more sidewalls 224 of the LED 204 can reduce light leakage and / or color cross-contamination. The reflective layer 222 disposed on the sidewall of the LED 204 is reflective to reduce and / or eliminate crosstalk between the LED 204 and the photodetector 207. The reflective layer 222 contains a reflective metal. The reflective layer 222 containing the reflective metal has a reflectivity greater than 90%. The reflective metal includes, but is not limited to, aluminum, silver, gold, copper, or combinations thereof.

[0032] Figure 3 This is a flowchart of a method for manufacturing an LED panel 200. Figures 4A to 4J This is a schematic cross-sectional view of the backplate 205 during the method 300 for forming the LED panel 200. At operation 302, as... Figure 4A As shown, a dielectric material 220 is formed over the LED 204 of the LED panel 200. In some embodiments, the dielectric material 220 can be formed on the LED 204 using a plasma-enhanced chemical vapor deposition (PECVD) process. The PECVD process can deposit materials containing SiN. x Dielectric materials comprising Al2O3, SiO2, or combinations thereof. In some embodiments, an atomic layer deposition (ALD) process can be used to form dielectric material 220 over LED 204. The ALD process can deposit dielectric materials comprising Al2O3, SiO2, HfO2, or combinations thereof.

[0033] At operation 304, such as Figure 4B As shown, a first reflective layer 222a is formed above LED 204. In some embodiments, the first reflective layer 222a may be formed on the sidewall of LED 204. The first reflective layer 222a may be formed over dielectric material 220 using a physical vapor deposition (PVD) process. The PVD process may deposit a reflective metal. The reflective layer 222 containing the reflective metal has a reflectivity greater than 90%. The reflective metal includes, but is not limited to, aluminum, silver, gold, copper, or combinations thereof. The first reflective layer 222a disposed on the sidewall of LED 204 is reflective to reduce and / or eliminate crosstalk between LEDs 204.

[0034] In some embodiments, a first reflective layer 222a is disposed over a dielectric material 220, which is disposed over a backplate 205 exposed between the LEDs 204. In some embodiments, an antireflective layer may be deposited over the first reflective layer 222a at operation 304. The antireflective layer may comprise chromium nitride. Without being bound by theory, the antireflective layer can enhance selectivity during one or more lithographic printing processes, thereby reducing complexity during manufacturing.

[0035] At operation 306, such as Figure 4C As shown, SI structure 216 is formed above backplane 205. SI structure 216 may include a negative resist structure. In some embodiments, the pixel isolation structure may be transparent. At operation 308, as... Figure 4D As shown, one or more positive resists 425 are formed along the outer edge of the pixel isolation structure 216. The positive resist 425 can provide contact protection during method 300 from etching. Furthermore, the positive resist 425 can protect one or more subsequent elements from being processed during operations 308 to 312. In some embodiments, the positive resist may comprise a polymeric phenolic resin formed from the reaction product of formaldehyde and phenol.

[0036] At operation 310, such as Figure 4E As shown, the first reflective layer 222a is etched from the SI structure 216 and the LED 204. In some embodiments, the first reflective layer 222a may be etched to expose the top surface of the SI structure 216 and / or one or more sidewalls. Furthermore, the first reflective layer 222a may be etched to expose the dielectric material 220 disposed above the emitting surface 221 of the LED 204. In some embodiments, the first reflective layer 222a may be retained along one side of the LED 204 in contact with the SI structure 216. Additionally, the first reflective layer 222a may be retained above the dielectric material 220 disposed on the backplate 205 between each of the plurality of LEDs 204.

[0037] At operation 312, such as Figure 4FAs shown, a second reflective layer 222b is formed over the SI structure 216 and the dielectric material 220 disposed on the LED 204. In some embodiments, the material in the second reflective layer 222b is the same as the material in the reflective layer 222. In other embodiments, the material of the second reflective layer 222b is different from the material of the reflective layer 222. The material of the second reflective layer 222b includes, but is not limited to, aluminum, silver, gold, copper, or combinations thereof. In some embodiments, the positive resist 425 may be removed before operation 312. In some embodiments, the second reflective layer 222b may be formed on the sidewall of the SI structure 216. The second reflective layer 222b may be formed over the SI structure 216 and the dielectric material 220 using a PVD process. The PVD process may deposit a reflective metal. The reflective layer 222 contains a reflective metal with a reflectivity greater than 90%. The reflective metal includes, but is not limited to, aluminum, silver, or combinations thereof. The second reflective layer 222b reduces and / or eliminates crosstalk between the LEDs 204.

[0038] At operation 314, such as Figure 4G As shown, a second positive resist 427 is formed above the second reflective layer 222b. The second positive resist 427 can provide contact protection against etching during method 300. In some embodiments, the positive resist may comprise a polymeric phenolic resin formed from the reaction product of formaldehyde and phenol.

[0039] At operation 316, such as Figure 4H As shown, the second positive resist 427 is patterned. The second positive resist can be patterned to expose the second reflective layer 222 disposed above the dielectric material 220, while maintaining the second positive resist 427 above the SI structure 216. At operation 318, as... Figure 4I As shown, the second reflective layer 222 is etched to expose the dielectric material 220 disposed above the emitting surface 221 of the LED 204. In some embodiments, the second reflective layer 222 may be retained along the sidewall of the SI structure 216. At operation 320, as... Figure 4J As shown, the second positive resist 427 is removed from the SI structure 216. In some embodiments, operation 320 may include removing the second positive resist and filling each sub-pixel 223a, 223b, and 223c with color conversion material 218. For example, each sub-pixel 223a, 223b, and 223c may be filled with red color conversion material 218a, green color conversion material 218b, and blue color conversion material 218c, respectively. Figure 2C As shown.

[0040] Figure 5This is a cross-sectional view of the LED panel. The second isolation arrangement 216b may include one or more backplates 205. The backplate 205 may include a backplate surface 205a, which may include one or more pairs of backplate electrodes 213 disposed thereon. Multiple LEDs 204 may be coupled to each pair of backplate electrodes 213 disposed on the backplate 205. In some embodiments, the first and second backplate electrodes may be coupled to the microLEDs via the backplate surface 205a through a lateral chip or "flip-chip" configuration. Although Figure 5 A lateral chip or “flip-chip” configuration is shown, but other embodiments may mount the first backplane electrode to the backplane surface 205a and the second backplane electrode to the opposite side of the microLED, referred to as “vertical chip” orientation, which is compatible with all embodiments described herein that utilize reflective layers and / or dielectric materials.

[0041] In some embodiments, LED 204 may include pairs of LED electrodes 214 coupled to pairs of backplane electrodes 213 disposed on backplane 205. LED 204 may be a patterned sapphire substrate (PSS) microLED or a planar microLED. LED 204 in LED panel 200 is depicted as planar LED 204. PSS microLEDs and planar LEDs 204 may be interchangeable in the second isolation arrangement 216b.

[0042] In some embodiments, dielectric material 220 is disposed on the emitting surface 221 of LED 204. In some embodiments, dielectric material 220 may absorb one or more wavelengths of light generated by LED 204, such as UV light, IR light, blue light, or combinations thereof. In some embodiments, dielectric material 220 may also absorb other wavelengths while transmitting visible light emitted by LED 204 to prevent color cross-contamination in LED panel 200. Not bound by theory, dielectric material 220 disposed on the emitting surface 221 of LED 204 may also provide enhanced protection for LED 204.

[0043] SI structure 216 is disposed on the upper surface of reflective layer 222, as described in this disclosure, between LEDs 204. SI structure 216 has a UV reflectivity greater than 90%. The optical density of SI structure 216 provides color isolation between each LED 204. SI structure 216 defines wells 219 of sub-pixels 223. Sub-pixels 223 have color conversion material 218 disposed in wells 219. Sub-pixels 223 include a red sub-pixel 223a with red color conversion material 218a disposed in well 219a of red sub-pixel 223a, a green sub-pixel 223b with green color conversion material 218b disposed in well 219b of green sub-pixel 223b, and a blue sub-pixel 223c with blue color conversion material 218c disposed in well 219c of blue sub-pixel 223c. When LED 204 of red sub-pixel 223a is turned on, the red color conversion material converts the light emitted from LED 204 into red light. When the LED 204 of the blue sub-pixel 223c is turned on, the blue color conversion material 218c converts the light emitted from the LED 204 into blue light.

[0044] In some embodiments, in each LED 204 of the LED panel 200, the SI structure 216 may extend above the height of the LED 204. In some embodiments, the SI 216 may extend close to and below the contact area of ​​the electrode 214 of the LED 204, and may further extend downward to the backplate 205. In some embodiments, the SI structure 216 may be made of a reflective and / or conductive material (e.g., metal) and may be surrounded by an electrically insulating dielectric material to prevent the SI structure 216 from short-circuiting the electrodes of any microLED structure. For example, the SI structure 216 may contain a dielectric material. The dielectric material may include one or more of the following: silicon oxide, silicon nitride, silicon carbide, photoresist materials, or other dielectric organic polymers.

[0045] The height of the SI structure 216 can be greater than or approximately 2.5 μm, greater than or approximately 5 μm, greater than or approximately 7.5 μm, greater than or approximately 10 μm, greater than or approximately 12.5 μm, greater than or approximately 15 μm, greater than or approximately 17.5 μm, greater than or approximately 20 μm, or greater. The width of the SI structure 216 is less than the distance between adjacent LEDs 204, wherein a gap exists between the first LED 204, the SI structure 216, and the second LED 204. In some embodiments, the width of the SI structure 216 can be greater than or approximately 1 μm, greater than or approximately 2 μm, greater than or approximately 3 μm, greater than or approximately 4 μm, greater than or approximately 5 μm, greater than or approximately 6 μm, greater than or approximately 7 μm, greater than or approximately 8 μm, greater than or approximately 9 μm, greater than or approximately 10 μm, or greater, wherein the width of the SI structure 216 does not exceed the total distance between adjacent LEDs 204. The aspect ratio of SI structure 216 can be greater than or approximately 1.5:1, greater than or approximately 2:1, greater than or approximately 2.5:1, greater than or approximately 3:1, greater than or approximately 3.5:1, greater than or approximately 4:1, greater than or approximately 4.5:1, greater than or approximately 5:1, or greater.

[0046] In some embodiments, the reflective layer 222 is disposed above the SI structure 216. In some embodiments, the reflective layer 222 may substantially cover the sidewalls of the SI structure 216 to prevent light leakage from the sidewalls. For example, substantially covering the sidewalls of the SI structure 216 may comprise covering more than or about 80% of the surface area of ​​the sidewalls of the SI structure 216. In other embodiments, the reflective layer 222 may cover about 100% of the surface area, more than or about 90% of the surface area, more than or about 70% of the surface area, more than or about 60% of the surface area, more than or about 50% of the surface area, more than or about 40% of the surface area, and so on.

[0047] In some embodiments, the reflective layer 222 may be disposed above the SI structure 216 such that the reflective layer 222 extends to the backplate 205. For example, the reflective layer 222 extends downward onto the backplate 205, wherein the backplate 205 is coated with the reflective layer 222. In some embodiments, the reflective layer 222 may be disposed along the sidewalls of the LED 204 and / or along the lateral portions of the dielectric material 220 disposed on the upper surface 221 of the LED 204, while leaving openings in which portions of the LED 204 are exposed to allow light emission through the color conversion material 218. Without being bound by theory, the reflective layer 222 can reduce light leakage and / or color cross-contamination.

[0048] Figure 6 This is a flowchart of a method for manufacturing an LED panel 200. Figures 7A to 7EThis is a schematic cross-sectional view of the backplate 205 during the method 600 for forming the LED panel 200. At operation 602, as... Figure 7A As shown, dielectric material 220 is formed above LED 204 of LED panel 200. At operation 602, as... Figure 7A As shown, each pair of LED electrodes 214 is bonded to each pair of backplane electrodes 213. Each pair of LED electrodes 214 is bonded to each pair of backplane electrodes 213 via a melting process. The melting process forms an alloy. This alloy may be present between the LED electrodes 214 and the backplane electrodes 213. A carrier substrate 728 may contain each pair of micro-LED electrodes 214. Each pair of backplane electrodes 213 is disposed on a backplane 205. The carrier substrate 728 may be configured to contact each pair of micro-LED electrodes 214 and each pair of backplane electrodes 213. An LED 204 may be bonded to the carrier substrate 728.

[0049] The carrier substrate 728 may be made of a ceramic material. This ceramic material may comprise sapphire, SiN, AlN, Si, SiO2, GaN, or combinations thereof. The carrier substrate may have a bottom surface that contains the LED 204. Each pair of LED electrodes 214 is coupled to the LED 204.

[0050] At operation 604, such as Figure 7B As shown, a UV blocking material 729 is disposed on a backplate 205. The UV blocking material 729 is also disposed between the backplate surface 205a and the bottom surface 728a of the carrier substrate 728. In some embodiments, the UV blocking material 729 is disposed by allowing it to flow between the backplate surface 205a, the bottom surface 728a, the gaps between the pairs of LED electrodes 214, the pairs of backplate electrodes 213, and the gaps between the LEDs 204. The UV blocking material 729 can be disposed from a corner of the LED panel 200. In some embodiments, the UV blocking material 729 is disposed in the corner using a syringe or glue dispenser. The UV blocking material 729 can also be placed in a vacuum environment. At operation 606, the UV blocking material 729 is cured. In some embodiments, the UV blocking material 729 is photocured. In some embodiments, the UV blocking material 729 is thermocured.

[0051] At operation 608, such as Figure 7CAs shown, the carrier substrate 728 is removed. The carrier substrate 728 can be removed by laser. In one embodiment, the laser removes the carrier substrate 728 by scanning a single point across the entire carrier substrate 728. In another embodiment, the laser removes the carrier substrate 728 by using a multi-beam point system that scans across the carrier substrate 728. In yet another embodiment, a wide laser removes the carrier substrate 728 by guiding the light through a solid chromium mask with openings.

[0052] At operation 610, such as Figure 7D As shown, multiple SI structures 216 are formed. (As illustrated...) Figure 7D As shown, the SI structure 216 is disposed on the UV blocking material 729. In some embodiments, the dielectric material 220 is disposed on the emitting surface 221 of the LED 204. The SI structure 216 and the emitting surface 221 form a well 219. The well 219 is configured to contain the color conversion material described in this application.

[0053] At operation 612, such as Figure 7E As shown, a reflective layer 222 is formed on the SI structure 216 and over the dielectric material 220 disposed on the LED 204. In some embodiments, the reflective layer 222 may be formed on the sidewall of the SI structure 216. The reflective layer 222 may be formed over the SI structure 216 and the dielectric material 220 using a PVD process. The PVD process may deposit a reflective metal, such as aluminum, silver, or any other metal with a reflectivity greater than 90%. In some embodiments, the second reflective layer 222 may provide a uniform metal coating, such as aluminum or silver, over the pixel 200.

[0054] In some embodiments, operation 612 may include forming a positive resist over the reflective layer 222 and patterning the positive resist. The positive resist may be patterned to expose the reflective layer 222 over the dielectric material 220 while retaining the positive resist over the SI structure 216. The reflective layer 222 may then be etched to expose the dielectric material 220 disposed over the emitting surface 221 of the LED 204. In some embodiments, the reflective layer 222 may be retained along the sidewalls of the SI structure 216. The positive resist may then be removed from the SI structure 216. In some embodiments, operation 610 may include removing a second positive resist and filling each sub-pixel with a color conversion material. For example, each sub-pixel may be filled with a red color conversion material, a green color conversion material, or a blue color conversion material.

[0055] Figure 8 This is a flowchart of the method 800 for manufacturing LED panel 200. Figures 9A to 9CThis is a schematic cross-sectional view of the backplate 205 during the method 800 for forming the LED panel 200. At operation 802, at least one LED electrode 214 is bonded to at least one backplate electrode 213. The bonding process may be a melting process. This melting process forms an alloy. The alloy may be between the LED electrode 214 and the backplate electrode 213. A reflective layer 222 is disposed above the sidewalls of the LEDs 204. The reflective layer 222 disposed on the sidewalls of the LEDs 204 is reflective to reduce crosstalk between the LEDs 204. The reflective layer 222 contains a reflective metal. The reflective layer 222 containing the reflective metal has a reflectivity greater than 90%. The reflective metal includes, but is not limited to, aluminum, silver, gold, copper, or combinations thereof.

[0056] At operation 804, such as Figure 9B As shown, SI layer 916 is deposited above backplane 205. At operation 806, as... Figure 9C As shown, SI layer 916 is patterned. SI layer 916 is patterned to form SI structure 216 and expose the light emitting surface 221 of LED 204. SI structure 216 forms well 219. In some embodiments, well 219 is configured to contain the color conversion material described in this application. In some embodiments, well 219 does not contain the color conversion material described in this application.

[0057] In some implementations, after operation 806, method 800 may further include, for example, Figure 6 and Figure 7E Operation 610 is described above. In some embodiments, after operation 806, method 800 may further include, as described above. Figure 3 and Figures 4F to 4J Operations 312 to 320 are described above.

[0058] In general, this disclosure provides pixel isolation structures and methods for manufacturing the same, which can reduce and / or eliminate color crosstalk when using quantum dot color conversion pixels. Furthermore, the pixel isolation structures can provide enhanced quantum dot conversion efficiency and can shield or reflect light that may crosstalk within sub-pixels, thereby enhancing external light coupling. The pixel isolation structures can be manufactured using one or more of lithography patterning, metal deposition, and / or etching, thereby reducing the manufacturing cost of conventional quantum dot conversion manufacturing processes.

[0059] While the foregoing describes embodiments of this disclosure, other and further embodiments of this disclosure may be designed without departing from its basic scope, the scope of which is defined by the preceding claims.

Claims

1. An element comprising: A light-emitting diode (LED) panel, including: A backplate, the backplate including backplate electrodes disposed on or in the backplate; Multiple LEDs, each LED including an LED electrode, wherein the backplate electrode is coupled to the LED electrode; and A reflective layer is disposed on the sidewall of each of the plurality of LEDs; and A photodetector array, comprising multiple photodetectors.

2. The element of claim 1, further comprising a sub-pixel isolation (SI) structure disposed between each of the plurality of LEDs.

3. The element of claim 2, further comprising a color-converting material disposed in the well defined by the SI structure.

4. The element as claimed in claim 2, wherein the second reflective layer is disposed on the SI structure.

5. The element of claim 2, wherein the SI structure is disposed on the third reflective layer.

6. The element of claim 1, further comprising a dielectric layer disposed between the reflective layer and the sidewall of each of the plurality of LEDs.

7. The element of claim 6, wherein the dielectric layer is further disposed on the light-emitting surface of each of the plurality of LEDs.

8. The element of claim 1, further comprising at least one of an optical fiber bundle or a waveguide, wherein the plurality of photodetectors are coupled to the plurality of LEDs by the at least one of the optical fiber bundle or the waveguide.

9. The element of claim 1, wherein the photodetector array is disposed on a transimpedance amplifier (TIA).

10. An element comprising: A backplate, the backplate including backplate electrodes disposed on or in the backplate; Multiple LEDs, each LED including an LED electrode, each LED electrode being coupled to a corresponding backplane electrode; Multiple photodetectors, each photodetector including a detector electrode, each detector electrode being coupled to the corresponding backplane electrode; as well as A reflective layer is disposed on the sidewall of each of the plurality of LEDs.

11. The element of claim 10, further comprising at least one of an optical fiber or a waveguide disposed above the plurality of LEDs and the plurality of photodetectors, wherein the at least one of the optical fiber or the waveguide is configured to receive light emitted from the LEDs and transmit the light to the photodetectors.

12. The element of claim 10, wherein the backplane comprises an electrode layer and an integrated circuit layer.

13. The element of claim 10, further comprising a subpixel isolation (SI) structure disposed between the plurality of LEDs and the plurality of photodetectors.

14. A method of manufacturing an element, comprising: Multiple LEDs are bonded to the backplane, each LED comprising: A reflective layer is disposed on the sidewall of each LED; as well as LED electrodes, wherein the plurality of LEDs are coupled to backplate electrodes on or in the backplate; A sub-pixel isolation (SI) structure layer is formed on the upper surface of the plurality of LEDs; as well as The SI structure layer is patterned to form multiple SI structures, defining a well above each LED.

15. The method of claim 14, wherein the plurality of LEDs are bonded to the backplate by a carrier substrate.

16. The method of claim 14, wherein each of the plurality of LEDs further comprises a dielectric layer disposed between the reflective layer and the sidewall of each LED.

17. The method of claim 14, further comprising providing a color-converting material in the well.

18. The method of claim 14, wherein each LED further includes a dielectric layer disposed on the outer surface of the LED below the reflective layer.

19. The method of claim 14, further comprising providing a second reflective layer above the SI structure and the plurality of LEDs.

20. The method of claim 19, further comprising etching the second reflective layer to expose the dielectric layer on top of the light-emitting surface of each of the plurality of LEDs.

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