Method for processing a substrate having a polycrystalline silicon carbide backside

Abstract

The present invention relates to a method for processing a substrate (10) having a back side (204) made of polycrystalline silicon carbide and a front side (203) for manufacturing electronic components, the method comprising: forming a glassy carbon layer (40) on the back side (204); transferring a single-crystal semiconductor material layer (20) onto the front side (203); and heat-treating the substrate after forming the carbon layer (40), wherein the carbon layer (40) limits the increase in roughness of the back side (204) during the heat treatment.

Description

Technical Field

[0001] This invention relates to a method for processing a substrate having a back side made of polycrystalline silicon carbide and a front side for manufacturing electronic components. The processing method includes forming a glassy carbon layer on the back side, transferring a single-crystal semiconductor material layer onto the front side, and a heat treatment step. Background Technology

[0002] Semiconductor materials, particularly silicon carbide (SiC), are widely used in the manufacture of power and radio frequency electronic components. In some applications, substrates made of bulk single-crystal SiC, substrates with a single-crystal SiC surface layer, or substrates with other semiconductor materials such as aluminum nitride (AlN), gallium nitride (GaN), alloys of these nitrides, indium phosphide (InP), or gallium arsenide (GaAs) are used. In some cases, the semiconductor substrate or semiconductor layer is polycrystalline. In many applications, the substrate comprises a support substrate made of polycrystalline semiconductor and one or more layers of another semiconductor material disposed on the front side of the support substrate. Typically, the back side of the support substrate, opposite the front side, is a free surface during the manufacture of the electronic component.

[0003] Substrates used in electronic applications typically require thermal treatment during their fabrication, such as annealing, to repair defects in the crystal lattice caused during ion implantation or to modify the crystal structure of the substrate. Such treatments are usually performed at high temperatures up to 2000°C.

[0004] However, the surface of the semiconductor material under consideration is likely to become unstable under high temperatures. This instability can lead to surface degradation, particularly through changes in surface morphology and / or composition.

[0005] In particular, such as Figure 1 As shown, the smooth silicon carbide surface is sensitive to high-temperature processing, typically starting at around 1300°C. Without adequate protection of the surface, the morphology reorganizes to minimize surface energy, forming terraces. This effect is known as "step clustering." When surface 222 is exposed to high temperatures, the reorganization of surface 222 is due to atomic diffusion on the surface. It also depends on the atmosphere and pressure to which the surface is exposed. It also depends on the orientation difference angle of the surface relative to the high symmetry axis of the semiconductor material crystal. This orientation difference is used to promote the control of the 4H polytype of SiC during subsequent epitaxy of single-crystal SiC and to avoid polytype changes during the growth of single-crystal SiC. For this epitaxial method, an angle of 4° is typically chosen. However, the larger this tilt angle, the higher the steps between the terraces.

[0006] Such orientation differences can also spontaneously appear on polycrystalline SiC surfaces with random grain orientations.

[0007] Other semiconductor materials can have surfaces with the same type of steps. On surfaces containing gallium nitride, gallium beads can appear when exposed to high temperatures.

[0008] In order to obtain a smooth surface, it is therefore sought to avoid the formation of platforms or remove them in subsequent steps, and where appropriate, to avoid the presence of gallium beads or other materials.

[0009] For example, mechanical polishing or chemical-mechanical polishing (CMP) can be performed after heat treatment. However, if the height of the formed platform is too large, such as greater than 80 nm between two consecutive plates, the thickness to be removed is too great, which means a lengthy and laborious process. In addition, the remaining thickness is usually too thin for the intended application.

[0010] J. Bao et al.'s article suggests using a very rapid annealing ramp to limit the platform's appearance. This method requires a very rapid temperature rise of approximately 400°C per minute, making it incompatible with industrial furnaces.

[0011] Alternatively, a silane overpressure can be applied, which restricts silicon sublimation into silicon carbide, thus preventing plateau formation. This method is described by R. Zhang et al. in their article. However, it requires the introduction of SiH4 gas and equipment to generate the overpressure. Furthermore, at temperatures above 1600°C, silicon droplets may appear on the silicon carbide surface.

[0012] Another possibility for avoiding platform formation is to use a protective layer, typically a carbon film about 1 µm thick. This technique involves adding extra steps to the formation process, such as resin deposition, carbonization of the resin at temperatures between 600°C and 1000°C, and the use of additional equipment, and carries the risk of resin contamination of the substrate and furnace. Furthermore, resin deposition and removal of the carbon micron layer are time-consuming and expensive steps.

[0013] In some cases, the protective layer can also be formed of aluminum nitride (AlN). However, this material is difficult to remove, especially after heat treatment at high temperatures.

[0014] The presence of oxygen in the furnace atmosphere can limit platform formation; however, it can create surface pits incompatible with epitaxial recovery. Furthermore, high-temperature furnaces typically include graphite components that are sensitive to the presence of oxygen during annealing.

[0015] Furthermore, under high temperatures, the back side of the supporting substrate may become unstable. This instability can lead to surface degradation. In particular, in polycrystalline SiC surfaces where grain orientation is random, degradation can depend on the orientation of each grain and therefore vary considerably across the back side of the substrate. This results in significant roughness on the back side, reducing the quality of certain operations performed on the back side, such as metallization.

[0016] In order to maintain a smooth back side without requiring smoothing treatment, it is also sought to avoid degradation of the polycrystalline SiC back side during the thermal processing steps of one or more active layers on the front side of the substrate. Summary of the Invention

[0017] One object of the present invention is to provide a method for processing a substrate having a back side made of polycrystalline silicon carbide, the method comprising a step of stabilizing the back side to allow limiting the increase of its roughness during heat treatment.

[0018] The stabilization step must be easily integrated into the method for manufacturing a substrate that includes one or more layers of single-crystal semiconductor material on its front side, and must not pose any risk of front-side contamination.

[0019] To this end, the present invention provides a method for processing a substrate having a back side made of polycrystalline silicon carbide and a front side intended for manufacturing electronic components, the method comprising: A glassy carbon layer is formed on the back side. Transfer the single-crystal semiconductor material layer onto the front side. The substrate is heat-treated after the carbon layer is formed, and the carbon layer limits the increase in back surface roughness during the heat treatment.

[0020] Advantageously, the glassy carbon layer has a thickness of less than or equal to 100 nm.

[0021] Preferably, the heat treatment is carried out at a temperature greater than 900°C, and more preferably greater than 1300°C.

[0022] Advantageously, the single-crystal semiconductor material layer is made of silicon carbide or gallium nitride.

[0023] The formation of a glassy carbon layer can be achieved by gas-phase carbon reaction on the surface or by depositing a polymer layer followed by carbonization of the polymer layer.

[0024] Advantageously, the formation of the glassy carbon layer also includes forming a carbon layer on the front side of the substrate.

[0025] In some embodiments, transferring a single-crystal semiconductor material layer onto the front side includes the following steps: Ionic material is implanted into the donor substrate to form a weakened region that defines the layer to be transferred. The donor substrate is bonded to the front side of the support substrate. The donor substrate is separated along the weakened region.

[0026] Preferably, the formation of each carbon layer is performed after separation from the donor substrate, such that the carbon layer on the front side protects the front side during at least a portion of the heat treatment, preventing the formation of platforms and / or beads on the front side.

[0027] Advantageously, the formation of each carbon layer is performed after bonding and before separation from the donor substrate in order to remove the carbon layer on the front side having the donor substrate.

[0028] Advantageously, the method further includes the step of removing the carbon layer from the front side of the substrate, wherein the formation and removal of the carbon layer on the front side of the substrate are performed before the donor substrate is bonded to the front side of the support substrate.

[0029] Preferably, the method further includes the step of epitaxially growing the single-crystal semiconductor material on the front side layer after forming and removing the carbon layer on the front side, wherein the carbon layer on the back side restricts the increase in roughness of the back side during epitaxy.

[0030] Advantageously, the method further includes a step of fabricating electronic components on the front side of a substrate after the step of epitaxially growing a single-crystal semiconductor material, wherein, when fabricating the electronic components, a carbon layer on the back side limits the increase in roughness of the back side. Attached Figure Description

[0031] Other features and advantages of the invention will become apparent from the following detailed description with reference to the accompanying drawings, in which: Figure 1 The diagram shows a platform formed on one surface of a single-crystal semiconductor material.

[0032] Figure 2 A substrate comprising a portion of a single-crystal semiconductor material on its front side is shown.

[0033] Figure 3 This shows the effect after the deposition of a carbon layer. Figure 2 The substrate.

[0034] Figure 4 This shows the effect after the carbon layer is ablated. Figure 3 The substrate.

[0035] Figures 5A to 5C The fabrication of a substrate having a portion of a single-crystal semiconductor material on its front side is shown.

[0036] Figure 6A An example of a thermal profile for a first embodiment of the method according to the invention is shown.

[0037] Figure 6B An example of a thermal profile for a second embodiment of the method according to the invention is shown.

[0038] Figure 7A These are atomic force microscopy (AFM) images showing the roughness caused by a plateau on the surface of a substrate that has been heat-treated at 1500°C without the application of a carbon layer.

[0039] Figure 7B This is an atomic force microscopy image showing the surface roughness of a substrate heat-treated with a glassy carbon layer at 1500°C according to the present invention.

[0040] Figure 8A This is an AFM image showing the surface roughness of a carbon layer obtained by annealing at 1700°C followed by deposition at 900°C for 10 minutes.

[0041] Figure 8B This is an AFM image showing the surface roughness of a carbon layer obtained by annealing at 1700°C followed by deposition at 1000°C for 10 minutes.

[0042] Figure 9 An annealing furnace suitable for forming a carbon layer according to a preferred embodiment of the present invention is shown.

[0043] Figure 10 A substrate with a carbon layer on the back side is shown.

[0044] Figure 11 A support substrate with a front and a back side is shown.

[0045] Figure 12 A substrate having a carbon layer on the front side and a carbon layer on the back side is shown.

[0046] Figure 13A and Figure 13B The steps of a treatment method according to one embodiment are shown.

[0047] Figures 14A to 14D The steps of a processing method according to another embodiment are shown.

[0048] Figure 15 The steps for epitaxially growing a single-crystal semiconductor material on a single-crystal semiconductor material layer disposed on the front side of a substrate are shown.

[0049] Figure 16A The low roughness of a portion of the polycrystalline silicon carbide surface prior to heat treatment is shown.

[0050] Figure 16B It shows what happens after heat treatment. Figure 16A The increased roughness of the part.

[0051] Figure 17A This shows the low roughness of another portion of the polycrystalline silicon carbide surface prior to heat treatment.

[0052] Figure 17B It shows what happens after heat treatment. Figure 17A The increased roughness of the part.

[0053] Figure 18 The maximum depth and roughness of different portions of the substrate annealed under different conditions are shown. Detailed Implementation

[0054] Figure 2 A substrate 10 is shown, comprising a support substrate 11 and a portion 20 made of a single-crystal or polycrystalline semiconductor material on its front side. The support substrate 11 can be any type of support substrate suitable for depositing or transferring the portion 20 made of a single-crystal or polycrystalline semiconductor material, such as a support substrate made of a polycrystalline semiconductor material.

[0055] Alternatively, substrate 10 may be a bulk substrate made of single-crystal or polycrystalline semiconductor material, that is, support substrate 11 and portion 20 together constitute a single portion made of bulk single-crystal or polycrystalline semiconductor material.

[0056] Preferably, the portion 20 on the front side of the substrate is made of a single-crystal semiconductor material. However, the semiconductor material forming the front side of the substrate 10 and thus constituting the portion 20 (in the case where the substrate 10 includes a supporting substrate 11 and the portion 20) or the substrate 10 (in the case of a bulk substrate) may also be a polycrystalline material.

[0057] In the remainder of the specification, since the case of the substrate 10, including the support substrate 11 and the single-crystal portion 20, is described in detail, the material constituting the portion 20 will be referred to as "single-crystal semiconductor material" to distinguish it from the material constituting the support substrate 11. However, the method described below can also be applied to the case of polycrystalline semiconductor materials, where each grain can be considered a single crystal.

[0058] According to a preferred embodiment, the single-crystal semiconductor material is silicon carbide.

[0059] According to another embodiment, the single-crystal semiconductor material is selected from: aluminum nitride (AlN), gallium nitride (GaN), and alloys of these nitrides, Al. x Ga （1－x） N (where x is a value between 0 and 1), indium phosphide (InP), or gallium arsenide (GaAs).

[0060] Typically, the surface 200 of portion 20, made of a single-crystal semiconductor material, or, if applicable, the surface 200 of a substrate made of a bulk single-crystal semiconductor material, is slightly off-axis. For example, if the semiconductor material is silicon carbide, this surface may be off-axis relative to the crystal structure of silicon carbide in order to control the 4H polytype during growth.

[0061] In the case of polycrystalline semiconductor materials, some grains may have this offset relative to the crystal structure of silicon carbide. For example, after the substrate 10 is cut or polished to expose a specific face of the substrate 10, the orientation of the grains will be offset relative to the randomly oriented grains on that face.

[0062] Formation of protective layer

[0063] refer to Figure 3 Subsequently, a glassy carbon layer 30 is formed on the surface 200 of the portion 20 made of single-crystal semiconductor material. The glassy carbon layer is continuous and covers the entire surface to be protected, i.e., the front side of the single-crystal material. Typically, the glassy carbon layer 30 is deposited on all free surfaces of the substrate, and thus simultaneously covers both the front and back sides of the substrate. This allows for simultaneous protection of the back side from plateau formation, and in the case of silicon carbide substrates, from silicon evaporation during heat treatment. In the case of polycrystalline silicon carbide substrates, the glassy carbon layer prevents roughening of the back side, which will be described in detail below.

[0064] The carbon layer protects the substrate surface from plateau formation during high-temperature heating. Therefore, it stabilizes the crystal structure of the surface. After the high-temperature treatment, the carbon layer is removed to obtain a clean surface of a single-crystal semiconductor material with good crystallinity. The thickness of the carbon layer is preferably less than 100 nm to allow for easy removal at the end of the high-temperature process.

[0065] The glassy state characteristics of the carbon layer are achieved with a carbon thickness of a few nanometers; for lower thicknesses, the carbon is in the form of one or two monolayers of graphene. When the thickness is sufficient to obtain glassy carbon, the protective layer has a three-dimensional, unorganized structure on a long-range scale, which is stable over the entire temperature range exposed to the surface during the method, and this structure allows for complete coverage of the substrate surface. The uniformity of the glassy carbon layer is also easier to control over the substrate surface.

[0066] Advantageously, the formation of the glassy carbon layer takes place in a furnace, which will be described later. The carbon layer is formed in the gas phase, meaning that carbon exists in the furnace in gaseous form. The substrate is heated in the furnace to the deposition temperature of the protective layer, and the gaseous carbon phase is converted into solid carbon through reaction with the hot surface of the substrate.

[0067] The furnace temperature and pressure are selected to avoid degradation of the surface to be protected during carbon layer deposition. During carbon layer formation, the furnace temperature is greater than 700°C and strictly less than 1000°C, advantageously less than 950°C. Preferably, the temperature during carbon layer formation is between 800°C and 900°C to effectively protect the substrate surface.

[0068] Temperatures below 800°C slow down the method. Below 700°C, the slowdown impairs the method's efficiency.

[0069] During carbon layer formation and subsequent heat treatment, the appearance of carbon particles is frequently observed on the substrate surface. At carbon layer formation temperatures strictly below 1000°C, and more advantageously below 900°C, the density and size of these carbon particles decrease significantly. Higher temperatures, particularly 1000°C, result in the appearance of large particles, which can be as large as approximately 60 nm. These particles form on the substrate surface during carbon layer formation and subsequent heat treatment. Therefore, a carbon layer formation temperature of 1000°C increases the roughness of the substrate surface.

[0070] Polishing steps, such as chemical-mechanical polishing for removing carbon layers, are easier to implement and pose less risk of surface scratches when the number and size of these particles are reduced.

[0071] Furthermore, by reducing the density and size of carbon particles on the surface, for example in electronic manufacturing environments, the risk of contamination of other substrates or components by such particles is reduced.

[0072] Reducing surface roughness also makes it easier to control the thickness of the deposited carbon layer.

[0073] The temperature range, between 700°C and 950°C, and preferably between 800°C and 900°C, allows for easy control of the thickness of the carbon layer deposited by an efficient method, avoiding the presence of carbon particles with excessive size and density for the manufacture of power and radio frequency electronic components.

[0074] Advantageously, the carbon source is a carbon gas, such as propane (C3H8). Alternatively, the carrier gas can be methane (CH4) or ethane (C2H6). Using propane as a carrier gas allows for faster formation of the carbon layer because the C-C bonds of carbon atoms are more easily broken than the C-H bonds in methane and ethane.

[0075] Carbon gas is mixed with a carrier gas, such as argon or a mixture of argon and hydrogen. The carrier gas is a neutral gas that does not participate in the chemical reactions that form the carbon layer. Typically, gas mixing is carried out in the furnace shell at the deposition temperature. The gas flow rate can be easily controlled and adjusted to the deposition conditions of the carbon layer.

[0076] Typically, carbon layer deposition is carried out at gas pressures between 0.1 and 100 kPa (1 to 10 mbar), which are easily maintained in industrial furnaces. The partial pressure of the carbon gas is usually adjusted to 0.1–1 kPa (1–10 mbar). This concentration avoids furnace atmosphere saturation, allowing for better control over the thickness of the deposited carbon layer.

[0077] Advantageously, the thickness of the protective carbon layer is less than 100 nm, for example, between 50 nm and 100 nm. The time required to obtain such a layer depends on the temperature and partial pressure of the carbon gas, and typically ranges from 2 seconds to 2 hours. The temperature, pressure, and type of carbon gas during layer formation, as well as the duration of this step, allow for adjustment of the thickness of the deposited carbon layer.

[0078] The carbon layer can be characterized by surface analysis techniques, such as atomic force microscopy (AFM), X-ray reflectance measurement (XRR), Raman spectroscopy, or low-energy electron microscopy (LEEM).

[0079] The carbon layer is stable at temperatures up to 2000°C and allows for the restriction of platform formation when the substrate is exposed to temperatures above the platform formation temperature.

[0080] High-temperature steps requiring a protective layer

[0081] After the carbon layer is formed, further steps can be performed on the substrate at temperatures above the plateau formation temperature. These steps include, for example, annealing to repair defects in the lattice caused during ion implantation, to alter the crystal structure of the substrate, or for the activation of dopants. In these steps, the surface of the single-crystal semiconductor material is protected by the carbon layer, preventing the formation of plateaus on said surface. The annealing step is performed at temperatures ranging from 1300°C to 1900°C, typically greater than 1500°C.

[0082] The formation of the carbon layer and the heat treatment are carried out in the same furnace, which is advantageously the furnace conventionally used for batch annealing of substrates.

[0083] Due to the material's good stability at high temperatures, furnaces heated to above 1500°C typically include graphite components. In any case, the formation of a carbon layer in such a furnace results only in the deposition of a very thin carbon layer, which does not affect the operation of these components made of the same material as the layer.

[0084] Remove protective layer

[0085] At the end of the annealing step, the temperature is lowered to below the plateau formation temperature, i.e., below 1300°C.

[0086] In some embodiments, the removal can be performed in the same furnace in which the steps of forming the carbon protective layer and / or the high-temperature steps are performed. In this case, the temperature is reduced to the temperature used for ablation of the carbon layer, for example, about 900°C. The carbon layer can then be removed because the temperature is low enough that no plateau formation occurs on the surface of the semiconductor material. The low thickness of the carbon layer facilitates rapid and residue-free removal from the substrate.

[0087] Carbon layer removal can be carried out using reactive plasmas, such as oxygen plasmas based on the following reactions: C (solid) + O2 (gas) CO2 (gas) In other embodiments, the substrate is cooled after the heat treatment step and transferred to another housing or apparatus for removing the carbon layer. This transfer is necessary, for example, if components of the furnace are made of unprotected graphite or other materials that could be damaged by contact with the reactive plasma, and the ablation of the carbon layer is performed by the plasma.

[0088] Alternatively, the carbon layer can be removed by reactive ion etching (RIE), for example, after transfer to a suitable casing by oxygen ions or a mixture of oxygen and sulfur hexafluoride.

[0089] To remove any possible carbon residues and / or ensure good surface quality of the single-crystal semiconductor material, a suitable chemical-mechanical polishing step can be performed after removing the carbon layer.

[0090] In some cases, the carbon layer is removed during substrate finishing steps after removal from the furnace, such as during chemical mechanical polishing or mechanical polishing steps.

[0091] At the end of the removal step, refer to Figure 4 Substrate 11 is completed and the carbon layer is removed. The free surface of substrate 11 and single-crystal semiconductor material can now be used for epitaxial growth of single-crystal semiconductor material layers (which may be the same as or different from substrate 11) and / or fabrication of power or radio frequency electronic components.

[0092] In some cases, the carbon layer on the back side of the substrate is removed together with the layer on the front side. In other embodiments, the glassy carbon layer disposed on the back side of the substrate is retained during this step and during the fabrication of electronics on the front side to protect the back side during these steps. In this case, the carbon layer on the back side is removed before or during the substrate thinning step, for example by polishing.

[0093] Methods for manufacturing semiconductor structures

[0094] A method for manufacturing a semiconductor structure for electronic applications, having a single-crystal silicon carbide surface, will now be described.

[0095] A donor substrate 220 is provided, preferably made of single-crystal silicon carbide, from which a surface layer of single-crystal silicon carbide is formed. (Reference) Figure 5AAs schematically indicated by the arrows, ionic materials (e.g., hydrogen and / or helium) are implanted to form a weakened region 21 in the donor substrate 220. The weakened region 21 defines the single-crystal silicon carbide layer 20 to be transferred.

[0096] refer to Figure 5B The donor substrate 220, thus implanted, is bonded to the support substrate 11. Figure 5B As shown, the donor substrate can be directly bonded to the support substrate, or bonded to the support substrate through one or more intermediate layers, which can be applied to the donor substrate and / or support substrate (not shown) prior to bonding.

[0097] refer to Figure 5C Then, the donor substrate 220 is separated along the weakened region 21, which causes the single-crystal silicon carbide layer to transfer onto the supporting substrate 11, thereby forming as shown in the figure. Figure 2 The substrate 10 is shown. The separation portion 221 of the donor substrate can be reused to transfer other single-crystal silicon carbide layers onto other base substrates.

[0098] Then, a method for processing substrate 10 is performed, the method comprising the following steps in succession: stabilizing the surface by forming a protective layer of glassy carbon; high-temperature annealing, which is designed to repair defects generated in the single-crystal silicon carbide layer during the implantation of ionized material; and subsequently removing the protective carbon layer.

[0099] The methods for forming the carbon layer and the heat treatment are performed in the same furnace. Therefore, this avoids the need to transfer the substrate from a deposition chamber dedicated to depositing the protective layer to an annealing furnace, resulting in a simpler, faster method and minimizing the risk of substrate contamination.

[0100] Figure 6A Temperature curves for one embodiment of this method as a function of time are shown. Three main sequences of the method can be distinguished, corresponding to the formation of the protective carbon layer (S1), high-temperature annealing (S2) (i.e., a temperature above the plateau formation initiation temperature), and the step of removing the protective layer (S3).

[0101] In all sequences of this method, the gas injected at the top of the furnace is vented by a carrier gas flow from the bottom of the furnace.

[0102] The first sequence S1 begins at time t0. The substrate is typically at room temperature, around 20°C, or below the plateau formation temperature. The substrate is introduced into the deposition chamber. Heating of the substrate begins at a temperature T1 for depositing the glassy carbon layer. The deposition temperature T1 is greater than 700°C and strictly less than 1000°C. Therefore, T1 is lower than the temperature at which plateau formation begins, which is approximately 1300°C at a pressure of 101 kPa (1 atm), or even approximately 1200°C or 1100°C at lower pressures. Temperature T1 is also below approximately 1000°C, which can lead to an increase in surface roughness.

[0103] Starting from time t1, a gas stream containing carbon gas and carrier gas is injected into the furnace.

[0104] Carbon deposition begins at time t1. The duration of carbon layer formation typically ranges from 2 seconds to 2 hours, until time t2. During this time, the deposition temperature T1 remains constant. The pressure inside the furnace is maintained between 0.1 and 100 kPa (between 1 mbar and 1 bar).

[0105] The injection gas flow rate depends on the chamber volume, and the flow rate is controlled to obtain a carbon gas partial pressure between 0.1 and 1 kPa (between 1 mbar and 10 mbar). The deposition temperature T1 and the carbon gas flow rate can be adjusted to obtain a carbon layer with the desired thickness and uniformity, suitable for optimal protection in the following sequence, and the deposition temperature T1 and carbon gas flow rate can be adjusted to obtain a sufficiently short time, thereby optimizing the method in terms of duration and cost.

[0106] The carbon gas supply is stopped at the end of sequence S1. The carbon gas residue is evacuated under the flow of carrier gas.

[0107] When the carbon layer deposition is complete at time t2, a second sequence S2 is performed. The second sequence S2 comprises heating from the deposition temperature T1 to the annealing temperature T2 and a temperature plateau, for example, a duration between 30 and 120 minutes. The annealing temperature T2 and the duration of the treatment are selected based on the state of the substrate prior to the current method and the expected crystal structure of the substrate. Typically, annealing is performed at a temperature T2 greater than 1500°C, for example, between 1600°C and 1900°C.

[0108] The second sequence of heat treatments is performed in the same furnace as the formation of the carbon layer in the first sequence.

[0109] At the end of sequence S2, the substrate was cooled to maintain the crystallinity achieved during annealing. At time t3, the substrate reached a third temperature T3 of 900°C.

[0110] In some embodiments, reference Figure 6AThe third sequence S3 is then executed directly, during which the carbon protective layer is removed by oxidation, as previously described. During this step, oxygen may be injected into the furnace to generate a reactive plasma.

[0111] During this step, the temperature T3 = 900°C remains constant. At a stripping rate of approximately 100 nm / min, the removal time is typically between 10 and 120 seconds. The total duration of sequence S3 also includes furnace stabilization and typically ranges from 5 minutes to 1 hour. At time t4, when the carbon layer has been completely removed, the furnace is cooled to remove the substrate.

[0112] Figure 6B A temperature profile of one embodiment is shown, wherein the carbon layer removal step is performed outside the furnace. Sequences S1 and S2 are performed as described above. At the end of sequence S2, the substrate is cooled to a temperature close to room temperature, thereby allowing the furnace to be opened and the substrate removed. During sequence S3', the carbon layer removal is performed outside the furnace. In this case, at time t3, a transfer step is performed from the annealing furnace to the protective layer removal shell or to the polishing apparatus. When the substrate processing method includes a transfer step, the different sequences can be performed separately in time. Depending on the implemented technique for ablation of the glass carbon layer, sequence S3 may include heating to a temperature below the platform formation temperature or performing it at room temperature.

[0113] The impact of the protective layer on platform formation

[0114] Figure 7A and Figure 7B It is in two corresponding substrates, each with a single-crystal silicon carbide surface, 30×30 μm 2 Atomic force microscopy (AFM) image of a surface.

[0115] Figure 7A This is an AFM image of a substrate heat-treated at 1500°C without the application of a carbon layer. Plateaus have formed on the substrate surface, which can be seen as vertical lines in the AFM image. The root mean square (RMS) value of the surface roughness caused by the plateaus is approximately 16 nm.

[0116] Figure 7B This is an AFM image illustrating the surface roughness of a substrate of the same type, heat-treated at 1500°C. Prior to heat treatment, it was protected by a glassy carbon layer formed at 900°C and a pressure below 5 kPa (50 mbar). Figure 7B The substrate was subjected to treatment for 10 minutes. A carbon layer was formed in an atmosphere containing argon as the carrier gas and propane as the carbon gas. The propane content in the mixture was less than 30%.

[0117] The image of the protected substrate does not show any parallel line structures indicating the presence of a plateau. The root mean square value of the surface roughness is approximately 0.2 nm. Therefore, the roughness of the substrate protected by the carbon layer is much lower than that of the substrate without the protective layer.

[0118] The effect of temperature during carbon layer formation

[0119] Figure 8A and Figure 8B It is 5×5 μm of two corresponding substrates with single-crystal silicon carbide surfaces. 2 AFM images of the surface. Each substrate has a protective carbon layer. The carbon layers were deposited at different temperatures. Each corresponding substrate was heat-treated at 1500°C under the same conditions.

[0120] According to a preferred embodiment of the invention, protection is achieved by depositing a carbon layer at a temperature of 900°C for 10 minutes. Figure 8A The substrate. The curve below the AFM image shows the height profile of the magnified portion of the image along a length l of 100 nm. In this region, the largest particles on the surface have a height h of approximately 1.5 nm.

[0121] Figure 8B The substrate is protected by depositing a carbon layer at 1000°C for 10 minutes (i.e., under conditions not covered by this invention). The image has a higher... Figure 8A The image shows a more granular structure, indicating a greater surface roughness. The AFM image reveals the height profile of this surface at a length l of 500 nm. Within this profile, larger grains, reaching a height h of approximately 15 nm, can be distinguished.

[0122] Therefore, a carbon layer formed at 900°C has a much lower roughness than a layer formed at 1000°C. Since the roughness increases with the temperature at which the carbon layer is formed, it is necessary to form the carbon layer at a temperature strictly below 1000°C.

[0123] The exterior of the stove

[0124] To make the process of processing multiple substrates efficient and fast, it is preferable to use an annealing furnace capable of processing the maximum number of substrates simultaneously under the same conditions. In the field of microelectronics, such a furnace is often referred to as a "batch annealing" furnace.

[0125] Figure 9A furnace suitable for receiving substrates in quantities between 120 and 150 in an annealing chamber is shown. Substrates 10 are placed horizontally and overlapped vertically in the furnace to process the maximum number of substrates in the same hot gas flow 73. Free space is maintained between each substrate 10 and adjacent substrates 10 to optimize gas flow and promote carbon layer formation. Typically, the vertical distance between two adjacent substrates is between 2 and 20 mm.

[0126] This furnace employs a "top-flow" structure, meaning the gas flow enters the furnace from the top 71 and exits through the bottom outlet 79 after passing through the furnace. Typically, the carrier gas flow carries carbon gas (usually propane) for carbon layer formation. In some cases, other gases, such as catalyst gases, are added to the furnace to promote the decomposition of the carbon gas.

[0127] All components of the annealing chamber inside the furnace—namely, the inner wall 75, the substrate holders for holding the substrates in horizontal and vertical stacked positions, and the gases contained within the annealing chamber—are at the same temperature during furnace use, except for external components such as the outer wall 76 and the ends of the gas supply pipes. This same temperature means that the temperature difference between the top 74 and the bottom 78 of the furnace is minimal, typically a few degrees Celsius; for example, less than 3°C for furnace temperatures between 800°C and 1200°C.

[0128] The substrate is heated primarily through conduction from the furnace walls. A gas stream is injected at the same temperature as inside the furnace.

[0129] Annealing furnaces are not used for layer deposition, but rather for heat-treating substrates placed within them. Therefore, these furnaces are optimized for high-temperature uniformity of the substrates contained within, but optimization of material deposition is not permitted, particularly ensuring uniformity of gas flow across the substrate surface. The stacking and positioning of the substrates is particularly detrimental to this uniformity because gas has greater difficulty reaching the center of the substrate compared to its edges. However, this type of furnace is still suitable for carbon layer deposition to protect the surface of the semiconductor material from plateau formation, especially since the uniformity of carbon layer thickness is not a definitive criterion as long as the entire surface to be protected is covered. Temporary use of carbon layers does not require increasing the uniformity of the layer. However, it is necessary to control the thickness to achieve sufficient thickness across the surface of all substrates contained within the furnace. The use of graphite components within the furnace is compatible with carbon layer deposition because it is the same material, and the thickness of the deposited layer is smaller compared to the size of the component.

[0130] Unlike epitaxial shells, this furnace allows for the simultaneous processing of large numbers of substrates due to its vertically stacked arrangement. Furthermore, this furnace allows carbon deposition and annealing steps to be performed within the same chamber, avoiding the risk of contamination during transfers between two different shells. By eliminating transfer steps between the carbon deposition shell and the annealing furnace, cooling between steps, the labor required for transfer, and consequently, losses in time and efficiency are avoided.

[0131] Back protection

[0132] In some embodiments, particularly in the case of a polycrystalline silicon carbide support substrate, a carbon layer 40 is used to protect the back side of the substrate, such as... Figure 10 As shown. The carbon layer can be formed simultaneously with the carbon layer formed on the front side; however, this carbon layer on the back side has advantages that are independent of the advantages provided relative to the front side, and therefore can be used even when no carbon layer is formed on the front side.

[0133] refer to Figure 11 The back side 204 of the supporting substrate 11, opposite to the free front side 203, is used to receive one or more functional layers for fabricating one or more electronic components. Typically, the carbon layer 40 is held on the back side 204 during one or more steps of electronic component fabrication, such as during the step of transferring layers onto the front side 203, epitaxial steps, and / or annealing operations to activate dopants. The carbon layer 40 on the back side of the substrate typically has a thickness of less than or equal to 100 nm. The carbon layer on the back side is removed at the end of the method for fabricating the component, typically before metallization or other finishing steps on the back side of the substrate.

[0134] In the first embodiment, substrate 10 is first manufactured, which includes transferring layer 20 onto a supporting substrate 11, preferably by means of the method described above and in Figures 5A to 5C The method described herein. Subsequently, as... Figure 12 As shown, a carbon layer 30 is formed on the front side 200 of the single-crystal semiconductor material layer 20, and a carbon layer 40 is simultaneously formed on the back side of the supporting substrate 11. Typically, the carbon layers 30 and 40 are deposited on the front and back sides of the substrate in a single step by a gas-phase carbon reaction on the opposite sides 204 and 200 of the substrate 10, or by depositing two corresponding polymer layers and then carbonizing the polymer layers, to obtain glassy carbon layers 30 and 40. During possible subsequent heat treatments, layer 30 on the front side 200 protects the front side from the formation of plateaus and / or beads, while layer 40 on the back side 204 protects the back side from increased roughness.

[0135] In the second embodiment, firstly, a support substrate 11 is provided, a weakening region is formed in the donor substrate 220, and as described above and as in Figure 5A and Figure 5BThe donor substrate 220 is bonded to the support substrate as shown in the diagram. Then, referring to... Figure 13A A carbon layer 40 is formed on the back surface 204 of the support substrate 11. Simultaneously, a carbon layer 31 is formed on the free surface 223 of the donor substrate 220, opposite to the surface of the donor substrate that forms the interface with the support substrate 11. The carbon layers 31 and 40 are deposited on the outer surfaces of the support and donor substrates in a single step via a gas-phase carbon reaction, or by depositing two corresponding polymer layers followed by carbonization of the polymer layers to obtain the carbon layers 31 and 40.

[0136] In this embodiment, the carbon layers 31 and 40 are preferably formed at a temperature below 900°C so as not to cause the donor substrate 220 to separate along the weakened region during the deposition of the carbon layers 31 and 40.

[0137] In the subsequent step, the donor substrate is separated along the weakened region 21. (See reference...) Figure 13B The carbon layer 31 on the donor substrate 220 is removed together with the donor substrate 220. The carbon layer 40 protects the back side 204 of the substrate 10 during separation and in some cases during one or more subsequent steps, and can be removed later.

[0138] In the third embodiment, reference is made to... Figure 14A A carbon layer 40 is formed on the back side of the support substrate 11 before the functional layer is transferred and before the donor substrate is bonded to transfer the layer onto the support substrate 11. This method, such as vapor deposition or by carbonization of a polymer layer as in other embodiments, typically results in the formation of a carbon layer 32 on the front side 203 of the support substrate 11. In subsequent steps, refer to... Figure 14B The carbon layer 32 is removed from the front side 203, and the front side 203 is prepared to receive the functional layer 20 transferred from the donor substrate.

[0139] Subsequently, ion implantation can be performed on the donor substrate 220 to form a weakening region 21 in the donor substrate 220, as described above. Figure 5A As shown in the image.

[0140] refer to Figure 14C In this way, the injected donor substrate 220 can bond to the front side 203 of the support substrate 11. The donor substrate can be as follows: Figure 14C It is shown to be directly bonded to the support substrate, or bonded to the support substrate through one or more intermediate layers, which may be applied to the donor substrate and / or support substrate (not shown) prior to bonding.

[0141] refer to Figure 14DThe donor substrate 220 is then separated along the weakened region 21, resulting in the transfer of a single-crystal silicon carbide layer onto the support substrate 11, thereby forming a substrate 10 comprising a carbon layer 40 on its back surface 204. The separated portion 221 of the donor substrate can be reused to transfer other single-crystal silicon carbide layers onto other base substrates. The carbon layer 40 protects the back surface 204 of the substrate 10 during separation and, in some cases, during one or more subsequent steps, and can be removed thereafter.

[0142] In all embodiments, reference is made to Figure 15 The transfer layer 20 is preferably made of silicon carbide or gallium nitride. The transfer layer 20 can be used as a seed layer to form a portion 50 of a single-crystal semiconductor material by epitaxial growth. With the layer 20 protected by the carbon layer 30, epitaxial growth is performed after the carbon layer 30 is removed from the front side of the substrate. Preferably, during epitaxial growth, the carbon layer 40 is held on the back side of the substrate 11.

[0143] After the heat treatment step is completed, the carbon layer 40 is preferably removed from the back side 204 of the substrate by chemical mechanical polishing (CMP) and / or by reactive ion etching and / or by plasma etching.

[0144] Figure 16A This is an atomic force microscope (AFM) image of the back side of a polycrystalline silicon carbide substrate with an area of ​​5 μm × 5 μm before heat treatment. Figure 16B This is an AFM image of the same surface protected by a carbon layer after heat treatment at 1700°C for 30 seconds. Figure 17A This is an image of a 30 μm × 30 μm area on the back side before the same heat treatment. Figure 17B These are AFM images of the same area after heat treatment at 1700°C for 30 seconds. These images clearly show that roughness increases even during short annealing. This increase in roughness is prevented by the presence of a carbon layer on the back side.

[0145] Figure 18 The root mean square (RMS) roughness and peak-to-valley (PV) values ​​at several points in different regions A, B, C, and D of a substrate that have undergone heat treatment under different conditions are shown. In region A, the back side of the substrate was mechanically polished after the layer was transferred to the front side. No annealing was performed in region A. The back side in this region has low roughness, with an RMS roughness value of less than 2 nm obtained by AFM. In region B, the substrate was annealed without a carbon layer on the back side. In region C, annealing was performed at 850°C with a carbon layer on the back side. In region D, annealing was performed at 900°C with a carbon layer on the back side.

[0146] In region B, where annealing was performed without the carbon layer, the roughness increased significantly. On the other hand, the roughness on the back side in regions C and D, which were protected by the carbon layer, was comparable to the initial roughness in region A after the carbon layer was removed. Therefore, the carbon layer allows for a significant limitation on the increase in roughness caused by the heat treatment of the substrate.

[0147] Reference documents

[0148] "Growth of large Domains of Epitaxial Graphene on theC-face of SiC" by R. Zhang et al., J. of App. Phys. 2012, 112 (10); doi:10.1063 / 1.4765666

[0149] "Sequential Control of Step-Bunching During GrapheneGrowth on SiC (0001)" by J.Bao et al., App. Phys. Lett. 2016, 109(8); doi:10.1063 / 1.4961630.

Claims

1. A method for processing a substrate (10) having a back side (204) made of polycrystalline silicon carbide and a front side (203) for manufacturing electronic components, the method comprising: A glassy carbon layer (40) is formed on the back side (204). The single-crystal semiconductor material layer (20) is transferred onto the front side (203). The substrate is heat-treated after the carbon layer (40) is formed, and the carbon layer (40) limits the increase in roughness of the back surface (204) during the heat treatment.

2. The processing method according to claim 1, wherein, The glass carbon layer (40) has a thickness of less than or equal to 100 nm.

3. The processing method according to claim 1 or claim 2, wherein, The heat treatment is performed at a temperature greater than 900°C, preferably greater than 1300°C.

4. The processing method according to any one of the preceding claims, wherein, The single-crystal semiconductor material layer (20) is made of silicon carbide or gallium nitride.

5. The processing method according to any one of the preceding claims, wherein, The glass carbon layer (40) is formed by a gas-phase carbon reaction on the surface or by depositing a polymer layer and then carbonizing the polymer layer.

6. The processing method according to any one of the preceding claims, wherein, The formation of the glass carbon layer (40) also includes forming a carbon layer (30) on the front side (200) of the substrate (10).

7. The processing method according to any one of the preceding claims, wherein, The step of transferring the single-crystal semiconductor material layer (20) onto the front side (203) includes: o Ionic material is implanted into the donor substrate (220) to form a weakened region (21) that defines the layer (20) to be transferred. o The donor substrate (220) is bonded to the front side of the support substrate (11). o Separate the donor substrate (220) along the weakened region (21).

8. The processing method according to claim 7 in conjunction with claim 6, wherein, After separation from the donor substrate (220), the formation of each carbon layer (40, 30) is performed such that the carbon layer (30) on the front side (200) protects the front side (200) from forming platforms and / or beads on the front side during at least a portion of the heat treatment.

9. The method for manufacturing a semiconductor structure according to claim 7 in conjunction with claim 6, wherein, The formation of each carbon layer (30, 40) is performed after bonding and before separation from the donor substrate (220) in order to remove the carbon layer (30) on the front side having the donor substrate (220).

10. The processing method according to claim 7 in conjunction with claim 6, the method further comprising the step of removing the carbon layer (30) from the front side (200) of the substrate (10), wherein the formation of the carbon layer (30) on the front side (200) of the substrate (10) and the removal of the carbon layer (30) are performed before the donor substrate (220) is bonded to the front side (203) of the support substrate (10).

11. The processing method according to any one of the preceding claims, further comprising: The step of epitaxially growing a single-crystal semiconductor material (50) on the layer (20) after forming and removing the carbon layer (30, 31, 32) on the front side, wherein the carbon layer (40) on the back side (204) limits the increase in roughness of the back side (204) during epitaxy.

12. The processing method according to claim 11, further comprising: Following the step of epitaxially growing the single-crystal semiconductor material (50), the step of fabricating an electronic component on the front side of the substrate, wherein the carbon layer (40) on the back side (204) limits the increase in roughness of the back side (204) during the fabrication of the electronic component.

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