Photovoltaic cell, photovoltaic cell assembly and photovoltaic cell system

Abstract

The utility model discloses a photovoltaic cell, a photovoltaic cell assembly and a photovoltaic cell system. The photovoltaic cell comprises a silicon substrate, an emitter layer, a back electric field region and an isolation part. The silicon substrate is provided with a front face and a back face which are opposite in the thickness direction of the silicon substrate, the silicon substrate is further provided with a plurality of side faces connected between the front face and the back face, the emitter layer is at least arranged on the front face, the back electric field area is arranged on the back face and extends from the back face to the side faces, and the isolation part is arranged on at least one side face. The isolation part is located between the emitter layer and the back electric field region, the back electric field region and the emitter layer are both in direct contact with the silicon substrate, and the back electric field region and the emitter layer are not overlapped in the direction perpendicular to the thickness direction. The isolation portion is arranged on at least part of the side face of the silicon substrate and located between the emitter layer and the back electric field area, in other words, the emitter layer and the back electric field area are isolated through the isolation portion, direct electric conduction of the emitter layer and the back electric field area can be avoided, and short circuit of the photovoltaic cell is avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of solar cells, in particular to a photovoltaic cell, a photovoltaic cell assembly and a photovoltaic cell system. Background Art

[0002] Photovoltaic cells usually include a silicon substrate and an emitter layer and a back electric field region respectively arranged on two opposite sides of the silicon substrate along its thickness direction. In the process of preparing photovoltaic cells, it is usually necessary to diffuse or deposit material structure layers on two opposite sides of the silicon substrate respectively to form an emitter layer and a back electric field region on two opposite sides of the silicon substrate respectively. However, when diffusing or depositing materials on one side of the silicon substrate, part of the material often bypasses to the side of the silicon substrate or even the other side opposite to the one side, which eventually causes the emitter layer of the photovoltaic cell to be directly electrically connected to the back electric field region, thereby causing a short circuit in the photovoltaic cell. Utility Model Content

[0003] One purpose of the utility model is to provide a photovoltaic cell, which can avoid direct electrical conduction between the emitter layer and the back electric field region, thereby avoiding a short circuit in the photovoltaic cell.

[0004] Another object of the present invention is to provide a photovoltaic cell assembly, which can improve the yield of the photovoltaic cell assembly by including the aforementioned photovoltaic cell that is not prone to short-circuit defects.

[0005] Another object of the present invention is to provide a photovoltaic battery system, which can reduce the failure rate of the photovoltaic battery system and improve the reliability of the photovoltaic battery system by including the above-mentioned photovoltaic battery assembly with a higher yield.

[0006] To achieve this purpose, the utility model adopts the following technical solutions:

[0007] In a first aspect, a photovoltaic cell is provided, comprising:

[0008] A silicon substrate, wherein the silicon substrate has a front surface and a back surface opposite to each other along a thickness direction thereof, and the silicon substrate further has a plurality of side surfaces connected between the front surface and the back surface;

[0009] An emitter layer, the emitter layer being at least arranged on the front side;

[0010] a back electric field region, the back electric field region is disposed on the back surface, and the back electric field region extends from the back surface to the side surface; and

[0011] An isolation portion, the isolation portion is provided on at least one of the side surfaces, and the isolation portion is located between the emitter layer and the back electric field region;

[0012] The back electric field region and the emitter layer are both in direct contact with the silicon substrate, and the back electric field region and the emitter layer have no overlap in a direction perpendicular to the thickness direction.

[0013] As a preferred technical solution of the photovoltaic cell, along the thickness direction of the silicon substrate, the back electric field region located on the side has a size S3, 0μm<S3≤60μm.

[0014] As a preferred technical solution of the photovoltaic cell, along the thickness direction of the silicon substrate, the side surface has a size S1, the isolation portion has a size L, S1-120μm≤L<S1, and / or the emitter layer partially extends to the side surface, and along the thickness direction of the silicon substrate, the portion of the side surface covered by the emitter layer has a size S2, 0μm≤S2≤60μm.

[0015] As a preferred technical solution of the photovoltaic cell, the photovoltaic cell also includes a passivation structure, which covers the outer surface of the silicon substrate, the emitter layer and the entire back electric field region, and the isolation portion includes the passivation structure located between the emitter layer and the back electric field region.

[0016] As a preferred technical solution of the photovoltaic cell, the passivation structure includes a first passivation structure and a second passivation structure, the first passivation structure covers the outer surface of the silicon substrate, the emitter layer and the entire back electric field region, the isolation portion includes the first passivation structure located between the emitter layer and the back electric field region, and the second passivation structure covers the outer surface of the first passivation structure.

[0017] As a preferred technical solution of the photovoltaic cell, the second passivation structure includes a first passivation layer and a second passivation layer, the first passivation layer at least covers the portion of the first passivation structure covering the emitter layer and the side, and the second passivation layer at least covers the first passivation structure and the first passivation layer as a whole covering the back electric field region and the side.

[0018] As a preferred technical solution of the photovoltaic cell, the photovoltaic cell also includes a first electrode and a second electrode, the first electrode at least partially penetrates the passivation structure and is electrically connected to the emitter layer, and the second electrode at least partially penetrates the passivation structure and is electrically connected to the back electric field region.

[0019] As a preferred technical solution of the photovoltaic cell, the side of the silicon substrate connected to the emitter layer is formed into a suede structure; and / or,

[0020] The back electric field region includes a tunneling oxide layer and a doped polysilicon layer, and the doped polysilicon layer is connected to a surface of the tunneling oxide layer away from the silicon substrate.

[0021] In a second aspect, a photovoltaic cell assembly is provided, comprising the photovoltaic cell as described in the first aspect.

[0022] In a third aspect, a photovoltaic cell system is provided, comprising an inverter and the photovoltaic cell assembly as described in the second aspect, wherein the inverter is electrically connected to the photovoltaic cell assembly.

[0023] The beneficial effects of the utility model are:

[0024] By setting an isolation part on at least part of the side surface of the silicon substrate and connecting the isolation part between the emitter layer and the back electric field region, in other words, isolating the emitter layer and the back electric field region by the isolation part, direct electrical conduction between the emitter layer and the back electric field region can be avoided, thereby avoiding a short circuit in the photovoltaic cell.

[0025] Among them, it can be understood that the back electric field region and the emitter layer are directly in contact with the silicon substrate, and the back electric field region and the emitter layer do not overlap in the direction perpendicular to the thickness direction. Specifically, there will be no situation in which the side of the silicon substrate is stacked with the back electric field region, the isolation part and the emitter layer in sequence in the direction perpendicular to the thickness direction, and the side of the silicon substrate is stacked with the emitter layer, the isolation part and the back electric field region in sequence. In this way, it can be avoided that the thickness of all positions of the isolation part cannot meet the design requirements due to inadequate thickness control during the preparation of the isolation part, or the back electric field region and the emitter layer can be avoided. Contact at the end of the isolation part along the thickness direction can be avoided, so as to avoid the problem that the isolation part between the back electric field region and the emitter layer cannot be effectively insulated, and thus the problem of reduced battery efficiency or even short circuit can be avoided.

[0026] In addition, when the isolation part is formed by deposition, the thicker the isolation part is, the longer the deposition time is required, resulting in a decrease in the production efficiency of the photovoltaic cell and an increase in the production cost. Therefore, by making the back electric field region and the emitter layer non-overlapping in the direction perpendicular to the thickness direction, that is, making the back electric field region and the emitter layer respectively located on two opposite sides of the isolation part along the thickness direction of the silicon substrate, the requirements for the deposition thickness of the isolation part can be reduced, that is, when the deposition thickness of the isolation part is relatively thin, the back electric field region and the emitter layer can also be effectively insulated, wherein the deposition thickness direction of the isolation part on the side is perpendicular to the thickness direction of the silicon substrate itself.

[0027] In addition, since the isolation portion is located on the side of the silicon substrate, the isolation portion does not occupy the back side of the silicon substrate. Compared with the technical solution in the prior art that sets the isolation portion in the edge area of ​​the back side (the isolation portion occupies the back area, which reduces the area of ​​the back electric field region and thus reduces the area used for power generation), the isolation portion can be prevented from affecting the setting area of ​​the back electric field region, that is, the power generation area of ​​the photovoltaic cell will not be reduced due to the setting of the isolation portion, thereby enabling the photovoltaic cell to have a higher power generation efficiency.

[0028] Furthermore, in the prior art, when forming the back electric field region, materials are usually deposited at least on the back and side of the silicon substrate, and then the deposited materials on the entire side are etched away to obtain the back electric field region on the back of the silicon substrate. However, the utility model extends part of the back electric field region to the side of the silicon substrate, and only part of the back electric field on the side need not be removed, so the amount of etchant used can be reduced, and the precision requirements for the etching process can be reduced, thereby reducing the preparation cost of photovoltaic cells and improving the production efficiency of photovoltaic cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The utility model is further described in detail below based on the drawings and embodiments.

[0030] Figure 1 A schematic cross-sectional view of the structure of the photovoltaic cell described in the embodiment.

[0031] Figure 2 It is a schematic top view of the structure of the slicing process of the photovoltaic cell described in the embodiment.

[0032] Figure 3 Another schematic cross-sectional view of the photovoltaic cell described in the embodiment.

[0033] Figure 4 for Figure 3 Enlarged schematic diagram of point M in the middle.

[0034] In the figure:

[0035] 1. Photovoltaic cell; 10. Silicon substrate; 101. Front side; 102. Back side; 103. Side side; 100. Velvet structure; 10a. Isolation part; 11. Emitter layer; 12. Back electric field region; 120. Tunneling oxide layer; 121. Doped polysilicon layer; 13. Passivation structure; 131. First passivation structure; 132. Second passivation structure; 132a. First passivation layer; 132b. Second passivation layer; 14. First electrode; 15. Second electrode;

[0036] 1a, sliced ​​photovoltaic cell; 103a, sliced ​​side;

[0037] 1a', the whole photovoltaic cell; 103a', the side of the whole cell. DETAILED DESCRIPTION

[0038] In order to make the technical problems solved by the utility model, the technical solutions adopted and the technical effects achieved clearer, the technical solutions of the embodiments of the utility model will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0039] In the description of the present invention, unless otherwise clearly specified and limited, the terms "connected", "connected", and "fixed" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0040] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0041] like Figure 1 As shown, the utility model provides a photovoltaic cell 1, comprising a silicon substrate 10, an emitter layer 11, a back electric field region 12 and an isolation portion 10a. The silicon substrate 10 has a front side 101 and a back side 102 that are opposite to each other along its thickness direction T. The silicon substrate 10 also has a plurality of side surfaces 103 connected between the front side 101 and the back side 102. The emitter layer 11 is at least provided on the front side 101, the back electric field region 12 is at least provided on the back side 102, and the back electric field region 12 extends from the back side 102 to the side surface 103 (that is, the back electric field region 12 is provided on the back side 102 and the side surface 103, and by extending the back electric field region 12 from the back side 102 to the side surface 103, the portion of the side surface 103 close to the back side 102 is provided with the back electric field region 12), the isolation portion 10a is provided on at least one side surface 103, and the isolation portion 10a is located between the emitter layer 11 and the back electric field region 12, wherein, Figure 1 The thickness direction T is shown by arrows.

[0042] It can be understood that the back electric field region 12 and the emitter layer 11 are directly in contact with the silicon substrate 10, and the back electric field region 12 and the emitter layer 11 do not overlap in the direction perpendicular to the thickness direction T. Exemplarily, the back electric field region 12 may include a tunneling oxide layer 120 and a doped polysilicon layer 121, and the doped polysilicon layer 121 is connected to the surface of the tunneling oxide layer 120 away from the silicon substrate 10. The isolation portion 10a referred to in this embodiment is located between the emitter layer 11 and the back electric field region 12, which means that the isolation portion 10a is located between the emitter layer 11 and the doped polysilicon layer 121. The back electric field region 12 and the emitter layer 11 referred to in this embodiment do not overlap in the direction perpendicular to the thickness direction T, which means that the doped polysilicon layer 121 and the emitter layer 11 do not overlap in the direction perpendicular to the thickness direction T. The back electric field region 12 and the emitter layer 11 in this embodiment are both in direct contact with the silicon substrate 10 , which means that the tunneling oxide layer 120 and the emitter layer 11 are both in direct contact with the silicon substrate 10 .

[0043] By providing an isolation portion 10a on at least one side surface 103 of the silicon substrate 10 and positioning the isolation portion 10a between the emitter layer 11 and the back electric field region 12, in other words, isolating the emitter layer 11 from the back electric field region 12 through the isolation portion 10a, direct electrical conduction between the emitter layer 11 and the back electric field region 12 can be avoided, thereby avoiding a short circuit in the photovoltaic cell 1.

[0044] In addition, since the isolation portion 10a is located on the side 103 of the silicon substrate 10, the isolation portion 10a does not occupy the setting area of ​​the silicon substrate 10 on the front side 101 or the back side 102, which can avoid the isolation portion 10a reducing the setting area of ​​the back electric field region 12 or the emitter layer 11, that is, the power generation area of ​​the photovoltaic cell 1 will not be reduced due to the setting of the isolation portion 10a, thereby enabling the photovoltaic cell 1 to have a higher power generation efficiency.

[0045] Please combine Figure 2 As shown, the photovoltaic cell 1 may include a large-sized photovoltaic cell whole piece 1a' obtained in the preparation process and a smaller-sized sliced ​​photovoltaic cell 1a product obtained by slicing, and the side of the photovoltaic cell whole piece 1a' is the whole piece side 103a', and the side of the sliced ​​photovoltaic cell 1a is the sliced ​​side 103a. It should be noted that the cut side 103a does not refer to the cut surface formed after the slicing process, but only represents the side of the sliced ​​photovoltaic cell 1a.

[0046] Optionally, the panel shape of the photovoltaic cell 1a' includes but is not limited to triangle, rectangle, pentagon, hexagon, etc. Figure 2As shown, taking the photovoltaic cell whole sheet 1a' as a rectangular plate shape as an example, the photovoltaic cell whole sheet 1a' includes four side surfaces, which are the front whole sheet side surface 103a', the rear whole sheet side surface 103a', the left whole sheet side surface 103a' and the right whole sheet side surface 103a', wherein: Figure 2 The front, rear, left and right directions are shown by coordinates in the figure, and the front and rear direction is perpendicular to the thickness direction T, and the left and right direction is also perpendicular to the thickness direction T.

[0047] Specifically, when preparing sliced ​​photovoltaic cells 1a, a large-sized photovoltaic cell whole piece 1a' is usually prepared first, and then the photovoltaic cell whole piece 1a' is sliced ​​along the thickness direction T of the silicon substrate 10 to obtain a smaller-sized sliced ​​photovoltaic cell 1a product, wherein all sides 103a' of the photovoltaic cell whole piece 1a' are provided with isolation portions 10a.

[0048] It can be understood that since the partial slice side 103a of the small-sized sliced ​​photovoltaic cell 1a is formed by slicing, that is, in the preparation process of the photovoltaic cell whole piece 1a', the partial slice side 103a of the small-sized sliced ​​photovoltaic cell 1a is located inside the photovoltaic cell whole piece 1a', and therefore the partial slice side 103a has no isolation portion 10a, and when at least one slice side 103a of the small-sized sliced ​​photovoltaic cell 1a belongs to the partial slice side 103a' of the photovoltaic cell whole piece 1a', an isolation portion 10a is provided on the at least one slice side 103a of the small-sized sliced ​​photovoltaic cell 1a.

[0049] like Figure 2 As shown, specifically, for the small-sized sliced ​​photovoltaic cell 1a on the left, since the sliced ​​side 103a on the right side thereof is formed by slicing the photovoltaic cell whole piece 1a', that is, before slicing, the sliced ​​side 103a on the right side of the small-sized sliced ​​photovoltaic cell 1a is located inside the photovoltaic cell whole piece 1a', therefore, after slicing, for the sliced ​​photovoltaic cell 1a on the left, there is no isolation portion 10a on the sliced ​​side 103a on the right side thereof, and the sliced ​​side 103a on the front side, the sliced ​​side 103a on the rear side, and the sliced ​​side 103a on the left side thereof are all provided with isolation portions 10a. Similarly, for the sliced ​​photovoltaic cell 1a on the right, the sliced ​​side 103a on the left side thereof is also formed by slicing the photovoltaic cell whole piece 1a', therefore, there is no isolation portion 10a on the sliced ​​side 103a on the left side thereof, and the sliced ​​side 103a on the front side, the sliced ​​side 103a on the rear side, and the sliced ​​side 103a on the right side are all provided with isolation portions 10a, wherein, for the convenience of observation, Figure 2 The position of the slice side surface 103a of the photovoltaic cell whole slice 1a' is shown by a thick solid line, which does not represent the actual structural shape.

[0050] It should be noted that Figure 2 The 2-slice embodiment is shown, but the whole photovoltaic cell 1a' can also be cut into 3-9 slices. The specific slicing scheme is no longer shown in the figure, but it is clear that after slicing, the multiple small-sized sliced ​​photovoltaic cells 1a are formed, some of which have isolation parts 10a on the slice side 103a (one or more slice side 103a), and of course, there are also sliced ​​photovoltaic cells 1a without isolation parts 10a on all slice side 103a. Therefore, the small-sized sliced ​​photovoltaic cells 1a in the case of 2-9 slices can be classified into one type in which at least one slice side 103a is provided with an isolation part 10a, and another type in which no isolation part 10a is provided on all slice side 103a.

[0051] Please combine Figure 1 As shown, it is understandable that Figure 1 The cross-sectional structure of the photovoltaic cell 1 shown corresponds to Figure 2 The cross-sectional structure of the sliced ​​photovoltaic cell 1a on the left is shown in Figure 2 In other words, Figure 1 FIG. 4 exemplarily shows a structure in which the left side surface 103 a of the sliced ​​photovoltaic cell 1 a is provided with the isolation portion 10 a , while the right side surface 103 a of the sliced ​​photovoltaic cell 1 a is not provided with the isolation portion 10 a .

[0052] Please combine Figure 3 As shown, Figure 3 The cross-sectional structure of the photovoltaic cell 1 shown corresponds to Figure 2 The cross-sectional structure of the photovoltaic cell 1a', or the corresponding Figure 2 The cross-sectional structure of the sliced ​​photovoltaic cell 1a on the left is shown in Figure 2 In other words, Figure 3 The figure exemplarily shows a structure in which two opposite sides 103a' of the whole photovoltaic cell 1a' are both provided with an isolation portion 10a, or a structure in which the front side 103a and the rear side 103a of the sliced ​​photovoltaic cell 1a are both provided with an isolation portion 10a.

[0053] Please combine Figure 3 and Figure 4 As shown, along the thickness direction T of the silicon substrate 10, the side surface 103 of the silicon substrate 10 has a dimension S1, and the isolation portion 10a has a dimension L. It can be understood that the closer the dimension L is to the dimension S1, the better the isolation effect of the isolation portion 10a. Therefore, the maximum dimension L of the isolation portion 10a can be close to the dimension S1.

[0054] In the actual production process of this embodiment, the deposited tunneling oxide layer 120 and the doped polysilicon layer 121 will be plated around the entire side 103 and part of the front side 101 of the silicon substrate 10, but it is necessary to subsequently use an etching process to remove all of the tunneling oxide layer 120 and part of the tunneling oxide layer 120 on the front side 101 and part of the tunneling oxide layer 120 on the side 103. In other words, part of the tunneling oxide layer 120 and the doped polysilicon layer 121 will remain on the side 103. Compared with the scheme one in the prior art of removing all of the tunneling oxide layer 120 and the doped polysilicon layer 121 on the front side 101 and the side 103, the tunneling oxide layer 120 and the doped polysilicon layer 121 on the side 103 are removed. Solution 2 of tunneling oxide layer 120 and doped polysilicon layer 121, and partially removing the tunneling oxide layer 120 and doped polysilicon layer 121 located at the edge of the back side 102. This embodiment will consume shorter working hours or less etching materials in terms of preparation, and the precision requirement for the etching process is relatively lower (because after removing all the tunneling oxide layer 120 and doped polysilicon layer 121 on the side 103, it is necessary to confirm whether all of them are indeed removed; while removing part of the tunneling oxide layer 120 and doped polysilicon layer 121 on the side 103 does not require precise control of how much to remove, and the removal amount can be a range value), so the preparation cost of the photovoltaic cell 1 is greatly reduced. Therefore, the dimension L can only make the isolation performance of the isolation part 10a meet the needs without being too large. At the same time, the smaller the dimension L is, the worse the isolation performance of the isolation part 10a is. Therefore, the dimension L cannot be too small. Based on this, optionally, the dimension S1 and the dimension L can satisfy: S1-120μm≤L<S1. For example, the dimension L can be: S1-120μm, S1-110μm, S1-100μm, S1-90μm, S1-80μm, S1-70μm, S1-60μm, S1-50μm, S1-40μm, S1-30μm, S1-20μm, S1-10μm or S1-5μm, etc.

[0055] In addition, since under normal circumstances, the size S1 of the side 103 of the silicon substrate 10 ranges from 105μm to 165μm, and when the size L is less than 30μm, the isolation performance of the isolation portion 10a cannot meet the use requirements, based on this, optionally, the size L can satisfy: 30μm≤L<165μm, for example, the size L can be: 30μm, 40μm, 50μm, 70μm, 100μm, 120μm, 140μm, 150μm, 155μm, 160μm or 164μm, etc.

[0056] In addition, the “emitter layer 11 is at least provided on the front side 101 ” mentioned above specifically means that the emitter layer 11 may be provided only on the front side 101 , or the emitter layer 11 may be provided on the front side 101 and partially extend to the side surface 103 .

[0057] As mentioned above, if the material wound around the side 103 of the silicon substrate 10 is completely removed, it will consume a long time or more etching materials, and the etching process requires extremely high precision, which will lead to an increase in the preparation cost of the photovoltaic cell 1. Therefore, the emitter layer 11 can be partially extended to the side 103 connected to the silicon substrate 10, and the back electric field region 12 can be partially extended to the side 103 connected to the silicon substrate 10, so as to reduce the preparation cost of the photovoltaic cell 1 and improve production efficiency.

[0058] At this time, along the thickness direction T of the silicon substrate 10, the side surface 103 of the portion of the silicon substrate 10 covered by the emitter layer 11 has a dimension S2. It can be understood that the closer the dimension S2 is to zero, the larger the dimension L of the isolation portion 10a, and the better the isolation effect of the isolation portion 10a. Therefore, the dimension S2 can be as small as zero.

[0059] However, in actual operation, the closer the dimension S2 is to zero, the higher the preparation cost of the photovoltaic cell 1 is; the larger the dimension S2 is, the smaller the space in which the isolation portion 10a can be set on the side 103 of the silicon substrate 10 is; and the smaller the dimension L of the isolation portion 10a is, the worse the isolation performance of the isolation portion 10a is. Therefore, the dimension S2 cannot be too large or too close to zero. Based on this, optionally, the dimension S2 of the emitter layer 11 can satisfy: 0μm<S2≤60μm. For example, the dimension S2 can be 1μm, 2μm, 5μm, 10μm, 20μm, 30μm, 40μm, 50μm or 60μm, etc.

[0060] In addition, along the thickness direction T of the silicon substrate 10, the side surface 103 of the portion of the silicon substrate 10 covered by the back electric field region 12 has a size S3. It can be understood that the closer the size S3 is to zero, the larger the size L of the isolation portion 10a is, and the better the isolation effect of the isolation portion 10a is. However, the closer the size S3 is to zero, the higher the preparation accuracy of the back electric field region 12 is, and the more etching solution is consumed in etching the excess back electric field material, resulting in a higher preparation cost of the photovoltaic cell 1. The larger the size S3 is, The smaller the space available for setting the isolation portion 10a on the side 103 of the silicon substrate 10, and the smaller the size L of the isolation portion 10a, the worse the isolation performance of the isolation portion 10a. Therefore, the size S3 cannot be too large or too close to zero. Based on this, optionally, the size S3 of the back electric field region 12 can satisfy: 0μm<S3≤60μm. For example, the size S3 can be 1μm, 2μm, 5μm, 10μm, 20μm, 30μm, 40μm, 50μm or 60μm, etc.

[0061] Preferably, the size S2 of the emitter layer 11 can satisfy: 0μm≤S2≤60μm, while the size S3 of the back electric field region 12 can satisfy: 0μm<S3≤60μm, so that the preparation cost of the photovoltaic cell 1 can be lower and the isolation performance of the isolation part 10a can be better.

[0062] Preferably, the values ​​of the dimensions S2 and S3 need to make the dimension L satisfy: 30 μm ≤ L, so that the isolation performance of the isolation portion 10 a can meet the use requirements.

[0063] like Figure 3 and Figure 4 As shown, optionally, an insulating material may be provided on at least one side surface 103 of the silicon substrate and between the emitter layer 11 and the back electric field region 12 to form the isolation portion 10 a by means of an insulating material.

[0064] Optionally, the photovoltaic cell also includes a passivation structure 13, the passivation structure 13 covers the entire outer surface of the silicon substrate 10, the emitter layer 11 and the back electric field region 12, and the isolation portion 10a includes the passivation structure 13 located between the emitter layer 11 and the back electric field region 12. Since the passivation structure 13 has insulating properties, the isolation portion 10a is formed by the passivation structure 13. On the one hand, since the passivation structure 13 is made of insulating material, the isolation portion 10a can have the function of insulating isolation. On the other hand, the setting process of the passivation structure 13 can be combined with the setting process of the isolation portion 10a, that is, there is no need to additionally set up the isolation portion 10a made of insulating material, which can simplify the preparation process of the photovoltaic cell 1, reduce the production cost of the photovoltaic cell 1 and improve the production efficiency.

[0065] Optionally, the passivation structure 13 includes a first passivation structure 131 and a second passivation structure 132, the first passivation structure 131 covers the entire outer surface of the silicon substrate 10, the emitter layer 11 and the back electric field region 12, the isolation portion 10a includes the first passivation structure 131 located between the emitter layer 11 and the back electric field region 12, and the second passivation structure 132 covers the outer surface of the first passivation structure 131, so that the stacked structure formed by the first passivation structure 131 and the second passivation structure 132 can jointly cover the entire outer surface of the emitter layer 11, the silicon substrate 10 and the back electric field region 12 to prevent the photovoltaic cell 1 from leaking electricity to an adjacent external conductor, and the isolation portion 10a is formed while the first passivation structure 131 is set, which can simplify the preparation process of the photovoltaic cell 1.

[0066] Optionally, part of the second passivation structure 132 may also be located in the spacing space 10a. In this case, the isolation portion 10a also includes the second passivation structure 132 located in the spacing space 10a. In other words, the first passivation structure 131 and the second passivation structure 132 located in the spacing space 10a together constitute the isolation portion 10a.

[0067] Optionally, the first passivation structure 131 and the second passivation structure 132 may be made of different materials, so that the passivation properties of various passivation materials of the first passivation structure 131 and the second passivation structure 132 can be combined to improve the overall passivation effect of the passivation structure 13. For example, the first passivation structure 131 may be made of aluminum oxide, and the second passivation structure 132 may be made of silicon nitride.

[0068] Optionally, the second passivation structure 132 may include a first passivation layer 132a and a second passivation layer 132b, the first passivation layer 132a at least covers the portion of the first passivation structure 131 covering the emitter layer 11 and the side 103, and the second passivation layer 132b at least covers the portion of the first passivation structure 131 and the first passivation layer 132a that covers the back electric field region 12 and the side 103 as a whole, thereby enabling the second passivation structure 132 to cover the surface of the first passivation structure 131.

[0069] Optionally, the first passivation layer 132a and the second passivation layer 132b may be made of the same material, so that the connection stability between the first passivation layer 132a and the second passivation layer 132b is better. For example, the first passivation layer 132a and the second passivation layer 132 may both be made of silicon nitride.

[0070] Optionally, the photovoltaic cell 1 also includes a first electrode 14 and a second electrode 15, the first electrode 14 is at least partially disposed through the passivation structure 13 and is electrically connected to the emitter layer 11, and the second electrode 15 is at least partially disposed through the passivation structure 13 and is electrically connected to the back electric field region 12, so that the emitter layer 11 and the back electric field region 12 can be connected to an external circuit through the first electrode 14 and the second electrode 15.

[0071] Optionally, the side of the silicon substrate 10 connected to the emitter layer 11 is formed into a velvet structure 100 , thereby providing a larger installation area for the emitter layer 11 and increasing the light receiving area of ​​the emitter layer 11 to improve the power generation efficiency of the photovoltaic cell 1 .

[0072] Optionally, boron diffusion or phosphorus diffusion may be performed on one side of the silicon substrate 10 in the thickness direction T to form the emitter layer 11 , and the emitter layer 11 and the silicon substrate 10 may form a pn junction.

[0073] Optionally, the back electric field region 12 includes at least a tunneling oxide layer 120 and a doped polysilicon layer 121, and the doped polysilicon layer 121 is connected to the surface of the tunneling oxide layer 120 that is away from the silicon substrate 10, so that the doped polysilicon layer 121 can be avoided from directly contacting the silicon substrate 10 through the tunneling oxide layer 120, so that the surface defects of the silicon substrate 10 can be passivated through the tunneling oxide layer 120 to maintain a low tunneling resistance, thereby increasing the open circuit voltage of the photovoltaic cell 1 and reducing the electrical loss of the photovoltaic cell 1.

[0074] For example, the doped polysilicon layer 121 may include a phosphorus-doped layer.

[0075] like Figure 3 As shown, the utility model also provides a photovoltaic cell assembly, including the photovoltaic cell 1 as described in the above technical solution. Since the above photovoltaic cell 1 is not prone to short circuit defects, the yield of the photovoltaic cell assembly can be improved by making the photovoltaic cell assembly include the above photovoltaic cell 1.

[0076] The utility model also provides a photovoltaic battery system, including an inverter and the photovoltaic battery assembly as described in the above technical solution, the inverter is electrically connected to the photovoltaic battery assembly, and the inverter is used to convert the direct current emitted by the photovoltaic battery assembly into alternating current used by household appliances, so as to output it to users. By making the photovoltaic battery system include the above-mentioned photovoltaic battery assembly with a higher yield, the failure rate of the photovoltaic battery system can be reduced and the reliability of the photovoltaic battery system can be improved.

[0077] In the description of this article, it should be understood that the terms "upper", "lower", "left", "right", etc., directions or positional relationships are based on the directions or positional relationships shown in the drawings, and are only for the convenience of description and simplified operation, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation of the present invention. In addition, the terms "first" and "second" are only used to distinguish in the description and have no special meaning.

[0078] In the description of this specification, the description with reference to the terms "an embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0079] In addition, it should be understood that although this specification is described according to implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

[0080] The technical principle of the present invention is described above in combination with specific embodiments. These descriptions are only for explaining the principle of the present invention and cannot be interpreted as limiting the protection scope of the present invention in any way. Based on the explanations here, technicians in this field can think of other specific implementation methods of the present invention without creative work, and these methods will fall within the protection scope of the present invention.

Claims

1. A photovoltaic cell, characterized in that: include: A silicon substrate, wherein the silicon substrate has a front surface and a back surface opposite to each other along a thickness direction thereof, and the silicon substrate further has a plurality of side surfaces connected between the front surface and the back surface; An emitter layer, the emitter layer being at least arranged on the front side; a back electric field region, the back electric field region is disposed on the back surface, and the back electric field region extends from the back surface to the side surface; and An isolation portion, the isolation portion is provided on at least one of the side surfaces, and the isolation portion is located between the emitter layer and the back electric field region; The back electric field region and the emitter layer are both in direct contact with the silicon substrate, and the back electric field region and the emitter layer have no overlap in a direction perpendicular to the thickness direction.

2. The photovoltaic cell according to claim 1, characterized in that: Along the thickness direction of the silicon substrate, the back electric field region located at the side has a size S3, 0 μm<S3≤60 μm.

3. The photovoltaic cell according to claim 2, characterized in that: Along the thickness direction of the silicon substrate, the side surface has a dimension S1, the isolation portion has a dimension L, S1-120μm≤L<S1, and / or the emitter layer partially extends to the side surface, and along the thickness direction of the silicon substrate, the portion of the side surface covered by the emitter layer has a dimension S2, 0μm≤S2≤60μm.

4. The photovoltaic cell according to any one of claims 1 to 3, characterized in that: The photovoltaic cell further includes a passivation structure, which covers the outer surface of the silicon substrate, the emitter layer and the entire back electric field region, and the isolation portion includes the passivation structure located between the emitter layer and the back electric field region.

5. The photovoltaic cell according to claim 4, characterized in that: The passivation structure includes a first passivation structure and a second passivation structure, the first passivation structure covers the outer surface of the silicon substrate, the emitter layer and the entire back electric field region, the isolation portion includes the first passivation structure located between the emitter layer and the back electric field region, and the second passivation structure covers the outer surface of the first passivation structure.

6. The photovoltaic cell according to claim 5, characterized in that: The second passivation structure includes a first passivation layer and a second passivation layer, the first passivation layer at least covers the portion of the first passivation structure covering the emitter layer and the side, and the second passivation layer at least covers the first passivation structure and the first passivation layer as a whole covering the back electric field region and the side.

7. The photovoltaic cell according to claim 4, characterized in that: The photovoltaic cell further includes a first electrode and a second electrode. The first electrode is at least partially disposed through the passivation structure and is electrically connected to the emitter layer. The second electrode is at least partially disposed through the passivation structure and is electrically connected to the back electric field region.

8. The photovoltaic cell according to any one of claims 1 to 3, characterized in that: The side of the silicon substrate connected to the emitter layer is formed into a velvet structure; and / or, The back electric field region includes a tunneling oxide layer and a doped polysilicon layer, and the doped polysilicon layer is connected to a surface of the tunneling oxide layer away from the silicon substrate.

9. A photovoltaic cell assembly, characterized in that: Comprising the photovoltaic cell according to any one of claims 1 to 8.

10. A photovoltaic cell system, characterized in that: It comprises an inverter and the photovoltaic cell assembly as claimed in claim 9, wherein the inverter is electrically connected to the photovoltaic cell assembly.

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