Solar cell, TOPCon cell, photovoltaic module and laminated cell

By forming the suede of the micro-pyramid structure on the front of the silicon substrate of the solar cell, and secondary etching to form the suede of the spiral round pyramid structure on its edge, the problem of low conversion efficiency caused by high recombination is solved, and the effect of improving the opening voltage, current and conversion efficiency is achieved.

CN222897501UActive Publication Date: 2025-05-23ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD +4
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Patent Information

Application Number
CN202421740101.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-07-22
Publication Date
2025-05-23
Estimated Expiration
2034-07-22

AI Technical Summary

Technical Problem

Existing solar cells affect the conversion efficiency due to high recombination of the front surface.

Method used

The doping concentration and surface recombination are reduced by secondary etching of the second suede of the spiral round pyramid structure by providing the first suede of the micro pyramid structure on the front of the silicon substrate and secondary etching in a preset range area on its edge.

Benefits of technology

It improves the opening voltage and current of solar cells and improves the photoelectric conversion efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model is suitable for the technical field of solar power generation, and provides a solar cell sheet, a TOPCon cell, a photovoltaic assembly and a laminated cell, the solar cell sheet comprises a silicon substrate, the silicon substrate is provided with a front surface and a back surface which are opposite to each other, the front surface of the silicon substrate is provided with a first suede, and a second suede is arranged in a preset range of the edge of the front surface of the silicon substrate. The first suede is provided with a micro pyramid structure, and the second suede is provided with a pyramid structure with a round spire. Through the arrangement, the first suede with the miniature pyramid structure is formed on the front surface of the silicon substrate, and the second suede with the pyramid structure with the rounded spire is formed by secondary etching on the basis of the first suede, so that the doping concentration of the front surface of the silicon substrate is reduced, and the surface recombination of the front surface of the silicon substrate is reduced, thereby improving the open voltage and the current; the conversion efficiency is improved.
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Description

Technical Field

[0001] The utility model belongs to the technical field of solar power generation, and in particular relates to a solar cell, a TOPCon cell, a photovoltaic assembly and a laminated cell. Background Art

[0002] A solar cell is a photoelectric semiconductor wafer that uses sunlight to generate electricity directly. It is also called a "solar chip" or "photovoltaic cell". As long as it is illuminated by light that meets certain illumination conditions, it can instantly output voltage and generate current in the presence of a circuit.

[0003] In the production of solar cells, the performance and photoelectric conversion rate of silicon wafer solar cells are closely related to the surface structure of the solar cell. Therefore, in the manufacturing process, chemical etching and texturing of silicon wafers is an important process, which aims to reduce the surface reflectivity of silicon wafers, increase light absorption, and increase the density of photogenerated carriers, thereby improving the photoelectric conversion rate of solar cells. However, the front surface doping concentration of existing solar cells is relatively high, resulting in high recombination on the front surface, which affects the conversion efficiency of solar cells. Utility Model Content

[0004] The embodiment of the utility model provides a solar cell, aiming to solve the problem that the conversion efficiency of the solar cell is affected by the high recombination height on the front surface of the existing solar cell.

[0005] The embodiment of the utility model is implemented as follows: a solar cell comprises a silicon substrate having a front side and a back side opposite to each other, a first velvet surface is arranged on the front side of the silicon substrate, a second velvet surface is arranged in a preset range area of ​​the front edge of the silicon substrate, the first velvet surface has a micro-pyramid structure, and the second velvet surface has a pyramid structure with a rounded spire.

[0006] Furthermore, the preset range area is an area that is less than or equal to 20 mm away from the edge of the silicon substrate.

[0007] Furthermore, the preset range area is an area whose distance from the edge of the silicon substrate is less than or equal to 5 mm.

[0008] Furthermore, the silicon substrate includes any one of a P-type silicon wafer and an N-type silicon wafer.

[0009] In a second aspect, the present application also provides a TOPCon cell, comprising the solar cell sheet as described above.

[0010] Furthermore, the TOPCon cell includes an emitter layer, a silicon substrate, a diffused doped layer, a silicon oxide layer, a doped polysilicon layer, a front electrode and a back electrode. The emitter layer is arranged on the front side of the silicon substrate, the front electrode is connected to the emitter layer, the diffused doped layer, the silicon oxide layer and the doped polysilicon layer are arranged in sequence on the back side of the silicon substrate in a direction away from the silicon substrate, and the back electrode is connected to the doped polysilicon layer.

[0011] Furthermore, the silicon oxide layer and the doped polysilicon layer are disposed in a local area on the back side of the silicon substrate.

[0012] Furthermore, a front passivation film is provided on a side of the emitter layer away from the silicon substrate, and a back passivation film is provided on a side of the doped polysilicon layer away from the silicon substrate.

[0013] Further, the front passivation film and the back passivation film include at least one of silicon nitride, aluminum oxide, silicon oxynitride and silicon oxide.

[0014] In a third aspect, the present application also provides a photovoltaic module, comprising the TOPCon cell as described above.

[0015] In a fourth aspect, the present application also provides a stacked cell, including a perovskite cell and a TOPCon cell as described above.

[0016] The beneficial effect of the present application is that the solar cell of the present application includes a silicon substrate, the silicon substrate has a relative front and back, the front of the silicon substrate is provided with a first velvet surface, the preset range area of ​​the front edge of the silicon substrate is provided with a second velvet surface, the first velvet surface has a micro-pyramid structure, and the second velvet surface has a pyramid structure with a rounded spire. Through the above arrangement, a first velvet surface with a micro-pyramid structure is formed on the front of the silicon substrate, and a second velvet surface with a rounded spire pyramid structure is formed by secondary etching on the basis of the first velvet surface, thereby reducing the doping concentration on the front of the silicon substrate and reducing the surface recombination on the front of the silicon substrate, thereby increasing the opening voltage and current, and improving the conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural schematic diagram of an embodiment of a solar cell provided by the present application;

[0018] Figure 2 This is a schematic structural diagram of a first velvet surface of an embodiment of a solar cell provided in the present application;

[0019] Figure 3 This is a schematic structural diagram of a second velvet surface of an embodiment of a solar cell provided in the present application;

[0020] Figure 4 It is a schematic structural diagram of an embodiment of a TOPCon battery provided in this application. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, in which the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the utility model, and cannot be understood as limiting the utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the utility model and are not used to limit the utility model.

[0022] In the description of the present invention, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the present invention.

[0023] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0024] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0025] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0026] The disclosure below provides many different embodiments or examples for realizing different structures of the utility model. In order to simplify the disclosure of the utility model, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the utility model. In addition, the utility model can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the utility model provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0027] The solar cell of the present application includes a silicon substrate, the silicon substrate has a relative front and back, the front of the silicon substrate is provided with a first velvet surface, the preset range area of ​​the front edge of the silicon substrate is provided with a second velvet surface, the first velvet surface has a micro-pyramid structure, and the second velvet surface has a pyramid structure with a rounded spire. Through the above arrangement, a first velvet surface with a micro-pyramid structure is formed on the front of the silicon substrate, and a second velvet surface with a rounded spire pyramid structure is formed by secondary etching on the basis of the first velvet surface, thereby reducing the doping concentration on the front of the silicon substrate and reducing the surface recombination on the front of the silicon substrate, thereby increasing the opening voltage and current, and improving the conversion efficiency.

[0028] Embodiment 1

[0029] like Figures 1 to 4 As shown, an embodiment of the present application provides a solar cell, including a silicon substrate 100, the silicon substrate 100 having a relative front side 110 and a back side 120, the front side 110 of the silicon substrate 100 is provided with a first velvet surface 200, a preset range area of ​​the edge of the front side 110 of the silicon substrate 100 is provided with a second velvet surface 300, the first velvet surface 200 has a micro pyramid structure 210, and the second velvet surface 300 has a pyramid structure 310 with a rounded top.

[0030] During implementation, the silicon substrate 100 is a silicon wafer, and the silicon substrate 100 can be a P-type silicon wafer or an N-type silicon wafer, without limitation.

[0031] In practice, there is no essential difference in the power generation principle of solar cells using P-type silicon wafers or N-type silicon wafers, both of which are based on PN junctions to separate photogenerated carriers.

[0032] Optionally, by doping a semiconductor with donor impurities (e.g., pentavalent elements such as phosphorus) to obtain an N-type semiconductor material; by doping a semiconductor with acceptor impurities (e.g., trivalent elements such as boron) to obtain a P-type semiconductor material.

[0033] A solar cell formed by diffusing pentavalent elements, such as phosphorus, on a P-type semiconductor material to form an n+ / p-type structure is a P-type cell; a solar cell formed by injecting trivalent elements, such as boron, into an N-type semiconductor material to form a p+ / n-type structure is an N-type cell.

[0034] The silicon substrate 100 is in the form of a sheet or a plate, and has a front side 110 and a back side 120 opposite to each other. Usually, the front side 110 of the silicon substrate 100 can be regarded as the light-receiving side of the solar cell, and similarly, the back side 120 of the silicon substrate 100 can be regarded as the backlight side of the solar cell.

[0035] The front side 110 of the silicon substrate 100 has a first velvet surface 200, which is obtained by chemical etching. The principle is to use the anisotropy or isotropy of silicon crystals to make the silicon wafers (silicon substrate 100) with different crystal planes or directions have different etching speeds in the chemical solution, thereby forming velvet structures of different shapes and sizes on the surface of the silicon wafer, which are micro-pyramid structures 210, such as Figure 2 shown.

[0036] When implemented, the velvet structure can increase the roughness of the silicon wafer surface, reduce light reflection, increase light absorption, change the incident angle and propagation path of light, form light traps, and increase the density of photogenerated carriers, thereby improving the photoelectric conversion rate of the battery.

[0037] Chemical etching and texturing of the silicon substrate 100 can be performed by alkali texturing and acid texturing. Alkali texturing is to use an alkaline solution, such as sodium hydroxide, potassium hydroxide or tetramethylammonium hydroxide, to anisotropically etch the silicon wafer, which is mainly applicable to single-crystal silicon wafers. Acid texturing is to use an acidic solution, such as acetic acid solution or aqueous solution of nitric acid and hydrofluoric acid, to isotropically etch the silicon wafer, which is mainly applicable to polycrystalline silicon wafers.

[0038] In some possible embodiments, a first velvet surface 200 may also be provided on the back surface 120 of the silicon substrate 100 , which can further improve the photoelectric conversion efficiency of the solar cell, and will not be elaborated herein.

[0039] After the first velvet surface 200 is prepared on the front surface 110 of the silicon substrate 100, a second velvet surface 300 can be further prepared in a preset range area at the edge of the front surface 110 of the silicon substrate 100, that is, the first velvet surface 200 located in the preset range area at the edge of the front surface 110 of the silicon substrate 100 is etched twice to form the second velvet surface 300, so that the top of the micro-pyramid structure 210 in the preset range area at the edge of the front surface 110 is etched away to obtain a pyramid structure 310 with a rounded top, as shown in FIG. Figure 3 shown.

[0040] Optionally, the preset range area is an area less than or equal to 20 mm from the edge of the silicon substrate 100, such as 10 mm, 12 mm, 15 mm or 18 mm, etc., without limitation. Further, the preset range area is an area less than or equal to 5 mm from the edge of the silicon substrate, such as 1 mm, 2 mm, 3 mm or 4 mm, etc., without limitation.

[0041] During implementation, the side of the silicon substrate 100 (the side is located between the front side 110 and the back side 120 of the silicon substrate 100) can be immersed in the etching solution, so that the edge portion of the silicon substrate 100 is also immersed in the etching solution (such as the above-mentioned alkaline solution or acidic solution) to etch away the top of the pyramid.

[0042] In some possible embodiments, if only the second velvet surface 300 needs to be prepared on the front side 110 of the silicon substrate 100, before the secondary etching, the side and back sides 120 of the silicon substrate 100 can be covered with a layer of water film to protect the side and back sides 120 of the silicon substrate 100 and avoid the secondary etching from affecting the side and back sides 120 of the silicon substrate 100.

[0043] The solar cell of the present application includes a silicon substrate 100, the silicon substrate 100 has a relative front side 110 and a back side 120, the front side 110 of the silicon substrate 100 is provided with a first velvet surface 200, the preset range area of ​​the edge of the front side 110 of the silicon substrate 100 is provided with a second velvet surface 300, the first velvet surface 200 has a micro-pyramid structure 210, and the second velvet surface 300 has a pyramid structure with a rounded top 310. Through the above arrangement, the first velvet surface 200 with a micro-pyramid structure 210 is formed on the front side 110 of the silicon substrate 100, and the second velvet surface 300 with a pyramid structure with a rounded top 310 is formed by secondary etching on the basis of the first velvet surface 200, so as to reduce the doping concentration of the front side 110 of the silicon substrate 100 and reduce the surface recombination of the front side 110 of the silicon substrate 100, thereby increasing the opening voltage and the current, and improving the conversion efficiency.

[0044] Embodiment 2

[0045] In some optional embodiments, the present application further provides a TOPCon cell, including the solar cell as described above, wherein TOPCon is the abbreviation of Tunnel Oxide Passivated Contact, that is, an oxide layer passivated contact cell.

[0046] Optionally, the TOPCon cell provided in the present application refers to a single-sided TOPCon cell, that is, a passivation contact structure consisting of a layer of ultra-thin silicon oxide (1nm to 2nm) and a layer of doped polysilicon film is arranged on the back side 120 of the cell.

[0047] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the TOPCon battery described above can refer to the corresponding structure and implementation principle in the aforementioned embodiment 1, and will not be repeated here.

[0048] The solar cell of the present application includes a silicon substrate 100, the silicon substrate 100 has a relative front side 110 and a back side 120, the front side 110 of the silicon substrate 100 is provided with a first velvet surface 200, the preset range area of ​​the edge of the front side 110 of the silicon substrate 100 is provided with a second velvet surface 300, the first velvet surface 200 has a micro-pyramid structure 210, and the second velvet surface 300 has a pyramid structure with a rounded top 310. Through the above arrangement, the first velvet surface 200 with a micro-pyramid structure 210 is formed on the front side 110 of the silicon substrate 100, and the second velvet surface 300 with a pyramid structure with a rounded top 310 is formed by secondary etching on the basis of the first velvet surface 200, so as to reduce the doping concentration of the front side 110 of the silicon substrate 100 and reduce the surface recombination of the front side 110 of the silicon substrate 100, thereby increasing the opening voltage and the current, and improving the conversion efficiency.

[0049] In some optional embodiments, the TOPCon cell provided in the present application includes an emitter layer 400, a silicon substrate 100, a diffuse doping layer 500, a silicon oxide layer 600, a doped polysilicon layer 700, a front electrode 810 and a back electrode 820, the emitter layer 400 is arranged on the front side 110 of the silicon substrate 100, the front electrode 810 is connected to the emitter layer 400, the diffuse doping layer 500, the silicon oxide layer 600 and the doped polysilicon layer 700 are sequentially arranged on the back side 120 of the silicon substrate 100 in a direction from the silicon substrate 100 to away from the silicon substrate 100, and the back electrode 820 is connected to the doped polysilicon layer 700.

[0050] In implementation, the solar cell provided in the first embodiment can be regarded as a silicon substrate of a TOPCon cell, wherein the front side 110 of the silicon substrate 100 corresponds to the front side of the TOPCon cell, and the back side 120 of the silicon substrate 100 corresponds to the back side of the TOPCon cell.

[0051] The front side 110 of the solar cell is provided with an emitter layer 400, and the back side 120 of the solar cell is provided with a diffuse doping layer 500. The emitter layer 400 and the diffuse doping layer 500 refer to doping layers formed by further doping on the basis of the silicon substrate 100. For example, taking the silicon substrate 100 as an N-type silicon wafer as an example, the front side 110 of the silicon substrate 100 can be doped with boron to form the emitter layer 400, in which case the emitter layer 400 can be regarded as a p+ layer, and the back side 120 of the silicon substrate is doped with phosphorus to obtain the diffuse doping layer 500. The diffuse doping layer 500 can be formed by diffusion alone or by diffusion of the doped polysilicon layer 700 into the silicon substrate 100, which is not limited here.

[0052] By providing a passivation contact structure on the back side 120 of the battery, it is possible to block the recombination of minority carriers and holes, thereby increasing the open circuit voltage and short circuit current of the battery. The ultra-thin silicon oxide layer 600 allows the majority electrons to tunnel into the doped polysilicon layer 700 while blocking the recombination of minority carriers and holes. The good passivation effect of the ultra-thin silicon oxide layer 600 and the doped polysilicon layer 700 causes the energy band on the surface of the silicon wafer to bend, thereby forming a field passivation effect, greatly increasing the probability of electron tunneling, reducing the contact resistance, and increasing the open circuit voltage and short circuit current of the battery, thereby improving the battery conversion efficiency.

[0053] In some possible embodiments, the diffusion doping layer 500 is disposed in a local area of ​​the back side 120 of the silicon substrate 100 , that is, the diffusion doping layer 500 and the solar cell are in local contact, thereby reducing surface recombination in non-contact areas.

[0054] In some possible embodiments, the silicon oxide layer 600 and the doped polysilicon layer 700 are disposed in a local area on the back side of the silicon substrate 100 , that is, the silicon oxide layer 600 and the silicon substrate 100 are in local contact, which can effectively reduce contact recombination.

[0055] In some possible embodiments, a front passivation film 210 is disposed on a side of the emitter layer 400 away from the silicon substrate 100 , and a back passivation film 310 is disposed on a side of the doped polysilicon layer 700 away from the silicon substrate 100 .

[0056] The front passivation film 210 and the back passivation film 310 are both passivation anti-reflection films, which are used to improve the photoelectric conversion efficiency and stability of solar cells, reduce surface damage and oxidation reactions of solar cells, and extend the service life of solar cells.

[0057] During implementation, the front electrode 810 passes through the front passivation film 210 and is connected to the emitter layer 400 , and the back electrode 820 passes through the back passivation film 310 and is connected to the doped polysilicon layer 700 .

[0058] In some embodiments, the back electrode 820 is connected to the doped polysilicon layer 700 and may be in contact with the surface of the doped polysilicon layer 700. In other optional embodiments, the back electrode 820 is formed by pouring molten metal slurry on the doped polysilicon layer 700 and then cooling it, and some metal crystals of the metal slurry penetrate into the doped polysilicon layer 700, that is, the metal electrode contacts the doped polysilicon layer 700 and some metal crystals are formed in the doped polysilicon layer 700. Through the above configuration, the metal crystals can help carriers move to the metal electrode more easily, thereby improving the efficiency of the solar cell.

[0059] Optionally, the front passivation film 210 and the back passivation film 310 include at least one of silicon nitride, aluminum oxide, silicon oxynitride and silicon oxide, without limitation. Preferably, the front passivation film 210 and / or the back passivation film 310 can be made of aluminum oxide to ensure light absorption rate.

[0060] Embodiment 3

[0061] In some optional embodiments, the present application provides a photovoltaic module, comprising the TOPCon cell as described above.

[0062] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the photovoltaic assembly described above can refer to the corresponding structure and implementation principle in the aforementioned embodiments one and two, and will not be repeated here.

[0063] The solar cell of the present application includes a silicon substrate 100, the silicon substrate 100 has a relative front side 110 and a back side 120, the front side 110 of the silicon substrate 100 is provided with a first velvet surface 200, the preset range area of ​​the edge of the front side 110 of the silicon substrate 100 is provided with a second velvet surface 300, the first velvet surface 200 has a micro-pyramid structure 210, and the second velvet surface 300 has a pyramid structure with a rounded top 310. Through the above arrangement, the first velvet surface 200 with a micro-pyramid structure 210 is formed on the front side 110 of the silicon substrate 100, and the second velvet surface 300 with a pyramid structure with a rounded top 310 is formed by secondary etching on the basis of the first velvet surface 200, so as to reduce the doping concentration of the front side 110 of the silicon substrate 100 and reduce the surface recombination of the front side 110 of the silicon substrate 100, thereby increasing the opening voltage and the current, and improving the conversion efficiency.

[0064] Embodiment 4

[0065] In a fourth aspect, the present application also provides a stacked cell, including a perovskite cell and a TOPCon cell as described above.

[0066] In practice, perovskite cells, i.e., perovskite solar cells, are solar cells that use perovskite-type organic metal halide semiconductors as light-absorbing materials. The tandem cells provided in this application are perovskite-silicon-based tandem solar cells. Perovskite-silicon-based tandem cells utilize the wide bandgap structural characteristics of perovskite cell materials, and place perovskite cell materials above silicon-based cells, which can absorb high-energy photons in the short-wave band that are difficult for silicon-based cells to absorb, thereby making greater use of solar incident light, thereby improving the conversion efficiency of photovoltaic cells, and having a higher theoretical efficiency limit, which will not be elaborated on.

[0067] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the structure and implementation principle of the laminated battery described above can refer to the corresponding structure and implementation principle in the aforementioned embodiments one to three, and will not be repeated here.

[0068] The solar cell of the present application includes a silicon substrate 100, the silicon substrate 100 has a relative front side 110 and a back side 120, the front side 110 of the silicon substrate 100 is provided with a first velvet surface 200, the preset range area of ​​the edge of the front side 110 of the silicon substrate 100 is provided with a second velvet surface 300, the first velvet surface 200 has a micro-pyramid structure 210, and the second velvet surface 300 has a pyramid structure with a rounded top 310. Through the above arrangement, the first velvet surface 200 with a micro-pyramid structure 210 is formed on the front side 110 of the silicon substrate 100, and the second velvet surface 300 with a pyramid structure with a rounded top 310 is formed by secondary etching on the basis of the first velvet surface 200, so as to reduce the doping concentration of the front side 110 of the silicon substrate 100 and reduce the surface recombination of the front side 110 of the silicon substrate 100, thereby increasing the opening voltage and the current, and improving the conversion efficiency.

[0069] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A solar cell, characterized in that: It includes a silicon substrate having a relative front and back side, a first velvet surface is arranged on the front side of the silicon substrate, a second velvet surface is arranged in a preset range area of ​​the front edge of the silicon substrate, the first velvet surface has a micro-pyramid structure, and the second velvet surface has a pyramid structure with a rounded top.

2. The solar cell according to claim 1, wherein: The preset range area is an area less than or equal to 20 mm away from the edge of the silicon substrate.

3. The solar cell according to claim 2, wherein: The preset range area is an area less than or equal to 5 mm away from the edge of the silicon substrate.

4. The solar cell according to claim 1, wherein: The silicon substrate includes any one of a P-type silicon wafer and an N-type silicon wafer.

5. A TOPCon battery, characterized in that: The invention comprises the solar cell according to any one of claims 1 to 4.

6. The TOPCon battery according to claim 5, characterized in that The TOPCon cell includes an emitter layer, a silicon substrate, a diffused doped layer, a silicon oxide layer, a doped polysilicon layer, a front electrode and a back electrode. The emitter layer is arranged on the front side of the silicon substrate, the front electrode is connected to the emitter layer, the diffused doped layer, the silicon oxide layer and the doped polysilicon layer are arranged in sequence on the back side of the silicon substrate in a direction away from the silicon substrate, and the back electrode is connected to the doped polysilicon layer.

7. The TOPCon battery according to claim 6, characterized in that The silicon oxide layer and the doped polysilicon layer are disposed in a local area of ​​the back side of the silicon substrate.

8. The TOPCon battery according to claim 6, characterized in that A front passivation film is disposed on a side of the emitter layer away from the silicon substrate, and a back passivation film is disposed on a side of the doped polysilicon layer away from the silicon substrate.

9. The TOPCon battery according to claim 8, characterized in that The front passivation film and the back passivation film include at least one of silicon nitride, aluminum oxide, silicon oxynitride, and silicon oxide.

10. A photovoltaic module, characterized in that: Comprising a TOPCon battery as claimed in any one of claims 5 to 9.

11. A laminated battery, characterized in that: It comprises a perovskite cell and a TOPCon cell as claimed in any one of claims 5 to 9.

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