Glass-free wafer level optical sensor package and system for producing glass-free wafer level optical sensor package

Abstract

The utility model relates to a glass-free wafer level optical sensor package and a system for producing a glass-free wafer level optical sensor package. A glass-free wafer level optical sensor semiconductor package is provided. An example method of manufacturing a glass-free wafer level optical sensor package includes forming one or more dams on a wafer that at least partially surround one or more optical sensors; supporting the wafer on a carrier substrate via the one or more dams; a wafer level optical sensor integrated circuit for each of the one or more optical sensors is formed on a wafer by performing a through silicon via process on the wafer; forming an isolation layer on the wafer; and performing a passivation operation on the wafer; removing the wafer from the carrier substrate; and singulating each wafer level optical sensor integrated circuit.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 507,345, filed on June 9, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] Example embodiments of the present disclosure relate generally to optical sensor packaging, and more particularly, to apparatus and methods for protecting optical sensors in glass-free wafer-level packaging. Background Art

[0004] As new technologies requiring semiconductors are developed, the demand for semiconductors continues to increase. Furthermore, as electronic devices are developed, smaller and thinner form factors have become increasingly desirable and achievable. Semiconductor packages used in electronic devices continue to shrink in size and are being placed closer together. These semiconductor packages, along with other components of electronic devices, have dimensions determined by features other than the underlying semiconductor chip.

[0005] As technology enables semiconductor chips to become smaller in all dimensions, the limiting factor in semiconductor packaging is no longer the chip itself, but rather the components attached to the chip that form the semiconductor package. New systems, devices, and methods for semiconductor packaging are needed. The inventors have identified many areas for improvement in existing technologies and techniques that are the subject of the embodiments described herein. Through dedicated effort, ingenuity, and innovation, many of these deficiencies, challenges, and problems have been addressed by developing solutions included in the embodiments of the present disclosure, some examples of which are described in detail herein. Summary of the Invention

[0006] Various embodiments described herein relate to semiconductor packaging, and more particularly, to glass-free wafer-level optical sensor packaging in a manner that protects the sensor.

[0007] According to some embodiments of the present disclosure, example methods are provided. Embodiments provided herein include a method of manufacturing a glass-free wafer-level optical sensor package, the method comprising: forming one or more dams on a wafer that at least partially surround one or more optical sensors; supporting the wafer on a carrier substrate via the one or more dams; forming a wafer-level optical sensor integrated circuit for each of the one or more optical sensors on the wafer by: performing a through-silicon via process on the wafer; forming an isolation layer on the wafer; and performing a passivation operation on the wafer; removing the wafer from the carrier substrate; and singulating each wafer-level optical sensor integrated circuit.

[0008] According to some embodiments, forming one or more dams on the wafer that at least partially surround the one or more optical sensors includes forming the one or more dams using at least one of patterned photolithography, polymer deposition, or photo-masked epoxy. According to certain embodiments, forming the one or more dams using at least one of patterned photolithography, polymer deposition, or photo-masked epoxy includes forming the one or more dams to a height between 30 microns and 60 microns above the surface of the wafer. The carrier substrate of an example embodiment includes a glass carrier substrate, wherein the glass carrier substrate is configured to enable testing of the one or more optical sensors using light received at the one or more optical sensors that passes through the glass carrier substrate.

[0009] According to some embodiments, forming the wafer-level optical sensor integrated circuits further comprises forming at least one redistribution layer on the wafer. In some embodiments, forming the wafer-level optical sensor integrated circuits from the wafer comprises performing a silicon thinning operation on the wafer before performing a through-silicon via process on the wafer. According to certain embodiments, forming the wafer-level optical sensor integrated circuits from the wafer further comprises attaching one or more solder balls to one or more signal pads of the wafer-level optical sensor integrated circuits. According to some embodiments, singulating each wafer-level optical sensor integrated circuit comprises separating the first wafer-level optical sensor integrated circuit from the second wafer-level optical sensor integrated circuit using at least one of a mechanical saw, a laser, or die sawing.

[0010] Embodiments provided herein include a glass-free wafer-level optical sensor package comprising: a silicon wafer; an optical sensor disposed on the silicon wafer; a dam supported on the silicon wafer and at least partially surrounding the optical sensor; and circuitry attached to the optical sensor using a through-silicon via (TSV) process on the wafer. According to some embodiments, the glass-free wafer-level optical sensor package further includes an isolation layer on the wafer opposite the optical sensor; and a passivation layer overlying the isolation layer. According to some embodiments, the dam is formed on the silicon wafer by at least one of patterned photolithography, polymer deposition, or photomasked epoxy.

[0011] According to some embodiments, the dam is formed to a height between 30 microns and 60 microns above the surface of the wafer. Some embodiments of the glass-free wafer-level optical sensor package further include one or more redistribution layers located on the passivation layer. Some embodiments of the glass-free wafer-level optical sensor package have an overall thickness between approximately 120 microns and 180 microns. Some embodiments of the glass-free wafer-level optical sensor package have an overall thickness of less than 200 microns. Some embodiments of the glass-free wafer-level optical sensor package include a fan-in wafer-level package.

[0012] Embodiments provided herein include a system for producing a glass-free wafer-level optical sensor package, the system comprising: a glass carrier substrate; a silicon wafer supported on the glass carrier substrate; an optical sensor disposed on the silicon wafer and facing the glass carrier substrate; and a dam formed on the silicon wafer and supporting the silicon wafer above the glass carrier substrate, wherein the dam substantially surrounds the optical sensor. In accordance with some embodiments, the system further comprises a through-silicon via process for connecting the circuit system to the optical sensor. In accordance with certain embodiments, the dam is formed using at least one of the following methods: patterned photolithography, polymer deposition, or photomasked epoxy. In some embodiments, the dam has a height between 30 microns and 60 microns above the surface of the silicon wafer.

[0013] According to one aspect of the present disclosure, a glass-free wafer-level optical sensor package is provided, comprising: a silicon wafer; an optical sensor disposed on the silicon wafer; a dam supported on the silicon wafer and at least partially surrounding the optical sensor; and a circuit system attached to the optical sensor and formed using a through-silicon via process on the wafer.

[0014] According to one embodiment of the present disclosure, the glass wafer-level optical sensor package further includes: an isolation layer on the wafer opposite to the optical sensor; and a passivation layer on the isolation layer.

[0015] According to one embodiment of the present disclosure, the dam is formed on the silicon wafer by at least one of patterned photolithography, polymer deposition, or photomasked epoxy.

[0016] According to one embodiment of the present disclosure, the dams are formed to a height between 30 microns and 60 microns above the surface of the wafer.

[0017] According to one embodiment of the present disclosure, the glass-free wafer-level optical sensor package further includes one or more redistribution layers on the passivation layer.

[0018] According to one embodiment of the present disclosure, the overall thickness of the glass-free wafer-level optical sensor package is between approximately 120 microns and 180 microns.

[0019] According to one embodiment of the present disclosure, the overall thickness of the wafer-level optical sensor package is less than 200 microns.

[0020] According to one embodiment of the present disclosure, the glass-free wafer-level optical sensor package includes a fan-in wafer-level package.

[0021] According to one aspect of the present disclosure, a system for producing a glass-free wafer-level optical sensor package is provided, comprising: a glass carrier substrate; a wafer supported on the glass carrier substrate; an optical sensor disposed on the silicon wafer and facing the glass carrier substrate; and a dam formed on the silicon wafer and supporting the silicon wafer above the glass carrier substrate, wherein the dam substantially surrounds the optical sensor.

[0022] According to one embodiment of the present disclosure, the system further includes: a through-silicon via process for connecting the circuit system to the optical sensor.

[0023] According to one embodiment of the present disclosure, the dam is formed using at least one of the following methods: patterned photolithography, polymer deposition, or photomasked epoxy.

[0024] According to one embodiment of the present disclosure, the height of the dam is between 30 microns and 60 microns above the surface of the silicon wafer.

[0025] The above summary is provided merely to summarize some example embodiments to provide a basic understanding of some aspects of the present disclosure. Thus, it will be appreciated that the above embodiments are merely examples and should not be construed as narrowing the scope or spirit of the present disclosure in any way. It will also be appreciated that the scope of the present disclosure encompasses many potential embodiments beyond those outlined herein, some of which will be further described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Having thus generally described certain example embodiments of the present disclosure, reference will now be made to the accompanying drawings, which are not necessarily drawn to scale, and in which:

[0027] Figure 1 illustrates a top view of a semiconductor package according to an example embodiment of the present disclosure;

[0028] Figure 2 illustrates a cross-sectional view of a wafer-level optical sensor package with and without a glass layer according to an example embodiment of the present disclosure;

[0029] Figure 3 illustrates a cross-sectional view of a glass-free wafer-level optical sensor package in a shipping package according to an example embodiment of the present disclosure;

[0030] Figure 4 illustrates a cross-sectional view of a glass-free wafer-level optical sensor package including one or more dams to protect the optical sensor according to an example embodiment of the present disclosure;

[0031] Figure 5illustrates a bottom view of a glass-free wafer-level optical sensor package including one or more dams to protect the optical sensor according to an example embodiment of the present disclosure;

[0032] Figure 6 illustrates a cross-sectional view of a glass-free wafer-level optical sensor package including one or more dams to protect the optical sensor in a shipping package according to an example embodiment of the present disclosure;

[0033] Figures 7A-7C illustrates a manufacturing process for a glass-free wafer-level optical sensor package including one or more dams to protect the optical sensor according to an example embodiment of the present disclosure;

[0034] Figures 8A-8C further illustrates a manufacturing process for a glass-free wafer-level optical sensor package including one or more dams to protect the optical sensor according to an example embodiment of the present disclosure; and

[0035] Figure 9 is a flow chart of a method of manufacturing a glass-free wafer-level optical sensor package including one or more dams to protect the optical sensor according to an example embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] Some embodiments of the present disclosure will now be described more fully herein with reference to the accompanying drawings, which illustrate some, but not all, embodiments of the present disclosure. Indeed, the various embodiments of the present disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. Like reference numerals refer to like elements throughout.

[0037] As used herein, the term "comprising" means including, but not limited to, and should be interpreted in the manner in which it is commonly used in a patent context. The use of broader terms such as including, comprising, and having should be understood to provide support for narrower terms such as consisting of, consisting essentially of, and comprising essentially of.

[0038] The phrases "in various embodiments," "in one embodiment," "according to one embodiment," "in some embodiments," etc. generally mean that the particular feature, structure, or characteristic following the phrase may be included in at least one embodiment of the present disclosure and may be included in more than one embodiment of the present disclosure (importantly, such phrases are not necessarily referring to the same embodiment).

[0039] The word “example” or “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any implementation described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other implementations.

[0040] If the specification states that a component or feature "may," "could," "might," "should," "will," "preferably," "likely," "typically," "optionally," "for example," "often," or "may" (or other such language) be included or have a feature, then that particular component or feature is not required to be included or have that feature. Such a component or feature may optionally be included in some embodiments or may be excluded.

[0041] The use of the term "circuitry" as used herein with respect to components of a system or device should be understood to include specific hardware configured to perform the functions associated with the particular circuitry as described herein. The term "circuitry" should be understood broadly to include hardware, and in some embodiments, software for configuring the hardware. For example, in some embodiments, "circuitry" may include processing circuitry, communication circuitry, input / output circuitry, etc. In some embodiments, other elements may provide or supplement the functionality of the particular circuitry.

[0042] Various embodiments of the present disclosure are directed to improved systems, devices, and methods for semiconductor packaging, and more specifically, to improved packaging for optical sensors. Optical sensors require a line of sight (either direct or indirect) to the optical sensor in order to sense light of any frequency. Conventionally, packaging for optical sensors includes a glass layer above the optical sensor. However, as technology improves and semiconductor chips have achieved extremely small overall sizes, including a glass layer significantly increases the overall thickness of the semiconductor package by up to 400%. The embodiments described herein provide a package, such as a wafer-level optical sensor package, that omits the glass layer while still providing protection for the optical sensor to reduce the possibility of damage during shipping. Furthermore, in addition to the significant reduction in overall thickness, omitting the glass layer provides additional improvements to the wafer-level package. The lack of a glass layer improves optical performance because light loses some degree of fidelity when passing through any medium, and denser media such as glass potentially cause some degree of refraction, reflection, or absorption. The production of glass-free wafer-level packages further improves manufacturing efficiency because there is no opportunity for glass defects, such as occlusion, that could compromise the functionality of the optical sensor. This results in less manufacturing waste, increased production efficiency, and lower production costs. Additionally, the lack of a glass layer eliminates components in the wafer-level package, thereby reducing the overall cost of materials used in the production of the wafer-level package.

[0043] Semiconductor packages continue to shrink in size and are used in environments with increasing size constraints, such as mobile phones, portable electronic products, and the like. Shrinking semiconductor packages requires that all components of the entire package be reduced in size, some of which have physical limitations on size due to one or more of existing manufacturing techniques, production costs, structural requirements, and the like. An effective way to reduce the overall size of a semiconductor package is to eliminate components if it is possible to provide the functionality of the eliminated components in other ways.

[0044] Wafer-level packaging provides an efficient manufacturing process by which integrated circuits are manufactured and components of the integrated circuits are attached to the integrated circuits before the integrated circuits are singulated into individual circuits. Components such as the top and bottom layers of the package and the solder bumps are attached to the integrated circuits through a process that does not require handling of the individual integrated circuits. This process enables efficient and consistent package assembly of integrated circuits without requiring handling and alignment of individual integrated circuits in order to assemble components thereon. Fan-out wafer-level packaging uses similar technology; however, the integrated circuits are singulated before at least some of the components of the wafer-level package are attached to the integrated circuits. Fan-out wafer-level packaging enables certain portions of the overall semiconductor package to be larger than the integrated circuits themselves (e.g., a die-cut wafer). The embodiments described herein can be used in both wafer-level packaging and fan-out wafer-level packaging, with some modifications to the manufacturing process. However, the final product remains essentially unchanged.

[0045] Wafer-level packaging enables the manufacture of integrated circuits in a simplified and efficient process while producing integrated circuits with a highly compact overall size. Various types of sensors are produced as wafer-level packages; however, wafer-level optical sensors are unique in that they require visibility to the optical sensor's environment, either directly or indirectly. For example, wafer-level optical sensors can be used for light sensors (e.g., infrared), biometric authentication sensors, environmental sensing, and cameras. Each of these types of sensors requires the wafer-level optical sensor to have a line of sight to the target of the optical sensor, either directly or through optical devices. This requirement determines the packaging of wafer-level optical sensors within terminal devices (such as mobile phones).

[0046] Electronic devices such as mobile phones are very portable and are often carried by users throughout the day. Therefore, the size of a mobile phone or other portable electronic device is crucial to the portability and use of such devices. These electronic devices have a very high level of functionality and require a robust design to withstand frequent use and often unintentional abuse and wear. Therefore, the structure of these electronic devices requires a certain degree of rigidity while maintaining a small form factor. The substantially rigid chassis of the electronic device that carries its hardware components (e.g., sensors, communication modules, speakers, cameras, screens, etc.) becomes a significant component of the overall size, which limits the space available for the hardware components. Competing hardware components need to be sized to fit the small form factor, otherwise components will be omitted, which will have an adverse effect on the functionality and desirability of the electronic device. Therefore, a small form factor for wafer-level packaging of one or more sensors is highly desired, and smaller components enable the form factor of the electronic device to become smaller and / or enable the electronic device to include more components to increase the functionality of the electronic device.

[0047] Wafer-level packaging has improved integrated circuits in many ways, including the relative thickness of integrated circuits. Wafer-level packaging has enabled integrated circuits to be manufactured in very compact form factors, less than 100 microns thick.

[0048] Wafer-level optical sensors generally include a layer of optical glass located over the sensing components of the optical sensor to protect the optical sensor while also allowing light to reach the sensor. This glass becomes an integral component of the wafer-level optical sensor and often represents a significant portion of the thickness of the wafer-level optical sensor. Wafer-level optical sensors can be as thin as around 80 microns. Including an optical glass layer over the sensor can increase the overall thickness of the wafer-level optical sensor by over 300 microns. While the optical glass layer provides a degree of protection for the optical sensor, the substantial increase in thickness runs counter to the significant benefits of wafer-level packaging overall (i.e., overall package thickness). Devices such as mobile phones utilize a relatively thin form factor, with a significant portion of the thickness of the device dedicated to front and back layers and structural elements that need to be robust to accommodate frequent use. Therefore, the thickness of all components within such a device is critical to the overall package dimensions.

[0049] While it is possible to produce wafer-level optical sensors without an optical glass layer, the optical sensor of the wafer-level optical sensor is exposed and susceptible to damage. Embodiments of the present disclosure provide a process for producing a wafer-level optical sensor without an optical glass layer while increasing protection of the sensor outside the sensor's line of sight.

[0050] Embodiments provided herein include glass-free wafer-level optical sensors that significantly reduce the overall thickness of the optical sensor, thereby improving packaging efficiency within electronic devices. Additionally, embodiments provide a mechanism by which the optical sensor is protected to mitigate damage during production, transportation, and final assembly within the electronic device.

[0051] Wafer-level optical sensors without a glass layer offer several benefits compared to wafer-level optical sensors that include an optical glass layer. The overall package thickness of a wafer-level optical sensor without an optical glass layer can reduce the overall thickness of the sensor package from approximately 300-400 microns to approximately 100-150 microns. This substantial reduction in thickness is significant, particularly from a packaging perspective for compact form factor devices. The optical sensor performance of wafer-level optical sensors without optical glass is improved because the removal of the optical glass layer reduces refraction, reflection, and potential defects in the glass layer that can adversely affect optical sensor performance. The manufacturing cost of wafer-level optical sensors without an optical glass layer is reduced in two ways. The lack of an optical glass layer reduces cost by reducing the material required to produce the wafer-level optical sensor. Additionally, the likelihood of defects in the manufactured wafer-level optical sensor is reduced because the glass layer is a potential source of defects such as blemishes, scratches, and cracks.

[0052] Because the removal of the optical glass layer increases the fragility of the optical sensor, embodiments provided herein provide a method for producing a wafer-level optical sensor that includes a degree of protection for the optical sensor. Instead of a glass layer above the optical sensor, the wafer-level optical sensor includes a dam surrounding the optical sensor outside of the optical sensor's line of sight. This dam helps shield the optical sensor from damage.

[0053] Figure 1 FIG2 illustrates a top view of an exemplary embodiment of a semiconductor package according to one or more embodiments of the present disclosure. The semiconductor package 100 may include a dielectric layer 110, a ground plane 120, a plurality of signal pads 130, and a plurality of solder balls (such as ground plane solder balls 122 and signal pad solder balls 132). The dielectric layer may be a polyimide (PI) and / or polybenzoxazole (PBO) material. Figure 1 Also depicted is section line AA, which represents the section line of various embodiments through which cross-sectional views of subsequent figures are taken.

[0054] It is readily appreciated that although only a few of the signal pads 130 and signal pad balls 132 are labeled with numbers, the semiconductor package 100 may include multiples of each, such as Figure 1. Each signal pad 130 can be separated from the ground plane 120 by one or more layers of dielectric material and / or portions of dielectric material (e.g., dielectric layer 110). When the semiconductor package 100 is used in an electronic device, a plurality of solder balls (e.g., ground plane solder balls 122 and signal pad solder balls 132) can connect the semiconductor package to other circuitry of the electronic device. Although the semiconductor package 100 is shown as a rectangle, it will be readily appreciated that the semiconductor package 100 can take other shapes and / or dimensions, particularly depending on the needs of the electronic device. Figure 1 The semiconductor package 100 is an example of views of various semiconductor configurations as described herein, such that further figures will be described using views taken along section line AA, while the cross-sectional views may depict different embodiments of the semiconductor package 100 .

[0055] Figure 2 Two cross-sectional views of a semiconductor package in the form of an optical sensor wafer level package are shown, along the Figure 1 . The first optical sensor wafer-level package 200 is shown as including a semiconductor chip 210, which may be, for example, a silicon chip. The first optical sensor wafer-level package 200 also includes an optical sensor 215 extending across a portion of the semiconductor chip 210. Opposite the optical sensor 215 is a dielectric layer 235 along with a signal pad 230 and a signal pad solder ball 232. The first optical sensor wafer-level package 200 also includes a glass layer 205 that covers and protects the optical sensor 215.

[0056] Figure 2 Also shown is a cross-sectional view of a second optical sensor wafer-level package 220, including a semiconductor chip 210, a dielectric layer 235, signal pads 230, and signal pad solder balls 232. The second optical sensor wafer-level package 220 lacks the glass layer of the first optical sensor wafer-level package 210, exposing the optical sensor 215 to sensor damage 225, such as from impact. The optical sensor 315 of the second optical wafer-level package 220 can be damaged for a variety of reasons, from production to final assembly of the electrical device into which the package is installed. Furthermore, depending on the type of device and its exposure to other elements, the optical sensor 315 can be damaged within the device. While the second optical sensor wafer-level package 220 is susceptible to damage, its overall thickness 222 is significantly less than the overall thickness 202 of the first optical sensor wafer-level package 200, which includes the glass layer 205.

[0057] Figure 3The second optical wafer-level package 220 is shown packaged in a package 305 for shipping as a packaged semiconductor package 300. During the packaging operation of inserting the wafer-level package into the package 305, damage may occur. Similarly, when the wafer-level package is shipped, unpacked, and assembled, there is also the opportunity for sensor damage 225. Impact to the optical sensor 215 can compromise the integrity of the optical sensor and reduce or eliminate the functionality of the optical sensor 215.

[0058] As about Figure 2 As shown, while it is desirable to omit the glass layer from a wafer-level package, doing so can make the optical sensor more susceptible to damage. The embodiments described herein mitigate this vulnerability to enable a glass-free wafer-level optical sensor package that reaps the benefits of glass-free packaging while reducing the likelihood of damage to the optical sensor due to the fragility presented by the lack of a glass layer.

[0059] Embodiments described herein provide dams around some or all of the optical sensors in a glass-free wafer-level optical sensor package to protect the optical sensors by reducing the fragility of the wafer-level optical sensor package. Additionally, embodiments achieve the benefit of omitting a glass layer while retaining a degree of physical protection for the optical sensors.

[0060] Figure 4 An example embodiment of the present disclosure including a glass-free wafer-level optical sensor package 400 is illustrated, along the Figure 1 . Glass-free wafer-level optical sensor package 400 includes semiconductor chip 410, optical sensor 415, signal pads 430, and signal pad solder balls 432. Dams 440 are also shown on opposite sides of optical sensor 415. These dams can form a continuous frame or border around optical sensor 415. However, in some embodiments, dams 440 can be discontinuous and extend only along portions of one or more sides of optical sensor 415. In embodiments where dams 440 are discontinuous, the dams can extend along portions of each side of the optical sensor to maintain the protective functionality of the dams described herein.

[0061] Figure 4 Dam 440, shown in FIG, protects optical sensor 415 from impacts approaching the optical sensor from above and beside it, which are the primary directions of damaging contact. Dam 440 also serves to prevent a portion of the package from contacting optical sensor 415 by suspending the portion of the package above the optical sensor via the dam. For example, a portion of the package that contacts both dams will span the dams and suspend above optical sensor 415 because the dams are at a higher elevation than optical sensor 415.

[0062] Figure 5 Pictured Figure 4 A top view of a glass-free wafer-level optical sensor package 400 illustrates an example embodiment of how a dam 440 may surround an optical sensor 415. The dam 440 may be spaced apart from the optical sensor 415 or may be adjacent to the optical sensor 415. Positioning the optical sensor adjacent to the dam may provide additional or improved protection for the sensor; however, in some embodiments, such positioning may adversely affect the field of view of the optical sensor. Additionally, while Figure 5 The dam 440 has rounded corners, but embodiments may include sharp corners, particularly if the dam 440 abuts the optical sensor 415 .

[0063] Figure 6 The glass-free wafer-level optical sensor package 400 is illustrated within a package 450. As shown, the dam 440 helps prevent damaging impacts from reaching the optical sensor 415. The outer edge of the dam 440 is generally contacted first by any impact 425 so that the optical sensor 415 itself is not contacted and therefore not affected by impacts that might otherwise damage the optical sensor (such as in Figure 3 It should be readily appreciated that embodiments of the systems and apparatus described herein (particularly with respect to the shape and size of the dam formed around the optical sensor) may be configured in various additional and alternative ways beyond those explicitly described herein.

[0064] Figures 7A-7C and Figures 8A-8C A manufacturing process for producing an embodiment of a glass-free wafer-level optical sensor package described herein is illustrated. Although the manufacturing method shown and described is not the only possible manufacturing method, the embodiments described herein may employ embodiments of the manufacturing process disclosed below.

[0065] Figure 7A A silicon wafer 510 is illustrated including two optical sensors 515 and a dam 540 formed therebetween. The dam 540 can be deposited by various mechanisms depending on the material used for the dam. For example, the entire wafer 510 including the optical sensors 515 can be covered with a light-curable epoxy, wherein a mask is applied to shield areas that are not to be cured (e.g., non-dam areas including the optical sensors). Light can be exposed to the shielded light-curable epoxy, causing the epoxy in the unshielded dam areas to cure. The remaining uncured epoxy can be washed away so that only traces of the cured epoxy in the form of the dam 540 are exposed. Other materials known in the art can be used by processes such as dry etching materials, polymer deposition, photolithography, etc. Depending on the method of forming the dam 540, the top surface of the dam can be machined to obtain a substantially planar surface of the dam element.

[0066] Figure 7BThe following operation in the manufacturing process is illustrated, where a silicon wafer 510 is mounted to a carrier substrate 550 of a carrier handling material at the top surface of dams 540. A cross section of the silicon wafer is shown, similar to Figure 1 The cross-sectional line AA. The carrier handling material in the exemplary embodiment is a glass material. Using a glass material for the carrier substrate 550 allows the optical sensor 515 to be tested by providing light to the sensor through the glass carrier substrate 550 during the manufacturing process. The silicon wafer is thinned to a final thickness by processes such as grinding and / or polishing, which may be approximately 80-150 microns, for example. The silicon wafer 510 is then ready for processing using TSVs (through silicon vias). Figure 7C The TSV process is performed as shown in FIG, and vertical electrical connections are created through the silicon wafer 510, shown at 512, to form interconnects. The TSV process eliminates wire bonds and enables higher density interconnects while maintaining a small package size. This process forms a connection between the optical sensor 515 and the sensor pad 530. An isolation process is then performed using an isolation layer deposited on the surface of the silicon wafer 510 outside the sensor pad 530. At this stage, a redistribution layer (RDL) can be used to position the sensor pad in the appropriate location for its intended use.

[0067] Figure 8A The diagram shows the deposition of a passivation layer 535 over the wafer, except for the location of sensor pads 530. This creates a shield applied as a micro-coating, making the surface of the wafer-level optical sensor package less susceptible to environmental influences or corrosion. Sensor solder balls 532 are applied to sensor pads 530 to serve as connection points to optical sensors 515.

[0068] Figure 8B The diagram shows the wafer-level optical sensor package being separated from the carrier substrate and singulated to form individual glass-free wafer-level optical sensor packages 500. The singulated glass-free wafer-level optical sensor packages 500 are then packaged into packages 555.

[0069] As noted above, the use of a glass carrier substrate 550 facilitates the manufacturing process because the optical sensors can be tested during the manufacturing process before the sensor packages are singulated. This allows testing of the optical sensors to begin as early as after the TSV process to ensure functionality and proper connectivity before subsequent operations are performed. Sensor testing can further be performed before singulation, allowing the sensor packages to be functionally tested before final packaging to ensure that all sensor packages function properly when shipped to their destination for assembly into electronic devices.

[0070] The glass-free wafer-level optical sensors of the example embodiments provided herein offer substantial advantages over wafer-level optical sensors that utilize a glass layer. A substantial advantage of glass-free wafer-level optical sensors is a significant reduction in the overall thickness of the sensor package. While the wafer-level optical sensor itself can be approximately 80 to 150 microns thick, the glass layer can add 300 microns or more to the overall thickness. Eliminating the glass layer enables the wafer-level optical sensor to have a total thickness of approximately 120 to 180 microns, and more specifically, approximately 130 to 160 microns, with or without solder balls. The thickness of the dams described herein can generally range from approximately 30 to 60 microns. Reducing sensor thickness by more than 300 microns is a significant advancement in wafer-level optical sensor production, and achieving this with a glass-free wafer-level optical sensor that retains a degree of protection for the optical sensor is another significant development utilizing the embodiments described herein. This reduction in overall thickness can significantly reduce the amount of space such a sensor occupies within an electronic device, thereby providing greater design freedom for the electronic device and enabling smaller, thinner overall device sizes, which have proven highly desirable in portable electronic devices.

[0071] In addition to the size advantage, the embodiments of the glass-free wafer-level optical sensor package described herein have superior optical performance relative to embodiments that utilize a glass layer. When light travels through any medium, there is a potential for refraction, reflection, and absorption into the medium. Light travels most efficiently in a vacuum, but it can also travel efficiently in an ambient air environment. Dense materials pose greater challenges to the efficient travel of light, causing materials such as glass to reflect, refract, and absorb light, thereby reducing the efficiency of light traveling through the glass and reaching the optical sensor. Therefore, omitting the glass layer is inherently more efficient than having a glass layer.

[0072] In addition to size and efficiency, improvements also include reducing waste in sensor production. Glass manufacturing has become more efficient, and the glass layers used in optical sensors are generally of very high quality. However, even high-quality glass layers may contain obstructions, nicks, dirt, debris, or other issues that reduce the effectiveness of optical sensors. Optical sensors produced with defective glass are less accurate and may not meet minimum quality standards. Consequently, wafer-level optical sensor packages produced with defective glass may be rejected and become waste, reducing the efficiency of producing sensor packages.

[0073] In addition to these benefits, the absence of a glass layer also reduces the number of components in the sensor and saves on the cost of the sensor because no glass layer is required. This reduces the manufacturing cost of the optical sensor package, thereby improving the efficiency of manufacturing and production.

[0074] Figure 9An example block diagram of an operational flow chart for manufacturing a glass-free wafer-level optical sensor package according to one or more embodiments of the present disclosure is illustrated. In various embodiments, one or more of the operations may be omitted or repeated. It will also be appreciated that other operations not described herein may also occur. According to the illustrated embodiment, at operation 610 one or more dams are formed to at least partially surround one or more optical sensors on a wafer. At 620, the wafer is supported on a carrier substrate via the one or more dams. At 630, a wafer-level optical sensor integrated circuit is formed for each of the one or more optical sensors. This includes performing a through-silicon via process on the wafer at 640, forming an isolation layer on the wafer at 650, and performing a passivation operation on the wafer at 660. The wafer is removed from the carrier substrate at 670, and each wafer-level optical sensor is singulated at operation 680.

[0075] The operations and / or functions of the present disclosure have been described herein, such as in flowcharts or accompanying drawings associated with the flowcharts. Although operations and / or functions are illustrated in a particular order, this should not be understood as requiring that such operations and / or functions be performed in the particular order shown or in a sequential order, or that all illustrated operations be performed to achieve the desired result. In some cases, it may be advantageous to employ operations and / or functions in an alternative order. In some cases, the actions set forth in the claims may be performed in a different order and still achieve the desired result. Therefore, although specific embodiments of the subject matter have been described, other embodiments are also within the scope of the following claims.

[0076] Although this specification includes many specific embodiments and implementation details, these should not be interpreted as limitations on the scope of any disclosure or the scope that may be claimed, but rather as descriptions of features specific to the specific disclosed embodiments. Certain features described herein in the context of separate embodiments may also be implemented in combination in a single embodiment. On the contrary, the various features described in the context of a single embodiment may also be implemented in multiple embodiments or in any suitable sub-combination, respectively. Moreover, although features may be described above as functioning in certain combinations and even initially claimed as such, one or more features from the claimed combination may be deleted from the claimed combination in some cases, and the claimed combination may be directed to a sub-combination or a variation of the sub-combination.

[0077] Although the detailed description has set forth certain embodiments of the invention, the appended claims cover other embodiments of the invention according to various modifications and improvements that differ from the described embodiments.

Claims

1. A glass-free wafer-level optical sensor package, characterized in that: include: silicon wafers; Optical sensors, deployed on silicon wafers; a dam supported on the silicon wafer and at least partially surrounding the optical sensor; as well as The circuitry attached to the optical sensor is formed using a through-silicon via process on the wafer.

2. The glass-free wafer-level optical sensor package according to claim 1, wherein: Also includes: an isolation layer on the wafer opposite the optical sensor; as well as A passivation layer is formed on top of the isolation layer.

3. The glass-free wafer-level optical sensor package according to claim 1, wherein: The dam is formed on the silicon wafer by at least one of patterned photolithography, polymer deposition, or photomasked epoxy resin.

4. The glass-free wafer-level optical sensor package according to claim 3, wherein: The dams are formed to a height between 30 microns and 60 microns above the surface of the wafer.

5. The glass-free wafer-level optical sensor package according to claim 1, wherein: Also included is one or more redistribution layers located on the passivation layer.

6. The glass-free wafer-level optical sensor package according to claim 1, wherein: The overall thickness of the glass-free wafer-level optical sensor package is between approximately 120 microns and 180 microns.

7. The glass-free wafer-level optical sensor package according to claim 1, wherein: The overall thickness of the wafer-level optical sensor package is less than 200 microns.

8. The glass-free wafer-level optical sensor package according to claim 1, wherein: Among them, glass-free wafer-level optical sensor packaging includes fan-in wafer-level packaging.

9. A system for producing glass-free wafer-level optical sensor packages, characterized in that include: glass carrier substrate; a silicon wafer supported on a glass carrier substrate; an optical sensor disposed on a silicon wafer and facing a glass carrier substrate; as well as A dam is formed on the silicon wafer and supports the silicon wafer above the glass carrier substrate, wherein the dam substantially surrounds the optical sensor.

10. The system according to claim 9, wherein: Also includes: Through-silicon via (TSV) technology is used to connect the circuitry to the optical sensor.

11. The system according to claim 9, wherein The dams are formed using at least one of the following methods: patterned photolithography, polymer deposition, or photomasked epoxy.

12. The system according to claim 9, wherein The height of the dam is between 30 microns and 60 microns above the surface of the silicon wafer.

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