MOS tube chip with built-in resistor and electronic equipment

By integrating a trace resistor structure and an ESD protection diode inside the MOSFET, the problems of unstable conduction of the MOSFET and high cost of external resistors are solved, resulting in a more stable switching process and lower production costs.

CN223968136UActive Publication Date: 2026-03-03SHENZHEN NANFANG XINGU MICROELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-10
Publication Date
2026-03-03

AI Technical Summary

Technical Problem

Existing MOSFETs are prone to charge accumulation when the control terminal is open or has poor contact, resulting in weak conduction between the D and S terminals. Furthermore, the conduction time is too short, making them susceptible to damage. External connection resistors are also costly.

Method used

The MOSFET integrates a first trace resistor structure and a second trace resistor structure, which connect the gate and source in parallel and series to increase damping, suppress oscillation, and limit the gate charging and discharging current. It also incorporates an ESD protection diode to improve its anti-static properties.

Benefits of technology

This solves the problems of weak conduction between the current and current channels and excessively short conduction time of MOSFETs, reduces costs, improves EMI performance and ESD resistance, and reduces electromagnetic interference and voltage spikes.

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Abstract

The utility model discloses a metal oxide semiconductor (MOS) tube chip with a built-in resistor and electronic equipment. The MOS tube chip with the built-in resistor comprises a top layer and a bottom layer, wherein the top layer is provided with a grid electrode and a source electrode; the bottom layer is provided with a drain electrode; the top layer is also provided with a first wiring resistor structure and a second wiring resistor structure, the first wiring resistor structure is connected with the grid electrode, one end of the second wiring resistor structure is connected with the grid electrode, and the other end of the second wiring resistor structure is connected with the source electrode. According to the utility model, the first routing resistor structure and the second routing resistor structure are integrated in the MOS tube, so that the problems that the MOS tube is weak in DS conduction, the MOS tube is easy to damage due to too short conduction time, and the control end is easy to oscillate are solved, and compared with a mode of connecting a resistor at the periphery of the MOS tube, the cost of the MOS tube is lower.
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Description

Technical Field

[0001] This utility model relates to the field of integrated circuit design technology, and in particular to a MOS transistor chip with built-in resistor and an electronic device. Background Technology

[0002] With the continuous advancement of semiconductor manufacturing processes, the performance of MOSFETs has been significantly improved, such as lower on-resistance and faster switching speeds. These performance improvements have led to the widespread application of MOSFETs in more fields, thereby driving market demand growth. For example, MOSFETs play a crucial role in key components such as new energy vehicles, battery management systems, and motor controllers, and have become indispensable components. Existing problems with MOSFETs include: 1. The control terminal of a MOSFET is in a high-resistance state. If the control terminal (G) is open-circuited or has poor contact during production and use, charge may accumulate at the control terminal, resulting in weak conduction between the MOSFET's drain and source (DS). For example, in battery management systems, this can easily lead to over-discharge of the battery and product failure; 2. If VDS is relatively large, a short MOSFET conduction time can easily cause damage, and the control terminal is also prone to oscillation.

[0003] To address the aforementioned technical problems, existing technologies typically connect a resistor to the gate of the MOSFET, or directly connect a resistor between the gate and source of the MOSFET. However, these methods are costly.

[0004] Therefore, existing technologies still need to be improved and developed. Utility Model Content

[0005] In view of the shortcomings of the prior art, the purpose of this utility model is to provide a MOSFET chip and electronic device with built-in resistor, so as to solve the problems of high cost caused by using external resistors to prevent weak conduction between the MOSFET's drain and source terminals and damage caused by too short conduction time of the MOSFET, and the control terminal being prone to oscillation.

[0006] The technical solution of this utility model is as follows:

[0007] In a first aspect, the present invention provides a MOS transistor chip with built-in resistors, including a top layer with a gate and a source and a bottom layer with a drain; the top layer is further provided with a first trace resistor structure and a second trace resistor structure, the first trace resistor structure is connected to the gate, one end of the second trace resistor structure is connected to the gate, and the other end of the second trace resistor structure is connected to the source.

[0008] In a further embodiment of this invention, the MOS transistor chip has several unit structures, each unit structure including a gate and a source disposed on the top layer and a drain disposed on the bottom layer; several gates are connected to the first wiring resistor structure, and several sources are connected to the second wiring resistor structure.

[0009] In a further embodiment of this invention, the first trace resistor structure includes a plurality of first trace resistors connected in parallel.

[0010] In a further embodiment of this invention, the second trace resistor structure includes a plurality of second trace resistors connected in series.

[0011] In a further embodiment of this invention, the MOS transistor chip with built-in resistors also includes a gate pad, a plurality of first trace resistors connected in parallel and then connected to the gate pad, and a plurality of second trace resistors connected in series and then connected to the gate pad.

[0012] In a further embodiment of this invention, the first trace resistors are arranged at intervals along the horizontal or vertical direction, and the beginning and end of each of the first trace resistors are interconnected.

[0013] In a further embodiment of this invention, the second trace resistors are spaced apart along the horizontal or vertical direction, and the beginning and end of two adjacent second trace resistors are connected.

[0014] A further feature of this invention includes an ESD protection diode, which is disposed on the top layer of the MOS transistor chip. The anode of the ESD protection diode is connected to the first trace resistor structure, and the cathode of the ESD protection diode is connected to the source of the MOS transistor.

[0015] In a further embodiment of this invention, the MOS transistor chip is a P-type MOS transistor chip or an N-type MOS transistor chip.

[0016] Secondly, this utility model also provides an electronic device, which includes a MOS transistor chip with a built-in resistor as described above.

[0017] This invention provides a MOSFET chip and electronic device with built-in resistors. The MOSFET chip with built-in resistors includes a top layer with a gate and a source, and a bottom layer with a drain. The top layer also has a first wiring resistor structure and a second wiring resistor structure. The first wiring resistor structure is connected to the gate, one end of the second wiring resistor structure is connected to the gate, and the other end of the second wiring resistor structure is connected to the source. This invention solves the problems of weak conduction between the source and drain of MOSFETs, the short conduction time leading to damage, and oscillation at the control terminal by integrating the first and second wiring resistor structures inside the MOSFET. Compared to connecting resistors externally to the MOSFET, this invention is less expensive. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the top-level structure of the MOS transistor chip with built-in resistor in this utility model.

[0020] Figure 2 This is a top-level enlarged view of the MOS transistor chip with built-in resistor in this utility model.

[0021] Figure 3 This is a schematic diagram of the top-level structure of a MOSFET.

[0022] Figure 4 This is a schematic diagram of the structure of a MOSFET with the metal layer removed from the top layer.

[0023] Figure 5 This is the equivalent circuit diagram of the MOS transistor chip with built-in resistor in this utility model.

[0024] Figure 6 This is a schematic diagram of the unit structure in this utility model.

[0025] Figure 7 This is a schematic diagram showing the connection between the first trace resistor structure, the second trace resistor structure, and the gate pad in one embodiment of this utility model.

[0026] Figure 8 This is a schematic diagram of the first trace resistor structure in one embodiment of the present invention.

[0027] Figure 9This is a schematic diagram of the second wiring resistor structure in one embodiment of the present invention.

[0028] Figure 10 This is a schematic diagram of the top-level structure of a MOS transistor chip in one embodiment of this utility model.

[0029] Figure 11 This is an equivalent circuit diagram of a MOS transistor with a built-in ESD protection diode in one embodiment of the present invention.

[0030] Figure 12 This is a wiring diagram of a MOSFET chip with built-in resistors and a microcontroller (MCU).

[0031] Figure 13 This is the equivalent circuit schematic of a microcontroller (MCU) and a MOSFET chip with built-in resistors.

[0032] The markings in the attached diagram are as follows: 100, first trace resistor structure; 110, first trace resistor; 200, second trace resistor structure; 210, second trace resistor; 130, unit structure; 140, gate pad. Detailed Implementation

[0033] This utility model provides a MOS transistor chip with built-in resistor and an electronic device. To make the purpose, technical solution, and effects of this utility model clearer and more explicit, the following describes this utility model in further detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of this utility model and are not intended to limit this utility model.

[0034] In the implementation methods and claims, unless otherwise specified in the text, the terms "a," "an," "the," and "the" may also include plural forms. If the embodiments of this utility model involve descriptions of "first," "second," etc., such descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.

[0035] It should be further understood that the term "comprising" as used in this specification means the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should be understood that when an element is referred to as "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there may be intermediate elements present. Furthermore, "connected" or "coupled" as used herein can include wireless connections or wireless coupling. The term "and / or" as used herein includes all or any of the units and all combinations thereof of one or more associatedly listed items.

[0036] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0037] Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0038] Please also refer to Figures 1 to 11 This utility model provides a preferred embodiment of a MOS transistor chip with built-in resistor.

[0039] In some embodiments, such as Figure 1 and Figure 2 As shown, this utility model provides a MOS transistor chip with built-in resistors, including a top layer with a gate and a source, and a bottom layer with a drain; the top layer is also provided with a first trace resistor structure 100 and a second trace resistor structure 200, the first trace resistor structure 100 is connected to the gate, one end of the second trace resistor structure 200 is connected to the gate, and the other end of the second trace resistor structure 200 is connected to the source.

[0040] Specifically, the MOS transistor chip has a bottom layer and a top layer, such as Figure 3 and Figure 4 As shown, Figure 3 This is a schematic diagram of the top-level structure of a MOSFET. Figure 4This is a schematic diagram of a MOSFET with the metal layer removed from the top layer. The gate and source are located on the top layer of the MOSFET, while the drain is located on the bottom layer. The first trace resistor structure 100 is disposed on the top layer of the MOSFET and connected to the gate. The second trace resistor structure 200 is disposed on the top layer of the MOSFET and connected between the gate and source. Figure 2 As shown. Figure 5 As shown, Figure 5 This is the equivalent circuit schematic of the MOS transistor chip with built-in resistors in this embodiment, where resistor R1 represents the first trace resistor structure 100 and resistor R2 represents the second trace resistor structure 200.

[0041] It's important to understand that parasitic capacitances (such as Cgs and Cgd) exist between the gate and source / drain of a MOSFET. These parasitic capacitances, along with inductance in the circuit (such as PCB trace inductance), can form an LC resonant circuit, leading to high-frequency oscillations. Excessive switching speed of a MOSFET can result in large voltage and current change rates (dV / dt and dI / dt), potentially causing electromagnetic interference (EMI) or voltage spikes. The gate capacitance of a MOSFET requires charging and discharging; excessive drive current can overload or damage the drive circuit. Furthermore, the control terminal of a MOSFET is in a high-impedance state. If the control terminal (G) is open-circuited or has poor contact during manufacturing or use, charge can accumulate, resulting in weak conduction between the MOSFET's drain and source terminals.

[0042] This invention, by connecting the first trace resistor structure 100 in series with the gate of the MOSFET, increases damping, suppresses oscillation, and makes the switching process of the MOSFET smoother. Furthermore, the first trace resistor structure 100 can limit the gate charging and discharging current, thereby reducing switching speed, EMI and voltage spikes, reducing high-frequency noise, and improving EMI performance. Additionally, the first trace resistor structure 100 can limit the gate drive current, protecting the drive circuit and the fragile oxide layer of the MOSFET gate. Further, by connecting the second trace resistor structure 200 between the gate and source of the MOSFET, it ensures that the gate-source voltage VGS is 0 when there is no input, and the MOSFET is in the off state, avoiding leakage problems caused by poor contact at the gate end during MOSFET packaging and drain-source conduction due to external connections. Compared to existing methods that connect resistors externally after MOSFET packaging, this invention has higher integration, only adding the first trace resistor structure 100 and the second trace resistor structure 200 to the existing MOSFET process, resulting in lower cost and almost no increase in the cost of the MOSFET chip.

[0043] In this embodiment, as Figure 1, Figure 2 and Figure 6 As shown, the MOS transistor chip has several unit structures 130. Each unit structure 130 includes a gate G and a source S disposed on the top layer and a drain disposed on the bottom layer. Several gates G are connected to the first wiring resistor structure 100, and several sources S are connected to the second wiring resistor structure 200.

[0044] Specifically, the MOS transistor chip is composed of several unit structures 130 having a gate G, a source S and a drain. The gate of each unit structure 130 is connected to the first wiring resistor structure 100, and the source of each unit structure 130 is connected to the second wiring resistor structure 200.

[0045] In some embodiments, such as Figure 1 , Figure 7 , Figure 8 and Figure 9 As shown, the first trace resistor structure 100 includes a plurality of first trace resistors 110, which are connected in parallel. The second trace resistor structure 200 includes a plurality of second trace resistors 210, which are connected in series.

[0046] Specifically, because the resistance value of the first trace resistor structure 100 is relatively small, it is implemented by connecting multiple first trace resistors 110 in parallel. The resistance value of the second trace resistor structure 200 is relatively large, and the second trace resistor structure 200 is implemented by connecting multiple second trace resistors 210 in series.

[0047] Furthermore, such as Figure 7 , Figure 8 and Figure 9 As shown, the first trace resistors 110 are spaced apart horizontally or vertically, and the beginning and end of each first trace resistor 110 are interconnected. The second trace resistors 210 are spaced apart horizontally or vertically, and the beginning and end of adjacent second trace resistors 210 are connected.

[0048] Specifically, the first trace resistors 110 are spaced apart at the top of the MOS transistor chip, and the beginning and end of adjacent first trace resistors 110 are connected together to achieve parallel connection of the first trace resistors 110. In one implementation, the first trace resistors 110 are arranged horizontally. The second trace resistors 210 are also spaced apart at the top of the MOS transistor, and the beginning and end of adjacent second trace resistors 210 are connected together to achieve series connection of the second trace resistors 210.

[0049] In some embodiments, such as Figure 1 , Figure 2 and Figure 7 As shown, the MOS transistor chip with built-in resistors also includes a gate pad 140, a plurality of first trace resistors 110 connected in parallel to the gate pad 140, and a plurality of second trace resistors 210 connected in series to the gate pad 140.

[0050] Specifically, the first trace resistor 110 is connected in parallel to the gate pad 140 to connect the first trace resistor 110 to each gate. The first end of the second trace resistor 210 connected in series is connected to the gate pad 140, and the last end of the second trace resistor 210 connected in series is connected to each source.

[0051] In some embodiments, such as Figure 10 As shown, the MOS transistor chip also includes an ESD protection diode, which is disposed on the top layer of the MOS transistor chip. The anode of the ESD protection diode is connected to the first trace resistor structure 100, and the cathode of the ESD protection diode is connected to the source of the MOS transistor.

[0052] Specifically, the MOSFET also incorporates an ESD protection diode, located on the top layer of the MOSFET. The anode A of the ESD protection diode is connected to the first trace resistor structure 100, while the cathode B is connected to the source of the MOSFET. This improves the ESD resistance of the MOSFET chip, thus enabling electrostatic discharge protection. Figure 11 As shown, Figure 11 The equivalent circuit diagram of the MOSFET with built-in ESD protection diode.

[0053] In this embodiment, the MOS transistor chip is a P-type MOS transistor chip or an N-type MOS transistor chip. That is to say, the built-in resistor technical solution proposed in this utility model is applicable to both P-type and N-type MOS transistor chips, and both P-type and N-type MOS transistor chips can use the same photolithography plate, thereby reducing production costs.

[0054] In some embodiments, this utility model also provides an electronic device, which may be a new energy vehicle, a battery management system, an electrode controller, etc., and includes a MOSFET chip with a built-in resistor as described above. The MOSFET chip with a built-in resistor is specifically described in an embodiment of such a chip, and will not be repeated here. Please refer to [link to relevant documentation]. Figure 12 and Figure 13 Taking the application of MOSFET chips with built-in resistors in microcontrollers (MCUs) as an example, it can reduce the number of peripheral circuit components in the MCU. For example... Figure 12 As shown, Figure 12This is a wiring diagram showing the connection between a MOSFET chip with built-in resistors and a microcontroller (MCU). Figure 13 This is the equivalent circuit schematic of a microcontroller (MCU) and a MOSFET chip with built-in resistors.

[0055] In summary, the MOS transistor chip and electronic device with built-in resistor provided by this utility model have the following beneficial effects:

[0056] By integrating a first trace resistor structure and a second trace resistor structure inside the MOSFET, the problems of weak conduction between the MOSFET's drain and source (DS) and the MOSFET's short conduction time leading to easy damage, as well as the control terminal being prone to oscillation, are solved. Compared with connecting resistors outside the MOSFET, this invention has a lower cost.

[0057] The MOSFET has a built-in ESD protection diode, which improves the ESD resistance of the MOSFET chip and enables electrostatic discharge protection.

[0058] It should be understood that the application of this utility model is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A MOS transistor chip with built-in resistor, characterized in that, It includes a top layer with a gate and a source, and a bottom layer with a drain; the top layer is further provided with a first wiring resistor structure and a second wiring resistor structure, the first wiring resistor structure is connected to the gate, one end of the second wiring resistor structure is connected to the gate, and the other end of the second wiring resistor structure is connected to the source.

2. The MOS transistor chip with built-in resistor according to claim 1, characterized in that, The MOS transistor chip has several unit structures, each unit structure including a gate and a source disposed on the top layer and a drain disposed on the bottom layer; several gates are connected to the first wiring resistor structure, and several sources are connected to the second wiring resistor structure.

3. The MOS transistor chip with built-in resistor according to claim 1, characterized in that, The first trace resistor structure includes a plurality of first trace resistors, which are connected in parallel.

4. The MOS transistor chip with built-in resistor according to claim 3, characterized in that, The second trace resistor structure includes a plurality of second trace resistors connected in series.

5. The MOS transistor chip with built-in resistor according to claim 4, characterized in that, It also includes a gate pad, a plurality of first trace resistors connected in parallel and then connected to the gate pad, and a plurality of second trace resistors connected in series and then connected to the gate pad.

6. The MOS transistor chip with built-in resistor according to claim 3, characterized in that, The first trace resistors are arranged at intervals along the horizontal or vertical direction, and the beginning and end of each first trace resistor are connected to each other.

7. The MOS transistor chip with built-in resistor according to claim 4, characterized in that, The second trace resistors are spaced apart horizontally or vertically, and the beginning and end of two adjacent second trace resistors are connected.

8. The MOS transistor chip with built-in resistor according to claim 1, characterized in that, It also includes an ESD protection diode, which is disposed on the top layer of the MOS transistor chip. The anode of the ESD protection diode is connected to the first trace resistor structure, and the cathode of the ESD protection diode is connected to the source of the MOS transistor.

9. The MOS transistor chip with built-in resistor according to claim 1, characterized in that, The MOS transistor chip is a P-type MOS transistor chip or an N-type MOS transistor chip.

10. An electronic device, characterized in that, Including the MOS transistor chip with built-in resistor as described in any one of claims 1-9.