NMOS reverse connection prevention motor control circuit

Abstract

The utility model discloses a kind of NMOS anti-reverse connection motor control circuit, solve the problem of the working temperature and the high cost of anti-reverse connection motor control circuit in prior art and low ground wire integrity, including mutually electrically connected motor control module and anti-reverse connection module, the motor control module includes bootstrap unit, the anti-reverse connection module includes NMOS tube Q1 and anti-reverse connection diode, the grid of NMOS tube Q1 is electrically connected with the negative pole of the anti-reverse connection diode, drain electrode connects power supply VM, source electrode is electrically connected between grid through resistance R1, the anode of the anti-reverse connection diode is electrically connected with the bootstrap unit.The utility model reduces power consumption in high-power circuit, and then reduce the temperature when circuit works, while guarantee ground wire integrity, reduce circuit complexity and circuit cost.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, specifically providing an NMOS reverse polarity protection motor control circuit. Background Technology

[0002] In DC power supply applications, the reverse polarity of the motor controller's power supply is a common problem during assembly, and this can damage the equipment and cause unnecessary losses. Therefore, it is necessary to prevent this problem from the design stage, which is why reverse polarity protection is introduced.

[0003] Existing reverse polarity protection motor control circuits typically use a PMOS transistor and a transistor at the power supply terminal, controlling the PMOS transistor's on / off state by controlling the transistor. However, in high-power circuits, the power consumption and cost of PMOS transistors are higher than those of NMOS transistors, and they also lead to higher operating temperatures. Another existing reverse polarity protection motor control circuit uses an NMOS transistor at the ground terminal, controlling its on / off state by power-on. For example, a reverse polarity protection circuit for automotive motor control disclosed in Chinese patent literature, publication number CN219875475U, divides the ground wire into two parts, reducing ground integrity, and requires isolation from external communication. Utility Model Content

[0004] To address the issues of high operating temperature, high cost, and low ground integrity in existing reverse polarity protection motor control circuits, this invention provides an NMOS reverse polarity protection motor control circuit. This circuit reduces power consumption in high-power circuits, thereby lowering the operating temperature while ensuring ground integrity, and reducing circuit complexity and cost.

[0005] The specific solution of this utility model is as follows.

[0006] An NMOS reverse polarity protection motor control circuit includes a motor control module and a reverse polarity protection module electrically connected to each other. The motor control module includes a bootstrap unit, and the reverse polarity protection module includes an NMOS transistor Q1 and a reverse polarity protection diode. The gate of the NMOS transistor Q1 is electrically connected to the negative terminal of the reverse polarity protection diode, the drain is connected to a power supply VM, and the source and gate are electrically connected through a resistor R1. The positive terminal of the reverse polarity protection diode is electrically connected to the bootstrap unit.

[0007] This utility model discloses an NMOS reverse connection protection motor control circuit. By setting an NMOS transistor Q1 at the power supply terminal for reverse connection protection, it reduces power consumption and circuit cost in high-power circuits, thereby reducing the temperature of the circuit during operation and ensuring ground integrity. The motor control module charges the bootstrap capacitor in the bootstrap unit, thereby powering and driving the NMOS transistor Q1, which reduces the complexity of the reverse connection protection motor control circuit and further reduces circuit cost.

[0008] Furthermore, the motor control module includes three upper transistors and three lower transistors. The upper transistors include NMOS transistors Q3, Q4, and Q5, and the lower transistors include NMOS transistors Q7, Q8, and Q9. The source of NMOS transistor Q3 is electrically connected to the drain of NMOS transistor Q7, the source of NMOS transistor Q4 is electrically connected to the drain of NMOS transistor Q8, and the source of NMOS transistor Q5 is electrically connected to the drain of NMOS transistor Q9. The drains of the three upper transistors are connected to the power supply VM, and the sources of the three lower transistors are grounded. The gate and source of each NMOS transistor in the motor control module are electrically connected through a resistor.

[0009] Specifically, the gate of NMOS transistor Q3 is connected to the first terminal of resistor R8, and the source of NMOS transistor Q4 is connected to the first terminal of resistor R9, and the source of NMOS transistor Q5 is connected to the second terminal of resistor R10; the gate of NMOS transistor Q7 is connected to the first terminal of resistor R14, and the source of NMOS transistor Q7 is connected to the second terminal of resistor R14; the gate of NMOS transistor Q8 is connected to the first terminal of resistor R15, and the source of NMOS transistor Q8 is connected to the second terminal of resistor R15; the gate of NMOS transistor Q9 is connected to the first terminal of resistor R16, and the source of NMOS transistor Q9 is connected to the second terminal of resistor R16.

[0010] Furthermore, it also includes a motor M1, wherein the source of NMOS transistor Q3 and the drain of NMOS transistor Q7 are connected to the first terminal of the motor M1, the source of NMOS transistor Q4 and the drain of NMOS transistor Q8 are connected to the second terminal of the motor M1, and the source of NMOS transistor Q5 and the drain of NMOS transistor Q9 are connected to the third terminal of the motor M1.

[0011] In this configuration, the source of the upper-level NMOS transistor Q3 is at the U terminal, the source of the lower-level NMOS transistor Q3 is at the V terminal, and the source of the upper-level NMOS transistor Q3 is at the W terminal. By controlling the voltages of the three upper-level transistors and the three lower-level transistors, it is possible to control the three upper-level transistors and the three lower-level transistors to conduct in turn.

[0012] Further, the bootstrap unit includes bootstrap capacitors C1, C2, and C3; the first terminal of bootstrap capacitor C1 is electrically connected to the source of NMOS transistor Q3, the first terminal of bootstrap capacitor C2 is electrically connected to the source of NMOS transistor Q4, and the first terminal of bootstrap capacitor C3 is electrically connected to the source of NMOS transistor Q5; the bootstrap unit also includes diodes D5, D6, and D7; the cathode of diode D5 is electrically connected to the second terminal of bootstrap capacitor C1, the cathode of diode D6 is electrically connected to the second terminal of bootstrap capacitor C2, and the cathode of diode D7 is electrically connected to the second terminal of bootstrap capacitor C3; the anodes of diodes D5, D6, and D7 are all connected to the power supply VCC.

[0013] By controlling the three upper-side transistors and three lower-side transistors to conduct alternately, the voltage across bootstrap capacitors C1, C2, and C3 can be raised to VCC_Drv. Each time the three upper-side transistors (NMOS transistors Q3, Q4, and Q5) are turned on, the negative voltage of bootstrap capacitors C1, C2, and C3 is VM, and the positive voltage of bootstrap capacitors C1, C2, and C3 is raised to VM + VCC_Drv.

[0014] Furthermore, the reverse polarity protection diode includes diodes D1, D2, and D3. The positive terminals of diodes D1, D2, and D3 are electrically connected to the second terminals of bootstrap capacitors C3, C2, and C1, respectively, and their negative terminals are connected to the gate of NMOS transistor Q1 through a current-limiting resistor R2.

[0015] Furthermore, the reverse connection protection module also includes a capacitor C4, the first end of which is electrically connected to the source of the NMOS transistor Q1, and the second end of which is electrically connected to the gate of the NMOS transistor Q1. Here, capacitor C4 is a filter capacitor.

[0016] While raising the voltage across bootstrap capacitors C1, C2, and C3 to VCC_Drv, these capacitors simultaneously charge capacitor C4 through diodes D1, D2, and D3, thereby raising the drive voltage of NMOS transistor Q1 to VM+VCC_Drv and turning it on. The charging control frequency and bootstrap time of the bootstrap capacitors are determined by the energy consumed by the bootstrap capacitors and the NMOS transistor to turn on.

[0017] Furthermore, the reverse connection protection module also includes a Zener diode D8. The positive terminal of the Zener diode D8 is electrically connected to the source of the NMOS transistor Q1, and the negative terminal is electrically connected to the gate of the NMOS transistor Q1. The Zener diode D8 prevents the gate-source voltage of the NMOS transistor Q1 from exceeding 20V. Therefore, in a 12V system, the Zener diode D8 can be removed.

[0018] Furthermore, it also includes a reverse connection pull-low module. The first terminal of the reverse connection pull-low module is electrically connected to the source of the NMOS transistor Q1, the second terminal is electrically connected to the gate of the NMOS transistor Q1, and the third terminal is grounded. By providing a reverse connection pull-low module, when the battery is reverse-connected, the gate voltage of the NMOS transistor Q1 is pulled low, causing the NMOS transistor Q1 to be cut off, thus ensuring the reliability of the reverse connection protection function of the motor control circuit.

[0019] Furthermore, the reverse pull-low module includes a transistor Q2 and a diode D4; the cathode of the diode D4 is the first terminal of the reverse pull-low module and is electrically connected to the source of the NMOS transistor Q1; the collector of the transistor Q2 is the second terminal of the reverse pull-low module and is electrically connected to the gate of the NMOS transistor Q1; the anode of the diode D4 is electrically connected to the emitter of the transistor Q2; the base of the transistor Q2 is grounded through a resistor R7; and the base and emitter of the transistor Q2 are electrically connected through a resistor R3.

[0020] When the battery is reverse-connected, transistor Q2 turns on, pulling the gate voltage of NMOS transistor Q1 low. The gate voltage of NMOS transistor Q1 is clamped to V by transistor Q2. D4 +V Q2 This causes the NMOS transistor Q1 to turn off, ensuring the reliability of the reverse connection protection function of the motor control circuit.

[0021] Furthermore, it also includes a battery. When the battery is not reverse-connected, the negative terminal of the battery is grounded, and the positive terminal is electrically connected to the source of the NMOS transistor Q1. At this time, the driving voltage of the NMOS transistor Q1 is raised to VM+VCC_Drv, thereby turning on the NMOS transistor Q1.

[0022] When the battery is reverse-connected, the positive terminal of the battery is grounded, and the negative terminal is electrically connected to the source of the NMOS transistor Q1. At this time, the gate voltage of the NMOS transistor Q1 is clamped to V by the transistor Q2. D4 +V Q2 This causes the NMOS transistor Q1 to turn off.

[0023] Therefore, this utility model has the following beneficial effects:

[0024] (1) By setting NMOS transistor Q1 at the power supply terminal to prevent reverse connection, the power consumption and circuit cost in high-power circuits are reduced, thereby reducing the temperature of the circuit during operation, while ensuring the integrity of the ground line.

[0025] (2) By turning on the upper and lower transistors of the motor control module in turn, the voltage across the bootstrap capacitors C1, C2, and C3 is raised, capacitor C4 is charged, and then the NMOS transistor Q1 is powered and driven, which reduces the complexity of the reverse connection motor control circuit and further reduces the circuit cost.

[0026] (3) A reverse connection pull-down module is provided. When the battery is reverse connected, the gate voltage of NMOS transistor Q1 is pulled down to make NMOS transistor Q1 cut off, thus ensuring the reliability of the reverse connection protection function of the motor control circuit. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0028] Figure 1 This is an overall circuit block diagram of an NMOS reverse polarity protection motor control circuit according to the present invention.

[0029] Figure 2 This is an overall circuit structure diagram of an NMOS reverse polarity protection motor control circuit according to the present invention. Detailed Implementation

[0030] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model, and should not be construed as limiting this utility model.

[0031] like Figure 1 The diagram shown is an overall circuit block diagram of an NMOS reverse polarity protection motor control circuit according to this embodiment. Figure 2 The diagram shown is an overall circuit structure diagram of an NMOS reverse connection protection motor control circuit according to this utility model. This embodiment of the NMOS reverse connection protection motor control circuit includes a motor control module, a reverse connection protection module, and a reverse connection pull-low module.

[0032] The motor control module has three upper-level transistors and three lower-level transistors. The three upper-level transistors are NMOS transistors Q3, Q4, and Q5, and the three lower-level transistors are NMOS transistors Q7, Q8, and Q9. The sources of the three upper-level transistors are electrically connected to the drains of the three lower-level transistors one by one; that is, the source of NMOS transistor Q3 is electrically connected to the drain of NMOS transistor Q7, the source of NMOS transistor Q4 is electrically connected to the drain of NMOS transistor Q8, and the source of NMOS transistor Q5 is electrically connected to the drain of NMOS transistor Q9. The drains of the three upper-level transistors are connected to the power supply VM, and the sources of the three lower-level transistors are grounded. In the motor control module, the gate and source of each NMOS transistor are electrically connected via resistors. Specifically, the gate of NMOS transistor Q3 is connected to the first terminal of resistor R8, and the source of NMOS transistor Q3 is connected to the second terminal of resistor R8; the gate of NMOS transistor Q4 is connected to the first terminal of resistor R9, and the source of NMOS transistor Q4 is connected to the second terminal of resistor R9; the gate of NMOS transistor Q5 is connected to the first terminal of resistor R10, and the source of NMOS transistor Q5 is connected to the second terminal of resistor R10; the gate of NMOS transistor Q7 is connected to the first terminal of resistor R14, and the source of NMOS transistor Q7 is connected to the second terminal of resistor R14; the gate of NMOS transistor Q8 is connected to the first terminal of resistor R15, and the source of NMOS transistor Q8 is connected to the second terminal of resistor R15; and the gate of NMOS transistor Q9 is connected to the first terminal of resistor R16, and the source of NMOS transistor Q9 is connected to the second terminal of resistor R16.

[0033] The motor control module also includes a bootstrap unit, which comprises bootstrap capacitors C1, C2, and C3, and diodes D5, D6, and D7. Specifically, the source of the upper-side NMOS transistor Q3 is connected to the first terminal of bootstrap capacitor C1, the second terminal of bootstrap capacitor C1 is connected to the cathode of diode D5, and the anode of diode D5 is connected to the power supply VCC. The source of the upper-side NMOS transistor Q4 is connected to the first terminal of bootstrap capacitor C2, the second terminal of bootstrap capacitor C2 is connected to the cathode of diode D6, and the anode of diode D6 is connected to the power supply VCC. The source of the upper-side NMOS transistor Q5 is connected to the first terminal of bootstrap capacitor C3, the second terminal of bootstrap capacitor C3 is connected to the cathode of diode D7, and the anode of diode D7 is connected to the power supply VCC.

[0034] In a preferred embodiment, the source of the upper NMOS transistor Q3 is the U terminal, the source of the upper NMOS transistor Q3 is the V terminal, and the source of the upper NMOS transistor Q3 is the W terminal. The sources of the three upper transistors in the motor control module are respectively connected to the first, second, and third terminals of the motor M1, that is, the drains of the three lower transistors are respectively connected to port 1, port 2, and port 3 of the motor M1. A resistor is connected to the gate of each of the three upper and lower transistors. The gate of the upper NMOS transistor Q3 is connected to the first terminal of resistor R4, and the second terminal of resistor R4 is the Drv_UH terminal; the gate of the upper NMOS transistor Q4 is connected to the first terminal of resistor R5, and the second terminal of resistor R5 is the Drv_VH terminal; the gate of the upper NMOS transistor Q5 is connected to the first terminal of resistor R6, and the second terminal of resistor R6 is the Drv_WH terminal; the gate of the lower NMOS transistor Q7 is connected to the first terminal of resistor R11, and the second terminal of resistor R11 is the Drv_UL terminal; the gate of the lower NMOS transistor Q8 is connected to the first terminal of resistor R12, and the second terminal of resistor R12 is the Drv_VL terminal; the gate of the lower NMOS transistor Q9 is connected to the first terminal of resistor R13, and the second terminal of resistor R13 is the Drv_WL terminal.

[0035] By controlling the voltages of the three upper and three lower transistors in the motor control module via terminals U, V, W, Drv_UH, Drv_VH, Drv_WH, Drv_UL, Drv_VL, Drv_WL, and motor M1, the system can control the three upper and three lower transistors to conduct alternately, thereby raising the voltage across bootstrap capacitors C1, C2, and C3 to VCC_Drv. Each time the three upper NMOS transistors Q3, Q4, and Q5 are turned on, the negative voltage of capacitors C1, C2, and C3 is VM, and the positive voltage of bootstrap capacitors C1, C2, and C3 is raised to VM + VCC_Drv, thus raising the voltage across bootstrap capacitors C1, C2, and C3 to VCC_Drv.

[0036] The NMOS reverse connection protection motor control circuit of this embodiment also includes a battery. When the battery is not reverse connected, the negative terminal of the battery is grounded, and when the battery is reverse connected, the positive terminal of the battery is grounded.

[0037] This embodiment of the NMOS reverse connection protection motor control circuit further includes a reverse connection protection module, which includes an NMOS transistor Q1, a resistor R1, and reverse connection protection diodes, wherein the reverse connection protection diodes include diodes D1, D2, and D3. The NMOS transistor Q1 is located at the power supply terminal of the circuit. The drain of the NMOS transistor Q1 is connected to the power supply VM. When the battery is not reverse connected, the source of the NMOS transistor Q1 is electrically connected to the positive terminal of the battery; when the power supply is reverse connected, the source of the NMOS transistor Q1 is electrically connected to the negative terminal of the battery. A resistor R1 is connected between the source and gate of the NMOS transistor Q1. The first end of the resistor R1 is electrically connected to the source of the NMOS transistor Q1, and the second end of the resistor R1 is electrically connected to the gate of the NMOS transistor Q1.

[0038] In a preferred embodiment, a filter capacitor C4 is connected between the source and gate of the NMOS transistor Q1. The first end of the capacitor C4 is connected to the source of the NMOS transistor Q1, and the second end is connected to the gate of the NMOS transistor Q1. The capacitor C4 is connected in parallel with the resistor R1.

[0039] In another preferred embodiment, a Zener diode D8 is connected between the source and gate of the NMOS transistor Q1. The positive terminal of the Zener diode D8 is electrically connected to the source of the NMOS transistor Q1, and the negative terminal of the Zener diode D8 is electrically connected to the gate of the NMOS transistor Q1. The Zener diode D8 is connected in parallel with the resistor R1. The Zener diode D8 can prevent the gate-source voltage of the NMOS transistor Q1 from exceeding 20V. Therefore, in a 12V system, the Zener diode D8 can be omitted.

[0040] This embodiment of an NMOS reverse connection protection motor control circuit uses an NMOS transistor Q1 for battery reverse connection protection. Compared with the prior art using a PMOS transistor for battery reverse connection protection, and compared with the prior art using a PMOS transistor and a transistor at the power supply end, and controlling the conduction and turn-off of the PMOS transistor by controlling the transistor, this embodiment reduces the power consumption of the reverse connection protection motor control circuit in high-power circuits, thereby reducing the temperature of the circuit during operation and solving the problem of excessively high operating temperature. At the same time, since the cost of NMOS transistors is lower than that of PMOS transistors, the technical solution of this embodiment reduces the cost of the reverse connection protection motor control circuit.

[0041] In this embodiment, an NMOS reverse polarity protection motor control circuit places the NMOS transistor Q1 at the power supply end. Compared with the prior art, which places the NMOS transistor at the ground end and controls the conduction and turn-off of the NMOS transistor by power-on, this avoids the division of the ground line, ensures the integrity of the ground line, and does not require isolation from external communication.

[0042] The gate of NMOS transistor Q1 is connected to the motor control module via diodes D1, D2, and D3, and resistor R2. The anodes of diodes D1, D2, and D3 are electrically connected to the second terminals of bootstrap capacitors C3, C2, and C1, respectively. Specifically, the anode of diode D1 is connected to the second terminal of bootstrap capacitor C3, the anode of diode D2 is connected to the second terminal of bootstrap capacitor C2, and the anode of diode D3 is connected to the second terminal of bootstrap capacitor C1. The cathodes of diodes D1, D2, and D3 are connected to the second terminal of resistor R2, and the first terminal of resistor R2 is electrically connected to the gate of NMOS transistor Q1.

[0043] This embodiment of an NMOS reverse polarity protection motor control circuit uses the upper drive capacitors C1, C2, and C3 of the motor control module to raise the voltage across them. This voltage, in turn, charges capacitor C4 via diodes D1, D2, and D3, thereby enabling capacitor C4 to drive the NMOS transistor Q1. In other words, while raising the voltage across capacitors C1, C2, and C3 to VCC_Drv, the voltage across C1, C2, and C3 simultaneously charges capacitor C4 through diodes D1, D2, and D3, thus raising the drive voltage of the NMOS transistor Q1 to VM+VCC_Drv, turning on the NMOS transistor Q1. The charging control frequency and bootstrap time of the bootstrap capacitor are determined by the energy consumed by the bootstrap capacitor and the NMOS transistor to turn on.

[0044] The circuit structure described above reduces power consumption in high-power circuits, lowers operating temperature, and ensures ground integrity, while also reducing the complexity of the reverse polarity protection motor control circuit and further lowering circuit costs.

[0045] This embodiment of the NMOS reverse connection protection motor control circuit further includes a reverse connection pull-low module, which includes a transistor Q2, a diode D4, a resistor R3, and a resistor R7. The cathode of diode D4 is electrically connected to the source of NMOS transistor Q1, the anode of diode D4 is electrically connected to the emitter of transistor Q2, the collector of transistor Q2 is electrically connected to the gate of NMOS transistor Q1, the base of transistor Q2 is electrically connected to the first terminal of resistor R7, the second terminal of resistor R7 is grounded, the first terminal of resistor R3 is electrically connected to the anode of diode D4, and the second terminal of resistor R3 is electrically connected to the base of transistor Q2.

[0046] When the battery is reverse-connected, transistor Q2 turns on, pulling the gate voltage of NMOS transistor Q1 low. The gate voltage of NMOS transistor Q1 is clamped to V by transistor Q2. D4 +V Q2This causes the NMOS transistor Q1 to turn off, thus preventing reverse connection of the battery. The reverse connection pull-down module and the NMOS transistor Q1 ensure the reliability of the reverse connection protection function of the NMOS reverse connection protection motor control circuit in this embodiment.

[0047] In this embodiment, an NMOS reverse polarity protection motor control circuit charges capacitor C4 through a motor control module and diodes D1, D2, and D3, raising the drive voltage of NMOS transistor Q1 to VM+VCC_Drv, thereby achieving the purpose of driving NMOS transistor Q1. The specific working process is as follows.

[0048] Before driving the motor, the controller needs to perform a bootstrap operation, where the upper and lower transistors are turned on alternately. This raises the voltage across bootstrap capacitors C1, C2, and C3 to VCC_Drv, while simultaneously charging capacitor C4 through diodes D1, D2, and D3. Each time the three upper-level NMOS transistors Q3, Q4, and Q5 are turned on, the negative voltage of capacitors C1, C2, and C3 is VM, and the positive voltage is raised to VM+VCC_Drv. At this time, the voltage across capacitors C1, C2, and C3 charges capacitor C4 through diodes D1, D2, and D3, thereby raising the drive voltage of NMOS transistor Q1 to VM+VCC_Drv, turning on NMOS transistor Q1.

[0049] When the battery is reverse-connected, transistor Q2 turns on, pulling the gate voltage of NMOS transistor Q1 low. The gate voltage of NMOS transistor Q1 is clamped to V by transistor Q2. D4 +V Q2 This causes the NMOS transistor Q1 to turn off. The charging control frequency and bootstrap time of the bootstrap capacitor are determined by the energy consumed by the bootstrap capacitor and the NMOS transistor to turn on.

[0050] This embodiment of an NMOS reverse connection protection motor control circuit uses an NMOS transistor Q1 to prevent reverse connection of the battery, which reduces the power consumption of the reverse connection protection motor control circuit in high-power circuits, thereby reducing the temperature of the circuit during operation and solving the problem of excessively high temperature during circuit operation. At the same time, since the cost of NMOS transistors is lower than that of PMOS transistors, the technical solution of this embodiment reduces the cost of the reverse connection protection motor control circuit.

[0051] This embodiment of the NMOS reverse polarity protection motor control circuit avoids ground line segmentation by placing the NMOS transistor Q1 at the power supply end, ensuring the integrity of the ground line, and at the same time, it does not require isolation from external communication.

[0052] In this embodiment, the NMOS reverse polarity protection motor control circuit also raises the voltage across capacitors C1, C2, and C3 driven by the upper and lower transistors of the motor control module, charging capacitor C4 and then powering NMOS transistor Q1 to turn it on. This reduces the complexity of the reverse polarity protection motor control circuit and further reduces the circuit cost.

[0053] In addition, the NMOS reverse connection protection motor control circuit of this embodiment also includes a reverse connection pull-down module. When the battery is reverse connected, the gate voltage of the NMOS transistor Q1 is pulled low, thereby turning off the NMOS transistor Q1 and realizing reverse connection protection. The reverse connection pull-down module and the NMOS transistor Q1 ensure the reliability of the reverse connection protection function of the motor control circuit.

[0054] The above description is merely a preferred embodiment of the present utility model and does not constitute any limitation on the present utility model. Any simple modifications, alterations, or equivalent structural transformations made to the above embodiments based on the technical essence of the present utility model shall still fall within the protection scope of the present utility model.

Claims

1. An NMOS reverse polarity protection motor control circuit, characterized in that, The device includes a motor control module and a reverse connection protection module that are electrically connected to each other. The motor control module includes a bootstrap unit, and the reverse connection protection module includes an NMOS transistor Q1 and a reverse connection protection diode. The gate of the NMOS transistor Q1 is electrically connected to the negative terminal of the reverse connection protection diode, the drain is connected to the power supply VM, and the source and gate are electrically connected through a resistor R1. The positive terminal of the reverse connection protection diode is electrically connected to the bootstrap unit.

2. The NMOS reverse polarity protection motor control circuit according to claim 1, characterized in that, The motor control module includes three upper-level transistors and three lower-level transistors. The upper-level transistors include NMOS transistors Q3, Q4, and Q5, and the lower-level transistors include NMOS transistors Q7, Q8, and Q9. The source of NMOS transistor Q3 is electrically connected to the drain of NMOS transistor Q7, the source of NMOS transistor Q4 is electrically connected to the drain of NMOS transistor Q8, and the source of NMOS transistor Q5 is electrically connected to the drain of NMOS transistor Q9. The drains of the three upper-level transistors are connected to a common power supply VM, and the sources of the three lower-level transistors are grounded. The gate and source of each NMOS transistor in the motor control module are electrically connected through a resistor.

3. The NMOS reverse polarity protection motor control circuit according to claim 2, characterized in that, It also includes a motor M1, wherein the source of NMOS transistor Q3 and the drain of NMOS transistor Q7 are connected to the first terminal of the motor M1, the source of NMOS transistor Q4 and the drain of NMOS transistor Q8 are connected to the second terminal of the motor M1, and the source of NMOS transistor Q5 and the drain of NMOS transistor Q9 are connected to the third terminal of the motor M1.

4. The NMOS reverse polarity protection motor control circuit according to claim 3, characterized in that, The bootstrap unit includes bootstrap capacitor C1, bootstrap capacitor C2, and bootstrap capacitor C3; the first terminal of bootstrap capacitor C1 is electrically connected to the source of NMOS transistor Q3, the first terminal of bootstrap capacitor C2 is electrically connected to the source of NMOS transistor Q4, and the first terminal of bootstrap capacitor C3 is electrically connected to the source of NMOS transistor Q5. The bootstrap unit further includes diodes D5, D6, and D7; the cathode of diode D5 is electrically connected to the second terminal of bootstrap capacitor C1, the cathode of diode D6 is electrically connected to the second terminal of bootstrap capacitor C2, and the cathode of diode D7 is electrically connected to the second terminal of bootstrap capacitor C3; the anodes of diodes D5, D6, and D7 are all connected to the power supply VCC.

5. The NMOS reverse polarity protection motor control circuit according to claim 4, characterized in that, The reverse polarity protection diodes include diodes D1, D2, and D3. The positive terminals of diodes D1, D2, and D3 are electrically connected to the second terminals of bootstrap capacitors C3, C2, and C1, respectively. The negative terminals are connected to the gate of NMOS transistor Q1 through a current-limiting resistor R2.

6. The NMOS reverse polarity protection motor control circuit according to claim 1, characterized in that, The reverse connection protection module also includes a capacitor C4, the first end of which is electrically connected to the source of the NMOS transistor Q1, and the second end of which is electrically connected to the gate of the NMOS transistor Q1.

7. The NMOS reverse polarity protection motor control circuit according to claim 1, characterized in that, The reverse connection protection module also includes a Zener diode D8, the positive terminal of which is electrically connected to the source of the NMOS transistor Q1, and the negative terminal of which is electrically connected to the gate of the NMOS transistor Q1.

8. The NMOS reverse polarity protection motor control circuit according to claim 1, characterized in that, It also includes a reverse pull-low module, wherein the first end of the reverse pull-low module is electrically connected to the source of the NMOS transistor Q1, the second end is electrically connected to the gate of the NMOS transistor Q1, and the third end is grounded.

9. The NMOS reverse polarity protection motor control circuit according to claim 8, characterized in that, The reverse pull-low module includes a transistor Q2 and a diode D4; the cathode of the diode D4 is the first terminal of the reverse pull-low module and is electrically connected to the source of the NMOS transistor Q1; the collector of the transistor Q2 is the second terminal of the reverse pull-low module and is electrically connected to the gate of the NMOS transistor Q1; the anode of the diode D4 is electrically connected to the emitter of the transistor Q2; the base of the transistor Q2 is grounded through a resistor R7; and the base and emitter of the transistor Q2 are electrically connected through a resistor R3.

10. An NMOS reverse polarity protection motor control circuit according to any one of claims 1 to 9, characterized in that, It also includes a battery, and when the battery is not reverse-connected, the negative terminal of the battery is grounded and the positive terminal is electrically connected to the source of the NMOS transistor Q1.

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