Chip plating structure

Abstract

The application discloses a chip plating structure, comprising: a frame, the frame having a front surface and a back surface; a chip, the chip having a front surface and a back surface, the chip being flip-chip mounted on the front surface of the frame with the front surface facing the frame, the back surface of the chip being provided with printing; a plastic encapsulation layer, the plastic encapsulation layer covering the frame and the chip and exposing the back surface of the frame and the back surface of the chip; and a protective film, the protective film being attached to the plastic encapsulation layer, the protective film completely covering the back surface of the chip and the periphery of the protective film being attached to the plastic encapsulation layer at the periphery of the chip. The chip plating structure can completely cover and protect the exposed back surface of the chip through the protective film, the chip plating structure can effectively prevent the back surface of the chip from contacting a plating agent during subsequent plating, and the protective film is removed after the chip plating structure completes plating.

Description

Technical Field

[0001] This utility model relates to the semiconductor field, specifically to a chip electroplating structure. Background Technology

[0002] Exposed chip products refer to products where the back of the chip is directly exposed, with corresponding markings on the exposed side. The packaging process for exposed chip products typically uses a pre-plated frame, such as a PPF coating. However, some products require tin plating due to reliability considerations. Electroplating is a major challenge for exposed chip products; if electroplating is performed directly, the exposed part of the chip will also be tinned under the influence of the current, thus covering the markings on the chip. Utility Model Content

[0003] This invention addresses the aforementioned problems by proposing a chip electroplating structure.

[0004] The technical solution adopted by this utility model is as follows:

[0005] A chip electroplating structure, comprising:

[0006] A frame having a front and a back;

[0007] The chip has a front and a back side, and the chip is flip-mounted on the front side of the frame with the front side facing the frame. The back side of the chip has printed text.

[0008] A molding compound, located on the frame and covering the chip, exposes the back of the frame and the back of the chip.

[0009] The protective film is applied to the molding compound, completely covering the back of the chip, with its periphery attached to the molding compound around the chip.

[0010] The chip plating structure uses a protective film to completely cover and protect the back of the exposed chip. During subsequent electroplating, the chip plating structure can effectively prevent the chip from coming into contact with the plating agent. After the electroplating is completed, the protective film is removed.

[0011] The chip electroplating structure of this application can effectively prevent the printing on the back of the chip from being covered by electroplating, and this application can ensure the reliable implementation of the electroplating process for exposed chip products.

[0012] In one embodiment of the present invention, the side of the molding layer facing away from the frame is flush with the back of the chip.

[0013] The flush design makes it easy to apply and remove the protective film.

[0014] In one embodiment of this utility model, the protective film is fitted with a gap to the back of the chip.

[0015] In one embodiment of this utility model, the protective film is in contact with the back of the chip in a non-adhesive manner.

[0016] In one embodiment of the present invention, the portion of the protective film covering the back of the chip is attached to the back of the chip.

[0017] The protective film is attached to the back of the chip, ensuring reliable contact and effectively preventing the plating agent from contacting the back of the chip. Specifically, even if an accident causes the plating agent to breach the gap between the protective film and the molding compound, the protective film's placement on the back of the chip still prevents the plating agent from contacting the back of the chip, thus providing better protection.

[0018] In one embodiment of this utility model, the protective film includes:

[0019] Protective layer;

[0020] A first adhesive layer is located between the protective layer and the back of the chip;

[0021] A second adhesive layer is provided, wherein the first adhesive layer is located between the protective layer and the molding layer.

[0022] In one embodiment of the present invention, the adhesiveness of the second adhesive layer is greater than that of the first adhesive layer.

[0023] The second adhesive layer is more viscous than the first adhesive layer, meaning the adhesion between the protective film and the molding compound is stronger. This prevents the plating agent from penetrating the second adhesive layer and contacting the chip during electroplating. Furthermore, when removing the protective film, the first adhesive layer is less likely to remain on the chip.

[0024] In one embodiment of this utility model, the protective layer is a UV film layer.

[0025] In practical applications, when removing the protective film, the structure of the protective film can be destroyed by irradiating it with UV light, making the removal operation easier.

[0026] In one embodiment of this utility model, the protective layer is a polyolefin film.

[0027] In one embodiment of the present invention, the first adhesive layer is an acrylic adhesive layer, and the second adhesive layer is an acrylic adhesive layer.

[0028] In one embodiment of the present invention, the density of the acrylic adhesive in the second adhesive layer is greater than the density of the acrylic adhesive in the first adhesive layer.

[0029] In practical applications, the adhesive strength of the second adhesive layer is made greater than or equal to that of the first adhesive layer by adjusting the density. Specifically, the density of the acrylic adhesive in the second adhesive layer is greater than that in the first adhesive layer.

[0030] In one embodiment of the present invention, the front side of the chip has a bump, and the bump is connected to the front side of the frame by solder paste.

[0031] In one embodiment of the present invention, the frame is a metal frame, the frame includes pins, and the chip is flip-mounted on the front side of the pins.

[0032] The beneficial effects of this utility model are: the chip electroplating structure, through the protective film, can completely cover and protect the back of the exposed chip. During subsequent electroplating, the chip electroplating structure can effectively prevent the chip from contacting the electroplating agent. After the electroplating is completed, the protective film is removed. This chip electroplating structure can effectively prevent the printing on the back of the chip from being covered by electroplating, and this application can ensure the reliable implementation of the electroplating process for exposed chip products. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the chip electroplating structure of this application;

[0034] Figure 2 This is a schematic diagram of the chip described in this application;

[0035] Figure 3 This is a schematic diagram of the chip bumps after solder paste has been applied.

[0036] Figure 4 This is a schematic diagram of the chip flip-mounted behind the frame in this application;

[0037] Figure 5 This is a schematic diagram of the molding compound layer formed on the chip and frame according to this application;

[0038] Figure 6 This is a schematic diagram of the tin layer formed by electroplating in this application;

[0039] Figure 7 yes Figure 6 A diagram showing the result after removing the protective film;

[0040] Figure 8 This is a schematic diagram of cutting a chip electroplating structure with multiple chips according to this application;

[0041] Figure 9 This is a flowchart of a processing method for an exposed chip product according to this application.

[0042] The labels for the attached figures are as follows:

[0043] 1. Frame; 11. Front of the frame; 12. Back of the frame; 13. Pin; 15. Tin layer; 2. Chip; 21. Front of the chip; 22. Back of the chip; 23. Bump; 24. Solder paste; 3. Molding layer; 4. Protective film; 41. Protective layer; 42. First adhesive layer; 43. Second adhesive layer. Detailed Implementation

[0044] To make the technical problems, technical solutions and beneficial effects to be solved by this application clearer, the following describes this application in further detail with reference to the accompanying drawings and embodiments.

[0045] In the description of this application, it should be noted that the use of terms such as "first" and "second" to define objects (such as elements, components, regions, layers, doping types and / or parts) is merely for the purpose of distinguishing different objects and is not necessarily used to describe a specific order or sequence. Unless the context clearly indicates otherwise, it should be understood that such data can be used interchangeably where appropriate.

[0046] In the description of this application, it should be understood that the singular forms “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “compose” and / or “comprise” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0047] In the description of this application, it should also be noted that when a component is referred to as "on another component," "connected to another component," or "in contact with another component," it can mean not only that a component is directly on, directly connected to, or directly in contact with another component, but also that an intermediate component can be inserted between the two components. Furthermore, "connection" includes not only fixed connections but also detachable connections or integral connections. Similarly, when an element is referred to as "electrically connected," "electrically contacted," "electrically coupled," or "electrically coupled to" another element, the two elements can be in direct electrical contact or point coupling, or they can be in electrical contact or point coupling through an intermediate component.

[0048] In the description of this application, it should also be noted that the orientation or positional relationship indicated by directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" is usually based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this application and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this application; the directional terms "inner" and "outer" refer to the inner and outer contours relative to the outline of each component itself.

[0049] Furthermore, in the description of this application, spatial relation terms such as "below," "under," "below," "below," "below," "above," "on the upper surface of," "above," etc., can be used to describe the spatial positional relationship between one element or feature shown in the figures and other elements or features. It should be understood that spatial relation terms, in addition to the orientation shown in the figures, also include different orientations of elements or features in use and operation. For example, if an element or feature in the figures is flipped or inverted, an element or feature described as "below" or "below" other elements or features will be oriented "above" other elements or features. Furthermore, elements may also include other orientations (e.g., rotated by an angle or other orientations).

[0050] The present invention will now be described in detail with reference to the accompanying drawings.

[0051] like Figure 1 As shown, a chip electroplating structure includes:

[0052] Frame 1, the frame having a front 11 and a back 12;

[0053] Chip 2 has a front side 21 and a back side 22. Chip 2 is flip-mounted on the front side 11 of the frame with its front side 21 facing the frame 1. The back side 22 of the chip is provided with printed characters.

[0054] A molding layer 3 is located on the frame 1 and covers the chip 2. The molding layer 3 exposes the back side 12 of the frame and the back side 22 of the chip.

[0055] Protective film 4 is attached to the molding compound 3, and the protective film 4 completely covers the back side 22 of the chip, with the periphery of the protective film 4 attached to the molding compound 3 around the chip 2.

[0056] In this embodiment, the chip electroplating structure can completely cover and protect the back side 22 of the exposed chip through the protective film 4. When the chip electroplating structure is subsequently electroplated, it can effectively prevent the chip 2 from contacting the electroplating agent. After the chip electroplating structure completes the electroplating, the protective film 4 is removed.

[0057] It should be noted that the markings refer to important markings such as device markings, batch numbers, data codes, and logos printed on the chip. The integrity of the markings on the chip is an important quality indicator of the packaging structure.

[0058] The chip plating structure of this application can effectively prevent the printed text on the back 22 of the chip from being covered by the plating. This application can ensure the reliable implementation of the plating process for exposed chip products.

[0059] In some embodiments, the chip 2 may include a power chip, a logic chip, or a memory chip. In some embodiments, the logic chip may include a gate array, a cell substrate array, an embedded array, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), a central processing unit (CPU), a microprocessor unit (MPU), a microcontroller unit (MCU), a logic integrated circuit (IC), an application processor (AP), a display driver IC (DDI), a radio frequency (RF) chip, a power supply chip, or a complementary metal-oxide-semiconductor (CMOS) image sensor. In some embodiments, the memory chip may include volatile memory chips (such as dynamic random access memory (DRAM) or static RAM (SRAM)) or non-volatile memory chips (such as flash memory (Flash), phase-change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM), or resistive RAM (ReRAM)). In one specific embodiment, the memory chip may include a high-bandwidth memory (HBM) containing DRAM chips.

[0060] The chip 2 can be a single chip or a stacked flip chip.

[0061] like Figure 1 As shown, in this embodiment, the side of the molding layer 3 facing away from the frame 1 is flush with the back surface 22 of the chip. This flush design facilitates the application and removal of the protective film 4.

[0062] In practical applications, the protective film 4 can be simply pasted on the surface of the molding layer 3, meaning that the protective film is in a gap fit with the back of the chip. Alternatively, the protective film 4 can be in contact with the back of the chip in a non-adhesive manner to avoid the residue of the adhesive on the protective film 4 contaminating the printing on the back 22 of the chip.

[0063] like Figure 1 As shown, in this embodiment, the protective film 4 covers the back 22 of the chip and is attached to the back 22 of the chip.

[0064] The protective film 4 is attached to the back 22 of the chip, which allows for reliable contact with the chip 2 and effectively prevents the electroplating agent from contacting the back 22 of the chip.

[0065] Specifically, if an unexpected situation causes the electroplating agent to break through the gap between the protective film and the molding layer, the protective film can still prevent the electroplating agent from contacting the back of the chip because it is attached to the back of the chip. In other words, attaching the protective film to the back of the chip can provide better protection.

[0066] like Figure 1 As shown, the protective film 4 includes:

[0067] Protective layer 41;

[0068] The first adhesive layer 42 is located between the protective layer 41 and the back surface 22 of the chip;

[0069] The second adhesive layer 43 and the first adhesive layer 42 are located between the protective layer 41 and the molding layer 3.

[0070] In practical applications, the adhesiveness of the second adhesive layer 43 is greater than that of the first adhesive layer 42.

[0071] The second adhesive layer 43 has a stronger adhesiveness than the first adhesive layer 42, meaning the protective film 4 has a stronger bond with the molding compound 3. This prevents the electroplating agent from penetrating the second adhesive layer 43 and contacting the chip 2 during electroplating. Furthermore, the first adhesive layer 42 has a weaker adhesiveness, so it is less likely to remain on the chip 2 when the protective film 4 is removed.

[0072] In practical applications, the protective layer 41 is a UV film layer.

[0073] The protective layer 41 is a UV film layer. When removing the protective film 4, the structure of the protective film 4 can be destroyed by irradiating UV light, making the removal operation more convenient.

[0074] In this embodiment, the protective layer 41 is a polyolefin UV film.

[0075] In other embodiments, the protective layer may also be other thin films.

[0076] In some embodiments, the first adhesive layer 42 and the second adhesive layer 43 are one of the following: heat-release film, ABF film, temporary bonding adhesive, etc.

[0077] In this embodiment, the first adhesive layer 42 is an acrylic adhesive layer, and the second adhesive layer 43 is an acrylic adhesive layer.

[0078] When both the first adhesive layer 42 and the second adhesive layer 43 are acrylic adhesive layers, the adhesive strength of the second adhesive layer 43 can be made greater than that of the first adhesive layer 42 by adjusting the density. Specifically, the density of the acrylic adhesive in the second adhesive layer 43 is greater than the density of the acrylic adhesive in the first adhesive layer 42.

[0079] In other embodiments, the adhesiveness of the second adhesive layer and the first adhesive layer is adjusted by adjusting the materials of the second adhesive layer and the first adhesive layer.

[0080] like Figure 1 As shown, in this embodiment, the front side 21 of the chip has a bump 23, which is connected to the front side 11 of the frame via solder paste 24.

[0081] In other embodiments, the front side of the chip has solder balls.

[0082] In this embodiment, the frame is a metal frame, the frame includes pins, the chip 21 is flip-mounted on the front side of the pins, and a tin layer 15 is provided on the back side of the pins.

[0083] like Figure 9 As shown, this embodiment also discloses a method for processing exposed chip products, including the following steps:

[0084] S1, such as Figure 2 As shown, at least one chip 2 is provided, the front side 21 of which has bumps 23;

[0085] S2, such as Figure 3 As shown, solder paste 24 is applied to the bump 23;

[0086] S3, such as Figure 4 As shown, the chip 2 is flip-mounted on the front side 11 of the frame, which has multiple chip mounting positions, each of which has at least one chip 2 mounted. The figure does not show the schematic diagram; only one chip 2 is shown.

[0087] S4, such as Figure 5 As shown, a molding compound 3 is formed on the front side 11 of the frame and the chip 2, exposing the back side 12 of the frame and the back side 22 of the chip.

[0088] S5, such as Figure 1 As shown, a protective film 4 is attached to the molding layer 3 and the back side 22 of the chip. The protective film 4 completely covers the back side 22 of the chip and the periphery of the protective film 4 is attached to the molding layer 3 around the chip 2, forming the chip electroplating structure of this embodiment.

[0089] S6, such as Figure 6 As shown, an electroplating operation is performed on the chip electroplating structure to form a tin layer 15 on the pins of frame 1;

[0090] S7, such as Figure 7 As shown, the protective film 4 of the electroplated chip structure is irradiated with UV light after electroplating, and then the protective film 4 is removed.

[0091] S8, such as Figure 8 As shown, the product from step 7 is cut to obtain multiple exposed chip products.

[0092] The above are merely preferred embodiments of this utility model and do not limit the scope of patent protection of this utility model. Any equivalent structural transformations made based on the description and drawings of this utility model, whether directly or indirectly applied to other related technical fields, are similarly included within the scope of protection of this utility model.

Claims

1. A chip electroplating structure, characterized in that, include: A frame having a front and a back; A chip having a front and a back side, the chip being flip-mounted on the front side of the frame with the front side facing the frame, and the back side of the chip having printed text. A molding compound, located on the frame and covering the chip, exposes the back of the frame and the back of the chip. The protective film is applied to the molding compound, completely covering the back of the chip, with its periphery attached to the molding compound around the chip.

2. The chip electroplating structure as described in claim 1, characterized in that, The side of the molding compound facing away from the frame is flush with the back of the chip.

3. The chip electroplating structure as described in claim 1, characterized in that, The protective film fits with the back of the chip with a gap.

4. The chip electroplating structure as described in claim 1, characterized in that, The protective film is in contact with the back of the chip in a non-adhesive manner.

5. The chip electroplating structure as described in claim 1, characterized in that, The protective film covers the back of the chip and is attached to the back of the chip.

6. The chip electroplating structure as described in claim 5, characterized in that, The protective film includes: Protective layer; A first adhesive layer is located between the protective layer and the back of the chip; A second adhesive layer is provided, wherein the first adhesive layer is located between the protective layer and the molding layer.

7. The chip electroplating structure as described in claim 6, characterized in that, The second adhesive layer has a stronger adhesiveness than the first adhesive layer.

8. The chip electroplating structure as described in claim 7, characterized in that, The protective layer is a UV film.

9. The chip electroplating structure as described in claim 8, characterized in that, The protective layer is a polyolefin UV film.

10. The chip electroplating structure as described in claim 7, characterized in that, The first adhesive layer is an acrylic adhesive layer, and the second adhesive layer is an acrylic adhesive layer.

11. The chip electroplating structure as described in claim 10, characterized in that, The density of the acrylic adhesive in the second adhesive layer is greater than that in the first adhesive layer.

12. The chip electroplating structure as described in claim 1, characterized in that, The chip has bumps on its front side, which are connected to the front side of the frame by solder paste.

13. The chip electroplating structure as described in claim 1, characterized in that, The frame is a metal frame, and the frame includes pins, with the chip flip-mounted on the front side of the pins.

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