Anti-interference printed circuit board

Abstract

The utility model relates to printed circuit board preparation technical field discloses an anti -interference printed circuit board, a plurality of function modules distribute in the plate base, and the wiring of at least one function module is spaced apart from the edge of plate base and separates the preset distance, the via array band sets up along the edge of plate base and surrounds a week, forms the continuous shielding structure, is equipped with the isolation via band between the edge of adjacent function module and plate base, forms the physical barrier, prevents the interference signal from spreading from the edge of plate base to the circuit of function module, and the wiring of at least one function module sets up between the via array band and isolation via band, the layout band of via array band and isolation via can jointly block the propagation path of interference signal, reduces the influence of outside electromagnetic interference and internal crosstalk to intelligent electronic equipment, improves the accuracy and stability of signal transmission, and the compatibility with the existing manufacturing process is high, and the applicability is strong, and the significant improvement of anti -interference performance has wide application prospect.

Description

Technical Field

[0001] This utility model relates to the field of printed circuit board manufacturing technology, and in particular to an anti-interference printed circuit board. Background Technology

[0002] A PCB (printed circuit board) is a crucial component of the electronics industry. Almost every electronic device, from small items like watches and calculators to large systems like computers and communication devices, utilizes PCBs to electrically interconnect integrated circuits and other electronic components. This replaces complex wiring, simplifying assembly and soldering, reducing the workload of traditional wiring methods, significantly alleviating worker fatigue, reducing overall device size, lowering costs, and improving the quality and reliability of electronic equipment. PCBs offer excellent product consistency, allowing for standardized designs that facilitate mechanization and automation in production. Furthermore, a completed PCB can serve as a spare part, enabling easy interchangeability and maintenance of the entire device. Currently, PCBs are widely used in the manufacturing of electronic products.

[0003] With the continuous improvement of intelligent electronic devices, printed circuit boards are gradually pursuing miniaturization and multi-functionality. However, it remains a major technical challenge to prevent the circuits of intelligent electronic devices from being affected by external electromagnetic interference and crosstalk between internal modules, which affects signal transmission quality and overall operational stability. Utility Model Content

[0004] The purpose of this utility model is to provide an anti-interference printed circuit board, which has a highly efficient anti-interference structure through reasonable planning and layout, good flexibility and adaptability; and is compatible with manufacturing processes, has low production costs, and has broad application prospects.

[0005] To achieve this objective, the present invention adopts the following technical solution:

[0006] An anti-interference printed circuit board includes: a board substrate and multiple functional modules, wherein the multiple functional modules are distributed on the board substrate, and the traces of at least one functional module are spaced at a predetermined distance from the edge of the board substrate; a via array is formed on the board substrate, and the via array is arranged around the edge of the board substrate; an isolation via is provided between each functional module and the edge of the board substrate, and the isolation vias are selectively provided between adjacent functional modules; the traces of at least one functional module are arranged between the via array and the isolation via.

[0007] As an optional technical solution for anti-interference printed circuit boards, the via array includes multiple layers of via lines stacked along the edge of the board substrate toward the center of the board substrate. Each layer of via lines includes multiple vias spaced apart along the edge of the board substrate, and the vias of adjacent via lines are staggered.

[0008] As an optional technical solution for anti-interference printed circuit boards, the spacing between adjacent vias is less than or equal to 0.1 mm.

[0009] As an optional technical solution for anti-interference printed circuit boards, the width of the via array strip at the corner position of the board substrate is greater than the width of the via array strip at other positions.

[0010] As an optional technical solution for anti-interference printed circuit boards, the isolation via strip includes multiple rows of vias, with the extension direction of each row of vias perpendicular to the signal transmission direction.

[0011] As an optional technical solution for anti-interference printed circuit boards, both the via array strip and the isolation via strip are composed of multiple vias, and the inner walls of the vias are sequentially plated with a copper layer, a nickel layer and a gold layer.

[0012] As an optional technical solution for anti-interference printed circuit boards, the vias are filled with insulating material.

[0013] As an optional technical solution for anti-interference printed circuit boards, grounding pads are provided at both the top and bottom of the vias. The grounding pads are connected to the ground layer of the anti-interference printed circuit board, and the diameter of the grounding pads is larger than the diameter of the vias.

[0014] As an optional technical solution for anti-interference printed circuit boards, the diameter of the grounding pad is 0.3mm-0.8mm larger than the diameter of the via.

[0015] As an optional technical solution for anti-interference printed circuit boards, the preset distance between the traces of at least one of the functional modules and the edge of the board substrate is greater than or equal to 2mm.

[0016] The beneficial effects of this utility model are:

[0017] The anti-interference printed circuit board provided by this utility model includes a board substrate and multiple functional modules, which can be applied to the circuit motherboards of various smart electronic devices. Multiple functional modules are distributed on the board substrate according to their circuits, with at least one functional module's trace spaced a predetermined distance from the edge of the board substrate. A via array is formed on the board substrate, encircling the edge of the board substrate, creating a continuous shielding structure. For the signal transmission paths of different functional modules in the smart electronic device, an isolation via strip is provided between each functional module and the edge of the board substrate. Isolation via strips are also selectively provided between adjacent functional modules to form a physical barrier, preventing interference signals from propagating from the edge of the board substrate into the circuitry of the functional modules. This effectively isolates the impact of external interference on transmissions such as Bluetooth signals, and the traces of at least one functional module are positioned between the via array and the isolation via strip.

[0018] Through proper planning and layout, the via array and isolation via strips can jointly block the propagation path of interference signals on the board substrate, reducing the impact of external electromagnetic interference and crosstalk between internal functional modules on intelligent electronic devices, improving the accuracy and stability of signal transmission, and forming a highly efficient anti-interference structure. The layout of this via array and isolation via strip is compatible with existing printed circuit board manufacturing processes, requiring no large-scale modification of existing manufacturing equipment and processes. It can be flexibly adjusted and optimized according to the different functional requirements of intelligent electronic devices, exhibiting strong applicability. Without significantly increasing manufacturing costs, it achieves a substantial improvement in the anti-interference performance of the mainboard of intelligent electronic devices, and has broad application prospects. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the anti-interference printed circuit board provided in a specific embodiment of this utility model.

[0020] In the picture:

[0021] 100, Board substrate; 200, Functional module; 210, Key signal module; 310, Via array strip; 320, Isolation via strip. Detailed Implementation

[0022] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, not the entire structure.

[0023] In the description of this utility model, unless otherwise explicitly specified and limited, the terms "connected," "linked," and "fixed" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0024] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0025] In the description of this embodiment, the terms "upper," "lower," "right," and "left," etc., refer to the orientation or positional relationship shown in the accompanying drawings. They are used only for ease of description and simplification of operation, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. In addition, the terms "first" and "second" are only used for distinction in description and have no special meaning.

[0026] Specifically, such as Figure 1 As shown, this utility model discloses an anti-interference printed circuit board, including a board substrate 100 and multiple functional modules 200, which can be applied to the circuit motherboard of various intelligent electronic devices. The multiple functional modules 200 are distributed on the board substrate 100 according to the circuit layout, and the traces of at least one functional module 200 are spaced at a predetermined distance from the edge of the board substrate 100. A via array 310 is formed on the board substrate 100, and the via array 310 is arranged around the edge of the board substrate 100, forming a continuous shielding structure.

[0027] Furthermore, the signal traces on the printed circuit board are optimized so that the traces of the critical signal module 210 in the functional module 200 are kept away from the edge of the board substrate 100 to avoid direct contact with external interference signals. The via array strip 310 is designed in conjunction with the circuit, and the shielding effect of the via array strip 310 is used to protect the more sensitive signals. In this embodiment, at least one functional module 200 can be a sensor. In order to protect weak signals, the preset distance between the sensor traces and the edge of the board substrate 100 is greater than or equal to 2mm.

[0028] Meanwhile, for the signal transmission paths of different functional modules 200 in the intelligent electronic device, isolation vias 320 are provided between the edge of each functional module 200 and the board substrate 100. Isolation vias 320 are also selectively provided between adjacent functional modules 200 to form a physical barrier, preventing interference signals from propagating from the edge of the board substrate 100 into the circuit of the functional module 200, effectively isolating the impact of external interference on the transmission of signals such as Bluetooth signals. Through reasonable planning and layout, the via array 310 and the isolation vias 320 can jointly block the propagation path of interference signals in the board substrate 100, reduce the impact of external electromagnetic interference and crosstalk between internal functional modules 200 on the intelligent electronic device, improve the accuracy and stability of signal transmission, and form a highly efficient anti-interference structure. The layout of the via array 310 and the isolation via 320 is compatible with existing printed circuit board manufacturing processes, without requiring large-scale modifications to existing manufacturing equipment and processes. It can be flexibly adjusted and optimized according to different functional requirements of intelligent electronic devices, making it highly applicable. Without increasing manufacturing costs too much, it can significantly improve the anti-interference performance of the circuit board of intelligent electronic devices and has broad application prospects.

[0029] Specifically, the traces of at least one functional module 200 are disposed between the via array strip 310 and the isolation via strip 320. In this embodiment, since the weak signals collected by the sensor are quite sensitive, the isolation via strip 320 can be disposed around the sensor traces, and the traces are arranged inside the via array strip 310 and the isolation via strip 320.

[0030] For example, the functional module 200 includes a positioning module, BT / WIFI SAW (Bluetooth or WiFi Surface Acoustic Wave), CPU (Central Processing Unit), Memory, PMU (Power Management Unit), Charging IC, NFC (Near Field Communication) (Power Amplifier), and Smart PA (Smart Power Amplifier), etc.

[0031] Furthermore, since the radiation at the corner of the board substrate 100 is stronger than that at other locations, the width of the via array strip 310 at the corner of the board substrate 100 is greater than the width of the via array strip 310 at other locations, in order to optimize and adjust the layout structure of the anti-interference printed circuit board. The via array strip 310 at the corner of the board substrate 100 is usually distributed in a fan shape or L shape.

[0032] In this embodiment, the via array 310 includes a single-layer via line or a multi-layer via line stacked along the edge of the substrate 100 toward the center of the substrate 100. The single-layer via line is used for shielding the edge of the substrate 100 under normal circumstances. Each layer of the multi-layer via line includes multiple vias spaced apart along the edge of the substrate 100. The vias of adjacent via lines are staggered to further form a continuous and effective shielding structure, which can achieve enhanced shielding in high-frequency or highly sensitive circuits.

[0033] Specifically, the spacing between adjacent vias is precisely calculated to ensure that the vias can effectively block the propagation of interference signals, while avoiding manufacturing difficulties and increased costs in the layout structure of the anti-interference printed circuit board due to excessively small spacing. Generally, the spacing between adjacent vias is controlled to be less than or equal to 0.1mm. The specific value can be flexibly adjusted and optimized according to factors such as the size of the board substrate 100 and the operating frequency, making it suitable for various models and specifications of intelligent electronic devices.

[0034] In the via design process, the power and ground layers of the board substrate 100 are comprehensively considered. Increasing the number and density of vias in the areas of the power and ground layers near the edges of the board substrate 100 can enhance the shielding effect of the power and ground layers, reducing power supply noise and ground noise interference to the circuit. Simultaneously, vias effectively connect the power and ground layers between different layers, reducing power supply impedance and improving circuit stability.

[0035] Example 1

[0036] In some special application scenarios, such as the processing of high-speed digital circuits, attention needs to be paid to the board edges of high-speed signals (such as USB, HDMI, PCIe, etc.). The vias need to be encrypted to better achieve isolation in conjunction with the trace surround design and prevent crosstalk of sensitive signals at the edge.

[0037] In this embodiment, the isolation via strip 320 includes multiple rows of vias, with each row of vias extending perpendicular to the signal transmission direction, forming a more effective physical barrier to prevent interference signals from propagating from the edge of the board substrate 100 into the circuitry of the functional module 200. For example, by selecting an isolation via strip 320 consisting of 2 to 5 rows of vias, the influence of external interference on Bluetooth signal transmission can be effectively isolated.

[0038] Specifically, both the via array 310 and the isolation via 320 are composed of multiple vias, which have a shielding effect, suppress edge radiation, reduce EMI (electromagnetic interference), provide a low impedance loop, provide the shortest return path for high-frequency signals, and also improve mechanical strength to prevent edge delamination or cracking of the board substrate 100, especially in the case of multilayer boards.

[0039] In this embodiment, the via adopts a special multi-layer metallization structure design. The inner wall of the via is sequentially plated with a copper layer, a nickel layer, and a gold layer. The copper layer provides good conductivity, the nickel layer plays a role in preventing oxidation and enhancing bonding, and the gold layer further improves the oxidation resistance and electrical performance of the via, reduces contact resistance, and can also assist in heat dissipation by conducting heat to other layers through the metallized via.

[0040] Meanwhile, the via is filled with insulating material, such as epoxy resin, which can electrically isolate the via from the surrounding circuitry, prevent interference signals from passing through the via and coupling with the surrounding circuitry, and further improve the signal transmission quality and overall operational stability of intelligent electronic devices.

[0041] Understandably, grounding pads are provided at both the top and bottom of the via. These grounding pads are connected to the ground plane of the anti-interference printed circuit board. By grounding the via, the via can promptly guide the coupled interference signal to the ground, forming a discharge path for the interference signal. The area of ​​the grounding pad is designed according to the size of the via and the interference intensity. Generally, the diameter of the grounding pad is larger than the diameter of the via, specifically 0.3mm-0.8mm larger, to ensure a good grounding effect.

[0042] Through a special via structure design, with multi-layered metallized inner walls and grounding pads, the contact resistance and parasitic inductance of the vias are reduced, the electrical performance of the vias is optimized, signal loss and distortion at the vias are reduced, and signal integrity is ensured.

[0043] Example 2

[0044] In another specific application scenario, for radio frequency (RF) interference-resistant printed circuit boards, it is important to ensure that the spacing of vias at the edge of the board substrate 100 is less than or equal to one-tenth, or even one-twentieth, of the wavelength λ. It is recommended to use grounded copper strips (metallized half-vias) to enhance shielding.

[0045] Example 3

[0046] For anti-interference printed circuit boards using a metal casing grounding scheme, the following should be noted: If the anti-interference printed circuit board is connected to the metal casing by screws, the vias on the edge of the board substrate 100 should be close to the mounting holes and connected by wide copper foil.

[0047] Because the via design at the 100mm edge of the board substrate needs to balance electrical performance and process feasibility, the operation and layout of high-frequency circuits require stricter control. The core principles of anti-interference printed circuit board fabrication are: ensuring low-impedance grounding, forming continuous shielding, and reliable processing. Parameters should be adjusted according to specific application scenarios (Examples 1, 2, and 3), and if necessary, IPC-2141 (High-Speed ​​Controllable Impedance Controller Design Guidelines) or IEEE / IEC EMC (Electromagnetic Compatibility) standards can be referenced.

[0048] Obviously, the above embodiments of this utility model are merely examples for clearly illustrating the present utility model, and are not intended to limit the implementation of the present utility model. Those skilled in the art can make various obvious changes, readjustments, and substitutions without departing from the protection scope of this utility model. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the protection scope of the claims of this utility model.

Claims

1. An anti-interference printed circuit board, characterized in that, include: A substrate (100) and multiple functional modules (200) are provided. The multiple functional modules (200) are distributed on the substrate (100). The traces of at least one functional module (200) are spaced at a predetermined distance from the edge of the substrate (100). A via array (310) is formed on the substrate (100). The via array (310) is arranged around the edge of the substrate (100). An isolation via strip (320) is provided between each functional module (200) and the edge of the substrate (100). The isolation via strip (320) is selectively provided between adjacent functional modules (200). The traces of at least one functional module (200) are arranged between the via array (310) and the isolation via strip (320).

2. The anti-interference printed circuit board according to claim 1, characterized in that, The via array strip (310) includes multiple via lines stacked along the edge of the plate substrate (100) toward the center of the plate substrate (100). Each via line includes multiple vias spaced apart along the edge of the plate substrate (100), and the vias of adjacent via lines are staggered.

3. The anti-interference printed circuit board according to claim 2, characterized in that, The spacing between adjacent vias is less than or equal to 0.1 mm.

4. The anti-interference printed circuit board according to claim 1, characterized in that, The width of the via array strip (310) at the corner position of the plate substrate (100) is greater than the width of the via array strip (310) at other positions.

5. The anti-interference printed circuit board according to claim 1, characterized in that, The isolation via strip (320) includes multiple rows of vias, with the extension direction of each row of vias perpendicular to the signal transmission direction.

6. The anti-interference printed circuit board according to claim 1, characterized in that, Both the via array strip (310) and the isolation via strip (320) are composed of multiple vias, and the inner walls of the vias are sequentially plated with a copper layer, a nickel layer and a gold layer.

7. The anti-interference printed circuit board according to claim 6, characterized in that, The via is filled with insulating material.

8. The anti-interference printed circuit board according to claim 6, characterized in that, The via is provided with grounding pads at both the top and bottom. The grounding pads are connected to the ground layer of the anti-interference printed circuit board. The diameter of the grounding pads is larger than the diameter of the via.

9. The anti-interference printed circuit board according to claim 8, characterized in that, The diameter of the grounding pad is 0.3mm-0.8mm larger than the diameter of the via.

10. The anti-interference printed circuit board according to any one of claims 1-9, characterized in that, The preset distance between the trace of at least one of the functional modules (200) and the edge of the board substrate (100) is greater than or equal to 2 mm.

Images