A power transistor device and electronic equipment
By setting a floating second body region and multiple planar gate connections in the superjunction power device, the gate-drain capacitance is increased, which solves the noise and EMI problems of the superjunction power device in switching applications and improves the device performance.
CN224386019UActive Publication Date: 2026-06-19SUZHOU MAIZHI MICRO SEMICON CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SUZHOU MAIZHI MICRO SEMICON CO LTD
- Filing Date
- 2025-06-20
- Publication Date
- 2026-06-19
AI Technical Summary
Technical Problem
Superjunction power devices generate significant voltage and current noise in switching applications, and the relationship between device on-resistance and breakdown voltage has not been effectively improved.
Method used
Design a power transistor device by setting multiple alternating first body regions and second body regions in the drift region, with the second body region in a floating potential state, increasing the capacitance across the gate and drain, and adjusting the parasitic capacitance by connecting multiple planar gates to trench gates.
Benefits of technology
It reduces noise and electromagnetic interference (EMI) issues during device switching operation without increasing production costs and is easy to implement.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN224386019U_ABST
Abstract
This invention provides a power transistor device and an electronic device. The device includes: a first metal electrode layer; a substrate disposed on the first metal electrode layer; an epitaxial layer disposed on the substrate, wherein alternating first and second body regions are disposed within the epitaxial layer; a third body region disposed above the first body region and containing heavily doped regions; a trench gate disposed between adjacent first and second body regions and in contact with the interface of the third body region; a planar gate located above the second body region, with its two ends respectively connected to two adjacent trench gates; an insulating dielectric layer disposed on the epitaxial layer; and a second metal electrode layer disposed on the insulating dielectric layer. This device increases the area of the gate oxide layer by using a planar gate, thereby increasing the capacitance between the gate and drain terminals and reducing noise and EMI problems generated during switching operation.
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