Wafer processing system
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- STAR KEY SEMICONDUCTOR (WUHAN) CO LTD
- Filing Date
- 2025-06-23
- Publication Date
- 2026-06-19
AI Technical Summary
In existing wafer processing technology, failure to remove photoresist after patterning the wafer surface can adversely affect subsequent processes and may lead to wafer contamination.
A wafer processing system was designed, which includes a photoresist detection device. The system uses a spectrometer to detect the presence of photoresist on the wafer surface and moves the detected photoresist to an ashing chamber for processing, thus preventing the photoresist from entering subsequent process flows.
This effectively prevents photoresist from becoming a source of impurities, improves wafer yield, and prevents wafer contamination.
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Figure CN224386076U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and more particularly to a wafer processing system. Background Technology
[0002] In semiconductor manufacturing, the wafer surface is patterned by coating a photoresist material onto the wafer surface, then using an etching process to remove some of the material from the areas of the wafer not covered by the photoresist. Finally, the photoresist on the wafer surface is removed, completing the wafer processing.
[0003] In existing wafer processing workflows, there may be instances where photoresist is not removed after patterning the wafer surface, which can adversely affect subsequent wafer processing steps. Utility Model Content
[0004] This application provides a wafer processing system. The wafer processing system includes a transfer chamber and a processing chamber; the processing chamber includes an etching chamber and an ashing chamber, the etching chamber is used to etch the wafer, and the ashing chamber is used to remove photoresist from the wafer surface after etching;
[0005] The wafer processing system also includes a photoresist detection device, which is used to detect whether there is photoresist on the wafer surface before the wafer is transported from the processing chamber to the transfer chamber.
[0006] In one embodiment, the photoresist detection device includes a spectrometer and a processor; the spectrometer is used to collect light reflected from the wafer surface and generate a spectral signal, and the processor is used to process the spectral signal and determine whether photoresist exists on the wafer surface.
[0007] In one embodiment, the wafer processing system includes a detection chamber, and the spectrometer includes a spectral collection window located at the top of the detection chamber.
[0008] In one embodiment, the wafer processing system further includes a controller and a first clamping device located in the processing chamber, the first clamping device being controlled by the controller; the controller is configured to control the first clamping device to transport the wafer to the ashing chamber when the processor detects the presence of photoresist on the wafer surface.
[0009] In one embodiment, the wafer processing system further includes a controller and a second clamping device located within the transfer chamber, the second clamping device being controlled by the controller, the controller being configured to control the second clamping device to remove the wafer located in the detection chamber and transport it to the transfer chamber when the processor detects that there is no photoresist on the wafer surface.
[0010] In one embodiment, the wafer processing system includes a pre-vacuum chamber located between the processing chamber and the transfer chamber; the detection chamber is the pre-vacuum chamber.
[0011] In one embodiment, the detection chamber is provided with a first stage, the first stage including a first support portion, the first support portion including a first support surface for supporting a wafer; the first support surface is located on the side of the first support portion facing the spectral collection window.
[0012] In one embodiment, the first support surface is located directly below the spectral collection window.
[0013] In one embodiment, the first support surface is provided with a first adsorption hole for fixing the wafer, and the first support portion is provided with a first exhaust channel, which is connected to the first adsorption hole.
[0014] In one embodiment, the detection chamber is further provided with a second stage, which is located on the side of the first stage away from the spectral collection window; the second stage includes a second support portion, which includes a second support surface for supporting the wafer, and the second support surface is located on the side of the second support portion facing the first stage.
[0015] The wafer processing system provided in this application embodiment, by setting a photoresist detection device, can detect whether there is photoresist on the wafer surface before the wafer is transported from the processing chamber to the transfer chamber. It can detect the presence of photoresist on the wafer surface in a timely manner, which helps to avoid the problem that the photoresist on the wafer surface becomes a source of impurities and causes the wafer to be contaminated after being transported to the transfer chamber and entering the subsequent process flow. This helps to improve the product yield.
[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description
[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0018] Figures 1 to 3 This diagram illustrates the process steps for patterning wafer surfaces in related technologies.
[0019] Figure 4 This is a schematic diagram of the structure of a wafer processing system provided in one embodiment of this application;
[0020] Figure 5 This is a schematic diagram of the structure of a detection chamber provided in an embodiment of this application;
[0021] Figure 6 for Figure 5 The illustrated embodiment provides a top view of the detection chamber. Detailed Implementation
[0022] The technical solutions in the embodiments (or "implementations") of this application will be clearly and completely described herein with reference to the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.
[0023] If the embodiments of this application contain terms relating to directional indications or positional relationships (such as up, down, left, right, front, back, inside, outside, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationships and movements between components in a specific posture (as shown in the attached figures); if the specific posture changes, the directional indications or positional relationships will also change accordingly. Furthermore, the terms "first" and "second" used in the embodiments of this application are only for descriptive convenience and should not be construed as indicating or implying relative importance.
[0024] In semiconductor manufacturing processes, patterning the wafer surface is a crucial step. For example... Figure 1 As shown, patterning the wafer surface specifically includes: providing a wafer 100, coating a photoresist material on the surface of the wafer 100, then exposing the photoresist material using a photomask and patterning the photoresist material to form a photoresist layer 200. Afterwards, as... Figure 2 As shown, using a patterned photoresist layer 200 as a mask, the wafer 100 is etched through an etching process, and the material in the area of the wafer 100 surface not covered by the photoresist layer 200 is etched. Finally, as... Figure 3 As shown, the residual photoresist layer 200 on the surface of wafer 100 is removed to obtain a patterned wafer.
[0025] In actual production, there are instances where the photoresist layer 200 remaining on the surface of wafer 100 is not removed due to operator negligence. In subsequent processes, the photoresist remaining on the wafer surface may decompose or release unnecessary gases or substances, leading to wafer defects.
[0026] To address the aforementioned problems, the wafer processing system of this application, in conjunction with the accompanying drawings, will be described in detail below. Unless otherwise specified, the features of the following embodiments and implementations can complement or combine with each other.
[0027] This application provides a wafer processing system, such as... Figure 4As shown, the wafer processing system includes a transfer chamber 10 and a processing chamber 20. The processing chamber 20 includes an etching chamber 21 and an ashing chamber 22. The etching chamber 21 is used to etch the wafer, and the ashing chamber 22 is used to remove photoresist from the wafer surface after etching. The wafer processing system also includes a photoresist detection device, which is used to detect the presence of photoresist on the wafer surface before transporting the wafer from the processing chamber 20 to the transfer chamber 10.
[0028] The transfer chamber 10 provides a clean space for housing and storing wafers, allowing them to be transferred between different chambers without being contaminated by external factors. When a wafer with a photoresist layer arrives at the transfer chamber 10, it can be transported from the transfer chamber 10 to the etching chamber 21 within the processing chamber 20. After etching in the etching chamber 21, the wafer is removed and transported to the ashing chamber 22 to remove the photoresist from its surface. Subsequently, a photoresist detection device is used to inspect the wafer. By incorporating this device, the presence of photoresist on the wafer surface can be detected before the wafer is transported from the processing chamber to the transfer chamber. This allows for timely detection of photoresist, preventing wafers with photoresist from being transported to the transfer chamber and becoming sources of contamination in subsequent processes, thus improving product yield.
[0029] In one embodiment, such as Figure 4 As shown, the transfer chamber 10 includes a loading stage 11, a buffer stage 12, and an aligner 13. The loading stage 11 holds the wafers to be placed into the transfer chamber 10. The buffer stage 12 provides a temporary storage space for the wafers, allowing them to be temporarily stored without affecting the process flow. The aligner 13 is used to adjust the position of the wafers, ensuring they are in the correct position before entering the processing chamber 20.
[0030] In one embodiment, such as Figure 4 As shown, the processing chamber 20 also includes a cooling chamber 23. After the wafer enters the ashing chamber 22 to perform ashing treatment on the photoresist, the wafer can be placed in the cooling chamber 23 for cooling.
[0031] In one embodiment, such as Figure 4 As shown, the wafer processing system also includes a pre-vacuum chamber 30, which is located between the processing chamber 20 and the transfer chamber 10. Before the wafer is transferred from the transfer chamber 10 to the processing chamber 20, it first enters the pre-vacuum chamber 30 for vacuuming, which can prevent contaminants such as water vapor from entering the processing chamber 20.
[0032] In one embodiment, such as Figure 4As shown, the wafer processing system also includes a controller and a first clamping device 40 located in the processing chamber 20. The first clamping device 40 is controlled by the controller, which is configured to control the clamping device 40 to transport the wafer to the ashing chamber 22 when the processor detects the presence of photoresist on the wafer surface.
[0033] The controller can control the first clamping device 40 to move the wafer, for example, to move the wafer into the etching chamber 21 or to remove the wafer from the etching chamber 21 and move it into the ashing chamber 22. When the processor detects that there is photoresist on the surface of the wafer, the controller can control the first clamping device 40 to move the wafer with photoresist into the ashing chamber 22 to ashing the photoresist.
[0034] In one embodiment, such as Figure 4 As shown, a second clamping device 41 is provided in the transfer chamber 10. The second clamping device 41 is controlled by the controller. The controller is configured to control the second clamping device 41 to remove the wafer located in the detection chamber and transport it to the transfer chamber 10 when the processor detects that there is no photoresist on the wafer surface.
[0035] The controller can also control the second clamping device 41 to move the wafer within the transfer chamber, quickly and accurately placing the wafer in a designated position. For example, the second clamping device 41 can move the wafer from the loading table 11 to the aligner 13 for alignment.
[0036] In one embodiment, the photoresist detection device includes a spectrometer and a processor. The spectrometer is used to collect light reflected from the wafer surface and generate a spectral signal, and the processor processes the spectral signal to determine whether photoresist exists on the wafer surface.
[0037] Specifically, when light shines on the wafer surface, some of it is reflected back. Because the photoresist material and the wafer surface material have different optical properties, the reflected light differs in intensity, phase, and wavelength distribution. The spectrometer generates a spectral signal reflecting the characteristics of the wafer surface material based on the collected reflected light. If the processor detects that the spectral signal matches the optical characteristics of the photoresist material, it determines that photoresist is present on the wafer surface; otherwise, it determines that no photoresist is present.
[0038] In one embodiment, such as Figure 5 and Figure 6As shown, the wafer processing system further includes a detection chamber 50, and the spectrometer includes a spectral collection window 51, which is located at the top of the detection chamber 50. The wafer to be inspected is placed below the spectral collection window 51, which receives light reflected from the wafer surface and transmits it to the spectrometer, thus improving the integration and automation of the wafer processing system. The top wall of the detection chamber 50 may have an opening, and the spectral collection window 51 may be embedded within this opening.
[0039] In one embodiment, such as Figure 4 and Figure 5 As shown, the detection chamber 50 is the pre-vacuum chamber 30. This configuration allows the photoresist detection device to be integrated into the pre-vacuum chamber 30, avoiding the need for a separate chamber for photoresist detection and thus reducing the space occupied by the wafer processing system.
[0040] In one embodiment, such as Figure 5 and Figure 6 As shown, the detection chamber 50 is provided with a first stage 52, which includes a first support portion 521. The first support portion 521 includes a first support surface 5211 for supporting the wafer, and the first support surface 5211 is located on the side of the first support portion 521 facing the spectral collection window 51. When the wafer is moved into the detection chamber 50 for detection, the wafer can be placed on the first stage 52, so that the surface of the wafer without photoresist is in contact with the first support surface 5211 of the first support portion 521, and the other surface of the wafer faces the spectral collection window 51, so that the photoresist detection device can detect whether there is photoresist on the surface of the wafer through the spectral collection window 51.
[0041] In one embodiment, such as Figure 5 and Figure 6 As shown, the detection chamber 50 includes two opposing sidewalls, each sidewall having two first support portions 521. A gap exists between the first support portions 521 on one sidewall and the first support portions 521 on the other sidewall. When the wafer is placed on the first stage 52, a portion of the wafer's lower surface is in contact with the first support surface 5211. The first clamping device 40 can extend into or out of the gap to place the wafer on the first support portion 521 or remove the wafer from the first support portion 521.
[0042] In one embodiment, such as Figure 5As shown, the first support surface 5211 is located directly below the spectral collection window 51. With this configuration, when the wafer is placed on the first support surface 5211, the spectral collection window 51 is directly opposite the upper surface of the wafer, which avoids affecting the accuracy of the spectral signal generated by the spectrometer due to angular deviation, thereby ensuring the accuracy of detecting the presence of photoresist on the wafer surface.
[0043] In one embodiment, such as Figure 6 As shown, the first bearing surface 5211 is provided with a first adsorption hole 522 for fixing the wafer, and the first bearing part 521 is provided with a first exhaust channel, which is connected to the first adsorption hole 522. The first exhaust channel can be connected to a vacuum pump. After the wafer is placed on the first bearing surface 5211, the first exhaust channel is evacuated, so that a negative pressure is formed between the wafer and the first bearing part 521, thereby fixing the wafer on the first bearing surface 5211.
[0044] In one embodiment, such as Figure 5 As shown, the detection chamber 50 is further provided with a second stage 53, which is located on the side of the first stage 52 away from the spectral collection window 51. The second stage 53 includes a second support portion 531, which includes a second support surface 5311 for supporting the wafer, and the second support surface 5311 is located on the side of the second support portion 531 facing the first stage.
[0045] When the detection chamber 50 is equipped with a second stage 53, taking the detection chamber 50 as a pre-vacuum chamber 30 as an example, the wafer movement and detection process is as follows:
[0046] The second clamping device 41 moves the wafer in the transfer chamber 10 to the pre-vacuum chamber 30, and can place the wafer on the first stage 52 or the second stage 53. Then, the first clamping device 40 moves the wafer located on the first stage 52 or the second stage 53 to the processing chamber 20, and sequentially transfers the wafer to the etching chamber 21, the ashing chamber 22, and the cooling chamber 23. Afterward, the first clamping device 40 removes the wafer from the cooling chamber 23 and moves it to the pre-vacuum chamber 30, and places the wafer on the first stage 52.
[0047] When the photoresist detection device detects that there is no photoresist on the wafer surface, the controller controls the second clamping device 41 to move the wafer located on the first stage 52 to the transfer chamber 10; when the photoresist detection device detects that there is photoresist on the wafer surface, the controller controls the second clamping device 41 to stop moving, or controls the first clamping device 40 to move the wafer located on the first stage 52 to the ashing chamber 22 to ashing the photoresist on the wafer surface.
[0048] In one embodiment, the second bearing surface 5311 is provided with a second adsorption hole for fixing the wafer, and the second bearing portion 531 is provided with a second exhaust channel, which communicates with the second adsorption hole. The second exhaust channel can be connected to a vacuum pump. After the wafer is placed on the second bearing surface 5311, the second exhaust channel is evacuated, so that a negative pressure is formed between the wafer and the second bearing portion 531, thereby fixing the wafer on the second bearing surface 5311.
[0049] It should be noted that the technical solutions or features described in the above embodiments can be combined or supplemented with each other without conflict. The scope of protection of this application is not limited to the precise structures described in the above embodiments and shown in the accompanying drawings; all modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.
Claims
1. A wafer processing system, characterized in that, The wafer processing system includes a transfer chamber and a processing chamber; the processing chamber includes an etching chamber and an ashing chamber, the etching chamber is used to etch the wafer, and the ashing chamber is used to remove photoresist from the wafer surface after etching; The wafer processing system also includes a photoresist detection device, which is used to detect whether there is photoresist on the wafer surface before the wafer is transported from the processing chamber to the transfer chamber.
2. The wafer processing system according to claim 1, characterized in that, The photoresist detection device includes a spectrometer and a processor; the spectrometer is used to collect light reflected from the wafer surface and generate a spectral signal, and the processor is used to process the spectral signal and determine whether photoresist exists on the wafer surface.
3. The wafer processing system according to claim 2, characterized in that, The wafer processing system further includes a detection chamber, and the spectrometer includes a spectral collection window located at the top of the detection chamber.
4. The wafer processing system according to claim 2, characterized in that, The wafer processing system further includes a controller and a first clamping device located in the processing chamber, the first clamping device being controlled by the controller; the controller is configured to control the first clamping device to transport the wafer to the ashing chamber when the processor detects the presence of photoresist on the wafer surface.
5. The wafer processing system according to claim 3, characterized in that, The wafer processing system further includes a controller and a second clamping device located in the transfer chamber. The second clamping device is controlled by the controller, which is configured to control the second clamping device to remove the wafer located in the detection chamber and transport it to the transfer chamber when the processor detects that there is no photoresist on the wafer surface.
6. The wafer processing system according to claim 3, characterized in that, The wafer processing system further includes a pre-vacuum chamber located between the processing chamber and the transfer chamber; the detection chamber is the pre-vacuum chamber.
7. The wafer processing system according to claim 3, characterized in that, The detection chamber is provided with a first stage, the first stage includes a first support part, the first support part includes a first support surface for supporting the wafer; the first support surface is located on the side of the first support part facing the spectral collection window.
8. The wafer processing system according to claim 7, characterized in that, The first bearing surface is located directly below the spectral collection window.
9. The wafer processing system according to claim 7, characterized in that, The first bearing surface is provided with a first adsorption hole for fixing the wafer, and the first bearing part is provided with a first exhaust channel inside, which is connected to the first adsorption hole.
10. The wafer processing system according to claim 7, characterized in that, The detection chamber is further provided with a second stage, which is located on the side of the first stage away from the spectral collection window; the second stage includes a second support portion, which includes a second support surface for supporting the wafer, and the second support surface is located on the side of the second support portion facing the first stage.