Packaging structure

By incorporating through holes and staggered openings in the packaging structure, the problem of residual air in bare die packaging is solved, resulting in better electrical performance, mechanical stability, and reliability, while reducing package size and improving space utilization.

CN224386136UActive Publication Date: 2026-06-19AVARY HLDG (SHENZHEN) CO LTD +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
AVARY HLDG (SHENZHEN) CO LTD
Filing Date
2025-05-06
Publication Date
2026-06-19

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Abstract

This application discloses a packaging structure including a circuit board, multiple electronic components, and a cover film. The circuit board includes a first surface and a second surface disposed opposite each other along the thickness direction of the circuit board, and a flow hole. Electronic components are disposed on the first surface, with a groove formed between adjacent electronic components. The bottom surface of the groove is the first surface. The cover film covers the surface of the electronic component facing away from the circuit board, the sidewalls of the electronic component, and the bottom surface of the groove. The flow hole penetrates the circuit board along the thickness direction and includes a first opening on the first surface and a second opening on the second surface. The second opening communicates with the outside. Along the thickness direction, the orthographic projection of the groove overlaps the orthographic projection of the first opening, and the orthographic projections of the first and second openings are offset from each other. This application, by providing a flow hole, allows air between adjacent electronic components to escape, ensuring complete adhesion between the cover film and the sidewalls of the electronic components, achieving protection while reducing the overall size.
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Description

Technical Field

[0001] This application relates to the field of packaging, and more particularly to a packaging structure. Background Technology

[0002] As electronic devices evolve towards smaller, faster, and more energy-efficient designs, higher demands are placed on the miniaturization and high density of chip packaging. Chip packaging must protect the chip while maintaining a small size. Currently, bare die packaging is commonly used to reduce overall size. However, during the packaging process, it is difficult to completely remove air between the chips, leading to incomplete chip coverage. This can cause numerous problems, including degraded electrical performance, reduced mechanical stability, thermal management failure, poor environmental tolerance, and decreased reliability. Therefore, solving the problem of air leakage between chips during bare die packaging has become a pressing issue for researchers in this field. Utility Model Content

[0003] In view of this, this application provides a packaging structure to solve at least one of the above-mentioned technical problems.

[0004] This application provides a packaging structure including a circuit board, a plurality of electronic components, and a cover film. The circuit board includes a first surface and a second surface disposed opposite to each other along the thickness direction of the circuit board, and a flow hole penetrating the circuit board along the thickness direction. The electronic components are disposed on the first surface and a groove is formed between two adjacent electronic components, the bottom surface of the groove being the first surface. The cover film covers the surface of the electronic component away from the circuit board, the sidewall of the electronic component, and the bottom surface of the groove. The flow hole includes a first opening located on the first surface and a second opening located on the second surface, the second opening communicating with the outside. Along the thickness direction, the orthographic projection of the groove covers the orthographic projection of the first opening, and the orthographic projections of the first opening and the second opening are offset from each other.

[0005] This application utilizes a flow-through hole extending through the circuit board along its thickness direction. The orthographic projection of the groove formed between two adjacent electronic components covers the orthographic projection of the first opening of the flow-through hole, while the second opening of the flow-through hole connects to the outside. This structure facilitates the expulsion of air between adjacent electronic components via the flow-through hole during the application of the cover film. This ensures that the cover film fully or completely adheres to the sidewalls and surfaces of the electronic components, as well as the bottom surface of the groove. This protects the electronic components while reducing the risk of electrical performance degradation, reduced mechanical stability, thermal management failure, poor environmental tolerance, and decreased reliability due to residual air. Furthermore, because the orthographic projections of the first and second openings are staggered, the risk of the cover film overflowing along the flow-through hole and affecting subsequent processes is reduced. Additionally, by covering the electronic components with a cover film, this application reduces the overall size of the packaging structure compared to a design using an additional outer casing, thereby improving space utilization. Moreover, the flow-through hole can disperse or release stress in the packaging structure, reducing curling and improving reliability. Attached Figure Description

[0006] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0007] Figure 1 This is a cross-sectional schematic diagram of the packaging structure provided in one embodiment of this application.

[0008] Figure 2 A cross-sectional schematic diagram of the packaging structure provided for another embodiment of this application.

[0009] Explanation of key component symbols:

[0010] Circuit board 100; thickness direction X; first surface 11; second surface 12; groove 20; bottom surface 21; flow hole 30; first opening 31; second opening 32; first extension 33; first segment 331; second segment 332; second extension 34; third extension 35; first circuit layer 101; first dielectric layer 102; first metal layer 103; second dielectric layer 104; second metal layer 105; third dielectric layer 106; second circuit layer 107; first solder resist layer 41; second solder resist layer 42; solder layer 50; electronic component 200; surface 201; sidewall 202; cover film 300; packaging structure 400.

[0011] The following specific embodiments will further illustrate this application in conjunction with the above-described accompanying drawings. Detailed Implementation

[0012] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0013] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0014] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0015] Please see Figure 1 This application provides an embodiment of a packaging structure 400. The packaging structure 400 includes a circuit board 100 and a plurality of electronic components 200. The thickness direction of the circuit board 100 is defined as X, and the circuit board 100 includes a first surface 11 and a second surface 12 disposed opposite to each other along the thickness direction X. The plurality of electronic components 200 are all disposed on the first surface 11, and a groove 20 is formed between adjacent electronic components 200. The bottom surface 21 of the groove 20 is the first surface 11. A cover film 300 covers the surface 201 of the electronic components 200 facing away from the circuit board 100, the sidewalls 202 of the electronic components 200, and the bottom surface 21 of the groove 20. A flow hole 30 includes a first opening 31 located on the first surface 11 and a second opening 32 located on the second surface 12, the second opening 32 communicating with the outside. Along the thickness direction X, the orthographic projection of the groove 20 overlaps the orthographic projection of the first opening 31, and the orthographic projections of the first opening 31 and the second opening 32 are offset from each other.

[0016] In this embodiment, the electronic component 200 can be an active component or a passive component. The active component can be a chip, etc., while the passive component can be an inductor, capacitor, resistor, etc.

[0017] This application provides a flow-through hole 30 that penetrates the circuit board 100 along the thickness direction X. The orthographic projection of the groove 20 formed between two adjacent electronic components 200 covers the orthographic projection of the first opening 31 of the flow-through hole 30. The second opening 32 of the flow-through hole 30 communicates with the outside. This structure facilitates the discharge of air between two adjacent electronic components 200 through the flow-through hole 30 when the cover film 300 is applied. This allows the cover film 300 to fully or completely adhere to the sidewalls 202 and surfaces 201 of the electronic components 200, as well as the bottom surface 21 of the groove 20. While protecting the electronic components 200, this reduces the risk of problems such as decreased electrical performance, reduced mechanical stability, thermal management failure, poor environmental tolerance, and reduced reliability caused by residual air. Moreover, since the orthographic projections of the first opening 31 and the second opening 32 are staggered, it reduces the risk of the cover film 300 overflowing along the flow-through hole 30 onto the second surface 12 and affecting subsequent processes. Furthermore, by covering the electronic component 200 with the cover film 300, this application reduces the overall size of the packaging structure 400 compared to a design using an additional housing, thereby improving space utilization. In addition, the presence of the flow-through holes 30 can disperse or release stress on the packaging structure 400, reducing curling and improving reliability.

[0018] In this embodiment, the flow-through hole 30 further includes a first extension 33, a second extension 34, and a third extension 35 connecting the first extension 33 and the second extension 34. The first extension 33 and the second extension 34 can be arranged substantially parallel to each other. The first extension 33 extends from the first opening 31 along the thickness direction X, penetrating a portion of the circuit board 100. The second extension 34 extends from the second opening 32 along the thickness direction X, penetrating a portion of the circuit board 100. For example, the first extension 33, the second extension 34, and the third extension 35 form a flow-through hole 30 resembling an "h" shape. During fabrication, the cover film 300 enters the first opening 31 and flows along the first extension 33. However, because this application divides the flow-through hole 30 into the first extension 33, the second extension 34, and the third extension 35, compared to a straight hole design, the risk of the cover film 300 overflowing along the flow-through hole 30 and affecting subsequent processes can be effectively reduced or even prevented.

[0019] Please see Figure 2Another embodiment of this application provides a packaging structure 400, the difference being that at least a portion of the first extension 33 is provided with a cover film 300, while the second extension 34 and the third extension 35 are not provided with cover films 300. During fabrication, the cover film 300 enters the first opening 31 and flows along the first extension 33. However, since this application divides the flow hole 30 into the first extension 33, the second extension 34, and the third extension 35, compared to a straight hole solution, the risk of the cover film 300 overflowing along the flow hole 30 and affecting subsequent processes can be effectively reduced or even prevented.

[0020] In other embodiments, the flow hole 30 may include, but is not limited to, an "h" shape, as long as it meets the requirements of this application.

[0021] Please see Figure 1 and Figure 2 In this embodiment, the circuit board 100 includes a first circuit layer 101, a first dielectric layer 102, a first metal layer 103, a second dielectric layer 104, a second metal layer 105, a third dielectric layer 106, and a second circuit layer 107, stacked sequentially along the thickness direction X. A first extension 33 penetrates the first circuit layer 101, the first dielectric layer 102, the first metal layer 103, the second dielectric layer 104, and the second metal layer 105 along the thickness direction X. A second extension 34 penetrates the second circuit layer 107, the third dielectric layer 106, the second metal layer 105, the second dielectric layer 104, and the first metal layer 103 along the thickness direction X. A third extension 35 is disposed on the first metal layer 103. In other embodiments, the number of circuit layers, dielectric layers, and metal layers included in the circuit board 100 can be changed according to its requirements.

[0022] In this embodiment, the first circuit layer 101, the first metal layer 103, the second metal layer 105, and the second circuit layer 107 are made of copper. In other embodiments, the first circuit layer 101, the first metal layer 103, the second metal layer 105, and the second circuit layer 107 may also be made of other metal materials, as long as they meet the actual requirements of this application.

[0023] In some embodiments, the first dielectric layer 102, the second dielectric layer 104, and the third dielectric layer 106 are made of insulating resin. For example, the materials of the first dielectric layer 102, the second dielectric layer 104, and the third dielectric layer 106 can be selected from resins such as epoxy resin, BT resin, polyphenylene ether (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). In this embodiment, the first dielectric layer 102, the second dielectric layer 104, and the third dielectric layer 106 are made of polypropylene.

[0024] In this embodiment, the first extension 33 includes a first segment 331 and a second segment 332. The first segment 331 extends through the first circuit layer 101 and the first dielectric layer 102 along the thickness direction X from the first opening 31. The second segment 332 extends through the first metal layer 103, the second dielectric layer 104, and the second metal layer 105. The aperture of the first segment 331 is smaller than that of the second segment 332, which further reduces the risk of the cover film 300 overflowing along the flow hole 30 onto the second surface 12.

[0025] In this embodiment, along the thickness direction X, the size of the third extension 35 is approximately equal to the thickness of the first metal layer 103.

[0026] In this embodiment, a first solder resist layer 41 is provided on the side of the first dielectric layer 102 opposite to the first metal layer 103, and at least a portion of the first circuit layer 101 is exposed in the first solder resist layer 41. A second solder resist layer 42 may also be provided on the side of the third dielectric layer 106 opposite to the second metal layer 105, and at least a portion of the second circuit layer 107 is exposed in the second solder resist layer 42. The exposed first circuit layer 101 and second circuit layer 107 can be used to mount electronic components 200.

[0027] In this application, the first solder resist layer 41 and the second solder resist layer 42 are made of liquid photosensitive solder resist ink or dry film solder resist agent.

[0028] In this embodiment, a solder layer 50 is provided on the side of the first circuit layer 101 away from the first dielectric layer 102, and a solder layer 50 may also be provided on the side of the second circuit layer 107 away from the first dielectric layer 102. The first circuit layer 101 and the second circuit layer 107 are electrically connected to the electronic component 200 through the solder layer 50, respectively.

[0029] In this embodiment, the solder layer 50 is a tin layer. In other embodiments, the solder layer 50 may also be made of other conductive metal materials, as long as they meet the requirements of this application.

[0030] By providing a first solder resist layer 41 and a second solder resist layer 42 in this application, it is possible to avoid unnecessary connections between circuits caused by the molten solder layer 50 when electronic components 200 are soldered to the first circuit layer 101 through the solder layer 50 using reflow soldering technology. This could easily cause short circuits and damage electronic components 200.

[0031] In this embodiment, the cover film 300 is a polyimide film layer. This application uses a cover film 300 made of polyimide to encapsulate the electronic component 200. Since polyimide itself is a thermosetting material with excellent adhesion and is thinner, it can effectively protect the electronic component 200 while also providing waterproof and dustproof protection.

[0032] This application provides a flow-through hole 30 that penetrates the circuit board 100 along the thickness direction X. The orthographic projection of the groove 20 formed between two adjacent electronic components 200 covers the orthographic projection of the first opening 31 of the flow-through hole 30. The second opening 32 of the flow-through hole 30 communicates with the outside. This structure facilitates the discharge of air between two adjacent electronic components 200 through the flow-through hole 30 when the cover film 300 is applied. This allows the cover film 300 to fully or completely adhere to the sidewalls 202 and surfaces 201 of the electronic components 200, as well as the bottom surface 21 of the groove 20. While protecting the electronic components 200, this reduces the risk of problems such as decreased electrical performance, reduced mechanical stability, thermal management failure, poor environmental tolerance, and reduced reliability caused by residual air. Moreover, since the orthographic projections of the first opening 31 and the second opening 32 are staggered, it reduces the risk of the cover film 300 overflowing along the flow-through hole 30 onto the second surface 12 and affecting subsequent processes. Furthermore, by covering the electronic component 200 with the cover film 300, this application reduces the overall size of the packaging structure 400 compared to a design using an additional housing, thereby improving space utilization. In addition, the presence of the flow-through holes 30 can disperse or release stress on the packaging structure 400, reducing curling and improving reliability.

[0033] Furthermore, the packaging structure 400 of this application directly places the electronic component 200 on the first surface 11 of the circuit board 100. Compared with the traditional method, the electronic component 200 of this application does not have an additional plastic or ceramic shell, which can significantly reduce the overall size of the packaging structure 400 and improve space utilization.

[0034] The above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of this application should not depart from the spirit and scope of the technical solutions of this application.

Claims

1. A packaging structure comprising a circuit board and a plurality of electronic components, the circuit board including a first surface and a second surface disposed opposite to each other along the thickness direction of the circuit board, the electronic components being disposed on the first surface and a groove being formed between adjacent electronic components, the bottom surface of the groove being the first surface, characterized in that, The packaging structure further includes: A cover film covers the surface of the electronic component facing away from the circuit board, the sidewalls of the electronic component, and the bottom surface of the groove; The circuit board is provided with a flow hole that penetrates the circuit board along the thickness direction. The flow hole includes a first opening on the first surface and a second opening on the second surface. The second opening communicates with the outside. Along the thickness direction, the orthographic projection of the groove covers the orthographic projection of the first opening, and the orthographic projections of the first opening and the second opening are offset from each other.

2. The package structure of claim 1, wherein, The flow orifice further includes: A first extension section extends from the first opening along the thickness direction and penetrates a portion of the circuit board. A second extension section extends from the second opening along the thickness direction and penetrates a portion of the circuit board; and A third extension segment connects the first extension segment and the second extension segment; The first extension segment and the second extension segment are arranged in parallel.

3. The package structure of claim 2, wherein, The covering film is provided in at least part of the first extension section, while no covering film is provided in the second extension section and the third extension section.

4. The package structure of claim 2, wherein, The circuit board includes a first circuit layer, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, a third dielectric layer, and a second circuit layer, which are stacked sequentially along the thickness direction. The first extension extends through the first circuit layer, the first dielectric layer, the first metal layer, the second dielectric layer, and the second metal layer along the thickness direction; The second extension extends through the second circuit layer, the third dielectric layer, the second metal layer, the second dielectric layer, and the first metal layer along the thickness direction; The third extension is disposed on the first metal layer.

5. The package structure of claim 4, wherein, The first extension segment includes a first segment and a second segment; The first segment extends through the first circuit layer and the first dielectric layer from the first opening along the thickness direction; The second segment penetrates the first metal layer, the second dielectric layer, and the second metal layer; The aperture of the first segment is smaller than that of the second segment.

6. The package structure of claim 4, wherein, Along the thickness direction, the dimension of the third extension is equal to the thickness of the first metal layer.

7. The package structure of claim 4, wherein, The first dielectric layer has a first solder resist layer on the side opposite to the first metal layer, and at least a portion of the first circuit layer is exposed through the first solder resist layer; and / or The third dielectric layer has a second solder resist layer on the side opposite to the second metal layer, and at least a portion of the second circuit layer is exposed in the second solder resist layer.

8. The package structure of claim 4, wherein, A solder layer is provided on the side of the first circuit layer opposite to the first dielectric layer, and the solder layer is electrically connected to the electronic component.

9. The package structure of claim 1, wherein, The covering film is a polyimide film layer.

10. The package structure of claim 8, wherein, The solder layer is a tin layer.