Array substrate for reflective display device and reflective display device
By setting a conductive protective layer on the second metal layer of the array substrate or using a UTS conductive film and a short-pass filter, the problem of uneven display caused by the thickness difference of the array substrate is solved, achieving a more uniform display effect and cost optimization.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- KUSN INFOVISION OPTOELECTRONICS
- Filing Date
- 2025-07-08
- Publication Date
- 2026-06-26
AI Technical Summary
Existing reflective display devices have array substrates with significant thickness variations, leading to uneven display.
A conductive protective layer is formed on the upper surface of the second metal layer of the array substrate, or a pixel electrode and a third pad layer are formed using a UTS conductive film, and a short-pass filter is used to form a reflective layer to reduce the height difference between different pixel areas.
By protecting the pad layer and optimizing the electrode structure, uneven display issues were avoided, improving display uniformity and reducing manufacturing costs.
Smart Images

Figure CN224417143U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of reflective display technology, and in particular to an array substrate for a reflective display device and a reflective display device. Background Technology
[0002] Display panels offer advantages such as thinness, durability, and low power consumption, which are energy-efficient and environmentally friendly. However, they require a backlight, resulting in a thicker module and higher cost. Electronic paper displays (reflective displays) have emerged as a solution to meet the needs of the general public. Unlike LCD displays, which require a backlight, electronic paper displays can use external light sources to display images. Therefore, even in strong sunlight, the information on the electronic paper remains clearly visible without viewing angle issues. Furthermore, due to their energy efficiency, high reflectivity, and high contrast ratio, electronic paper displays are now widely used in e-readers (such as e-books and e-newspapers) and other electronic components (such as price tags).
[0003] Existing electronic paper displays typically employ E-Ink microcapsule technology (microcapsule electronic ink technology), SiPix microcup technology (microcup electrophoretic display technology), Bridgestone electronic liquid powder technology, cholesteric liquid crystal display (CLCD) technology, microelectromechanical systems (MEMS) technology, or electrowetting technology. However, existing electronic paper display technologies are less mature than liquid crystal display technologies, have lower mass production efficiency, higher manufacturing costs, and cannot achieve color display.
[0004] Existing reflective display devices using cholesteric liquid crystals (CLCs) suffer from limitations due to the pitch requirements of CLCs. A single-pitch CLC can only reflect one color while transmitting other colors. Therefore, single-layer CLC reflective display devices typically display text in yellow on a black background, black on a yellow background, black on a red background, or red on a black background, unable to achieve white text on a black background or black text on a white background like in a book. This significantly limits their application. Furthermore, the color quality of the reflected light from CLCs is poor, affecting the display effect. To achieve white or color display, reflective display devices require a three-layer CLC cell, reflecting red, green, and blue light separately to achieve white and color displays. However, three-layer CLC cells are not only thicker but also more expensive.
[0005] Figure 1 This is a schematic diagram of the structure of a reflective display device in the prior art. Figure 2 This is a schematic diagram of the pixel arrangement structure of a reflective display device in the prior art. For example... Figure 1 and Figure 2As shown, in order to reduce the thickness of the cholesteric liquid crystal reflective display device, the novel reflective display device uses cholesteric liquid crystal combined with dye molecules, thereby achieving full-color reflective display with a single liquid crystal cell. For example, by using blue cholesteric liquid crystal combined with blue dye molecules, the color filter substrate 20 only needs to be equipped with red and green resists, and the area corresponding to the blue pixel is transparent. Figure 3 This is a schematic diagram of the planar structure of the array substrate in an existing reflective display device. Figure 4 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in an existing reflective display device. Figure 5 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in a prior art reflective display device. Figures 3 to 5 As shown, the array substrate 10 uses transparent pixel electrodes made of ITO in the areas corresponding to red and green pixels, and a reflective layer 151 is also required in the areas corresponding to blue pixels. Because ITO has poor density, a thicker insulating layer (PV) needs to be fabricated to cover the ITO layer before fabricating the reflective layer 151. This avoids the bonding pads in the bonding area from being exposed during the etching process to form the reflective layer 151. Figure 4 and Figure 5 The pixels 112, 134, and 142 in the image are affected by etching. Since the thickness of the insulating layer is much greater than that of the reflective layer 151, the height difference between the corresponding areas of the blue pixels and the red and green pixels in the array substrate 10 is too large, resulting in uneven display. Utility Model Content
[0006] In order to overcome the shortcomings and deficiencies of the existing technology, the purpose of this utility model is to provide an array substrate for a reflective display device and a reflective display device, so as to solve the problem that the array substrate in the existing reflective display device has a large thickness difference and is prone to uneven display.
[0007] The objective of this utility model is achieved through the following technical solution:
[0008] This utility model provides an array substrate for a reflective display device, comprising:
[0009] A first metal layer is disposed above the array substrate. The first metal layer includes a scan line, a gate, and a first pad layer. The gate is electrically connected to the scan line. The first pad layer is located in the bonding area of the non-display area.
[0010] A gate insulating layer covering the first metal layer;
[0011] A semiconductor layer and a second metal layer are sequentially disposed above the gate insulating layer. The semiconductor layer includes an active layer, and the second metal layer includes a data line, a source, a drain, and a second pad layer. The source is electrically connected to the data line, and the source and the drain are electrically connected through the active layer. The second pad layer is located in the bonding area of the non-display area and is electrically connected to the first pad layer.
[0012] A first insulating layer is disposed above the gate insulating layer, and the first insulating layer covers the data line, the source, the drain, the second pad layer, and the active layer;
[0013] A transparent conductive layer is disposed above the first insulating layer. The transparent conductive layer includes a pixel electrode and a third pad layer. The pixel electrode is conductively connected to the drain electrode. The third pad layer is located in the bonding area of the non-display area and is conductively connected to the second pad layer.
[0014] A reflective layer is disposed above the transparent conductive layer, and the pixel electrode includes a first pixel electrode and a second pixel electrode. The reflective layer corresponds to the first pixel electrode and is in contact with the surface of the first pixel electrode.
[0015] The upper surface of the second metal layer is provided with a conductive protective layer, which includes a first protective structure and a second protective structure. The first protective structure covers the data line, the source electrode, and the drain electrode, and the second protective structure covers the second pad layer and is located between the second pad layer and the third pad layer.
[0016] Furthermore, the conductive protective layer is a metal oxide conductor layer.
[0017] This application also provides an array substrate for a reflective display device, comprising:
[0018] A first metal layer is disposed above the array substrate. The first metal layer includes a scan line, a gate, and a first pad layer. The gate is electrically connected to the scan line. The first pad layer is located in the bonding area of the non-display area.
[0019] A gate insulating layer covering the first metal layer;
[0020] A semiconductor layer and a second metal layer are sequentially disposed above the gate insulating layer. The semiconductor layer includes an active layer, and the second metal layer includes a data line, a source, a drain, and a second pad layer. The source is electrically connected to the data line, and the source and the drain are electrically connected through the active layer. The second pad layer is located in the bonding area of the non-display area and is electrically connected to the first pad layer.
[0021] A first insulating layer is disposed above the gate insulating layer, and the first insulating layer covers the data line, the source, the drain, the second pad layer, and the active layer;
[0022] A UTS conductive film is disposed above the first insulating layer. The UTS conductive film includes a pixel electrode and a third pad layer. The pixel electrode is conductively connected to the drain electrode. The third pad layer is located in the bonding area of the non-display area and is conductively connected to the second pad layer.
[0023] A reflective layer is disposed above the UTS conductive film. The pixel electrode includes a first pixel electrode and a second pixel electrode. The reflective layer corresponds to the first pixel electrode and is in contact with the surface of the first pixel electrode.
[0024] This application also provides an array substrate for a reflective display device, comprising:
[0025] A first metal layer is disposed above the array substrate. The first metal layer includes a scan line, a gate, and a first pad layer. The gate is electrically connected to the scan line. The first pad layer is located in the bonding area of the non-display area.
[0026] A gate insulating layer covering the first metal layer;
[0027] A semiconductor layer and a second metal layer are sequentially disposed above the gate insulating layer. The semiconductor layer includes an active layer, and the second metal layer includes a data line, a source, a drain, and a second pad layer. The source is electrically connected to the data line, and the source and the drain are electrically connected through the active layer. The second pad layer is located in the bonding area of the non-display area and is electrically connected to the first pad layer.
[0028] A first insulating layer is disposed above the gate insulating layer, and the first insulating layer covers the data line, the source, the drain, the second pad layer, and the active layer;
[0029] A transparent conductive layer is disposed above the first insulating layer. The transparent conductive layer includes a pixel electrode and a third pad layer. The pixel electrode is conductively connected to the drain electrode. The third pad layer is located in the bonding area of the non-display area and is conductively connected to the second pad layer.
[0030] A short-pass filter is disposed above the array substrate. The short-pass filter can transmit blue light and reflect red and green light. The projection of the short-pass filter on the array substrate covers all the pixel electrodes.
[0031] Furthermore, the short-pass filter is disposed above the transparent conductive layer and in contact with the surface of the pixel electrode.
[0032] Furthermore, the short-pass filter is disposed above the transparent conductive layer, and a second insulating layer is provided between the short-pass filter and the pixel electrode.
[0033] Furthermore, the short-pass filter is disposed above the array substrate and in contact with the surface of the array substrate.
[0034] Furthermore, the upper surface of the array substrate is provided with multiple grooves, and the short-pass filter is disposed in the grooves.
[0035] Furthermore, a planarization layer is provided between the first insulating layer and the transparent conductive layer, the planarization layer being a full-surface structure and covering the first insulating layer.
[0036] This application also provides a reflective display device, including a counter substrate, an array substrate disposed opposite to the counter substrate, and a cholesteric dye liquid crystal layer located between the counter substrate and the array substrate. The array substrate is provided with pixel electrodes, and the counter substrate is provided with a common electrode that cooperates with the pixel electrodes.
[0037] The reflective display device has a plurality of pixel units arranged in an array, each pixel unit having a corresponding pixel electrode, and the plurality of pixel units having a first pixel unit and a second pixel unit. The opposing substrate has a color resist layer in the area corresponding to the first pixel unit, and the opposing substrate is transparent in the area corresponding to the second pixel unit.
[0038] The array substrate is the array substrate described above.
[0039] The advantages of this invention are as follows: By setting a conductive protective layer on the upper surface of the second metal layer, the second pad in the bonding area can be protected, thus eliminating the need to create a thick insulating layer before the reflective layer, reducing the height difference between different pixel areas and avoiding uneven display. Alternatively, using a UTS conductive film to fabricate the pixel electrode and the third pad layer, due to the high density and strong adhesion of the UTS conductive film, the second pad can be avoided during the fabrication of the reflective layer, thus eliminating the need to create a thick insulating layer before the reflective layer, reducing the height difference between different pixel areas and avoiding uneven display. Furthermore, by using a short-pass filter to fabricate the reflective layer, all pixels can be covered by the short-pass filter, reducing the height difference between different pixel areas and avoiding uneven display. Attached Figure Description
[0040] Figure 1 This is a schematic diagram of the structure of a reflective display device in the prior art.
[0041] Figure 2 This is a schematic diagram of the pixel arrangement structure of a reflective display device in the prior art.
[0042] Figure 3 This is a schematic diagram of the planar structure of the array substrate in an existing reflective display device.
[0043] Figure 4 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in an existing reflective display device.
[0044] Figure 5 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in a prior art reflective display device.
[0045] Figure 6 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 1 of this utility model.
[0046] Figure 7 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in Embodiment 1 of this utility model.
[0047] Figures 8a-8i This is a schematic diagram of the fabrication process of the array substrate at the first pixel electrode in Embodiment 1 of this utility model.
[0048] Figure 9 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 2 of this utility model.
[0049] Figure 10 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in Embodiment 2 of this utility model.
[0050] Figure 11 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 3 of this utility model.
[0051] Figure 12 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in Embodiment 3 of this utility model.
[0052] Figure 13 This is a schematic diagram of the planar structure of the array substrate in Embodiment 3 of this utility model.
[0053] Figure 14 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 4 of this utility model.
[0054] Figure 15 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in Embodiment 4 of this utility model.
[0055] Figures 16a-16dThis is a schematic diagram of the process structure of the array substrate in the fabrication of the short-pass filter in Embodiment 1 of this utility model. Detailed Implementation
[0056] To further illustrate the technical means and effects adopted by this utility model to achieve its intended purpose, the following detailed description, in conjunction with the accompanying drawings and preferred embodiments, details the specific implementation methods, structures, features, and effects of the array substrate for a reflective display device and the reflective display device proposed according to this utility model:
[0057] [Example 1]
[0058] Figure 6 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 1 of this utility model. Figure 7 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in Embodiment 1 of this utility model.
[0059] like Figure 6 and Figure 7 As shown, an array substrate 10 for a reflective display device provided in Embodiment 1 of this utility model includes:
[0060] The first metal layer 11 disposed above the array substrate 10 Figure 8a The first metal layer 11 includes scan lines, gate 111, and a first pad layer 112. The gate 111 is electrically connected to the scan lines, and the first pad layer 112 is located in the bonding area of the non-display area. The array substrate 10 can be made of materials such as glass, quartz, silicon, acrylic, or polycarbonate. The array substrate 10 can also be a flexible substrate. Suitable materials for flexible substrates include, for example, polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or combinations thereof. The first metal layer 11 can be made of metals such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals such as Al / Mo, Cu / Mo, etc.
[0061] A gate insulating layer 101 covers the first metal layer 11. The first insulating layer 101 is a gate insulating layer, and the material of the first insulating layer 101 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of the two.
[0062] Semiconductor layer 12 (sequentially disposed above gate insulating layer 101) Figure 8b ) and the second metal layer 13 ( Figure 8cThe semiconductor layer 12 includes an active layer 121, and the second metal layer 13 includes a data line 131, a source 132, a drain 133, and a second pad layer 134. The source 132 is electrically connected to the data line 131, and the source 132 and drain 133 are electrically connected through the active layer 121. The second pad layer 134 is located in the bonding area of the non-display area and is electrically connected to the first pad layer 112. The semiconductor layer 12 can be made of polysilicon. The second metal layer 13 can be made of metal, such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals, such as Al / Mo or Cu / Mo.
[0063] A first insulating layer 102 is disposed above the gate insulating layer 101, and the first insulating layer 102 covers the data line 131, the source 132, the drain 133, the second pad layer 134, and the active layer 121. The material of the first insulating layer 102 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of the two.
[0064] A transparent conductive layer 14 disposed above the first insulating layer 102 Figure 8h The transparent conductive layer 14 includes a pixel electrode 141 and a third pad layer 142. The pixel electrode 141 is conductively connected to the drain 133, and the third pad layer 142 is located in the bonding area of the non-display area and is conductively connected to the second pad layer 134. The transparent conductive layer 14 is made of indium tin oxide (ITO), indium zinc oxide (IZO), cadmium tin oxide (CTO), aluminum zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), cadmium oxide (CdO), hafnium oxide (HfO), indium gallium zinc oxide (InGaZnO), indium gallium zinc magnesium oxide (InGaZnMgO), indium gallium magnesium oxide (InGaMgO), or indium gallium aluminum oxide (InGaAlO).
[0065] A reflective layer 151 is disposed above the transparent conductive layer 14. The pixel electrode 141 includes a first pixel electrode 1411 and a second pixel electrode 1412. The reflective layer 151 corresponds to the first pixel electrode 1411 and is in contact with the surface of the first pixel electrode 1411. The reflective layer 151 has a third metal 15 ( Figure 8i It is made of metal 15, which can be made of metals with good reflectivity such as silver (Ag) and aluminum (Al).
[0066] In this embodiment, a conductive protective layer 16 is provided on the upper surface of the second metal layer 13. Figure 8cThe conductive protective layer 16 includes a first protective structure 161 and a second protective structure 162. The first protective structure 161 covers the data line 131, the source 132, and the drain 133. The second protective structure 162 covers the second pad layer 134 and is located between the second pad layer 134 and the third pad layer 142. By providing a conductive protective layer 16 on the upper surface of the second metal layer 13, and covering the data line 131, the source 132, the drain 133, and the second pad layer 134, the second pad layer 134 can be well protected, thus eliminating the need to create a thick insulating layer before the reflective layer 151. Figure 4 (103) to reduce the height difference between different pixel areas and avoid uneven display problems.
[0067] Furthermore, the conductive protective layer 16 is a metal oxide conductor layer, which can be formed by conductive treatment of the metal oxide semiconductor layer. The metal oxide conductor layer can be etched together with the second metal layer 13 to simplify the fabrication process. The metal oxide semiconductor layer can be made of, for example, indium zinc oxide (InZnO), indium gallium oxide (InGaO), indium tin oxide (InSnO), zinc tin oxide (ZnSnO), gallium tin oxide (GaSnO), gallium zinc oxide (GaZnO), indium gallium zinc oxide (IGZO), or indium gallium zinc tin oxide (IGZTO).
[0068] In this embodiment, a planarization layer 104 is provided between the first insulating layer 102 and the transparent conductive layer 14. The planarization layer 104 is a full-surface structure and covers the first insulating layer 102, thereby improving the flatness of the entire array substrate.
[0069] Figures 8a-8i This is a schematic diagram of the fabrication process of the array substrate at the first pixel electrode in Embodiment 1 of this utility model. Figures 8a-8i As shown, the method for fabricating the array substrate in this embodiment includes:
[0070] like Figure 8a As shown, an array substrate 10 is provided. The array substrate 10 may be made of materials such as glass, quartz, silicon, acrylic or polycarbonate. The array substrate 10 may also be a flexible substrate. Suitable materials for flexible substrates include, for example, polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), polyethylene terephthalate (PET) or combinations thereof.
[0071] A first metal layer 11 is formed above the array substrate 10. The first metal layer 11 is etched to form patterned scan lines, gates 111, and a first pad layer 112. The gates 111 are electrically connected to the scan lines, and the first pad layer 112 is located in the bonding area of the non-display area at the edge of the array substrate 10. The first metal layer 11 can be made of metals such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals such as Al / Mo or Cu / Mo.
[0072] A gate insulating layer 101 covering the first metal layer 11 is formed on the array substrate 10, and the gate insulating layer 101 is etched to form openings in the region corresponding to the first pad layer 112, thereby exposing the first pad layer 112. The first insulating layer 101 is a gate insulating layer, and the material of the first insulating layer 101 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of both.
[0073] like Figure 8b As shown, a semiconductor layer 12 is formed above the gate insulating layer 101, and the semiconductor layer 12 is etched to form a patterned active layer 121. The semiconductor layer 12 is preferably made of a transparent metal oxide semiconductor material, such as indium zinc oxide (InZnO), indium gallium oxide (InGaO), indium tin oxide (InSnO), zinc tin oxide (ZnSnO), gallium tin oxide (GaSnO), gallium zinc oxide (GaZnO), indium gallium zinc oxide (IGZO), or indium gallium zinc tin oxide (IGZTO).
[0074] like Figures 8c to 8e As shown, a second metal layer 13 covering the semiconductor layer 12 is formed above the gate insulating layer 101. The second metal layer 13 is etched to form patterned data lines 131, source 132, drain 133, and a second pad layer 134. The source 132 is electrically connected to the data line 131, and the source 132 and drain 133 are connected through an active layer 121. The second pad layer 134 is located in the bonding area of the non-display area and is electrically connected to the first pad layer 112. Multiple scan lines and multiple data lines 131 are mutually insulated and intersecting to form multiple pixel units. The gate 111, active layer 121, source 132, and drain 133 together form a thin-film transistor. The second metal layer 13 can be made of metal, such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), etc., or combinations of the above metals such as Al / Mo, Cu / Mo, etc.
[0075] A conductive protective layer 16 is formed on the upper surface of the second metal layer 13. The conductive protective layer 16 is etched to form a patterned first protective structure 161 and a second protective structure 162. The first protective structure 161 covers the data line 131, the source electrode 132 and the drain electrode 133, and the second protective structure 162 covers the second pad layer 134.
[0076] In this embodiment, the conductive protective layer 16 and the second metal layer 13 are etched simultaneously using the same etching process, thereby reducing one etching process and lowering manufacturing costs. The conductive protective layer 16 is a metal oxide conductor layer, which can be formed by conductiveing a metal oxide semiconductor layer, such as... Figure 8d As shown, after forming the conductive protective layer 16, the conductive protective layer 16 is then subjected to a conductor-making process (e.g., plasma treatment, ion bombardment, hydrogen (H2) doping, helium (He) doping, and argon (Ar) doping, thereby turning the metal oxide semiconductor layer into a conductor). Then, the conductive protective layer 16 and the second metal layer 13 are simultaneously etched. Alternatively, the conductor-making process can be performed on the conductive protective layer 16 after simultaneously etching the conductive protective layer 16 and the second metal layer 13.
[0077] like Figure 8f As shown, a first insulating layer 102 is formed above the gate insulating layer 101, and the first insulating layer 102 covers the data line 131, the source 132, the drain 133, the active layer 121, and the second pad layer 134. The material of the first insulating layer 102 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of both.
[0078] like Figure 8g As shown, in this embodiment, a planarization layer 104 is further provided on the first insulating layer 102. The planarization layer 104 is a full-surface structure that covers the first insulating layer 102, thereby improving the flatness of the entire array substrate. Then, the first insulating layer 102 and the planarization layer 104 are etched simultaneously, so that the first insulating layer 102 and the planarization layer 104 form contact holes in the region corresponding to the drain 133 and open holes in the region corresponding to the second protective structure 162, so as to expose the drain 133 and the second protective structure 162.
[0079] like Figure 8hAs shown, a transparent electrode layer 14 is formed above the second insulating layer 103. The transparent electrode layer 14 is etched to form patterned pixel electrodes 141 and a third pad layer 142. The pixel electrodes 141 are electrically connected to the drain 133 through contact holes. The third pad layer 142 is located in the bonding area of the non-display area and is electrically connected to the second protective structure 162. The second transparent conductive layer 15 is made of indium tin oxide (ITO), indium zinc oxide (IZO), cadmium tin oxide (CTO), aluminum zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), cadmium oxide (CdO), hafnium oxide (HfO), indium gallium zinc oxide (InGaZnO), indium gallium zinc magnesium oxide (InGaZnMgO), indium gallium magnesium oxide (InGaMgO), or indium gallium aluminum oxide (InGaAlO).
[0080] like Figure 8i As shown, a third metal 15 covering the transparent electrode layer 14 is formed above the second insulating layer 103. The third metal 15 is etched to form a patterned reflective layer 151. In this embodiment, the pixel electrode 141 includes a first pixel electrode 1411 and a second pixel electrode 1412. The reflective layer 151 corresponds to and contacts the surface of the first pixel electrode 1411. The third metal 15 can be a metal with good reflectivity, such as silver (Ag) and aluminum (Al). Since the second pad layer 134 is protected by the second protective structure 162, the second protective structure 162 can provide good protection for the second pad layer 134 when the third metal 15 is etched. Therefore, it is not necessary to form a thick insulating layer before the reflective layer 151 to reduce the height difference between different pixel areas and avoid the problem of uneven display.
[0081] The first pad layer 112, the second pad layer 134, the second protective structure 162 and the third pad layer 142 are stacked sequentially in the bonding area at the edge of the array substrate 10 to form a pad.
[0082] [Example 2]
[0083] Figure 9 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 2 of this utility model. Figure 10 This is a schematic cross-sectional view of the array substrate at the second pixel electrode in Embodiment 2 of this utility model. Figure 9 and Figure 10 As shown, the array substrate 10 for a reflective display device provided in Embodiment 2 of this utility model includes:
[0084] The first metal layer 11 disposed above the array substrate 10 (reference) Figure 8aThe first metal layer 11 includes scan lines, gate 111, and a first pad layer 112. The gate 111 is electrically connected to the scan lines, and the first pad layer 112 is located in the bonding area of the non-display area. The array substrate 10 can be made of materials such as glass, quartz, silicon, acrylic, or polycarbonate. The array substrate 10 can also be a flexible substrate. Suitable materials for flexible substrates include, for example, polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or combinations thereof. The first metal layer 11 can be made of metals such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals such as Al / Mo, Cu / Mo, etc.
[0085] A gate insulating layer 101 covers the first metal layer 11. The first insulating layer 101 is a gate insulating layer, and the material of the first insulating layer 101 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of the two.
[0086] Semiconductor layer 12 (reference) sequentially disposed above gate insulating layer 101 Figure 8b ) and second metal layer 13 (reference) Figure 8c The semiconductor layer 12 includes an active layer 121, and the second metal layer 13 includes a data line 131, a source 132, a drain 133, and a second pad layer 134. The source 132 is electrically connected to the data line 131, and the source 132 and drain 133 are electrically connected through the active layer 121. The second pad layer 134 is located in the bonding area of the non-display area and is electrically connected to the first pad layer 112. The semiconductor layer 12 can be made of polysilicon. The second metal layer 13 can be made of metal, such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals, such as Al / Mo or Cu / Mo.
[0087] A first insulating layer 102 is disposed above the gate insulating layer 101, and the first insulating layer 102 covers the data line 131, the source 132, the drain 133, the second pad layer 134, and the active layer 121. The material of the first insulating layer 102 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of the two.
[0088] The UTS conductive film is disposed above the first insulating layer 102. The UTS conductive film includes a pixel electrode 141 and a third pad layer 142. The pixel electrode 141 is conductively connected to the drain electrode 133. The third pad layer 142 is located in the bonding area of the non-display area and is conductively connected to the second pad layer 134.
[0089] Among them, the UTS conductive film (Ultra Thin Silver TCF) uses pure silver as the conductive material and is a new type of flexible transparent conductive film. The UTS film uses magnetron sputtering technology to deposit conductive metal (PVD) on a transparent polyester film. The conductive film has uniform texture, high density, and strong adhesion.
[0090] The core technology of UTS conductive film is based on the superior conductivity of silver. It comprises different functional layers: Metal core introduction layer: This layer ensures uniform adhesion of the metal layer, significantly improving its surface roughness, thereby reducing the current distribution range and increasing conductivity. Silver fixing layer: This layer acts on both sides of the metal layer, overcoming the instability issues of silver's easy migration and oxidation, ensuring the long-term stable operation of the ideal conductive metal, silver. Anchoring layer: This layer enhances the bonding between layers, solving the problem of detachment that easily occurs in multi-layer structures, making the overall performance of the conductive film more stable.
[0091] The characteristics of UTS conductive film include:
[0092] 1. High conductivity: It has very low sheet resistance, which is mainly attributed to the use of pure silver as the conductive material. The atomic structure of silver results in a high concentration of free electrons and low resistivity, thus enabling fast and efficient current transmission.
[0093] 2. High transmittance: Unlike traditional ITO conductive films, UTS conductive films not only meet the requirements of low sheet resistance, but also have very high transmittance. This high transmittance is due to the properties of silver in the material.
[0094] 3. Flexibility: Based on the material properties, the UTS conductive film made of pure silver has high flexibility, which can be bent and repeatedly flexed.
[0095] 4. Stability: Through constant temperature and humidity testing and durability testing, the UTS conductive film exhibits excellent stability in its photoelectric properties, ensuring long-term reliable use under various environmental conditions.
[0096] A reflective layer 151 is disposed above the UTS conductive film. The pixel electrode 141 includes a first pixel electrode 1411 and a second pixel electrode 1412. The reflective layer 151 corresponds to the first pixel electrode 1411 and is in contact with the surface of the first pixel electrode 1411. The reflective layer 151 has a third metal 15 (reference). Figure 8i It is made of metal 15, which can be made of metals with good reflectivity such as silver (Ag) and aluminum (Al).
[0097] In this embodiment, a planarization layer 104 is provided between the first insulating layer 102 and the transparent conductive layer 14. The planarization layer 104 is a full-surface structure and covers the first insulating layer 102, thereby improving the flatness of the entire array substrate.
[0098] In this embodiment, the transparent electrode layer 14 in Embodiment 1 is replaced by a UTS conductive film. The pixel electrode 141 and the third pad layer 142 are fabricated using a UTS conductive film. The UTS conductive film has the characteristics of high density and strong adhesion. When etching the third metal 15, the UTS conductive film can play a good protective role for the second pad layer 134, so there is no need to make a thick insulating layer before the reflective layer, thereby reducing the height difference between different pixel areas and avoiding the problem of uneven display.
[0099] Of course, in other embodiments, a conductive protective layer 16 can also be provided on the upper surface of the second metal layer 13 (refer to Embodiment 1), so that the second pad layer 134 can be provided with dual protection.
[0100] [Example 3]
[0101] Figure 11 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 3 of this utility model. Figure 12 This is a schematic diagram of the cross-sectional structure of the array substrate at the second pixel electrode in Embodiment 3 of this utility model. Figure 13 This is a schematic diagram of the planar structure of the array substrate in Embodiment 3 of this utility model. Figures 11 to 13 As shown, the array substrate 10 for a reflective display device provided in Embodiment 3 of this utility model includes:
[0102] The first metal layer 11 disposed above the array substrate 10 (reference) Figure 8a The first metal layer 11 includes scan lines, gate 111, and a first pad layer 112. The gate 111 is electrically connected to the scan lines, and the first pad layer 112 is located in the bonding area of the non-display area. The array substrate 10 can be made of materials such as glass, quartz, silicon, acrylic, or polycarbonate. The array substrate 10 can also be a flexible substrate. Suitable materials for flexible substrates include, for example, polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or combinations thereof. The first metal layer 11 can be made of metals such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals such as Al / Mo, Cu / Mo, etc.
[0103] A gate insulating layer 101 covers the first metal layer 11. The first insulating layer 101 is a gate insulating layer, and the material of the first insulating layer 101 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of the two.
[0104] Semiconductor layer 12 (reference) sequentially disposed above gate insulating layer 101 Figure 8b ) and second metal layer 13 (reference) Figure 8c The semiconductor layer 12 includes an active layer 121, and the second metal layer 13 includes a data line 131, a source 132, a drain 133, and a second pad layer 134. The source 132 is electrically connected to the data line 131, and the source 132 and drain 133 are electrically connected through the active layer 121. The second pad layer 134 is located in the bonding area of the non-display area and is electrically connected to the first pad layer 112. The semiconductor layer 12 can be made of polysilicon. The second metal layer 13 can be made of metal, such as copper (Cu), silver (Ag), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), manganese (Mn), nickel (Ni), or combinations of the above metals, such as Al / Mo or Cu / Mo.
[0105] A first insulating layer 102 is disposed above the gate insulating layer 101, and the first insulating layer 102 covers the data line 131, the source 132, the drain 133, the second pad layer 134, and the active layer 121. The material of the first insulating layer 102 is silicon oxide (SiOx), silicon nitride (SiNx), or a combination of the two.
[0106] A transparent conductive layer 14 disposed above the first insulating layer 102 (reference) Figure 8h The transparent conductive layer 14 includes a pixel electrode 141 and a third pad layer 142. The pixel electrode 141 is conductively connected to the drain 133, and the third pad layer 142 is located in the bonding area of the non-display area and is conductively connected to the second pad layer 134. The transparent conductive layer 14 is made of indium tin oxide (ITO), indium zinc oxide (IZO), cadmium tin oxide (CTO), aluminum zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), cadmium oxide (CdO), hafnium oxide (HfO), indium gallium zinc oxide (InGaZnO), indium gallium zinc magnesium oxide (InGaZnMgO), indium gallium magnesium oxide (InGaMgO), or indium gallium aluminum oxide (InGaAlO).
[0107] A short-pass filter is disposed above the transparent conductive layer 14. The short-pass filter can transmit blue light and reflect red and green light. The projection of the short-pass filter on the array substrate 10 covers all the pixel electrodes 141. The short-pass filter includes a first reflective layer 1511 and a second reflective layer 1512. The pixel electrodes 141 include a first pixel electrode 1411 and a second pixel electrode 1412. The first reflective layer 1511 corresponds to the first pixel electrode 1411, and the second reflective layer 1512 corresponds to the second pixel electrode 1412.
[0108] Both short-pass filters (SPF) and long-pass filters (LPF) are distributed Bragg reflectors (DBRs). Short-pass filters transmit blue light with wavelengths below 490 nm and reflect red and green light with wavelengths between 500 and 680 nm, while long-pass filters transmit red and green light with wavelengths between 500 and 680 nm and reflect blue light with wavelengths below 490 nm. Distributed Bragg reflectors (DBRs) are reflectors used in waveguides. Long-pass and short-pass filters use SiO2 (silicon dioxide) and TiO2 (titanium dioxide) as alternating materials, and two different bandpasses are achieved by adjusting the thickness and logarithm of the film layers. When light passes through different media, it is reflected at the interface. The reflectivity is related to the refractive indices of the media. Therefore, if we periodically stack thin films with different refractive indices, when light passes through these films, the reflected light from each layer undergoes constructive interference due to the change in phase angle, and then combines with each other to produce strongly reflected light. If the number of layers becomes very large, and the difference in refractive indices n1, n2, n3, etc., becomes very small, the light travels as if it were in a single medium, and the reflection coefficient becomes very small. The interference effect caused by the multiple interferences of light is very significant, making it very sensitive to wavelength selection. When using a grating-like structure, this periodic structure is called a distributed Bragg reflector.
[0109] In this embodiment, the third metal 15 in Embodiment 1 is replaced by a short-pass filter. The reflective layer 151 is fabricated using a short-pass filter, allowing the reflective layer 151 to be placed above all pixel electrodes 141. This reduces the height difference between different pixel areas and avoids uneven display. Moreover, the short-pass filter uses SiO2 (silicon dioxide) and TiO2 (titanium dioxide) as alternating materials, and the fabrication process has virtually no impact on the second pad layer 134.
[0110] In this embodiment, the short-pass filter is disposed above the transparent conductive layer 14, and a second insulating layer 103 is provided between the short-pass filter and the pixel electrode 141. Since the second insulating layer 103 is provided between all short-pass filters and the pixel electrode 141, the height difference between different pixel areas is small. Of course, in other embodiments, the short-pass filter is disposed above the transparent conductive layer 14 and in contact with the surface of the pixel electrode 141.
[0111] Of course, in other embodiments, a conductive protective layer 16 may be provided on the upper surface of the second metal layer 13 (see Embodiment 1), and / or, a UTS conductive film may be used to fabricate the pixel electrode 141 and the third pad layer 142 (see Embodiment 2), thereby providing multiple protections for the second pad layer 134.
[0112] [Example 4]
[0113] Figure 14 This is a schematic diagram of the cross-sectional structure of the array substrate at the first pixel electrode in Embodiment 4 of this utility model. Figure 15 This is a schematic cross-sectional view of the array substrate at the second pixel electrode in Embodiment 4 of this utility model. Figure 14 and Figure 15 As shown, the array substrate for a reflective display device provided in Embodiment 4 of this utility model is similar to that in Embodiment 3 (… Figures 11 to 13 The array substrates used in reflective display devices are basically the same, except that:
[0114] In this embodiment, a short-pass filter is disposed above the array substrate 10 and in contact with the surface of the array substrate 10. Since the short-pass filter can be fabricated over the entire surface, fabricating the short-pass filter first on the surface of the array substrate 10 can reduce the difficulty of fabrication.
[0115] Furthermore, the upper surface of the array substrate 10 is provided with multiple grooves, and a short-pass filter is disposed in the groove. By placing the short-pass filter in the groove, it can be used to concentrate the scattered light and improve the brightness of the reflected light.
[0116] Figures 16a-16d This is a schematic diagram of the process structure for fabricating a short-pass filter using an array substrate in Embodiment 1 of this utility model. Figures 16a-16d As shown, the method for fabricating the array substrate in this embodiment includes:
[0117] like Figure 16a As shown, an array substrate 10 is provided, and a mask 1 is covered on top of the array substrate 10. The array substrate 10 can be made of materials such as glass, quartz, silicon, acrylic, or polycarbonate. The array substrate 10 can also be a flexible substrate. Suitable materials for flexible substrates include, for example, polyethersulfone (PES), polyethylene naphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or combinations thereof.
[0118] like Figures 16b-16c As shown, the array substrate 10 is etched to form multiple grooves on its upper surface, and then the mask 1 is peeled off. Taking a glass substrate as an example, the mask 1 covering the array substrate 10 is immersed in a glass etching solution (e.g., hydrofluoric acid) to etch the grooves.
[0119] like Figure 16d As shown, a short-pass filter is fabricated on the surface of the array substrate 10, so that the short-pass filter can also have multiple groove structures, which can be used to concentrate the scattered light and improve the brightness of the reflected light.
[0120] Those skilled in the art should understand that the remaining structure and working principle of this embodiment are the same as those of Embodiment 3, and will not be repeated here.
[0121] refer to Figure 1-3 As shown, this application also provides a reflective display device, including a counter substrate 20, an array substrate 10 disposed opposite to the counter substrate 20, and a cholesteric dye liquid crystal layer 30 located between the counter substrate 20 and the array substrate 10. The array substrate 10 is the array substrate 10 described above. The cholesteric dye liquid crystal layer 30 includes first-color cholesteric liquid crystal molecules 31 and first-color dye liquid crystal molecules 32 mixed with the first-color cholesteric liquid crystal molecules 31. The first-color dye liquid crystal molecules 32 rotate synchronously with the first-color cholesteric liquid crystal molecules 31, and the first-color cholesteric liquid crystal molecules 31 reflect first-color light in the reflective state.
[0122] The reflective display device has multiple pixel units P arranged in an array. Among the pixel units P, there is a first pixel unit P1 and a second pixel unit P2. The opposing substrate 20 is transparent in the area corresponding to the second pixel unit P2. The opposing substrate 20 has a color resist layer 23 in the area corresponding to the first pixel unit P1. The array substrate 10 has a reflective layer 151 in the area corresponding to the first pixel unit P1. Specifically, for example, the opposing substrate 20 has a transparent color resist W in the area corresponding to the second pixel unit P2 and a color resist in the area corresponding to the first pixel unit P1. In other embodiments, the opposing substrate 20 may not have a transparent color resist W in the area corresponding to the second pixel unit P2; this is not a limitation.
[0123] When the first pixel unit P1 is in a bright state, the first-color cholesteric liquid crystal molecules 31 and the first-color dye liquid crystal molecules 32 in the corresponding area of the first pixel unit P1 are both perpendicular to the opposing substrate 20 and the array substrate 10, or both are in a disordered tilted state, making the first-color cholesteric liquid crystal molecules 31 in the corresponding area of the first pixel unit P1 transparent or hazy. When the first pixel unit P1 is in a dark state, the first-color cholesteric liquid crystal molecules 31 and the first-color dye liquid crystal molecules 32 in the corresponding area of the first pixel unit P1 are both in a flat position, making the first-color cholesteric liquid crystal molecules 31 in the corresponding area of the first pixel unit P1 reflective. Ambient light is absorbed by the color resist layer 23 and the first-color dye liquid crystal molecules 32, resulting in black. When the second pixel unit P2 is in a bright state, the first-color cholesteric liquid crystal molecules 31 and the first-color dye liquid crystal molecules 32 in the corresponding area of the second pixel unit P2 are both in a flat position, making the first-color cholesteric liquid crystal molecules 31 in the corresponding area of the second pixel unit P2 reflective. When the second pixel unit P2 is in a dark state, the first color cholesteric liquid crystal molecules 31 and the first color dye liquid crystal molecules 32 in the area corresponding to the second pixel unit P2 are both perpendicular to the opposing substrate 20 and the array substrate 10 or are both in a disordered tilted state, so that the first color cholesteric liquid crystal molecules 31 in the area corresponding to the second pixel unit P2 are all in a transparent state or a hazy state, and the ambient light passes directly through the cholesteric dye liquid crystal layer 30 and is absorbed by the light-absorbing layer, appearing black or hazy black.
[0124] Furthermore, the array substrate 10 is provided with pixel electrodes 141, and each pixel unit P is provided with a corresponding pixel electrode 141. The pixel electrodes 141 correspond one-to-one with the pixel units P, and the pixel electrodes 141 are block electrodes corresponding to the pixel units P. The opposing substrate 20 is provided with a common electrode 21 that cooperates with the pixel electrodes 141. The common electrode 21 is a planar electrode that covers the entire surface of the opposing substrate 20.
[0125] The cholesteric liquid crystal molecule 31 of the first color possesses three stable textures: P-state (Planar, reflective state), FC-state (Focal Conic, hazy state), and H-state (transparent state). In the P-state, the cholesteric liquid crystal's reflection spectrum is in the visible spectrum, reflecting bright colored light; the specific reflected color can be set according to the pitch of the cholesteric liquid crystal. In the FC-state, the cholesteric liquid crystal no longer reflects the aforementioned colored light, and light can be scattered and transmitted through it. In the H-state, the cholesteric liquid crystal no longer reflects the aforementioned colored light, and light can pass directly through it without scattering. Under a certain electric field, these three states can interconvert.
[0126] The first color dye liquid crystal molecule 32 uses positive dye liquid crystal molecules. Positive dye liquid crystal molecules have a greater light absorption capacity along their long axis than along their short axis, exhibiting a strong ability to absorb light along their long axis and a very weak ability to absorb light along their short axis. The long axis absorbs a portion of the light, thus displaying the color corresponding to the first color dye liquid crystal molecule 32. For example, if the first color dye liquid crystal molecule 32 uses violet dye liquid crystal molecules, the long axis of the violet dye liquid crystal molecules can absorb the green wavelength and display violet; similarly, if it is a red dye liquid crystal molecule, the long axis of the red dye liquid crystal molecules can absorb the cyan wavelength and display red. Of course, the first color dye liquid crystal molecule 32 can also use other single-color dye liquid crystal molecules, such as blue, green, yellow, etc.
[0127] In this embodiment, the first pixel unit P1 includes a second color pixel unit P11 and a third color pixel unit P12. The color resist layer 23 includes a second color resist layer 231 corresponding to the second color pixel unit P11 and a third color resist layer 232 corresponding to the third color pixel unit P12. A column of second color pixel units P11, a column of third color pixel units P12, and a column of second pixel units P2 are arranged periodically in the row direction. The first color, second color, and third color are each one of red, green, and blue. In this embodiment, the first color cholesteric liquid crystal molecule 31 is a red cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a red dye liquid crystal molecule, the second color resist layer 231 is a green color resist, and the third color resist layer 232 is a blue color resist. Of course, in other embodiments, the first color cholesteric liquid crystal molecule 31 is a red cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a red dye liquid crystal molecule, the second color resist layer 231 is a blue color resist, and the third color resist layer 232 is a green color resist; or, the first color cholesteric liquid crystal molecule 31 is a green cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a green dye liquid crystal molecule, the second color resist layer 231 is a red color resist, and the third color resist layer 232 is a blue color resist; or, the first color cholesteric liquid crystal molecule 31 is a green cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a green dye liquid crystal molecule, the second color resist layer 231 is a red color resist, and the third color resist layer 232 is a blue color resist; or, the first color cholesteric liquid crystal molecule 31 is a green cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a red .... The first color resist layer 32 is a green dye liquid crystal molecule, the second color resist layer 231 is a blue color resist, and the third color resist layer 232 is a red color resist; or, the first color cholesteric liquid crystal molecule 31 is a blue cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a blue dye liquid crystal molecule, the second color resist layer 231 is a red color resist, and the third color resist layer 232 is a green color resist; or, the first color cholesteric liquid crystal molecule 31 is a blue cholesteric liquid crystal molecule, the first color dye liquid crystal molecule 32 is a blue dye liquid crystal molecule, the second color resist layer 231 is a green color resist, and the third color resist layer 232 is a red color resist. No restrictions are imposed here.
[0128] like Figure 3 As shown, the array substrate 10 has multiple scan lines 101 and multiple data lines 102. The scan lines 101 and data lines 102 are mutually insulated and intersecting to form multiple pixel units P. Each pixel unit P has a thin-film transistor 103 and a pixel electrode 141. The pixel electrode 141 is electrically connected to the scan lines 101 and data lines 102 adjacent to the thin-film transistor 103 through the thin-film transistor 103. The thin-film transistor 103 includes a gate, an active layer, a drain, and a source. The gate and the scan lines 101 are located on the same layer and are electrically connected. The gate and the active layer are isolated by an insulating layer. The source is electrically connected to the data lines 102, and the drain is electrically connected to the pixel electrode 141 through a contact hole.
[0129] In this embodiment, among the plurality of pixel electrodes 141, there are a first pixel electrode 1411 and a second pixel electrode 1412. The first pixel electrode 1411 corresponds to the first pixel unit P1, and the second pixel electrode 1412 corresponds to the second pixel unit P2. A reflective layer 151 is provided above the first pixel electrode 1411. The pixel electrode 141 can be made of transparent electrodes such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the reflective layer 151 can be made of aluminum (Al) or silver (Ag).
[0130] Furthermore, a light-absorbing layer 40 is provided on the array substrate 10. The light-absorbing layer 40 is used to absorb light passing through the cholesteric dye liquid crystal layer 30, thereby making the reflective display device appear darker in black, thus improving contrast. Optionally, the light-absorbing layer 40 uses black ink with an L value (representing brightness) greater than 25 and an OD value (optical density) greater than 4, thus giving the light-absorbing layer 40 characteristics such as high blackness and good gloss, ensuring a deeper black image. Of course, the light-absorbing layer 40 can be made of BM material. In this embodiment, the light-absorbing layer 40 is a planar structure that covers the entire surface of the array substrate 10, and the light-absorbing layer 40 covers the side of the array substrate 10 away from the cholesteric dye liquid crystal layer 30.
[0131] Furthermore, a black matrix 22 is provided on the opposing substrate 20. The black matrix 22 is provided in both the display area and the non-display area of the reflective display device. The black matrix 22 separates multiple pixel units P from each other in the display area.
[0132] In this document, the directional terms such as up, down, left, right, front, and back are defined according to the position of the structures in the accompanying drawings and the relative positions of the structures, and are only used for clarity and convenience in expressing the technical solution. It should be understood that the use of these directional terms should not limit the scope of protection claimed in this application. It should also be understood that the terms "first" and "second," etc., used herein are only used for distinction in name and are not used to limit the number or order.
[0133] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any way. Although the present utility model has been disclosed above with reference to a preferred embodiment, it is not intended to limit the present utility model. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content without departing from the scope of the technical solution of the present utility model. These are equivalent embodiments with equivalent changes. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present utility model without departing from the scope of the technical solution of the present utility model shall still fall within the protection scope of the technical solution of the present utility model.
Claims
1. An array substrate for a reflective display device, characterized in that, include: A first metal layer (11) is disposed above the array substrate (10). The first metal layer (11) includes a scan line, a gate (111) and a first pad layer (112). The gate (111) is electrically connected to the scan line, and the first pad layer (112) is located in the bonding area of the non-display area. A gate insulating layer (101) covering the first metal layer (11); A semiconductor layer (12) and a second metal layer (13) are sequentially disposed above the gate insulating layer (101). The semiconductor layer (12) includes an active layer (121). The second metal layer (13) includes a data line (131), a source (132), a drain (133), and a second pad layer (134). The source (132) is electrically connected to the data line (131). The source (132) and the drain (133) are electrically connected through the active layer (121). The second pad layer (134) is located in the bonding area of the non-display area and is electrically connected to the first pad layer (112). A first insulating layer (102) is disposed above the gate insulating layer (101), and the first insulating layer (102) covers the data line (131), the source (132), the drain (133), the second pad layer (134), and the active layer (121); A transparent conductive layer (14) is disposed above the first insulating layer (102). The transparent conductive layer (14) includes a pixel electrode (141) and a third pad layer (142). The pixel electrode (141) is conductively connected to the drain electrode (133). The third pad layer (142) is located in the bonding area of the non-display area and is conductively connected to the second pad layer (134). A reflective layer (151) is disposed above the transparent conductive layer (14). The pixel electrode (141) includes a first pixel electrode (1411) and a second pixel electrode (1412). The reflective layer (151) corresponds to the first pixel electrode (1411) and is in contact with the surface of the first pixel electrode (1411). The upper surface of the second metal layer (13) is provided with a conductive protective layer (16), the conductive protective layer (16) includes a first protective structure (161) and a second protective structure (162). The first protective structure (161) covers the data line (131), the source (132) and the drain (133). The second protective structure (162) covers the second pad layer (134) and is located between the second pad layer (134) and the third pad layer (142).
2. The array substrate for a reflective display device according to claim 1, characterized in that, The conductive protective layer (16) is a metal oxide conductor layer.
3. An array substrate for a reflective display device, characterized in that, include: A first metal layer (11) is disposed above the array substrate (10). The first metal layer (11) includes a scan line, a gate (111) and a first pad layer (112). The gate (111) is electrically connected to the scan line, and the first pad layer (112) is located in the bonding area of the non-display area. A gate insulating layer (101) covering the first metal layer (11); A semiconductor layer (12) and a second metal layer (13) are sequentially disposed above the gate insulating layer (101). The semiconductor layer (12) includes an active layer (121). The second metal layer (13) includes a data line (131), a source (132), a drain (133), and a second pad layer (134). The source (132) is electrically connected to the data line (131). The source (132) and the drain (133) are electrically connected through the active layer (121). The second pad layer (134) is located in the bonding area of the non-display area and is electrically connected to the first pad layer (112). A first insulating layer (102) is disposed above the gate insulating layer (101), and the first insulating layer (102) covers the data line (131), the source (132), the drain (133), the second pad layer (134), and the active layer (121); A UTS conductive film is disposed above the first insulating layer (102). The UTS conductive film includes a pixel electrode (141) and a third pad layer (142). The pixel electrode (141) is conductively connected to the drain electrode (133). The third pad layer (142) is located in the bonding area of the non-display area and is conductively connected to the second pad layer (134). A reflective layer (151) is disposed above the UTS conductive film. The pixel electrode (141) includes a first pixel electrode (1411) and a second pixel electrode (1412). The reflective layer (151) corresponds to the first pixel electrode (1411) and is in contact with the surface of the first pixel electrode (1411).
4. An array substrate for a reflective display device, characterized in that, include: A first metal layer (11) is disposed above the array substrate (10). The first metal layer (11) includes a scan line, a gate (111) and a first pad layer (112). The gate (111) is electrically connected to the scan line, and the first pad layer (112) is located in the bonding area of the non-display area. A gate insulating layer (101) covering the first metal layer (11); A semiconductor layer (12) and a second metal layer (13) are sequentially disposed above the gate insulating layer (101). The semiconductor layer (12) includes an active layer (121). The second metal layer (13) includes a data line (131), a source (132), a drain (133), and a second pad layer (134). The source (132) is electrically connected to the data line (131). The source (132) and the drain (133) are electrically connected through the active layer (121). The second pad layer (134) is located in the bonding area of the non-display area and is electrically connected to the first pad layer (112). A first insulating layer (102) is disposed above the gate insulating layer (101), and the first insulating layer (102) covers the data line (131), the source (132), the drain (133), the second pad layer (134), and the active layer (121); A transparent conductive layer (14) is disposed above the first insulating layer (102). The transparent conductive layer (14) includes a pixel electrode (141) and a third pad layer (142). The pixel electrode (141) is conductively connected to the drain electrode (133). The third pad layer (142) is located in the bonding area of the non-display area and is conductively connected to the second pad layer (134). A short-pass filter is disposed above the array substrate (10). The short-pass filter can transmit blue light and reflect red and green light. The projection of the short-pass filter on the array substrate (10) covers all the pixel electrodes (141).
5. The array substrate for a reflective display device according to claim 4, characterized in that, The short-pass filter is disposed above the transparent conductive layer (14) and in contact with the surface of the pixel electrode (141).
6. The array substrate for a reflective display device according to claim 4, characterized in that, The short-pass filter is disposed above the transparent conductive layer (14), and a second insulating layer (103) is provided between the short-pass filter and the pixel electrode (141).
7. The array substrate for a reflective display device according to claim 4, characterized in that, The short-pass filter is disposed above the array substrate (10) and in contact with the surface of the array substrate (10).
8. The array substrate for a reflective display device according to claim 7, characterized in that, The upper surface of the array substrate (10) is provided with a plurality of grooves, and the short-pass filter is disposed in the grooves.
9. The array substrate for a reflective display device according to any one of claims 1-8, characterized in that, A planarization layer (104) is provided between the first insulating layer (102) and the transparent conductive layer (14), and the planarization layer (104) is a full-surface structure that covers the first insulating layer (102).
10. A reflective display device, characterized in that, The system includes a counter substrate (20), an array substrate (10) disposed opposite to the counter substrate (20), and a cholesteric dye liquid crystal layer (30) located between the counter substrate (20) and the array substrate (10). The array substrate (10) is provided with a pixel electrode (141), and the counter substrate (20) is provided with a common electrode (21) that cooperates with the pixel electrode (141). The reflective display device has a plurality of pixel units (P) arranged in an array, each pixel unit (P) having a corresponding pixel electrode (141), and the plurality of pixel units (P) having a first pixel unit (P1) and a second pixel unit (P2). The opposing substrate (20) has a color resist layer (23) in the area corresponding to the first pixel unit (P1), and the opposing substrate (20) is transparent in the area corresponding to the second pixel unit (P2). The array substrate (10) is the array substrate (10) as described in any one of claims 1-9.